Infi90 System Tuning
Infi90 System Tuning
Infi90 System Tuning
1 System load.
2 Module Tuning.
The target segment cycle time can be set less than 10 mSec but the Checkpoint period
(S4 of FC 82) must be adjusted upward such that the following condition is true:
S4 * S2 >= 20 mSec.
For the case where the Target Cycle Time is less than the actual Segment Execution
Time (Refer to S2 description in FC 82 to calculate this) such as is the case when S2 is
set to zero, the rule is: Actual Segment Execution Time * S4 > 20 mSec.
It is to be advised to raise the Maximum exception report time for every segment and
make the number unique for the complete PCU, with a lowest setting of 5 minutes (300
seconds).
The frequency the NPM scans for exeption reports is set with dipswitch SW4 (Infinet
mode):
0 0 1
0 1 2
1 0 4
1 1 8
It is to be advised to set the pollrate to 1 unless specific needs arise. Fast pollrates
combined with a large number of exeptionreports can cause heavy load for the NPM.
For redundant controllers one status tag should exist, for the primary module address
only (situations with a status tag for both primary and backup controller can cause
Controlway errors).
For redundant NPM’s two status tags should exist, one for each module (module address
0 and module address 1).
For the IIT only one tag should exist, for the local side of the Bridge only.
In some occaisions the improper setting of J5 can result in total loss of Controlway
communication.
6 ROM Checksum.
Set all Infinet communication modules to enable the ROM checksum routine:
NPM SW4-1 = 0
NIS SW3-2 = 1
As many Remote I/O firmware issues exist, it is mandatory to use proper firmware
combinations for the Controller, RIO modules and Analog Input slaves (preferably
upgrade to latest versions).
Proper tuning of the Modulebus I/O period (see 2.4), the Maximum exception report
time and Checkpoint period (see 2.3) are crucial for a reliable Remote I/O connection as
well.
Finally check the Module free time (block 12) to be at least 30%.
It is mandatory to use proper firmware combinations for the BRC and the IOR
(preferably upgrade to latest versions).
Block address of FC227 should be lower than the FC228. Block address of the
FC228 should be lower than the I/O channels ( FC222 thru FC225 + FC229).
The FC222 thru 225 must be daisy chained. The first I/O block connected to
FC228 represents channel one, the second block in that chain represents channel
2, …….
While you can skip a channel when actually wiring the I/O, you must represent all
channels up to the last channel used for the module. Example: digital input. Field
wiring skips channel 3. However, channel 4 is landed. To successfully get the
data from channel 4 into the controller, the configuration must include 4 FC224
daisy chained to represent channel 1,2,3, and 4.
The FC227, all FC228 associated to that FC227, and all channel function codes
( FC222, 223, 224, 225, 226, 229 ) associated to that FC227 must be in the same
segment.