5.

State Machine Charts and Microprogramming

Dr Alister Hamilton

5-1
 Introduction
 A state machine chart (SM chart) may be
used to describe the behavior of a state
machine. These charts are also called
algorithmic state machine charts (ASM
charts).
 They are an alternative to using state graphs.
 SM charts are often used to design control
units for digital systems.
 Microprogramming is a technique for
implementing the SM chart.

5-2
 SM Charts
 Resemble software flow charts.
 Useful in hardware design.
 Advantages over state graphs:
 Easier to understand.
 Conditions of a state graph are automatically
fulfilled in an SM chart.
 Directly leads to a hardware realisation.
 May be converted into different equivalent
forms resulting in different implementations.

5-3
 SM Charts (continued)
 Three components:
 State box: a rectangular box; contains a state
name followed by a slash (/) and an optional output
list. After a state assignment has been made, a
state code may be placed outside the box at the
State code: Code
assigned to a state.
One-hot encoding

top.
and etc.

 Decision box: a diamond-shaped symbol with true

and false branches. The condition placed in the box
is a Boolean expression.
 Conditional output box: a box with curved ends;
contains a conditional output list. The conditional
outputs depend on both the state of the system and
the inputs. Often comes afte the
decision box. Hence, a
‘conditional’ output box.

5-4
SM Charts (continued)

5-5
 SM Charts (continued)
 An SM chart is constructed from SM blocks:
 Each one contains exactly one state box,
together with the decision boxes and
conditional output boxes.
 An SM block has one entrance path and one or
more exit paths.
 Each SM block describes the machine operation
during the time that the machine is in one
state.

5-6
 SM Charts (continued)
 Example of an SM block:

ONLY One State

Remember this is a SM
block. SM Charts are made
from multiple SM blocks.

5-7
 SM Charts (continued)
 Conditions in the decision boxes are evaluated
to determine which paths are followed
through the SM block.
 When a conditional output box is encountered
along a path, the corresponding conditional
outputs become true.
 If an output is not encountered along a path,
that output is false by default.
 A path through an SM block from entrance to
exit is referred to as a link path.

5-8
 SM Charts (continued)
 Two equivalent SM blocks:
 In both (a) and (b), the output Z2 = 1 if
X1 = 0; the next state is S2 if X2 = 0 and S3 if
X2 = 1.

a) is much more
efficient.

5-9
 SM Charts (continued)
 Rules for creating an SM block:
 For every valid combination of input variables,
there must be exactly one exit path defined.
 No internal feedback within a block is allowed.

a) There is internal
feedback -> INCORRECT!
However, exit paths are
correct.

5-10
 Derivation of SM Charts
 The method used to derive an SM chart for a
sequential control circuit is similar to that
used to derive the state graph:
 1. Draw a block diagram of the system one is
controlling.
 2. Define the required input and output signals
to the control circuit.
 3. Construct an SM chart that tests the input
signals and generates the proper sequence of
output signals.

5-11
 Derivation of SM Charts:
Binary Multiplier Example
 Conversion of an SM case(State) begin

chart to a Verilog HDL:

State S0 .
.
.
endcase

 A case statement can if/ else if/ else

be used to specify
what happens in each State S1

state. Each condition

box corresponds
if/ else if/ else

directly to an if State S2

statement. if/ else if/ else

State S3
if/ else if/ else

5-12
 Derivation of SM Charts:
Binary Multiplier (continued)
 Two always constructs are used for Verilog code:
 1. Represents the combinational part of the circuit.
 2. Updates the state register on the rising edge of the
clock.
 The signals Load, Sh, and Ad are turned on in the
appropriate states, and they must be turned off
when the state changes.
 A way to do this is to set them all to 0 at the start of the
module.
 Verilog HDL code to implement this function is
beyond the scope of the course.
 But may be attempted by the interested student.

5-13
 Derivation of SM Charts:
Dice Game Example
 Game involves 2 dice and a counter.
 Rules:
 1. After the first roll of the dice, the player wins
if the sum is 7 or 11. The player loses if the
sum is 2, 3, or 12. Otherwise, the sum the
player obtained on the first roll is a point, and
they must roll again.
 2. On the second or next roll of the dice, the
player wins if the sum equals the point, and he
or she loses if the sum is 7. Otherwise, the
player must roll again until they win or lose.
1) W: Sum is 7 or 11.
L: Sum is 2, 3 or 12.
2, n) W: Sum equals point (sum from before)
L: Sum is 7.

5-14
 Derivation of SM Charts:
Dice Game (continued)
 Block diagram:

5-15
 Derivation of SM Charts:
Dice Game (continued)
 Flowchart:

5-16
 Derivation of SM Charts:
Dice Game (continued)
 Conversion S0 - Waiting for roll button (Rb)
S1 - Rb no longer set. Roll is set high
S2 - Win state
S3 - Lose state

of flowchart
S4 - Waiting for roll button (Rb)
S5 - Rb no longer set. Roll is set high

to SM chart:

5-17
 Derivation of SM Charts:
Dice Game (continued)
 An alternative to using an SM chart is using a
state graph:

5-18
 Derivation of SM Charts:
Dice Game (continued)
 DiceGame module connected to GameTest
module:

5-19
 Realisation of SM Charts
 Methods used to realise SM charts are similar
to those used to realise state graphs.
Realisation will consist of a combinational
subcircuit, together with flip-flops for storing
the state of the circuit.
 It is difficult to eliminate redundant states in
an SM chart, as the chart is usually
incompletely specified. Also, combining states
may make the SM chart more difficult to
interpret.

5-20
 Realisation of SM Charts
(continued)
 Before deriving next-state and output
equations from an SM chart, a state
assignment must be made.
 Techniques include one-hot state assignment or
encoded state assignment.

5-21
 Realisation of SM Charts: Binary
Multiplier Controller
 SM Chart for multiplier controller:

Load = A’B’St

Using BNN (Binary Outputs after

Natural Numbers): tracing link paths:
S0 = AB = 00 Load = A’B’St
S1 = AB = 01 Ad = A’BM
S2 = AB = 10 Sh = A’BM’ Ad = A’BM Sh = A’BM’ + AB’
S3 = AB = 11 Done = AB

Sh = AB’

Done = AB

5-22
 Realisation of SM Charts: Binary
Multiplier Controller (continued) Two flip flops
implie two
outputs A and B

 We can realise this SM chart with two D flip-flops

and a combinational circuit. Assume that the state
assignments are:
 AB = 00 for S0, AB = 01 for S1, AB = 10 for S2, and AB =
11 for S3.
 Logic equations are derived by tracing link paths on the
SM chart and then simplifying the resulting equations.
 Load = A’B’St
 Sh = A’BM’(K’ + K) + AB’(K’ + K) = A’BM’ + AB’
 Ad = A’BM
 Done = AB

5-23
 Realisation of SM Charts: Binary
Multiplier Controller (continued)
 Next state equations can be derived by
inspection of the SM chart and considering the
state assignments. This is needed to
make A+ stay in 1

 A+ = A’BM’K + A’BM + AB’K = A’B(M + K) +

AB’K
S1 -> S3: 0 -> 1 S1 -> S2: 0 -> 1 S2 -> S3: 1 -> 1

S0 -> S1: 0 -> 1

 B+ = A’B’St + A’BM’(K’ + K) + AB’(K’ + K) =

A’B’St + A’BM’ + AB’
 The multiplier controller can be implemented
in a hardwired fashion by two flip-flops and a
few logic gates. Can be implemented with
discrete gates or in a PLA, CPLD, or FPGA.

5-24
 Realisation of SM Charts: Binary
Multiplier Controller (continued)
 State transition table:
 Each row in the table corresponds to one of the
link paths in the SM chart. Outputs can be
derived by tracing the corresponding link paths.

5-25
 Realisation of SM Charts: Binary
Multiplier Controller (continued)
 The design may also be implemented with
ROM, and the size can be calculated by
considering:
 5 different inputs to the combinational circuit.
Thus, 32 entries.
 The combinational circuit should generate 6
signals. Hence, each entry has to be 6 bits
wide.
 Thus, this design can be implemented using a
32 x 6 ROM and two D flip-flops.

5-26
 Realisation of SM Charts: Binary
Multiplier Controller (continued)
 If a ROM is used, the table must be expanded
to 25 = 32 rows. Dashes must be replaced
with all combinations of 0’s and 1’s. If a row
has n dashes, it must be replaced by 2n rows.
 Ex: 5th row of previous table replaced with:

5-27
Implementation of the Dice Game
 Can realise the SM chart for the dice game
using combinational circuitry and three D flip-
flops.

5-28
Implementation of the Dice Game
(continued)
 Can use the state transition table to derive
equations for the control signals and the next
state equations.

5-29
Implementation of the Dice Game
(continued)
 K-maps for A+, B+, and Win, plotted directly
from the preceding table:

5-30
Implementation of the Dice Game
(continued)
 Resulting equations:
 A+ = A’B’C Rb’D’711D’2312 + AC’ + ARb + AD’7Eq’
 B+ = A’B’C Rb’(D711+D2312) + BReset’ + AC
Rb’(Eq + D7)
 C+ = B’Rb + A’B’C D’711D2312 + BC Reset’ +
AC D7Eq’
 Win = BC’
 Lose = BC
 Roll = B’CRb
 Sp = A’B’C Rb’D’711D’2312

5-31
Implementation of the Dice Game
(continued)
 These equations can be implemented in any
standard technology (using discrete gates,
PALs, GALs, CPLDs, or FPGAs).
 The controller can also be realised using a
ROM, but ROM (LUT) implementation will need
512 entries (9 inputs) and each entry must be
7 bits wide.

5-32
 Microprogramming
 The previous method was hardwiring,
indicating that control signals are generated
by fixed logic circuitry.
 Proposed by Maurice Wilkes in 1951,
microprogramming is building a special
computer for executing the algorithmic flow
chart describing the controller of a system.
 Early microprocessors such as the Intel 8086
and Motorola 68000 were microprogrammed.

5-33
 Microprogramming (continued)
 One should be able to realise the controller by
just “sequencing” through the memory. For
this reason, microprogrammed controllers are
also often called sequencers.
 Control store or microprogram memory:
the memory that stores the control words.
 Advantages of microprogramming:
 Debugging is simple.
 System modifications are easy.
 Errors can be found and corrected easily.

5-34
 Microprogramming (continued)
 Disadvantages:
 It is slow.
 The complexity of the microprocessors led to
the reduced instruction set computing
(RISC) era.
 RISC microprocessors are simpler, have fewer
memory-addressing modes, and need simpler
control units.
 Today, microprogramming may be used only
for microprocessors with complex instruction
set architectures (ISAs).

5-35
 Microprogramming (continued)
 General idea of microprogramming:
 Store a control word (or microinstruction)
corresponding to each state.
 The microinstruction specifies the outputs to be
generated and where the next microinstruction
can be found. Corresponds to state transitions
in the state diagram or SM chart.

5-36
 Microprogramming: Two-Address
Microcode
 A typical hardware arrangement for
microprogramming:

5-37
 Microprogramming: Two-Address
Microcode (continued)
 SM Chart Transformations for
Microprogramming:
 To facilitate easy and efficient
microprogramming.
 Transform the SM chart such that only one
entry is required per state.
 Microprogram size is significantly smaller than
the ROM size in a naïve LUT method.
 Eliminate Conditional Outputs:
 Convert state diagram or SM chart into a Moore
state machine for easy microprogramming.

5-38
 Microprogramming: Two-Address
Microcode (continued)
 Allow Only One Qualifier per State:
 Qualifiers: inputs that are tested in each state
of the state machine.
 It is simpler to implement microprogramming
when only one variable is tested in each state.
 Transformations on SM charts to facilitate easy
microprogramming:
 I. Eliminate all conditional outputs by transforming to a
Moore machine.
 II. Test only one input (qualifier) in each state.

5-39
 Microprogramming: Two-Address
Microcode (continued)
 Example: transform the SM chart of the
multiplier:

5-40
 Microprogramming: Two-Address
Microcode (continued)
 Eliminate/combine redundant states/tasks.
 Improved SM chart:

5-41
 Microprogramming: Two-Address
Microcode (continued)
 The microprogram will look as it does in the table
below, assuming a straight binary state
assignment.
TEST values are
the control values
to 1st mux.

NST is only
triggered if value to
2nd mux is 1. Else
if 0 NSF occurs.

 Since there are six states, three flip-flops will be

required. The ROM will need six entries. Each
entry will need 12 bits. ABC: the address at which
the microinstruction is stored.

5-42
 Microprogramming: Two-Address
Microcode (continued)
 Since there are three inputs, a 4-to-1 MUX
will be sufficient to select the appropriate
qualifier.

TEST control values are

encoded in BNN:
St - 00
If output 1 -> NST
M = 01
K = 10 If output 0 -> NSF
1 = 11
If TEST equals any of
these, that input,
becomes output.

5-43
Microprogramming: Single-Address
Microcode
 Control flows in a default This makes

sequence except when microprocessor

more sequential.

branch and jump

instructions alter the flow.
 If the qualifier is false,
next state should be
current state plus one.
 The next state when the Invert conditions

qualifier is true is the only

in SM, so that
If multiplexer out is 0 -> Count = output 1 links to
inverted to 1 and Load = 0. NST current state and

next state explicitly is added by 1 (count). output 0 links to

next state.

specified in the microcode.

If multiplexer out is 1 -> Count =
inverted to 0 and Load = 1. Next WHY? The 1 and
state loads NST value. 0 are inverted and
added to NST.
This decided NST,

5-44
Microprogramming: Single-Address
Microcode (continued)
 Modified SM chart for binary multiplier:

Changed to
account for
inversion.

This means S1loads S11 state

5-45
Microprogramming: Single-Address
Microcode (continued)
 Microprogram and MUX for single-address
(minimum number of states used):

 Single-address consists of six entries of 9 bits

each.

5-46
Microprogramming: Dice Controller
 The dice controller can be microprogrammed
using two-address microcoding or single-
address microcoding.
 Two-address microcode implementation:
 In order to do microcoding, the SM chart must
be modified:
 First, all the outputs must be converted to Moore
outputs.
 Second, only one input variable must be tested in each
state.

5-47
Microprogramming: Dice Controller
(continued)
 Modified version of
the dice game SM chart:

5-48
Microprogramming: Dice Controller
(continued)
 Two-address microcode implementation:
 Next, derive the microprogram using a straight
binary state assignment. The variables Rb,
D711, D2312, Eq, D7, and Reset must be tested,
so use an 8-to-1 MUX.

5-49
Microprogramming: Dice Controller
(continued)
 Single-address implementation:
 This circuit uses a counter instead of the state
register.
 This method requires that the SM chart be
modified, and that the state assignment be
made in a serial fashion. If serial state
assignment is not possible, extra states are
added.

5-50
Microprogramming: Dice Controller
(continued)
 SM chart with
serial state assignment
and X-State added:

5-51
Microprogramming: Dice Controller
(continued)
 Single-address implementation:
 MUX with D7 and Reset complemented and Rb
and Rb’ needed. MUX and microprogram ROM
table:

5-52
Microprogramming: Dice Controller
(continued)
 Comparison of the naïve LUT (ROM) method
implementation with the microprogrammed
implementations:

 The ROM method needs 29 entries as it needs

3 state variables and 6 inputs. The two-
address and single-address microcode are
based on their microprogram ROM tables.
5-53
 Linked State Machines
 When a sequential machine becomes large,
divide it into several smaller machines that
are linked together.
 Each of the smaller machines is easier to
design and implement. Also, one of the
submachines may be “called” in several
different places by the main machine.

5-54
Linked State Machines (continued)
 SM chart for serially linked state machines:

5-55
 Summary
 SM Chart:
 Equivalent to a state graph, but usually easier
to understand the system operation by review
of the SM chart.
 Differs from a regular flowchart since different
rules must be followed.
 Examples of derivation of SM charts include
the binary multiplier and a dice game.
 Instead of using an SM chart, one could
construct an equivalent state graph from the
flowchart.

5-56
 Summary (continued)
 Procedures for digital system design
presented include:
 Block diagram
 Flowchart
 SM Chart or State Graph
 Behavioral Verilog description
 Test bench
 Implementation (hard-wiring and
microprogramming)

5-57
 Summary (continued)
 Techniques for implementing control units:
 Hardwiring:
 The control signals are generated using fixed
(hardwired) logic circuitry.
 Results in faster systems, because hardwired control
signals are generated by logic gates and they are
typically faster than memory.

5-58
 Summary (continued)
 Techniques for implementing control units
(continued):
 Microprogramming:
 Control words are stored in the microprogram memory.
 The size of the microprogram is reduced by
transforming the SM chart into a form in which only
one input is tested in each state.
 Results in slower systems.
 For complex systems, we can split the control
unit into several sections by using linked state
machines.

5-59