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ECE2200-Lct4 - Diode Limiters

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30 views7 pages

ECE2200-Lct4 - Diode Limiters

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dmanzo753
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LECTURE 4:

DIODE APPLICATIONS AND LIMITERS

Diodes , Zener diodes , power supplies with some resistors can be networked to create
special circuits generally called limiters. This circuits will be generally non linear and can
create special voltage transfer characteristics to a certain specification. Limiters are
either designed to shape a sinusoidal waveform to another form and shape causing a
desired distortion , or confine the range of an incoming voltage within a certain boundary.
Diodes may also be used to perform a simple logical functions. The following examples
will illustrate different applications.

EXAMPLE 1:( A Network)

Determine the Q-point of each diode in the following network. Use constant voltage
model with VF = 0.7 V ( note, often VF will be renamed as VD(on) which is known as the
diode ON voltage , this is the voltage when ID > 0 ).
One can construct four equivalent circuits when considering all combinations but not all
of them will be viable. For example if we assume D1 and D2 are both in reverse then ID1
= ID2 = 0 . Then Vx = 5 V and Cathode of D2 will be at – 10 V which will lead us to
VD2 = +15 V and VD1 = 5 V . This result , VD2 =15 V and VD1= 5 V at ID1,2 = 0 ( assumed
reversed) sounds like an absurd answer for a Q-point as it can not be placed on the ID vs.
VD characteristics. So, both diodes being in the reverse region scenario will be dismissed.
By a similar argument , if D1 was assumed to be in the forward region and D2 was in the
reverse region ( i.e. ID2 = 0 ) then Vx = - 0.7 V and hence VD2 = 9.3 V ; this will be
another unacceptable outcome.

VIABLE TRIAL 1 :
Assume both diodes are in the forward region . Then Vx = - 0.7 V , now solve for the
currents ID1 and ID2 , both must come out positive .

I1k = [5 – ( - 0.7) ] / 1 k = 5.7 mA


ID2 = [- 0.7 – 0.7 – ( - 10 ) ] / 4 k = 2.15 mA ( this is positive , so far OK )
By KCL
- ID1 – I1k + ID2 = 0 , hence ID1 = - 7.85 mA < 0 --- VIOLATION !

So the trial 1 failed . Abort the model make another assumption . ( Note , if in stead
of 1 k there was a higher resistor e.g. 20 k the trial 1 would not fail)

VIABLE TRIAL 2 :
Assume D1 is in reverse and D2 is in forward condition. Then,

ID1 = 0 and ID2 = I1k = [5 – 0.7 – (- 10 ) ] / ( 1 + 4 ) = 2.86 mA and Vx = 2.14 V . Thus

VD1 = - 2.14 V . The Q-points will be computed as ,

Q- D1 = ( - 2.14 V , 0 mA ) and Q- D2 = ( 0.7 V , 2.86 mA ) ….. Acceptable


EXAMPLE 2 : ( Simple Logic )

In the following two circuits the voltages VA and VB are either zero or 5 V, in
combinations. Complete the voltage table ( AKA voltage truth table ) for the output , V O ,
for all input VA and VB voltage combinations. Assume ideal diode , that is VF = 0 V when
ID > 0 and ID = 0 for VD < 0 .

Notice that the condition of one diode will effect the status of the other diode . The truth
table is derived based on successful trials . Study each row with reasoning.
If a constant voltage model was used in the analysis the output high and low would
be 5 V and 0.7 V respectively, in the AND gate circuit. However the output high and low
would be 4.3 V and 0 in the OR gate circuit.
Each circuit can be modified to a multi-input gate simply by increasing the number of the
diodes in the same manner .
EXAMPLE 3 : ( Constructing a characteristic)

Determine the values of the resistor R1 and the voltage source E1 in order to meet the
voltage transfer characteristic shown below. How would you modify the circuit to
convert the transfer into an odd function ? Assume VF = 0.7 V.

First design the main circuit to create the characteristic at the top. Since Vi = Vo in the
range of Vi < 4 V the current ( Is) in the 10 k resistor will be zero throughout the rang up
to Vi = 4 V . In order for the diode D1 to kick in into the forward conduction , as Vi
exceeds 4 V, the voltage E1 has to be equal to , E1 = 4 – 0.7 = 3.3 V.

On the other hand when Vi = 8 V , Vo should be 6 volt thus the current in the 10 kΩ
resistor will be I10K = IR1 = (8-6)/ 10 k = 0.2 mA. Now VR1 = Vo – (0.7 + 3.3 ) V =
= 6 – (0.7 + 3.3 ) = 2 V . Hence R1 = VR1 / IR1 = 2 V / 0.2 mA = 10 kΩ .
In order to create the odd function simply place another identical branch in parallel with
the first one and reverse the direction of diode and the voltage source. D1 will take the
positive IS and D2 will conduct to return the negative IS satisfying the 3rd quadrant.
EXAMPLE 4 : ( Limiting)

Limiters are non linear circuits which are designed to confine a voltage within a certain
desired limits for the purpose of protection. In a way they are similar to the circuit in
example 3 . For example if in example 3 the resistor R1 was reduced to zero
( i.e. shorted ) the output voltage would be constrained to the range of - 4 < Vo < +4 for
the entire input range.

Also a Zener diode can be used to create a limiting function without requiring additional
voltage source which is a great advantage. This example will illustrate that.

The input voltage ( i.e. the Vo of the limiter) of a special sensitive circuit is to be
confined within – 0.7 V to 4.7 V . Given that the main driving source voltage , Eg , is in
the range of - 15 < Eg < + 15 V determine the lowest value of the resistor “R “ and the
Zener voltage so that the power in the diode will not exceed 500 mW .
Assume VF = 0.7 V in the forward direction.

Simply a 4.7 V / 500 mW Zener diode in series with a resistor “R” arranged as shown
above will solve the problem. While Eg is in the range of - 15 < Eg < - 0.7 V the diode
will remain in the forward region thus making VD = 0.7 V or Vo = - 0.7 V with respect to
the ground zero .
When Eg is in the range of - 0.7 < Eg < 4.7 V the current in the diode and resistor will
be nearly or equal to zero , thus Vo = Eg ; while Eg is negative it will be near zero and
when positive almost completely zero .
As Eg exceeds 4.7 V all the way to 15 V, the diode will go into the Zener region and
VD = - 4.7 V and hence Vo = 4.7 V.
The value of R is calculated from the condition when Eg = 15 V . The Zener current will
be Iz = 500 mW / Vz = 500 mW / 4.7 V = 106 mA. The resistor voltage will be
VR = 15 – 4.7 = 10.3 V . Thus R = 10.3 V / 106 mA = 97 Ω .
Had we calculated Iz from Eg = - 15 V condition for 500 mW dissipation the Zener the
forward current would be 500 mW /0.7 = 714 mA and subsequently
R = [- 0.7 – ( - 15)] / 714 mA = 20 Ω . Although this value looks lower but it should not
be accepted because with this value is in place and Eg = 15 V the dissipation in the diode
would exceed the 500 mW and will reach to 2.42 W .
EXAMPLE 5 : ( Wave Shaping )

A 10 Vp ,100 Hz sinusoidal voltage ( Eg ) is applied to the circuit . What is the


output ( Vo ) waveform? Take VF = 0.7 V for both diodes.

The current , Is , will remain zero when Eg is just under the 5 V . Because the upper
diode is yet short of 0.7 V and lower diode is also short of 4.3 V. Both diodes will act as
an open circuit and there will be no current ( Is = 0 ) flowing. Once Eg exceeds 5 V then
the top diode will take 0.7 V and will go to full forward conduction . The lower diode
will conduct in its Zener region . The excess voltage above the 5 V will drop across the
1 k resistor causing the current Is > 0 to increase proportionally.
When the cycle reverses and Eg < - 3 V the lower diode will go into forward and the
upper diode into Zener conduction . The sum of the voltages of the two series diodes will
limit the output to Vo = – 0.7 (from Dz1) – 2.3 (from Dz2) = - 3 v. As Eg goes much
lower than –3 V the excess will be taken up by the 1 k resistor and the output will limit to
– 3 V. This circuit is an asymmetrical limiter.
The timings t1 , t2 , t3 , t4 need to be determined although it can be read from the time
scale .

10 Sin (2πt / T) = 5 , where T = 10 ms and T = 10 ms .


The solution will determine t1 and t2 . 10 Sin x = 5 , x = π / 6 and 5π/6 .

2π t1 / 10 ms = π / 6 t1 = 0.833 ms , 2πt2 / 10 ms = 5π / 6 t2 = 4.166 ms .


This solution will determine t3 and t4 ,

10 Sin x = - 3 , x = 3.4463 rad. and 5.9785 rad. .

2πt3 / 10 ms = 3.4463 t3 = 5.485 ms , 2πt4 = 5.9785 t4 = 9.5151ms .

Thus the exact timing of the break points on the green waveform is found.

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