AVR 8-bit Microcontrollers

AVR42789: Writing to Flash on the New tinyAVR

Platform Using Assembly

APPLICATION NOTE

Atmel-42789A-Writing-to-Flash-on-the-New-tinyAVR-Platform-Using-Assembly_AVR42789_Application Note-11/2016
Table of Contents

1. What has Changed.................................................................................................... 3

1.1. What This Means and How to Adapt............................................................................................4

2. Revision History.........................................................................................................5

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1. What has Changed
® ®
On the new family of Atmel tinyAVR devices (ATtiny417, ATtiny814, ATtiny816, and ATtiny817) the flash
has been included into the CPU data space. This means that it shares the same address space and
instructions as SRAM, EEPROM, and I/O registers. This data space is accessible through the use of
LD/ST instructions in assembly. Previously, on some of the older Tiny devices flash has been accessible
only through the LPM and SPM instructions. In the new tinyAVR devices the LPM instruction still exists,
but not the SPM instruction. For the LPM instruction, address 0x0000 is the start of flash, as can be seen
in the Memory map figure for LD and ST it is 0x8000.
Figure 1-1. Memory Map of New Devices

CPU Code space UPDI/CPU Data space

64 I/O Registers 0x0000 – 0x003F
0x0000
960 Ext I/O Registers 0x0040 – 0x0FFF

NVM I/O Registers and

0x1000 – 0x13FF
data

EEPROM128B
0x1400 - 0x1480

(Reserved)
0x3F00 (for SRAM 256B)/
0x3E00 (for SRAM 512B)

Flash code
4/8KB
Internal SRAM
256/512B

0x3FFF

(Reserved)

0x8000

Flash code
4/8KB

0x8FFF (for Flash 4K)/

0x9FFF (for Flash 8K)

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 In addition to this, writing to flash now has to happen by using the NVM controller where previously this
has been done through a combination of the Z-pointer and the SPMCTRL register.

1.1. What This Means and How to Adapt

If existing assembly code that writes to flash is to be ported from older to new tinyAVR devices, the SPM
instructions have to be replaced by ST instructions. The ST instruction will not be able to access flash
directly, but instead data will be written to the page buffer. This is similar to how it has been done
previously, but now handling page erase and page commits are handled by the NVM controller.
Where you would previously store the address to a page in flash in the Z-pointer, this is now handled by
an address register in the NVM controller. Note that the address register in the NVM controller is updated
automatically when data is written using the ST instruction. Make certain not to write data to a new page
before committing the page buffer. If this is done, the data intended to be written to the new page will be
with the data already in the page buffer with a bit-wise AND. The same will happen if data is written to the
same address twice without committing the page buffer.
Along with the addresses, the commands to erase a page or write the page buffer is now also located in
the NVM controller. The commands should now be written to the Control A register in the NVM controller.
See the Control A register in the datasheet for a list of the available commands.
These changes will make it necessary to change code written in C or assembly for older tinyAVRs for it to
work on the new tinyAVR family (ATtiny417, ATtiny814, ATtiny816, and ATtiny817).

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2. Revision History
Doc. Rev. Date Comments
42779A 11/2016 Initial document release

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