Chapter

Energy Band And

Charge Carrier In
Semiconductor 1
Introduction
In this chapter we will study about semiconductor materials, band diagram in solids, fermi energy
levels, doping of semiconductor, type of semiconductors, semiconductor in equilibrium.

1.1 Semiconductor Materials

Semiconductor are group of material having conductivities between those of metals and insulators. Two
general classification of semiconductors are the elemental semiconductor materials, found in group IV of the
periodic table, and the compound semiconductor material, most of which are formed by combination of group
III and V elements.Semiconductors can also be formed by combining elements of group II and VI. Some examples
of semiconductor material are
• Elemental semiconductor : Silicon, Germanium
• Compound semiconductor : Aluminium Phosphide,
Aluminium Arsenide,
Gallium Phosphide,
Galium Ansenide,
Indium Phosphide.

Type of Solids
Amorphous, single crystal, pholycrystalline are three general type of solids. each type is characterised by
size of an ordered region within the material. An ordered region is a spatial volume in which atoms or melecules
have regular geometric arrangement or periodicity. In amorphous solids the ordered arrangement is only within
a few atoms or molecules, while in polycrystalline material has high degree of order over many atoms and
molecules. These ordered region are also called single crystal region or grains and these grains are seperated by
grain boundaries.

Note: The advantage of single crystal material is that in general their electrical properties are superior to that of
non-single crystal material, since grain boundaries tend to degrade the electrical characteristics.

Space Lattice
The single crystal solid has regular geometry and periodicity in the atomic arrangement. A group of
atoms is repeated at regular interval in each of the three to form the single crystal. The periodic arrangement of

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 2 Electronic Devices and Circuits

atom in crystal is called lattice.

1.2 Energy Band in Solids

In an atom we have electrons and the property of each electron is described in terms of it’s quantum
number
Principal Quantum number (n) : It describe the shell in which electron is present
Orbital momentum quantum number (Azimuthal quantum number) ( l ) : Varies from
0, 1, 2, …, n – 1
Orbital magnetic quantum number (me) : Varies from 0, 1, 2, … l.
Magnetic spin quantum number (ms) : It’s value can be 1/2.
The Pauli’s exclusion principale states that no two electron in a system (in an atom) can have same set
of quantum numbers. Each electron will have different quantum numbers and discrete energy inside an atom.

Note: In an atom the energy of electron is quantized.

Now consider the case when N atoms are bought close to each other to form a solid. When atoms are far
away from each other they do not interact with each other and they have electrons with discrete energy levels
and each atom follow pauli’s exclusion principle seperately. For example in silicon and germanium
Si(14) = 1s2, 2s2, 2p6, 3s2, 3p2
and Ge(32) = 1s2, 2s2, 2p6, 3s2, 3p6, 4s2, 3d10, 4p2
Thus when atoms are far away from each other then electrons in atom of silicon and germanium are
distributed as shown above. Now as ‘N’ atoms are brought close to each other then they start interacting with
each other. For example when N silicon atoms are brought close to each other then the electrons in the outer
most shell the 3rd shell will interact initially and electrons in 2nd and 1st shell will not be effected.
According to the Pauli’s exclusion principle the joining of the atoms to form a system (crystal) do not
alter the total number of quantum states regardless of the size. However, since no two electrons can have same
quantum number, thus the discrete energy level will split into band of energies in order that each electron can
occupy a distinct quantum state.
To understand how the discrete energy level is splitting into energy band let us take an example of
hydrogen atom with single electron in only one shell. Suppose we form a crystal using 1019 hydrogen atom, when
the atoms are far away from each other and they are not interacting then they can have same quantum states
and approximately same discrete energy level. But when they are brought close to each other then to follow
pauli’s exclusion principle the splitting of initial quantized energy level into band of discrete energy levels since
1019 electrons in crystal cannot have same energy thus we get energy band in the crystal or solid. This effect is
shown in Fig 1.1, where ro represent the equilibrium interatomic distance in the crystal.
Electron energy

r0 Interatomic distance
Fig 1.1 : The splitting of an energy state into a band of allowed energies.

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 Energy band and Charge Carrier in Semiconductor 3

In the above case we took example of hydrogen which is single electron atom, coming back to crystal
formed by silicon:-
We saw that initially outermost shell (3rd) of atoms will interact and 3rd shell of one atom has 8 states
(3s 2 states, 3p 6 states) so N atoms when brought close to each other then splitting of 3rd shell lead to
splitting of 8N states. When atoms are brought more close to each other then splitting of n = 2 and n = 1 shell
will also take place. The splitting of these discrete energy level is shown in Fig. 1.2.
The splitting is more complicated than as shown in Fig. 1.2, generally only 3rd shell split and the actual
splitting of 3rd shell in silicon is shown is Fig. 1.3.

n=3
Electron energy

n=2

n=1

r0 Interatomic distance

Fig 1.2 : Schematic showing the splitting of three energy states into allowed bands of energies

4N states
0N electrons
6N states
2N electrons
3p
Electron energy

Eg
4N states 3s
4N electrons 2N states
2N electrons

ao r

Fig 1.3 : The splitting of the 3s and 3p states of silicon into the allowed and forbidden energy bands
In fig. 1.3 we can see that out of 8N states in 3rd shell 4N states go in low energy and 4N states gain
higher energy level. Since at 0 K electrons have low energy so the 4N electrons (4 electrons in 3rd shell of each
atom and N atoms) will try to go in low energy state and thus we get all 4N states filled in low energy level and
all 4N states at high energy level are empty .
From Fig. 1.3 we get one more information, a0 is the equilibrium interatomic distance and at this
distance we get band splitting such that the band at higher energy level is called conduction band and it is
completely empty and band at lower energy level is called valence band and it is completely filled, band gap in
Eg. The band gap Eg is the gap between top of valence band and bottom of conduction band.

REMEMBER Stable inter atomic distance is that distance where only outermost shell of atom will split, for
example here stable interatomic dustance is distance where the 3rd shell of Si atom will split
and if we keep as reducing the interatomic distance then 2nd shell will also split and it is not
stable interatomic distance

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1.3 Electrical Conduction in Solids

Let us under stand how bond model and energy band are related to each other

1.3.1 The Energy Band and The Bond Model

In the previous discussion we have seen that the bandgap between the two energy bands conduction
band and valence band is Eg.

Case 1. Semiconductor at T = 0 K
At T = 0 K there is no energy in the crystal and all electron of crystal go and settle in the valence
band.Since for semiconductor number of electron is 4N and number of states available in valence band is also
4N . Thus valence band is completely full and conduction band is completely empty. If we look at this situation
through band model then it is similar to that is shown in Fig. 1.4. Here at T = 0 K all the electrons in system are
in their lowest state and are directly involved in covalent bonding. Thus even if we apply electric field across the
semiconductor at T = 0 K no current will flow

Fig 1.4 : Two-dimensional representation of the covalent bonding in a semiconductor at T = 0K

I= 0
Semiconductor
T=0K

V volts

Fig 1.5 : Semiconductor at 0 K do not allow any current to flow as no carrier is free
Thus no electron is free in the bond model as all electrons are involved in covalent bond of Si at 0 K and
in band model conduction band is completely empty and valence band is completely filled. Thus when electric
field is applied we always assume the movement of electrons will take place inside the band only. Thus drift
current flow due to flow of carriers within band only that is movement of carriers inside valance band and
conduction band only.

Note: Eg is band gap, Ec is minimum energy in conduction band, Ev is maximum energy in valence band. Ec, Ev,
Eg have unit of ev (electron volt). Electron volt is unit of energy.

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 Energy band and Charge Carrier in Semiconductor 5

Conduction
Band Completely empty
Ec
Eg
Ev
Valence
Band Completely filled

Fig 1.6 : Line representation of energy band at T = 0 K.

REMEMBER Concept to be remembered: When ever electric field is applied then due to electric field the
carriers or electrons can move intra band or inside band only to flow current and not inter band.
That is electrons can move withing valence band or within conduction band only due to electric
field and not from valence band to conduction band and vice-versa. Current will be generated
through semiconductor by intra band movement of electron only.

Now when elecric field is applied in semiconductor then electrons present in valence band cannot move
and there are no electrons in conduction band thus no current will flow though semiconductor.

Case 2: At T > 0 K
When temperature of crystal is greater than 0 K then electrons present in valence band will get some
energy and few electrons will get enough energy such that it overcome band gap and move from valence band to
conduction band and thus electron moving from valence band to conduction band leave behind an empty space
in valence band and fill empty space in conduction band. This movement of electron from valence band to
conduction band can be modelled as bond breaking in bond model. When temperature is increased then the
atoms start vibrating and the covalent band between atoms break and breaking of covalent bond release an
electron and an empty space. The released electron is negatively charged and empty space effectively get
positive charge of magnitude equal to that of negative charge on electron to maintain charge neutrality.
Thus movement of electron from valence band to conduction band can be modelled as breaking of
covalent bonds. Now at T > 0 K the conduction band is not completely empty and valance band is not completely
filled and now if we apply electric field across the semiconductor then the electrons can move intraband and
produce non zero current.The breaking of covalent bond and jumping of electron from valence band to conduction
band produce free electron which make semiconductor conductive.

–
e

Fig 1.6 : (a) Two-dimensional representation of the breaking of a covalent bond

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 6 Electronic Devices and Circuits

Conduction
Band
Ec

Eg

Ev
Valence
Band

Fig 1.7 : Line representation of band diagram at T > 0 K.

Note: • At T = 0 K the semiconductor act as an insulator and I = 0 for any amount of voltage applied across the
semiconductor bar
• At T = 0 K the semiconductor is obviously neutral (zero charge)
• At T > 0 K few electrons have become free by breaking covalent bond but when electron become free then
it leave behind a positively charged ion behind and still neutrality of semiconductor is maintained even at
T > 0 K.
• As temperature is increased further more and more covalent bond will break and more electrons will be
generated and conductivity of semiconductor will increase
• Due to increase in temperature the movement of electron is inter band if energy obtained by electron is
greater than equal to Eg but if energy of electron is low, less than Eg then electron will keep vibrating within
the present band and these vibration are not in a particular direction so current produced due to these
random vibration will be zero.

From the above discussion the question arises that as we keep on increasing temperature then covalent
bonds will keep on breaking and at a particular temperature all covalent bonas will break but this is wrong
because there are two random process that are taking place simultaneously that is generation and recombination.
Generation means breaking of covalent bond modelled as movement of electron from valence band to conduction
bond and recombination is another random process that take place with generation that is when a free electron
in crystal come in close proximity with the empty state of the silicon ion (which was created after bond breaking
and the free electron fill the empty state and reform covalent bond. Thus recombination is modelled as movement
of electron from conduction band to valence band.
At a constant temperature number of electrons in conduction band and empty states in valance band
remain constant due to generation and recombination process running together.

REMEMBER When temperature of crystal is increased then electrons will vibrate randomly and equivalently
no current will flow and if electric field is also applied in semiconductor when T > 0 K then
current will flow because the electrons will move in a particular direction.

We can also relate this bond breaking to the E versus k energy bands. Fig 1.8 (a) shows the E versus
k(wave number) diagram of the conduction and valence bands at T = 0 K. The energy states in the valence band
are completely full and the states in the conduction band are empty. Fig 1.8 (b) shows these same bands for T >
0 K, in which some electrons have gained enough energy to jump to the conduction band and have left empty
states in the valence band. We are assuming at this point that no external forces are applied so the electron and
“empty state” distributions are symmetrical with k.

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 Energy band and Charge Carrier in Semiconductor 7
E E

k k

(a) (b)
Fig 1.8 : The E versus k diagram of the conduction and volence bands of a semiconductor at (a) T = 0 K, and
(b) T > 0 K

1.3.2 Drift Current

Current always flow due to net flow of charge, if we have collection of positively charged ions with a
volume density N(cm–3), each ion has a charge of q and net average drift velocity vd(cm/s) then drift current
density would be
J = qNvd A/cm2 …(1.1)
If instead of average drift velocity we consider individual ion velocity then
N
J q v di …(1.2)
i 1

Since electrons have charge thus electron movement in conduction band will give rise to current. When
no external field is applied then the E – k plot will be symmetric as shown in Fig 1.8 (b) which show that number
of electrons with positive momentum (k) is same as that of number of electron with negative momentum and net
drift current density due to these electron will be zero. This was obvious result as no external force is applied.
If a net force is applied or some electric field is applied then the E – k plot will not be symmetric
anymore, and total momentum will also be non zero and drift current density will also be non zero. The electron
distribution will be seen as shown in Fig. 1.9 which show that now net momentum exist.
We may write the drift current density due to the motion of electrons as
n
J e vi
i 1

where e is the magnitude of the electronic charge and n is the number of electrons per unit volume in
the conduction band. Again, the summation is taken over a unit volume so the current density is A/cm2. We may
note from above equation that the current is directly related to the electron velocity; that is, the current is
related to how well the electron can move in the crystal.

Fig 1.9 : The asymmetric distribution of electrons in the E vursus k diagram when an external force is applied.

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1.3.3 Concept of holes

We saw that when electrons move from valence band to conduction band then they leave behind empty
spaces in valence band. When we apply electric field now electrons will move as shown in Fig. 1.10. The figure
show top layer of valence band with few empty spaces and electric field is applied.

Electric Field

Fig 1.10 : Movement of electrons in valence band

We can see that movement of electron is valance band, apposite to direction of electric field. When
electron move from it’s location and move to an empty space then it leave behind an empty space. From above
figures we can see that the movement of electrons which are negatively charged particles can be viewed as
movement of empty spaces (holes) in direction of electric field.Thus we can say that movement of electrons in
valence band can be seen as movement of holes and since movement of holes is in direction of electric filed we
can say that holes act as positively charged particles.

Note: Thus when electric field is applied then electrons will flow in conduction band and holes will flow in
valance band to contribute to current flowing.

1.3.4 Electron Effective Mass

The movement of electron in lattice will be different from that of an electron in free space. In addition to
an externally applied force there are internal forces in the crystal due to positively charged ions or protons and
negatively charged electrons. Thus
Ftotal = Fext + Fint = ma …(1.3)
where Ftotal, Fext, and Fint are the total force, the externally applied force, and the internal forces,
respectively, acting on a particle in a crystal. The parameter a is the acceleration and m is the rest mass of the
particle.
Since it is difficult to take into account all of the interal forces, we will write the equation
Fext = m * a …(1.4)
where the acceleration a is now directly related to the external force. The parameter m*, called the
effective mass, takes into account the particle mass and also takes into account the effect of the internal forces.
We can relate effective mass of an electron in a crystal to the E versus k curves. To begin, we consider
case of a free electron whose E versus k curve are as shown in Fig. 1.11.

K
K= 0

Fig 1.11 : Evs k plot

The momentum (p) is given by

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 Energy band and Charge Carrier in Semiconductor 9

p k
p2
and E
2m
2 2
k
E
2m
where k is wave number, is normalised plank constant. Taking 2nd derivative of above equation with
respect to k we have
d2 E 2

dk 2 m
1 d2 E 1
…(1.5)
2
dk 2
m
The second derivative of E with respect to k is inversely proportional to the mass of the particle. For the
case of a free electron, the mass is a constant (nonrelativistic effect), so the second derivative function is a
d2 E
constant. We may also note from Fig. 1.11 that is a positive quantity, which implies that the mass of the
dk 2
electron is also a positive quantity.
If we apply an electric field to the free electron and use Newton’s classical equation of motion, we can
write
F = ma = –eE …(1.6)
where a is the acceleration, E is the applied electric field, and e is the magnitude of the electronic
charge. Solving for the acceleration, we have
E
a …(1.7)
m
The motion of the free electron is in the opposite direction to the applied electric field because of the
negative charge.
We may now apply the results to the electron in the bottom of an allowed energy band. Consider the
allowed energy band in Fig. 1.12(a). The energy near the bottom of this energy band may be approximated by a
parabola, just as that of a free particle. We may write.
E – Ec = C1(k)2
Parabolic
E approximation E
EC

EC
k Parabolic k
approximation
k=0 k k=0 k

(a) (b)

Fig 1.12 : (a) The conduction band in reduced k space, and the parabolic approximation
(b) The valence band in reduced k space, and the parabolic approximation.
The energy Ec is the energy at the bottom of the band. Since E > Ec, the parameter C1 is a positive

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 10 Electronic Devices and Circuits

quantity.
Taking the second derivative of E with respect to k, we obtain
d2 E
= 2C1 …(1.9)
dk 2
We may put above equation in the form
1 d2 E 2C1
…(1.10)
2
h dk 2
h2
h2
Comparing Eq. (1.5) with Eq. (1.10), we may equate to the mass of the particle. However, the
2C1
curvature of the curve in Fig. 1.12 (a) will not, in general, be the same as the curvature of the free-particle
curve. We may write.
1 d2 E 2C1 1
2 …(1.11)
2
h dk 2
h m*
where m* is called the effective mass. Since C1 > 0, we have that m* > 0 also,
If we apply an electric field to the electron in the bottom of the allowed energy band, we may write the
acceleration as
eE
a …(1.12)
m*n
where mn* is the effective mass of the electron. The effective mass mn* of the electron near the bottom of
the conduction band is a constant.

1.3.5 Hole Effective Mass

In valence band the current flow is effectively due to movement of holes and if we assume that drift
velocity of hole is vi then current density will be

J e vi …(1.13)
i

Note: Obviously the E – k plot of valence band will be symmetric when no electric field is applied and total
momentum will be zero, as shown in Fig 1.8 (b)
The vi in the summation of eq. (1.13) is related to how well this positively charged particle moves in the
semiconductor. Now consider an electron near the top of the allowed energy band shown in Fig 1.13 (b). The
energy near the top of the allowed energy band may again be approximated by a parabola so that we may write
(E – Ev) = –C2(k)2 …(1.14)
The energy Ev is the energy at the top of the energy band. Since E < Ev for electrons in this band, then
the parameter C2 must be a positive quanity.
E E

k k

(a) (b)
Fig 1.13 : (a) valence band with conventional electron-filled states and empty states
(b) Concept of positive charges occupying the original empty states.

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 Energy band and Charge Carrier in Semiconductor 11

And proceeding in a similar fashion, we can write

1 d2 E 2C2 1
2 …(1.15)
2
h dk 2
h m*
where m* is again an effective mass. We have argued that C2 is a positive quantity, which now implies
that m* is a negative quantity. An electron moving near the top of an allowed energy band behaves as if it has a
negative mass.
If we again consider an electron near the top of an allowed energy band and use Newton’s force equation
for an applied electric field, we will have
F = m*a = –eE …(1.16)
However, m* is now a negative quantity, so we may write
eE eE
a …(1.17)
| m*| | m*|
An electron moving near the top of an allowed energy band moves in the same direction as the applied
electric field.
Thus particle moving in valence band has property that it move in direction of electric field. So it can
have two properties.
1. Positive charge and positive effective mass
2. negative charge and negative effective mass

REMEMBER The net motion of electrons in a nearly full band can be described by considering just the empty
states, provided that a positive electronic charge is associated with each state and that the m*
from Eq. (1.15) is associated with each state. We now can model this band as having particles
with a positive electronic charge and a positive effective mass. The density of these particles in
the valence band is the same as the density of empty electronic energy states. This new particle
*
is the hole. The hole, then, has a positive effective mass denoted by m p and a positive electronic
charge, so it will move in the same direction as an applied field.

1.3.6 Comparison between holes and electrons

We have already seen that current will be produced due to motion of electrons in conduction band and
holes in valence band. Motion of electrons in valence band is modelled as motion of positively charged holes.
The effective mass of electron is mn* and effective mass show how much acceleration will the charged particle
will experience.
Fext = m*a
Since electron moving in conduction band has lot of empty space and free to move but electron moving
in valence band which is modelled is hole moves in a crowded region thus motion in valence band will be more
restrictive. Thus for same external force holes will experience less acceleration thus
*
mn* < m p …(1.18)

Note: effective mass of electron will be less than effective mass of holes.

Example 1.1

There are two semiconductor material whose E – k curve shown. Find whose effective mass
of electron will be more than that of other.

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E
Semiconductor 1

Semiconductor 2

Ec
K

Solution 1.1
We know that
1 1 d2 E
m* 2
dk 2
we can see that
d2 E d2 E
dk 2 semiconductor 1 dk 2 semiconductor 2
Thus m*n1 m*n2

1.4 Metal, Insulators, and semiconductors

Each crystal has its own energy-band structure. We noted that the splitting of the energy stages in
silicon, for example, to form the valence and conduction bands, was complex. Complex band splitting occurs in
other crystal trading to large variation in band structures between various solids and to a wide range of electrical
characteristics observed in these various materials. We can qualitatively begin to understand some basic
differences in electrical characteristics caused by variations in band structure by considering some simplified
energy bands.
There are several possible energy-band conditions to consider. Fig 1.14(a) shows an allowed energy
band that is completely empty of electrons. If an electric field is applied, there are no particles to move, so there
will be no current. Fig 1.14(b) shows another allowed energy band whose energy states are completely full of
electrons. We argued in the previous section that a completely full energy band will also not give rise to a
current. A material that has energy bands either completely empty or completely fill is an insulator. The resistivity
of an insulator is very large or, conversely, the conductivity of an insulator is very small. There are essentially no
charged particles that can contribute to a drift current. Fig 1.14(c) shows a simplified energy-band diagram of
an insulator. The band gap energy Eg of an insulator is usually on the order of 2.5 to 6 eV or larger, so that at
room temperature, there are essentially no electrons in the conduction band and the valence band remains
completely full. There are very few thermally generated electrons and holes in an insulator.

Conduction
band
(full)
Allowed Allowed
energy energy Eg
band band Valence
(empty) (full) band
(full)

(a) (b) (c)

Fig 1.14 : Allowed energy bands showing (a) an empty band, (b) a completely full band, and
(c) the bondgap energy between the two allowed bands.

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 Energy band and Charge Carrier in Semiconductor 13

Fig 1.15(a) shows an energy band with relatively few electrons near the bottom of the band. Now, if an
electric field is applied, the electrons can gain energy, move to higher energy states, and move through the
crystal. The net flow of charge is a current. Fig 1.15(b) shows an allowed energy band that is almost full of
electrons, which means that we can consider the holes in this band. If an electric field is applied, the holes can
move and give rise to a current. Fig 1.15(c) shows the simplified energy-band diagram for this case. The band
gap energy may be on the order of 1 eV. This energy-band diagram represents a semiconductor for T > 0K. The
resistivity of a semiconductor, as we will see in the next chapter, can be controlled and varied over many orders
of magnitude.
The characteristics of a metal include a very low resistivity. The energy-band diagram for a metal may be
in one of two forms. Fig 1.16(a) shows the case of a partially full band in which there are many electrons
available for conduction, so that the material can exhibit a large electrical conductivity. Fig 1.16(b) shows
another possible energy-band diagram of a metal. The band splitting into allowed and forbidden energy bands is
a complex phenomenon and Fig. 1.16(b) shows a case in which the conduction and valence bands overlap and
the equilibrium interatomic distance. As in the case shown in Fig.1.16(a), there are large numbers of electrons
as well as large numbers of empty energy states into which the electrons can move, so this material can be
exhibit a very high electrical conductivity.

Conduction
band
(almost full)
Allowed Allowed
Electrons Eg Empty
energy band energy band states
(almost (almost Valence
empty) full) band
(almost full)

(a) (b) (c)

Fig 1.15 : Allowed energy bands showing (a) an almost empty band, (b) an almost full band, and
(c) the bandgap energy between the two allowed bands.

Partially
filled
band

Upper band
full Lower Electrons
band band

(a) (b)

Fig 1.16 : Two possible energy bands of a metal showing

(a) a partially filled band, and (b) overlapping allowed energy bands

1.5 Direct and indirect band gap semiconductor material

From Fig 1.17(a) show the E versus k diagram for GaAs. The valence band maxima and conduction
band minima occur at same value of k, that is at k = 0. The semiconductor material in which the maxima of
valence band and minima of conduction band occur at same value of k are called direct-band gap semiconductor
materials. In such semiconductors the transition between the two allowed bands can take place with no change
in crystal momentum. The Fig 1.17(b) show that E versus k diagram for silicon, here the maxima of valence
band and minima of conduction band donot occur at same value of k. The definition of band gap remain same, Eg

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is equal to difference between minima of conduction band and maxima of valence band. The semiconductor
material in which the maxima of valence band and minima of conduction band donot occur at same value of k
are called indirect band gap semicoductor material. In these semiconductors the transition between the two
allowed bands will take place by change of momentum, for conservation of momentum it is obvious that interaction
with crystal will take place.
4 4
GaAs Conduction Si Conduction
band band

3 3

2 2
E = 0.31
Energy (eV)

Energy (eV)
1 1
Eg
Eg

0 0

–1 –1

Valence Valence
band band
–2 –2
[111] 0 [100] [111] 0 [100]
k k
(a) (b)
Fig 1.17 : Energy band structures of (a) GaAs, and (b) Si

E E

Et

Eg h = Eg h = Eg

K K

(a) (b)

Fig 1.18 : Simpler diagram of (a) direct, and (b) indirect bandgap semiconductor

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1.6 Effect of temperature on band gap

From the band and bond modelling we have seen that creating a free electron need movement of electron
from valence band to conduction band which is modelled as breaking of the covalent band. Thus we can say that
band gap Eg is directly proportional to band energy. That is stronger the band more energy is required to break
it which can be modelled as higher band gap Eg. As the temperature increases the atoms gain energy and they
start vibrating at it’s location and make the bond with other atoms weak thus it can be modelled in band diagram
as decrease in band gap with rise in temperature.

Note: Both germanium and silicon from covalent band in the crystal. The size of germanium atom is greater than
size of silicon atom thus the covalent bond of Ge atom will be weak with respect to covalent bond of Si. Thus
bandgap of germanium (EgGe) will be less than band gap of silicon (ESi)
The band gap of germanium and silicon
EgGe EgSi
at 0 K 0.7 & 5 eV 1.21 eV
at 300 K 0.73 eV 1.1 eV
EgGe(T) = Ego – 2.4 × 10–4 T
EgSi(T) = Ego – 3.6 × 10–4 T
(In both the equation T is temperature in kelvin)

1.7 Density of states function

We have already discussed that current flow in semiconductor is by flow of electrons in conduction band
and flow of holes in valence band. To describe the current voltage characteristic of the semiconductor devices it
is very important to determine the number of electrons and holes in semiconductor that are available for
conduction.
To determine the number of electrons in conduction band and number of holes in valence band we will
first of all determine the number of quantum states in conduction band and valence band. We know that only
one electron can occupy a given quantum state.
When we discussed the splitting of energy levels into bands of allowed and forbidden energies, we
indicated that the band of allowed energies was actually made up of discrete energy levels. We must determine
the density of these allowed energy states as a function of energy in order to calculate the electron and hole
concentrations.

Note: To determine number of electrons in conduction band we will first of all determine the density of states as
function of energy and then we determine probability of existence of electron as a function of energy. Multiplying
these two will give number of electron as a function of energy and if we integrate this over whole conduction band
we can get number of electrons in conduction band.
Similarly we can also find number of holes in valence band.
The analogy to understand the note write above:-
The conduction band is same as class room with chairs placed in number of rows, similarly conduction
band has states at each discrete energy level. So each row in a classroom is energy level and each row has
different number of chairs similar to each energy level has different number of quantum states which is defined
by density of states. If we know probability of presence of a student at each quantum state we can easily find
number of students in class room. Similarly if we know probability of existence of electron at each quantum state
we can find number of electron in conduction band.

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 16 Electronic Devices and Circuits

The density of quantum states per unit volume of the crystal is defined as

4 (2 m)3/2
g (E) E …(1.19)
h3
The density of quantum states is a function of energy E. As the energy of this free electron becomes
small, the number of available quantum states decreases. This density function is really a double density, in that
the units are given in terms of states per unit energy per unit volume.

Example 1.2

To calculate the density of states per unit volume over a particular energy range.
Consider the density of states for a free electron given by Eq.(1.19). Calculate the density of
states per unit volume with energies between 0 and 1 eV.
Solution 1.2
The volume density of quantum states, from Eq. (1.19), is
1 eV 1eV
4 (2 m)3/2
N g( E)dE EdE
0 h3 0

4 (2 m)3/2 2 3/2
N E
h3 3
The density of states is now
4 [2(9.11 10 31 )]3/2 2 19 3/2
N (1.6 10 ) 4.5 1027 m 3
(6.625 10 34 )3 3

or N = 4.5 × 1021 states/cm3

p2 2 2
k
The equation (1.19) show the density of states in a crystal, where Energy E . In semiconductor
2m 2m
the energy E is given by
2 2
k
E Ec …(1.20)
2 m*n
where Ec is the bottome edge of the conduction band and mn* is the electron effective mass. Equation
(1.20) may be rewritten to give

h2 k 2
E – Ec
2 m*n

The general form of the E versus k relation for an electron in the bottom of a conduction band is the
same as the free electron, except the mass is replaced by the effective mass.
Thus we can write the density of allowed electronic energy states in conduction band as

4 (2 m*n )3/2
gc(E ) E Ec …(1.22)
h3

The above equation is value for E > Ec. Similarly we can get the density of states in valence band

4 (2 m*p )3/2
g v( E ) Ev E …(1.23)
h3

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 Energy band and Charge Carrier in Semiconductor 17

equation (1.23) is valid for E < Ev.

E gc(E)

gv (E)

g(E)
Fig 1.19 : The density of energy states in the conduction band and the density
of energy states in the valence band as a function of energy.
Figure 1.19 show plot of density of states in conduction and valence band. Ideally the forbidden band has
no states for Ev < E < Ec. The gc(E) and gv(E) are not symmetric because m*n m*p .
Thus no carrier can exist inside forbidden band gap.

Note: The density of states in conduction band increases as Energy increase and density of states in valence band
increases as energy decreases. The explaination to equation (1.19) is given by quantum physics and no need of this
for GATE or ESE

1.8 Fermi-Dirac Probability function

The fermi-dirac function defines the probability of existence of electron in the quantum states at energy
E. The fermi dirac function

N( E) 1
fF ( E) …(1.24)
g( E) E EF
1 exp
kT

where EF is called the fermi energy T is temperature in kelvin. The number density N(E) is the number
of particles per unit volume per unit energy and g(E) is the number of quantum states per unit volume per unit
energy. Another interpretation of the distribution function is that fF(E) is the ratio of filled to total quantum
states at any energy E.

T
Note: kT is equal to , where T is in kelvin
11600
1.8.1 The fermi Energy level and distribution function.

Case 1 : T = 0 K
( E EF )
The fermi dirac function is fF(E) and at T = 0 K if we take E < EF then exp will become
kT
( E EF )
exp(– ) = 0. Thus fF(E) = 1 for E < EF. Now if we take E > EF and T = 0 K then exp will become
kT
exp(– ) = , thus fF(E) = 0 for E > EF.
Thus Fermi-Dirac distribution function for T = 0 K is plotted in Fig. 1.20. This result shows that, for

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 18 Electronic Devices and Circuits

T = 0K, the electrons are in their lowest possible energy states. The probability of a quantum state being
occupied is unit for E < EF and the probability of a state being occupied is zero for E > EF. All electrons have
energies below the Fermi energy at T = 0 K.

Note: Thus at T = 0 K the maximum energy acquired by electron is EF. One definition of fermi energy level is that
it is the maximum energy acquired by electron in crystal at T = 0 K. Thus if vmax is maximum velocity of electron
1 2 2EF
at T = 0 K then at T = 0K mvmax EF , vmax .
2 m
Fig 1.21 shows discrete energy levels of a particular system as well as the number of available quantum
states at each energy. If we assume, for this case, that the system contains 13 electrons, then Fig.1.21 shows
how these electrons are distributed among the various quantum states at T = 0 K. The electrons will be in the
lowest possible energy state, so the probability of a quantum state being occupied in energy levels E1 through E4
is unity, and the probability of a quantum state being occupied in energy level E5 is zero. The Fermi energy, for
this case, must be above E4 but less than E5. The Fermi energy determines the statistical distribution of electrons
and does not have to correspond to an allowed energy level.

E5
fF(E)

E4
1.0
E3

E2

O E EF E1

Fig1.20 The fermi probability function Fig1.21 Discrete energy states and quantum
versus energy for T = 0K states for a particular syste

Note: Suppose in a question density of states g(E) is given and N0 is number of electrons in the system. Then at
T = 0 K all electrons will have energy below EF and probability to find electron for E < EF is 1. Thus to find EF we
can use the formulae
EF
N0 g( E)dE
0

Consider the situation when the temperature increases above T = 0 K. electrons gain a certain amount
of thermal energy so that some electrons can jump to higher energy levels. Which means that the distribution
electrons among the available energy states will change. Figure 1.22 shows the same discrete energy levels and
quantum states as in Fig. 1.20. The distribution of electrons among the quantum states has changed from the
T = 0 K case. Two electrons from the E4 level have gained enough energy to jump to E5, and one electron from
E3 has jumped to E4. As the temperature changes, the distribution of electrons versus energy changes.
The change in the electron distribution among energy levels for T > 0 K can be seen by plotting the
Fermi-Dirac distribution function. If we let E = EF and T > 0 K, then Eq. 1.24 becomes
1 1 1
fF(E = EF)
1 exp(0) 1 1 2

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 Energy band and Charge Carrier in Semiconductor 19

1
The probability of a state being occupied at E = EF is . Figure 1.23 shows the Fermi-Dirac distribution
2
function plotted for several temperatures, assuming the Fermi energy is independent of temperature.

E5

E4

E3

E2

E1

Fig.1.22 : Discrete energy states and quantum states for the same system shown in Fig. 1.21 for T > 0 K

T = T2 > T1
1.0 T = T1
fF = (E)

T=0
1
2

O E EF

Fig.1.23 : The Fermi probability function versus energy for different temperatures
We can see that for temperatures above absolute zero, there is a nonzero probability that some energy
states above EF will be occupied by electrons and some energy states below EF will be empty. This result again
means that some electrons have jumped to higher energy levels with increasing thermal energy.

REMEMBER Another definition of fermi energy level: The energy level at which probability of finding an
electron is 0.5 at all temperature greater than 0 K.

Example 1.3

To calculate the probability that an energy state above E F is occupied by an electron.

Let T = 300 K . Determine the probability that an energy level 3 kT above the Fermi energy
is occupied by an electron.
Solution 1.3
We can write
1 1
fF(E)
E EF 3kT
1 exp 1 exp
kT kT
which becomes
1
fF(E) 0.0474 4.74%
1 20.09

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 20 Electronic Devices and Circuits

Example 1.4

To determine the temperature at which there is a 1 percent probability that an energy state
is empty.
Assume that the Fermi energy level for a particular material is 6.25 eV and that the electrons
in this material follow the Fermi-Dirac distribution function. Calculate the temperature at
which there is a 1 percent probability that a state 0.30 eV below the Fermi energy level will
not contain an electron.
Solution 1.4
The probability that a state is empty is

1
1 – fF(E) 1
E EF
1 exp
kT

Then

1
0.01 1
5.95 6.25
1 exp
kT

Solving for kT, we find kT = 0.06529 eV, so that the temperature is T = 756 K.

Since probability to find electron at an energy level E is fF(E) thus probability of finding an empty state
or hole will be 1 – fF(E). Figure 1.24 show fF(E) and 1 – fF(E) and we can see that these are symmetric about EF.
For E – EF >> kT the equation (1.24) can be approximated (because exponential term in denominator will be
much greater than 1)

1 ( E EF )
fF(E) 1 exp …(1.25)
E EF kT
1 exp
kT

fF( E) 1 – fF(E)

1.0

1
2

0 E EF
Fig.1.24 : The probability of a state being occupied, f F (E), and the probability of a state being empty, 1 – f F (E)
Using equation (1.24) we can find probability of finding an empty state.
Thus is

1
1 – fF(E) 1
E EF
1 exp
kT

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 Energy band and Charge Carrier in Semiconductor 21

E EF
exp
kT
1 – fF(E) …(1.26)
E EF
1 exp
kT
E EF
1 – fF(E) exp
kT
E EF
Equation (1.26) show probability of finding an empty state, for E E F exp will be very small
kT
so denominator can be approximated to 1. Thus we can approximate equation (1.26) to equation (1.27).

1.9 Charge Carriers in Semiconductors

In this section we will study the equilibrium distribution of electrons and holes. The system at equilibrium
means thermal equilibrium where no external forces such as voltages, electric field, magnetic field, or temperate
gradient are acting on the system. All the properties of system are independent in this case.
We have also seen that current flow in semiconductor due to flow of electrons in conduction band and
holes in valence band and to find the number of carriers we need density of states and a probability function.

The Fermi Energy (EF) and semiconductor at T = 0 K

At T = 0 K we know that all electrons are present inside the valence band and there is no empty space
in valence band and conduction band in empty. Thus using the definition that at T = 0 K EF is that energy level
below which probability of finding an electron is 1. Thus using these two information we can say that at T = 0 K
Fermi energy level will exist some where between EC and Ev.

Conduction
band

Forbidden EF can be
band present anywhere

Valence
band

Fig.1.24 : Semiconductor and Fermi energy level at T = 0 K

Note: The Fermi energy donot need to correspond to an allowed energy

The Fermi energy (EF) and semiconductor at T > 0 K

When temperature increase the covalent band break and it produces electron and holes, thus in a pure
semiconductor or in ideal intrinsic semiconductor (semiconductor with no impurity atom and no lattice defect
in the crystal) the number of electrons and number of holes will be same. If we assume effective mass of hole
same as effective mass of electron then the density of state function in conduction band gc(E) will be symmetric
about midgap energy (energy mid way between Ec and Ev). The distribution of electron in conduction band is
given by the density of allowed quantum states times the probability that state is occupied by an electron. That
is

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 22 Electronic Devices and Circuits

n(E) = gc(E) fF(E) …(1.28)

and integrating n(E) over whole conduction band give us total number of electron in conduction band.
Similarly, the distribution of holes in valence band is the density of allowed quantum states in valence
band times the probability that state is not occupied by an electron. That is
p (E ) = gv(E) [1 – fF(E)] …(1.29)
The equation (1.29) is integrated over entire valence band to find total number of holes in valence band.
We know that the function fF(E) for E > EF is symmetrical to function [1 – fF(E)] for E < EF about the
energy E = EF, thus to get gc(E).fF(E) and gv(E)(1– fF(E)) same (same number of holes and electrons) the fermi
energy level EF must be at midgap energy.

The n0 and p0 equations

Figure 1.25 show the density of state function and Fermi-Dirac function and their product to find n(E)
and p(E).
E

gc(E)fF(E) = n(E)

gc(E)
Ec
Area = n0 = electron concentration
fF(E)

EF

gv(E)(1 – fF(E)) = p(E)

Ev
gv(E)

Area = p0 = hole concentration

fF(E) = 0 fF(E) = 1
Fig.1.25 : Density of states functions, Fermi-Dirac probability function, and areas
representing electron and hole concentrations for the case when E F is near the midgap energy.
The equation for thermal-equilibrium concentration of electrons may be found be integrating Eq. (1.28)
over the conduction band energy, or

n0 gc( E) fF ( E)dE …(1.30)

The lower limit of integration is Ec and the upper limit of integration should be the top of the allowed
conduction band energy. However, since the Fermi probability function rapidly approaches zero with increasing
energy as indicated in Fig.(1.25) we can take the upper limit of integration to be infinity.
Since electron exist for E > Ec and EF exist in forbidden band, if Ec – EF >> kT then E – EF >> kT thus
we can approximate Fermi function and write equation (1.30) as

4 (2 m*n )3/2 ( E EF )
n0 3
E Ec exp dE
Ec h kT

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 Energy band and Charge Carrier in Semiconductor 23

Solving this we get

3/2
2 m*nkT ( Ec EF )
n0 2 2
exp …(1.31)
h kT
3/2
2 m*nkT
If we write 2 = Nc then
h2
( Ec EF )
n0 Nc exp
kT
E Ec
Nc exp F …(1.32)
kT
Here Nc is effective density of states, we can see that in Fig 1.25 all the states present in conduction
band are not useful, only few for which fF(E) is non zero are useful, thus we get this parameter Nc which is called
effective density of states.

REMEMBER Most of the times it is difficult to remember equation (1.32). One way to learn this is that Nc is
very large value and n0 is always smaller than Nc thus we have to multiply Nc with value less
Ec EF E Ec
than 1. Now the doubt is inside the exp we have or F , generally EF is below Ec
kT kT
and to get value of exp less than 1, term inside exp should be negative thus we must have
( EF
Ec )
. Thus thermal equilibrium concentration of electron in conduction band is
kT
E Ec
n0 Nc exp F .
kT

Example 1.5

Calculate the probability that a state in the conduction band is occupied by an electron and
calculate the thermal equilibrium electron concentration in silicon at T = 300 K .
Assume the Fermi energy is 0.25 eV below the conduction band. The value of N c for silicon
at T = 300 K is N c = 2.8 × 10 19 cm –3 .
Solution 1.5
So the probability that an energy state at E = Ec is occupied by an electron is given by
1 ( Ec EF )
fF(Ec) exp
Ec EF kT
1 exp
kT

0.25 5
or fF(Ec) exp 6.43 10
0.0259
The electron concentration is given by
( Ec EF ) 0.25
n0 Nc exp (2.8 1019 )exp
kT 0.0259
or cm–3
n0 = 1.8 × 1015
The thermal-equilibrium concentration of holes in the valence band is found by integrating Eq. 1.29
over the valence band energy, or

P0 g v ( E )[1 f F ( E )]dE …(1.33)

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 24 Electronic Devices and Circuits

We may not that

1
1 – fF(E) …(1.34)
E E
1 exp F
kT

For energy states in the valence band, E < Ev. If (EF – Ev) >> kT (the Fermi function is still assumed
to be within the bandgap), then we have a slightly different form of the Boltzmann approximation. Equation
(1.34) may be written as

1 ( EF E)
1 – fF(E) exp …(1.35)
EF E kT
1 exp
kT

we find the thermal-equilibrium concentration of holes in the valence band is

Ev
4 (2 m*p )3/2 ( EF E)
p0 3
Ev E exp dE …(1.36)
h kT
Thus we get

3/2
2 m*p kT ( EF Ev )
p0 2
exp …(1.37)
h kT

We may define a parameter Nv as

3/2
2 m*pkT
Nv …(1.38)
h2
which is called the effective density of states function in the valence band. The thermal-equilibrium
concentration of holes in the valence band may now be written as

( EF Ev )
p0 Nv exp …(1.39)
kT

REMEMBER • To learn equation (1.39), Nv is very large and p0 is small so we need negative value inside exp,
E EF
generally EF is greater than Ev. So the term will be exp v . Thus thermal equilibrium
kT
concentration of holes in valence band is
Ev EF
p0 Nv exp
kT
• Nc and Nv are proportional to T3/2 which show that as temperature will increase Nc, Nv the
effective density of states will increase because the fermi function will change with temperature
as shown in Fig. 1.26, more states will have non zero probability.

• n0 and p0 are constant values at a fixed temperature that means at a constant temperature
number of electrons and holes remain constant. This is because both recombination and
generation take place simultaneously and at fixed temperature (thermal equilibrium) rate of
recombination = rate of generation.

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 Energy band and Charge Carrier in Semiconductor 25

Example 1.6

Calculate the thermal equilibrium hole concentration in silicon at T = 400 K .

Assume that the Fermi energy is 0.27 eV above the valence band energy. The value of N v for
silicon at T = 300 K is N v = 1.04 × 10 19 cm –3 .
Solution 1.6
The parameter values at T = 400 K are found as
3/2
400
Nv (1.04 1019 ) 1.60 1019 cm 3
300
and
400
kT (0.0259) 0.03453 eV
300
The hole concentration is then

p0 ( EF Ev ) 0.27
Nv exp (1.60 1019 )exp
kT 0.03453
or
p 0 = 6.43 × 1015 cm–3

gc(E)

Ec
T1 T2

EF

Ev
gv(E)

fF(E) = 0 fF(E) = 1
Fig.1.26 : Density of states functions, Fermi-Dirac probability, at different temperatures T 2 > T 1 .

1.9.1 The intrinsic Carrier Concentration

In intrinsic semiconductor the concentration of electrons in the conduction band is equal to the
concentration of holes in the valence band. We may denote ni and pi as the electron and hole concentration in
intrinsic semiconductor. However ni = pi so normally we simply use the parameter ni as the intrinsic carrier
concentration, which refer to either the intrinsic electron or hole concentration. The fermi level for the intrinsic
semiconductor is called intrinsic fermi energy or EF = EFi
Thus we can write
( Ec EFi )
n0 ni Nc exp …(1.40)
kT
and

( EFi Ev )
p0 pi ni Nv exp …(1.41)
kT

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 26 Electronic Devices and Circuits

If we take the product of Eqs. (1.40) and (1.41), we obtain

( Ec EFi ) ( EFi Ev )
ni2 NcNv exp exp …(1.42)
kT kT
or

(E c Ev ) Eg
ni2 N c N v exp N c N v exp
kT kT
where Eg is the bandgap energy. For a given semiconductor material at a constant temperature, the
value of ni is a constant, and independent of the Fermi energy.

3/2 3/2
2 m*nkT 2 m*p kT Eg
ni2 2 2
2 2
exp
h h kT

Thus ni2 T 3 and ni T 3/2 .

Example 1.7

To calculate the intrinsic carrier concentration in gallium arsenide at T = 300 K and at

T = 450 K .The values of N c and N v at 300 K for gallium arsenide are 4.7 × 10 17 cm –3 and
7.0 × 10 18 cm –3 , respectively. Both N c and N v vary as T 3/2 . Assume the bandgap energy of
gallium arsenide is 1.42 eV and does not vary with temperature over this range.
Solution 1.7
The value of kT at 450 K is
450
kT (0.0259) 0.03885 eV
300
Using Eq. (1.43), we find for T = 300 K
1.42
ni2 (4.7 1017 )(7.0 1018 )exp 5.09 1012
0.0259
so that
ni = 2.26 × 106 cm–3
At T = 450 K, we find
3
ni2 450 1.42
( 4.7 101 7 )(7.0 1018 ) exp 1.48 10 2 1
30 0 0 .03 885
so that
ni = 3.85 × 1010 cm–3
1.9.2 The intrinsic Fermi-Level position
We have qualitatively argued that the Fermi energy level is located near the center of the forbidden
bandgap for the intrinsic semiconductor. We can specifically calculate the intrinsic Fermi-level position. Since
the electron and hole concentrations are equal we have
( Ec EFi ) ( EFi Ev )
Nc exp Nv exp …(1.44)
kT kT
If we take the natural log of both sides of this equation and solve for EFi, we obtain
1 1 N
( Ec Ev )
EFi kT v …(1.45)
2 2 Nc
From the definitions for Nc and Nv Eq. (1.45) may be written as

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 Energy band and Charge Carrier in Semiconductor 27

1 3 m*p
EFi ( Ec Ev ) kT * …(1.46)
2 4 mn
1
The first term, ( Ec Ev ), is the energy exactly midway between Ec and Ev, or the midgap energy. Wee
2
can define

1
( Ec Ev ) = Emidgap
2

so that

3 m*p
EFi – Emidgap kT * …(1.47)
4 mn

If the electron and hole effective masses are equal so that m*p m*n , then the intrinsic Fermi level is
exactly in the center of the bandgap. If m*p m*n , the intrinsic Fermi level is slightly above the center, and if
m*p m*n , it is slightly below the center of the bandgap. The density of states function is directly related to the
carrier effective mass; thus a larger effective mass means a larger density of states function. The intrinsic Fermi
level must shift away from the band with the larger density of states in order to maintain equal numbers of
electrons and holes.

REMEMBER We generally write formulae of ni as

Eg
ni AT3/2 exp
2kT
where A is any constant value
We can see that in intrinsic semiconductor the number of electrons and holes will increase with
temperature with factor of T3/2.

1.10 Dopant Atoms and Energy levels.

The most important property of semiconductor is that we can change the conductivity of semiconductor
material by adding small, controlled amounts of specific dopant, or impurity atoms.These doped semiconductors
are called extrinsic semiconductors. Generally doping is done by adding atoms of group III and group V elements.

1.10.1 Doping with Group 5 Elements

In a pure silicon crystal each silicon atom form four covalent bond with neighbouring four silicon atoms
and thus when phosphorous atoms are added as substitutional impurities then they replace silicon atom. Since
phosphorous atoms has 5 valence electrons four of these will contribute to the covalent bonding with silicon
atom leaving the 5th electron loosely bound to phosphorous atom.

Note: Thus 5th electron of phosphorous atom do not form any covalent bond thus it is loosely bound than other
electrons as all other form covalent bond.

The silicon lattice with phosphorous atom is shown in Fig 1.27

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 28 Electronic Devices and Circuits

Si Si Si Si Si Si

Si Si Si Si B Si

e–
Si Si p Si Si Si

Si Si Si Si Si Si

Fig.1.27 : Silicon lattice with phosphorous atom impurity

Doped semiconductor at T = 0 K
At very low temperature no covalent bond is broken and the 5th electron of phosphorous atom (the
donor electron) is bound to the phosphorous atom. It is clear that to make this donor electron free the amount
of energy required is less than the energy required to break the covalent bond, also the freeing of 5th phosphorous
electron will create only free electron and no holes in valence bond.

Note: • Thus at 0 K the doped semiconductor act as an insulator as still no free carrier exist
• energy required to elevate the donor electron into the conduction band require less energy than energy
required for breaking covalent bond
• breaking of covalent bond create hole in valence bond and electron in conduction band, but donor
electron produce only electron in conduction bond.

The above explaination is modelled in band diagram as shown in Fig 1.28. Since donor electron need
very less energy to go into conduction band thus all the donor electrons are shown by a discrete energy level Ed.
Ed is the energy state of the donor electron.
Conduction band – – –
Ec Ec
Electron energy

Electron energy

Ed + + + Ed

Ev Ev
Valence band

(a) (b)
Fig.1.28 : The energy-band diagram showing (a) the discrete donor energy state, and
(b) the effect of a donor state being ionized
If a small amount of energy, such as thermal energy, is added to the donor electron, it can be elevated
into the conduction band, leaving behind a positively charged phosphorus ion. The electron in the conduction
band can now move through the crystal generating a current, while the positively charged ion is fixed in the
crystal. This type of impurity atom donates an electron to the conduction band and so is called a donor impurity
atom. The donor impurity atoms add electrons to the conduction band without creating holes in the valence
band. The resulting material is referred to as an n-type semiconductor (n for the negatively charged electron).

Extrinsic semiconductor doped with donor impurities

• At T = 0 K, since no thermal energy is present in the semiconductor, no free carrier. All the donor
atoms (phosphorous atoms) have 5th electron intact. That is all donor electrons are present at Ed

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 Energy band and Charge Carrier in Semiconductor 29

energy level.
• Now as temperature is increased the donor impurities get ionised and conduction band start getting
donor electrons and donor impurities convert into donor ions with positive charge. (Thus extrinsic
semiconductor is still neutral at T = 0 K and T > 0 K)
• At T = 300 K (room temperature) we assume that all impurity atoms are ionised and all donor
electrons are present in conduction band. Since breaking of covalent bond also take place at
T = 300 K, so very few electrons in conduction band will be because of bond breaking, thus number
of holes in valence band will also be very less.
Thus in n type semiconductors at room temperature in conduction band concentration of electrons
will be higher than concentration of holes in valence band.

REMEMBER • If semiconductor is group IV element then group V elements are donor impurities as number
of valence electrons are greater in impurity atoms than the number of valence electrons in
atoms of semiconductor
• Impurities with higher number of valence electrons than the valence electrons of atoms of
semiconductor, act as donor impurities.

In n type semiconductors the density of electrons in conduction band is greater than density of holes in
valence band. Since density of states gc(E) and gv(E) will not change due to doping, the change that will occur
is in fermi energy level,
Since
n(E) = fF(E)gc(E)
and p (E ) = gv(E)(1 – fF(E))
in intrinsic semiconductor EF = EFi and n(E) = p(E), for higher number of electrons in n type
semiconductor it is obvious that Fermi energy level will be greater than EFi then only number of electrons will be
greater than number of holes as shown in Fig 1.29
E

gc(E)
Ec
Area = n0 = electron concentration

EF
fF(E)
Efi

Ev
gv(E)

Area = p0 = hole concentration

fF(E) = 0 fF(E) = 1
Fig.1.29 : Density of states functions, Fermi-Dirac probability function, and areas representing
electron and hole concentrations for the case when E F is above the intrinsic Fermi energy

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 30 Electronic Devices and Circuits

The equations for n0 and p0, thermal equilibrium concentration of electrons and holes in conduction
band and valence band:-
EF Ec
n0 Nc exp
kT
Ev EF
and p0 Nv exp
kT
will be valid in extrinsic semiconductor.

Note: From the above equations we can see that when EF = EFi then n0 = p0 = ni and when EF > EFi then n0 >
p0 and when EF < EFi then p0 > n0.

From above equations we can see that

Ev Ec
n 0p 0 NcNv exp
kT
Eg
NcNv exp
kT
n 0p 0 ni2 …(1.48)

REMEMBER • equation (1.48) is called mass action law, the product of concentration of electron in
conductionband and concentration of hole in valence band is equal to square of intrinsic
concentrations of semiconductor.
• The mass action law is valid in semiconductor at thermal equilibrium.

Charge carriers concentration in conduction band of n type semiconductor

In extrinsic semiconductor, concentration of electron and hole are
n0 = Due to ionisation of impurity atoms process (1) + Breaking of Covalent Bond process (2)
p0 = Breaking of Covalent Bond Process (2)
• At temperature T = 0K both process (1) and Process (2) are inactive so n0 = p0 = 0
• As temperature is increased from 0 K to 300 K the process (1) dominate over process (2) and most
of n0 is due to ionisation of impurity atoms thus n0 > p0.
• At T = 300 K (room temperature) we assume all the impurity atoms are ionised and if ND is
ni2
concentrations of impurity atoms and ND >> ni then n0 = ND and p0 .
ND
• When temperature is increased above T = 300 K then process (1) stops and process (2) is active
and with rise in temperature more covalent bonds break and produce more and more electrons and
holes thus n0, p0 keep increasing, but we assume that n0 remain constant equal to ND because
concentration of electron due to process (2) is still less.
• But after T = 600 K the concentration of electron due to process (2) dominate and we can neglect
all electrons due to process (1). Thus after 600K n0 = p0 and extrinsic semiconductor start acting
as intrinsic semiconductor. The concentration of electrons in conduction band with respect to
temperature is

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 Energy band and Charge Carrier in Semiconductor 31

Concentration of electrons
in conduction band
Intrinsic
extrinsic
ND

ni
Partially
Ionised
T
O
300 K 600 K

Fig.1.30 : Concentration of electrons in conduction band with respect to temperature.

Note: Temperature above which extrinsic semiconductor act as intrinsic semiconductor is called curie temperature.

Fermi level in n type semiconductor

• At T = 0 K since no electrons are present inside conduction band, Ed energy level and valence band
are completely filled. The definition of EF is that energy level below and above which probability to
find electron is 1 and 0 respectively at T = 0 K. Thus Fermi level should be between Ec and Ed at
T = 0 K.
• As temperature is increased the Fermi level will move toward centre of forbidden band or EFi. For
T = 300K n0 > p0 thus EF > EFi but at and above 600K the EF will coincide with EFi as extrinsic
semiconductor will act as intrinsic semicoductor.

Example 1.9

Consider a silicon semiconductor with n i = 1.5 × 10 10 cm –3 doped with donor atoms with
concentration N D = 1 × 10 15 cm –3 . The find number of electrons and holes in silicon at
300 K .
Solution 1.9
Since ND >> ni thus
n0 = ND = 1 × 1015 cm–3
ni2 (1.5 1010 )2
and p0 2.25 105 cm 3
ND 1 1015

Note: From above example 1.9 we can see that intrinsic semiconductor at 300 K will have n0 = p0 = 1.5×1010 cm–3,
but doped semiconductor has lesser concentration of holes than the intrinsic semiconductor because number of
electrons is large due to which more holes will recombine giving less holes than that of intrinsic semiconductor.

1.10.2 Doping with group 3 elements

Now consider adding a group III element, such as boron, as a substitutional impurity to silicon The
group III element has three valence electrons, which are all taken up in the covalent bonding. As shown in
Fig. 1.31(a) one covalent bonding position appears to be empty. If an election were to occupy this "empty”
position, its energy would have to be greater than that of the valence electrons, since the net charge state of the
boron atom would now be negative. However, the election occupying this "empty" position does not have sufficient

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 32 Electronic Devices and Circuits

energy to be in the conduction band, so its energy is far smaller than the conduction-band energy. Fig 1.31(b)
shows how valence electrons may gain a small amount of thermal energy and move about in the crystal The
"empty" position associated with the boron atom becomes occupied, and other valence electron positions become
vacated. These other vacated electron positions can be thought of as holes in the semiconductor material.

Si Si Si Si Si Si Si Si Si Si Si Si

Si Si Si Si B Si Si Si Si Si e B Si

Si Si Si Si Si Si Si Si Si Si Si Si

Si Si Si Si Si Si Si Si Si e Si Si Si

(a) (b)

Fig.1.31 : Two-dimensional representation of a silicon lattice (a) doped with a boron atom, and
(b) showing the ionization of the boron atom resulting in a hole
Fig 1.32 shows the expected energy state of the “empty” position and also the formation of a hole in the
valence band. The hole can move through the crystal generating a current, while the negatively charged boron
atom is fixed in the crystal. The group III atom accepts an electron from the valence band and so is referred to
as an acceptor impurity atom. The acceptor atom can generate holes in the valence band without generating
electrons in the conduction band. This type of semiconductor material is referred to as a p-type material (p for
the positively charged hole).

Conduction band
Ec Ec
Electron energy

Electron energy

– – –
Ea Ea
Ev + + + Ev
Valence band

(a) (b)

Fig.1.32 : The energy-band diagram showing (a) the discrete acceptor energy state, and
(b) the effect of an acceptor state being ionized
The pure single-crystal semiconductor material is called an intrinsic material. Adding controlled amounts
of dopant atoms, either donors or acceptors, creates a material called an extrinsic semiconductor An extrinsic
semiconductor will have either a preponderance of electrons (n type) or a preponderance of holes (p type).

Note: • At T = 0 K the doped semiconductor has no carriers and act as insulator

• When temperature is increased the electrons will move from valence band to acceptor energy level, this
transition need very less energy and produce only holes in valence band
• The impurity atoms which gets electron become negatively charged ion.
• Breaking of covalent bond create hole and electron but acceptor atom ionisation only produce hole.

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 Energy band and Charge Carrier in Semiconductor 33

Extrinsic semiconductor doped with acceptor impurities

• At T = 0 K, there are no carriers in semiconductor, no free carrier. All the acceptor atoms are
unionised and Ea acceptor energy level are completely empty.
• As temperature is increased the electrons from valence band gain some energy and occupy empty
state in acceptor energy level and leave behind holes in valence band.
• At room temperature T = 300 K we assume all acceptor atoms are ionised that is all states at Ea
energy level are filled. If NA is concentration of acceptor atoms and NA >> ni then we assume
concentration of holes in valence band will be p0 = NA because holes produced due to bond breaking
will be very less and concentration of electrons n0 will be very small because electrons are produced
only by bond breaking.
n12 n12
n0
p0 NA
Thus in p type semiconductor at room temperature concentration of electrons in conduction band will
be less than concentration of holes in valence band

REMEMBER • If semiconductor is group IV element then group III elements are acceptor impurities as
number of valence electrons are less in impurity atoms than the number of valence electrons
in atom of semiconductor
• Impurities with lesser number of valence electrons than the valence electrons of atoms of
semiconductor, act as acceptor impurities.

In p type semiconductor the density of electrons in conduction band is less than the density of holes in
valence band. Thus Fermi level EF will be below EFi as shown in Fig 1.33. The equations for n0 and p0 are valid
here also
E

gc(E)
Ec
fF(E) Area = no = electron concentration

Efi

EF

Ev
gv(E)

Area =po = hole concentration

fF(E) = 0 fF(E) = 1
Fig.1.33 : Density of states functions, Fermi-Dirac probability function, and areas representing
electron and hole concentrations for the case when E F is below the intrinsic Fermi energy

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 34 Electronic Devices and Circuits

EF Ec
n0 Nc exp
kT
E EF
and p0 Nv exp v
kT
2
and n 0p 0 n1

REMEMBER mass action law is valid in both n and p type semiconductor at thermal equilibrium.

Charge carrier concentrations in valence band of p type semiconductor

In extrinsic semiconductor, concentration of electron and hole are
n0 = Breaking of covalent Bond Process (2)
p 0 = Due to ionisation of impurity atoms Process (1) +
Breaking of covalent Bond Process (2)
• At, temperature T = 0K both process (1) and (2) are inactive so n0 = p0 = 0
• As temperature is increased from 0 K to 300 K the process (1) dominate over process (2) and most
of p0 is due to ionisation of impurity atoms and very few are due to covalent bond breaking.
Thus p0 > n0.
• At T = 300 K (room temperature) we assume all the impurity atoms are ionised and if NA is
n12
concentration of impurity atoms and NA >> ni then p0 = NA and n0
NA
• When temperature is increased above 300 K then process (1) stops and process (2) is active and
with rise in temperature more covalent bonds break and produce more and more electron-hole
pair, but we assume that p0 remain equal to NA because concentration of hole due to process (2) is
still less.
• But for temperature greater than 600K the concentration of holes due to process (2) dominate and
we neglect all holes due to process (1). Thus after 600K p0 = n0 and extrinsic semiconductor start
acting as intrinsic semiconductor.
The concentration of carriers in valence band with respect to temperature is
Concentration of holes
in valence band

Intrinsic
extrinsic
NA

Partially ni
Ionised
T
O
300 K 600 K

Fig.1.34 : Concentration of holes in valence band with respect to temperature

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 Energy band and Charge Carrier in Semiconductor 35

Fermi level in p type semiconductor

• At T = 0K the states at acceptor energy level will be completely empty and fermi energy level EF at
T = 0 K is such that below EF probability to find electron is 1 and above EF probability to find
electron is 0. Thus EF will be between Ev and Ea.
• For T < 600 K since p0 > n0 so EF < EFi and for T > 600 K the semiconductor become intrinsic
semiconductor thus EF = EFi.

REMEMBER In extrinsic semiconductor as temperature increases Fermi level move toward centre of forbidden
band.

1.10.3 n0 and p0 equations in another format

We know that
EF Ec
n0 Nc exp
kT
E EF
and p0 Nv exp v
kT
Eg
and ni2 NcNv exp
kT
Using all these equations we can get
EF EFi
n0 ni exp …(1.49)
kT
EFi EF
and p0 ni exp …(1.50)
kT

REMEMBER To learn equations (1.49) and (1.50), as we know that in n type semiconductor n0 > ni and
EF > EFi and p0 < ni. Thus in equation (1.49) inside exp the term should be positive that is
EF – EFi and in equation (1.50) inside exp the term should be negative EFi – EF.

1.10.4 Case of Incomplete ionisation

We have already discussed the Fermi-Dirac distribution function, which gives the probability that a
particular energy state will be occupied by an electron. We need to reconsider this function and apply the
probability statistics to the donor and acceptor energy states.
Suppose we have Ni electrons and gi quantum states, where the subscript i indicates the ith energy
level. There are gi ways of choosing where to put the first particle. Each donor level has two possible spin
orientations for the donor electron; thus each donor level has two quantum states. The insertion of an electron
into one quantum state, however, precludes putting an electron into the second quantum stale. By adding one
electron, the vacancy requirement of the atom is satisfied, and the addition of a second electron in the donor
level is not possible. The distribution function of donor electrons in the donor energy states is then slightly
different than the Fermi-Dirac function.
The probability function of electrons occupying the donor state is

Nd
nd …(1.51)
1 E EF
1 exp d
2 kT

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 36 Electronic Devices and Circuits

where nd is the density of electrons occupying the donor level and Ed is the energy of the donor level.
1 1
The factor in this equation is a direct result of the spin factor just mentioned. The factor is sometimes
2 2
written as 1/g, where g is called a degeneracy factor.
Equation (1.51) can also be written in the form

nd Nd Nd …(1.52)

where Nd is the concentration of ionized donors. In many applications, we will be interested more in
the concentration of ionized donors than in the concentration of electrons remaining in the donor states.
If we do the same type of analysis for acceptor atoms, we obtain the expression

Na
pa Na Na …(1.53)
1 E Ea
1 exp F
g kT

where Na is the concentration of acceptor atoms, Ea is the acceptor energy level, pa is the concentration
of holes in the acceptor states, and Na is the concentration of ionized acceptors. A hole in an acceptor state
corresponds to an acceptor atom that is neutrally charged and still has an “empty” bonding position. The
parameter g is, again, a degeneracy factor. The ground state degeneracy factor g is normally taken as four for the
acceptor level in silicon and gallium arsenide because of the detailed band structure.
If in a question percentage ionisation is given then

% Ionisation
Nd Nd …(1.54)
100

% Ionisation
and Na Na …(1.55)
100

1.10.5 Complete Ionisation and Freeze out

The probability function for electrons in the donor energy state assuming that (Ed – EF) >> kT is given
as

Nd ( Ed EF )
nd 2Nd exp …(1.54)
1 E EF kT
exp d
2 kT

If (Ed – EF) >> kT, then the Boltzmann approximation is also valid for the electrons in the conduction
band so that,
( Ec EF )
n0 Nc exp
kT
We can determine the relative number of electrons in the donor state compared with the total number
of electrons; therefore we can consider the ratio of electrons in the donor state to the total number of electrons
in the conduction band plus donor state. Thus

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 Energy band and Charge Carrier in Semiconductor 37

( Ed EF )
2Nd exp
nd kT
…(1.55)
nd n0 ( Ed EF ) ( Ec EF )
2Nd exp Nc exp
kT kT
The Fermi energy cancels out of this expression. Dividing by the numerator term, we obtain

nd 1
nd n0 Nc (Ec Ed )
1 exp
2N d kT

The factor (Ec – Ed) is just the ionization energy of the donor electrons.

REMEMBER At room temperature we assume complete ionisation and at 0 K the condition is of complete
freeze out.

Example 1.10

To determine the fraction of total electrons still in the donor states at T = 300 K if E d is
0.045 ev below E c .
Consider phosphorus doping in silicon, for T = 300 K , at a concentration N d = 10 15 cm –3 .
Solution 1.10
we find
nd 1
19
0.0041 0.41%
n0 nd 2.8 10 0.045
1 16
exp
2(10 ) 0.0259

Example 1.11

To determine the temperature at which 90 percent of acceptor atoms are ionized.

Consider p -type silicon doped with boron at a concentration of N a = 10 16 cm –3 and E a is
0.045ev above E v .
Solution 1.11
Find the ratio of holes in the acceptor state to the total number of holes in the valence band plus acceptor
state. Taking into account the Boltzmann approximation and assuming the degeneracy factor is g = 4, we
write
pa 1
p0 pa Nv ( Ea Ev )
1 exp
4Na kT
For 90 percent ionization,
pa 1
0.10
p0 pa T
3/2
(1.04 1019 )
300 0.045
1 exp
4(1016 ) T
0.0259
300

Using trial and error, we find that T = 193 K.

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 38 Electronic Devices and Circuits

1.11 Charge Neutrality

In thermal equilibrium, the semiconductor crystal is electrically neutral. The electrons are distributed
among the various energy states, creating negative and positive charges, but the net charge density is zero. This
charge-neutrality condition is used to determine the thermal-equilibrium electron and hole concentrations as a
function of the impurity doping concentration. We will define a compensated semiconductor and then determine
the electron and hole concentrations as a function of the donor and acceptor concentrations.

1.11.1 Compensated Semiconductors

A Compensated semiconductor is one that contains both donor and acceptor impurity atoms in the
same region. A compensated semiconductor can be formed, for example, by diffusing acceptor impurities into
an n-type material, or by diffusing donor impurities into a p-type material. An n-type compensated semiconductor
occurs when Nd > Na and a p-type compensated semiconductor occurs when Na > Nd . If Na = Nd, we have a
completely compensated semiconductor that has, as we will show, the characteristics of an intrinsic material.
Compensated semiconductors are created quite naturally during device fabrication as we will see later.

1.11.2 Equilibrium Electron and Hole Concentrations

In a compensated semiconductor when both donor and acceptor impurity atoms are added to the same
region then the donors or acceptors can ionized or un-inonized, electrons and holes will be due to ionized
carriers and due to thermal generation. If no is total concentration of electrons and po is total concentration of
holes. The parameter nd is the concentration of electrons in the donor energy states so ionized donors are

N d = Nd nd
and pa is the concentration of holes in the acceptor states thus ionized acceptors are

N a = Na pa
The charge neutrality condition is expressed by equating the denisty of negative charges to the density
of positive charges. We then have
n0 Na p0 Nd …(1.56)
or
n0 + (Na – pa) = p0 + (Nd – nd) …(1.56)
where n0 and p0 are the thermal-equilibrium concentrations of electrons and holes in the conduction
band and valence band, respectively. The parameter nd is the concentration of electrons in the donor energy
states, so Nd Nd nd is the concentration of positively charged donor states. Similarly, pa is the concentration
of holes in the acceptor states, so Na Na pa is the concentration of negatively charged acceptor states. We
e
have expressions for n0, p0, nd, and pa in terms of the Fermi energy and temperature.
If we assume complete ionization, nd and pa are both zero, and Eq. (1.57) becomes
n0 + Na = p0 + Nd …(1.58)
ni2
If we express p0 as , then Eq. (1.55) can be written as
n0
ni2
n0 + Na Nd …(1.59)
n0
which in turn can be written as

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 Energy band and Charge Carrier in Semiconductor 39

n02 ( Nd Na )n0 ni2 = 0 …(1.60)

The electron concentration n0 can be determined using the quadratic Formula, or
2
( Nd Na ) Nd Na
n0 ni2 …(1.61)
2 2
The positive sign in the quadratic formula must be used, since, in the limit of an intrinsic semiconductor
when Na = Nd = 0, the electron concentration must be a positive quantity, or n0 = ni.
Equation (1.61) is used to calculate the electron concentration in an n-type semiconductor, or when
Nd > Na. Although Eq.(1.161) was derived for a compensated semiconductor, the equation is also valid for
Na = 0.

Example 1.12

To determine the thermal equilibrium electron and hole concentrations for a given doping
concentration.
Consider an n -type silicon semiconductor at T = 300 K in which N d = 10 16 cm –3 and
N a = 0. The intrinsic carrier concentration is assumed to be n i = 1.5 × 10 10 cm –3 .
Solution 1.5
The majority carrier electron concentration is (by equation (1.61))
2
1016 1016
n0 (1.5 1010 )2 1016 cm 3
2 2
The minority carrier hole concentration is found as
ni2 (1.5 1010 )2
p0 2.25 104 cm 3
n0 1 1016

Example 1.13

To calculate the thermal-equilibrium electron and hole concentrations in a germanium sample

for a given doping density.
Consider a germanium sample at T = 300 K in which N d = 5 × 10 13 cm –3 and N a = 0.
Assume that n i = 2.4 × 10 13 cm –3 .
Solution 1.13
Again, from Eq.(1.61), the majority carrier electron concentration is
2
5 1013 5 1013
n0 (2.4 1013 )2 5.97 1013 cm 3
2 2
The minority carrier hole concentration is
ni2 (2.4 1013 )2
p0 9.65 1012 cm 3
n0 5.97 1013

ni2
Note: If the semicoductor is doped with donor impurity concentration Nd. If Nd > ni then n0 Nd and p0 .
Nd
ni2
If Nd ni then to find n0 we use equation 1.61 and p0 .
n0

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 40 Electronic Devices and Circuits

ni2
If we reconsider Eq.(1.58) and express n0 as , then we have
p0
ni2
Na = p0 + Nd
p0
which we can write as

p02 ( Na Nd )p0 n2 = 0 …(1.63)

Using the quadratic formula, the hole concentration is given by

2
Na Nd Na Nd
p0 ni2 …(1.64)
2 2

where the positive sign, again, must be used. Equation (1.64) is used to calculate the thermal-equilibrium
majority carrier hole concentration in a p-type semiconductor, or when Na > Nd. This equation also applies for
Nd = 0.

Thus we can have 8 cases in semiconductors.

Case 1 : n type semiconductor (Nd >> ni)

ni2
Here n0 = Nd and p0
ND
Case 2 : p type semiconductor (Na >> ni)

ni2
Here p0 = NA and n0
NA
Case 3 : n type semiconductor (Nd is of order of ni)
To find n0 we use equation (1.61) with Na = 0, we get
2
Nd Nd
n0 ni2
2 2

ni2
and p0
n0
Case 4 : p type semiconductor (Na is of order of ni)
To find p0 we use equation (1.64) with Nd = 0, we get
2
Na 2 Na
p0 ni
2 2
ni2
and n0
p0
Case 5 : Compensated n type semiconductor (Na, Nd >> ni)
It is n type because ND > NA and
n0 = ND – NA

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 Energy band and Charge Carrier in Semiconductor 41

ni2
and p0
n0
Case 6 : Compensated p type semiconductor (Na, Nd >> ni)
It is p type because NA > NA and
p 0 = NA – ND
ni2
and n0
p0
Case 7 : Compensated n type semiconductor (Na, Nd are of order of ni)
In n type compensated semiconductor Nd > Na.
To find n0 we use equation (1.61)
2
Nd Na Nd Na
n0 ni2
2 2

ni2
and p0
n0

Case 8 : Compensated p type semiconductor (Na, Nd are of order of ni)

In p type compensated semiconductor Na > Nd.
To find p0 we use equation (1.64)
2
Na Nd Na Nd
p0 ni2
2 2

ni2
and n0
p0

Example 1.14

To calculate the thermal-equilibrium electron and hole concentrations in a compensated p-

type semiconductor.
Consi der a si li con semi conductor at T = 300 K in which N a = 10 16 cm –3 and
N d = 3 × 10 15 cm –3 . Assume ni = 1.5 × 10 10 cm –3 .
Solution 1.14
Since Na > Nd, the compensated semiconductor is p-type and the thermal-equilibrium majority carrier
hole concentration is given by Eq. (1.64) as
2
1016 3 105 1016 3 1015
p0 (1.5 1010 )2
2 2
so that
p 0 = 7 × 1015 cm–3
The minority carrier electron concentration is
ni2 (1.5 1010 )2
n0 3.21 104 cm 3
p0 7 1015

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 42 Electronic Devices and Circuits

1.12 Position of Fermi level

We have already discussed the position of Fermi level in all cases we will just summarise few formulae
and results.
EF Ec
Using n0 Nc exp
kT
In n type semiconductor n0 Nd
Nc
Ec – EF kT ln …(1.65)
Nd
Similarly in p type semiconductor, where p0 Na
Ev EF
p0 Nv exp
kT

Nv
EF – Ev kT ln …(1.66)
Na

The distance between the bottom of the conduction band and the Fermi energy is a logarithmic function
of the donor concentration. As the donor concentration increases, the Fermi level moves closer to the conduction
band. Conversely, if the Fermi level moves closer to the conduction band, then the electron concentration in the
conduction band is increasing. We may note that if we have a compensated semiconductor, then the Nd term in
Eq. (1.65) is simply replaced by Nd – Na, or the net effective donor concentration.
Similarly in p type semiconductors
The distance between the Fermi level and the top of the valence-band energy for a p-type semiconductor
is a logarithmic function of acceptor concentration; as the acceptor concentration increases, the Fermi level
moves closer to the valence band. Again, if we have a compensated p-type semiconductor, then the Na term in
Eq.(1.66) is replaced by Na – Nd, or the net effective acceptor concentration.

Example 1.15

To determine the required donor impurity concentration to obtain a specified Fermi energy.
Silicon at T = 300 K contains an acceptor impurity concentration of N a = 10 16 cm –3 .
Determin the concentration of donor impurity atoms that must be added so that the silicon
is n type and the Fermi energy is 0.20 eV below the conduction band edge.
Solution 1.5
From Eq.(1.65), we have
Nc
Ec – EF kT ln
Nd Na
which can be rewritten as
( Ec EF )
Nd – Na Nc exp
kT
Then
0.20
Nd – Na 2.8 1019 exp 1.24 1016 cm 3
0.0259
or
Nd = 1.24 × 1016 + Na = 2.24 × 1016 cm–3

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 Energy band and Charge Carrier in Semiconductor 43

Another way of writing equation for Fermi level is using

EF EFi
n0 ni exp
kT
n0
EF – EFi kT ln …(1.67)
ni
and
EFi EF
p0 ni exp
kT
p0
EFi – EF kT ln …(1.68)
ni
Note: From equation (1.67) and (1.68) we can see that for n0 > ni i.e. for n type semiconductor EF > EFi and for
intrinsic semiconductor n0 = ni that is EF = EFi and when n0 < ni i.e. for p type semiconductor EF < EFi.

1.12.1 Variation of EF with doping concentration

We may plot the position of the Fermi energy level as a function of the doping concentration. Fig 1.36
shows the Fermi energy level as a function of donor concentration (n-type) and as a function of acceptor
concentration (p-type) for silicon at T = 300 K. As the doping levels increase, the Fermi energy level moves
closer to the conduction band for the n-type material and closer to the valence band for the p-type material.
Nd(cm–3)
1012 1013 1014 1015 1016 1017 1018
Ec

n type

Efi

p type

Ev
1012 1013 1014 1015 1016 1017 1018
Na(cm ) –3

Fig.1.36 : Position of Fermi level as a function of donor concentration (n type and acceptor concentration (p
type )

1.13 Comparison between Silicon and Germanium

• The conductiviy of holes and electrons in germanium is more than that of conductivity of holes and
electrons is silicon
• Germanium has higher speed of operation thus used for high frequency
• Mobility T–m
where m is a constant
for Ge : m = 1.66 for electrons
: m = 2.33 for holes
for Si : m = 2.5 for electrons

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 44 Electronic Devices and Circuits

: m = 2.7 for holes

• Operating temperature of Si is –60°C to 175°C and for Ge is –60°C to 75°C
• Standard doping concentration
1. Moderate doping 1 : (106 to 108)
2. lightly doped 1 : 1011
3. heavily doped 1 : 103
The above doping concentration ratio is ratio of doping concentration and density of atoms is semiconductor.
For example if doping is done as 1 : 103 and in silicon has density of atoms as 1 × 1022 atoms/cc then
doping density is 1 × 109 atoms/cc
Thus

Total number of atoms

Doping density Impurity ratio
cc

1.14 Degenerate and Nondegenerate Semiconductors

In our discussion of adding dopant atoms to a semiconductor, we have implicitly assumed that the
concentration of dopant atoms added is small when compared to the density of host or semiconductor atoms.
The small number of impurity atoms are spread far enough apart so that there is no interaction between donor
electrons, for example, in an n-type material. The few impurity atoms were so widely spaced throughout the
sample, we can say that no charge transport could take place within the donor or acceptor levels. We have
assumed that the impurities introduce discrete, noninteracting donor energy states in the n-type semiconductor
and discrete, noninteracting acceptor states in the p-type semiconductor. These types of semiconductors are
referred to as nondegenerate semiconductors.
If the impurity concentration increases, the distance between the impurity atoms decreases and a point
will be reached when donor electrons, for example, will begin to interact with each other. When this occurs, the
single discrete donor energy will split into a band of energies. As the donor concentration further increases, the
band of donor states widens and may overlap the bottom of the conduction band. This overlap occurs when the
donor concentration becomes comparable with the effective density of states. When the concentration of electrons
in the conduction band exceeds the density of states Nc the Fermi energy lies within the conduction band. This
type of semiconductor is called a degenerate n-type semiconductor.
In a similar way, as the acceptor doping concentration increases in a p-type semiconductor, the discrete
acceptor energy states will split into a band of energies and may overlap the top of the valence band. The Fermi
energy will lie in the valence band when the concentration of holes exceeds the density of states Nv. This type of
semiconductor is called a degenerate p-type semiconductor.
Schematic models of the energy-band diagrams for a degenerate n-type and degenerate p-type
semiconductor are shown in Fig.1.37. The energy states below EF are mostly filled with electrons and the energy
states above EF are mostly empty. In the degenerate n-type semiconductor, the states between EF and Ec are
mostly filled with electrons; thus, the electron concentration in the conduction band is very large. Similarly, in
the degenerate p-type semiconductor, the energy states between Ev and EF are mostly empty; thus, the hole
concentration in the valence band is very large.

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 Energy band and Charge Carrier in Semiconductor 45

Conduction band Conduction band

EF Ec
Electron energy

Electron energy
Ec
Filled states Empty states
(electrons) (holes)
Ev
Ev EF
Valence band Valence band

(a) (b)

Fig.1.37 : Simplified energy-band diagrams for degenerately doped (a) n-type, and (b) p-type semiconductors.

Example 1.16

A pure semiconductor germanium is doped with donor impurities to extent of 1 : 107 .

Calculate
( a ) donor concentration ( N d )
( b ) electron and hole concentration
let total number of atoms = 4.421×10 22 /cc, n i = 2.5×10 13 /cc.
Solution 1.16
(a) Nd = No. of atoms × impurity ratio
= 4.421×1015/cc

(b) n0 ND = 4.421×1015/cc

ni2
and p
n
(2.5 1013 )2
p
4.421 1015
p = 1.41×1011/cc

Example 1.17

A pure semiconductor doped with impurity to extent of 4 impurity ( N a ) atoms per every
million atoms of semiconductor. Find electron and hole concentration in semiconductor.
( n i = 1.5×10 10 /cc and number of atoms = 5×10 22 /cc)
Solution 1.17
Here doping
4
Na 5 1022 2×1017/cc
106
and p Na
ni2 (1.5 1010 )2
n 1.125×103/cc
p 2 1017

1.14 Important Properties and Standard constants

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 46 Electronic Devices and Circuits

Following are some important properties and standard values used in determination of semiconductor
parameters in the exercises of the chapter.

Table 1.1: Some standard constants

A vogadro’s number NA = 6.02 × 10+23 atoms per gram molecular weight
Boltzmann’s Constant k = 1.38 × 10–23 J/K = 8.62 × 10–5 eV/K
Electronic Charge (Magnitude) e = 1.60 × 10–19 C
Free Electron Rest Mass m0 = 9.11 × 10–31 kg
Permeability of Free space 0 = 4 × 10–7 H/m
Permittivity of Free Space e0 = 8.85 × 10–14 F/cm = 8.85 × 10–12 F/m
Plank’s Constant h = 6.625 × 10–34 J – s = 4.135 × 10–15 eV – s

kT
Thermal Voltage (T = 300 K) Vt 0.0259 volt, kT 0.0259 eV
e

Table 1.2: Properties of Silicon, Galium Arsenide, and Germanium ( T = 300 K )

Atoms (cm–3) 5.0 × 1022 4.42 × 1022 4.42 × 1022
Dielectric Constant 11.7 13.1 16.0
Bandgap Energy (eV) 1.12 1.42 0.66
Effective Density of States in 2.8 × 1019 4.7 × 1017 1.04 × 1019
Conduction Band, Nc(cm–3)
Effective Density of States in Valence 1.04 × 1019 7.0 × 1018 6.0 × 1018
Band, Nv(cm–3)
Intrinsic Carrier Concentration (cm–3) 1.5 × 1010 1.8 × 106 2.4 × 1013
Electron Mobility, n (cm2/V – s) 1350 8500 3900
Hole Mobility, 2/V
p(cm – s) 480 400 1900
Effective Mass (Density of States) 1.08 0.067 0.55

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 Energy band and Charge Carrier in Semiconductor 47
level dominates in heavily doped n-type
material? In heavily doped p-type material?
(b) Determine the electron and hole concentrations
and the location of the Fermi level in

1 Subjective Practice Problems (i) an n-type sample doped at Nd = 1017 cm–3

and (ii) in a p -type sample doped at
Na = 1017 cm–3.
(c) Determine the Fermi level position if no dopant
1 . Two semiconductor materials have exactly the same
atoms are added. Is the material n-type, p-type,
properties except that material A has a bandgap or intrinsic?
energy of 1.0 eV and material B has a bandgap energy
of 1.2 eV. Determine the ratio of ni of material A to 7 . An unknown semiconductor has Eg = 1.1 eV and
that of material B for T = 300 K. Nc = Nv. It is doped with 1015 cm–3 donors, where
the donor level is 0.2 eV below Ec. Given that EF is
2 . The electron concentration in silicon at T = 300 K 0.25 eV below Ec, calculate ni and the concentration
is n0 = 5 × 104 cm–3. of electrons and holes in the semiconductor at
(a) Determine p0. Is this n- or p-type material? 300 K.
(b) Determine the position of the Fermi level with
respect to the intrinsic Fermi level. 8 . (a) A Si sample is doped with 1016 cm–3 boron atoms
and a certain number of shallow donors. The Fermi
3 . Determine the values of n0 and p0 for silicon at
level is 0.36 eV above Ei at 300 K. What is the donor
T = 300 K if the Fermi energy is 0.22 eV above the
concentration Nd?
valence band energy.
(b) A Si sample contains 1016 cm–3 In acceptor atoms
4 . In silicon at T = 300 K, we have experimentally and a certain number of shallow donors. The In
acceptor level is 0.16 eV above Ev, and EF is
found that n0 = 4.5 × 104 cm–3 and
0.26 eV above Ev at 300 K. How many (cm–3) In
Nd = 5 × 1015 cm–3. atoms are un-ionized.
(a) Is the material n type of p type?
(b) Determine the majority and minority carrier 9 . Consider the following conduction band energy E
concentrations. vs. wave vector kx direction relation.
(c) What types and concentrations of impurity atoms (a) Which energy valley has the greater effective
exist in the material?
mass in the x-direction mx (circle one)? -valley/
5 . Silicon atoms, at a concentration of 1010 cm–3, are X-valley
added to gallium arsenide. Assume that the silicon (b) Consider two electrons, one each located at the
atoms act as fully ionized dopant atoms and that positions of the heavy crosses. Which has the
5 percent of the concentration added replace gallium greater velocity magnitude (circle one)?
atoms and 95 percent replace arsenide atoms. The one in the -valley/The one in the
Let T = 300 K. X-valley
(a) Determine the donor and acceptor concentration E
(b) Calculate the electron and hole concentrations X-valley
and the position of the Fermi level with respect
E0
to EFi

6 . Defects in a semiconductor material introduce -valley E0

allowed energy states within the forbidden bandgap.
Assume that a particular defect in silicon introduces
two discrete levels: a donor level 0.25 eV above the
top of the valence band, and an acceptor level 0.65 10. (a) The equilibrium band diagram for a doped direct
eV above the top of the valence band. The charge gap semiconductor is shown below. Is it n-type,
state of each defect is a function of the position of p-type, or unknown? Circle one below.
the Fermi level. n -type/ p -type/not enough information provide
(a) Sketch the charge density of each defect as the
Fermi level moves from Ev to Ec. Which defect

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 48 Electronic Devices and Circuits

Conduction (a) 0.0290 eV below the centre

band edge Ec
Donor level Ed (b) 0.0128 eV above the centre
(c) 0.0128 eV below the centre
(d) 0.0290 eV above the centre

intrinsic 14. Two initially identical samples A and B of pure

Fermi level Ei germanium are doped with donors to concentrations
of 1 × 1020 and 3 × 1020 respectively. If the hole
concentration in A is 9 × 10 12, then the hole
Acceptor level Ea Fermi level EF concentration in B at the same temperature will be
(a) 3 × 1012 m–3 (b) 7 × 1012 m–3
valence band edge Ev
(c) 11 × 1012 m–3 (d) 27 × 1012 m–3

(b) Based on the band diagram oppsite (Ei is in the Common Data for Q. 15 and 16
middle of the gap), would you expect that the
The electron concentration in silicon at T = 300 K is
conduction band density of states effective mass
is greater than, equal to, or smaller than the n0 = 5 × 104 cm–3
valence band effective mass? Circle one: 15. What will be the hole concentration (in cm–3) in
Greater than/equal/smaller than silicon?
(c) What, if any, of the following conditions by (a) 9 × 1015 (b) 3 × 109
themselves could lead to the above band (c) 4.5 × 10 15 (d) 3 × 105
diagram? Circle each correct answer.
(a) very high temperature 16. The material is
(b) very high acceptor doping (a) p-type (b) n-type
(c) very low acceptro doping (c) intrinsic (d) can’t be determined

11. What is the difference between density of states of Common Data for Q. 17 and 18
effective density of states, and why is the letter such Consider Ec – EF = 0.25 eV in gallium arsenide (GaAs)
a useful concept? at T = 400 K.

17. What will be the electron and hole concentrations

in the material at T = 400 K?
n0 (in cm–3) p0 (in cm–3)

1 Objective Practice Problems (a) 2.27 × 10 4

(b) 2.13 × 1015 cm–3

14
(c) 5.19 × 10 cm –3
2.12 × 1015
2.27 × 104
2.08 × 104
12. A piece of intrinsic silicon at room temperature is (d) 2.08 × 10 4 5.19 × 1014
kept at thermal equilibrium. The position of some
18. If the value of n0, obtained in above questions
random level Ex is to be fixed at 0.9 eV above the
remains constant then, what will be the hole
valence band edge. The doping concentration such
concentration at T = 300 K?
that the probability of capture of an energy state by
(a) 7 × 10–3 cm–3 (b) 9.67 × 10–3 cm–3
an electron at Ex is 50% is _______ × 1016 cm–3? –3 –3
(c) 96.7 × 10 cm (d) 2.08 × 104 cm–3
13. Given the effective masses of holes and electrons in
19. Assume that gallium arsenide has dopant
silicon respectively as
concentrations of N d = 1 × 10 13 cm –3 and
m*p 0.56 m0 , m*n 1.08m0 Na = 2.5 × 1013 cm–3 at T = 300 K. The material is
What will be the position of the intrinsic Fermi energy (a) p-type with p0 = 1.5 × 1013 cm–3, n0 = 0.215 cm–3
level with respect to the center of the bandgap for (b) p-type with p0 = 0.216 cm–3, n0 = 1.5 × 1013 cm–3
the semiconductor at T = 300 K? (c) n-type with p0 = 0.216 cm–3, n0 = 1.5 × 1013 cm–3
(d) n-type with p0 = 1.5 × 1013 cm–3, n0 = 0.215 cm–3

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 Energy band and Charge Carrier in Semiconductor 49
20. A particular semiconductor material is doped at Common Data for Q. 25 and 26
Nd = 2 × 1013 cm–3, Na = 0, and the intrinsic carrier
For a particular semiconductor, the effective mass of
concentration is ni = 2 × 1013 cm–3. The thermal
equilibrium majority and minority carrier electron is m*n = 1.4 m (where m is electron mass at
concentrations will be, respectively (Assume rest)
complete ionization) 25. What is the effective density of states in the
(a) p0 = 1.23 × 1013 cm–3, n0 = 0.216 cm–3 conduction band at T = 300° K.
(b) p0 = 0.216 cm–3, n0 = 3.24 × 1013 cm–3 (a) 4.15 × 1025 m–3 (b) 2.08 × 1025 m–3
(c) p0 = 1.23 × 1013 cm–3, n0 = 3.24 × 1013 cm–3 (c) 4.27 × 1026 m–3 (d) 4.15 × 1020 cm–3
(d) p0 = 3.24 × 1013 cm–3, n0 = 1.23 × 1013 cm–3
26. If Ec – EF = 0.25 eV at T = 300° K, then what is the
21. The doping concentrations in silicon semiconductor concentration of electrons in the semiconductor?
are N d = N a = 10 15 cm –3 . What will be the (a) 1.33 × 1021 m–3 (b) 2.67 × 1021 m–3
concentrations of n0 and p 0 in the material at 15
(c) 2.67 × 10 cm –3 (d) 2.67 × 1022 m–3
T = 300 K?
n0 (in cm–3) p0 (in cm–3) 27. The effective masses of electron and hole in
*
(a) 1015 1015 germanium are m*n = 0.55 m and mp = 0.37 m
10
(b) 2.25 × 10 cm –3 1015 (where m is the electron rest mass) what will be the
(c) 1.5 × 10 10 1.5 × 1010 position of the intrinsic Fermi energy level with
(d) 1015 2.25 × 1010 cm–3 respect to the centre of the bandgap for the
22. Consider germanium at T = 300 K with doping Germanium semiconductor at T = 300 K?
concentrations of Nd = 1014 cm–3 and Na = 0. What (a) 0.0154 eV above the centre
will be the position of Fermi energy level with respect (b) 0.0154 eV below the centre
to the intrinsic Fermi level for these doping (c) 0.0077 eV above the centre
concentrations? (d) 0.0077 eV above the centre
(a) 0.1855 eV below the intrinsic fermi level Common Data for Q. 28 and 29
(b) 0.0382 eV above the intrinsic Fermi level
(c) 0.0382 eV below the intrinsic Fermi level For a particular material, N c = 1.5 × 10 18 cm –3 ,
(d) 0.1855 eV above the intrinsic Fermi level Nv = 1.3 × 1019 cm–3 and bandgap EG = 1.43 eV at
T = 300° K.
23. If silicon is doped with phosphorus atoms at a
concentration of 1015 cm–3 then, what will be the 28. What is the position of the Fermi level with respect
position of the Fermi level with respect to the intrinsic to the top of the valence band Ev?
Fermi level in silicon at T = 300 K? (a) 0.028 eV above the valence band edge Ev
(a) 0.1855 eV below the intrinsic fermi level (b) 0.743 eV below the valence band edge Ev
(b) 0.2877 eV above the intrinsic Fermi level (c) 0.028 eV below the valence band edge Ev
(c) 0.2877 eV below the intrinsic Fermi level (d) 0.743 eV above the valence band edge Ev
(d) 0.1855 eV above the intrinsic Fermi level 29. What is the position of the Fermi level with respect
24. Gallium arsenide at T = 300 K contains accepter to the conduction band edge Ec?
impurity atoms at a density of 1015 cm–3. Additional (a) 0.687 eV above Ec
impurity atoms are to be added so that the Fermi (b) 0.687 eV below Ec
level is 0.45 eV below the intrinsic level. The (c) 0.743 eV below Ec
concentration and type of additional impurity atoms (d) 0.743 eV above Ec
will be respectively 30. Which of the following sketches best decribes the
(a) Na = 9.368 × 1014 cm–3, acceptor DN versum ND dependence of electrons in silicon at
(b) Na = 6.32 × 1013 cm–3, acceptor room temperature?
(c) Nd = 9.368 × 1014 cm–3, donor
(d) Nd = 6.32 × 1013 cm–3, donor

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 50 Electronic Devices and Circuits

DN of intrinsic silicon (Eg) = 1.1 eV.

33. What is the type of semiconductors if the probability

(a) of capture of an energy state by an electron at Ex is
50%.
(a) p-type, non degenerate
ND
(b) n-type, non degenerate
DN (c) p-type, degenerate
(d) n-type, degenerate

(b) 34. What is the doping concentration

(a) 1.725 × 1016 cm–3
(b) 1.725 × 1020 cm–3
ND (c) 2.879 × 1019 cm–3
(d) 2.879 × 1016 cm–3
DN
35. A silicon semiconductor has the dopant
concentrations Nd = 0, Na = 1014 cm–3. The thermal
(c) equilibrium electron concentration in the material
at T = 400 K will be _______ × 1010 cm–3
ND
Common Data for Q. 36 and 37

DN Silicon at T = 300 K is doped with acceptor atoms at a

concentration of Na = 7 × 1015 cm–3.
(d) 36. The difference between Fermi energy and valence
band energy, EF – Ev equals to _______ eV.
ND 37. The concentration of additional acceptor atoms that
must be added to move the Fermi level a distance
Common Data for Q. 31 and 32 kT closer to the valence-band edge will be _______
At room temperature (T = 300 K), the probability that × 1016 cm–3.
an energy state in the conduction band edge (Ec) of silicon 38. In an n-type silicon, the donor concentration is 1
is 10–4. atom per 2 × 108 silicon atoms. Assume that the
31. The type of semiconductor is effective mass of the electron equals the true mass
(a) n-type (b) p-type and the density of atoms in the silicon is 5 × 1022
(c) intrinsic (d) can’t be determine atoms/cm3. At what temperature (in °K) will the Fermi
level coincide with the edge of the conduction band?
32. Assume the effective density of states function
Nc,v = 2.86 × 1019 cm–3. What is the value of doping 39. For a non-degenerate semiconductor, the peak in
concentration? the electron distribution versus energy inside the
(a) ND – NA = 1.26 × 1010 cm–3 conduction band occurs at Ec + KT/2. What is the
(b) NA – ND = 1.26 × 1010 cm–3 ratio of the electron population in a non-degenerate
(c) ND – NA = 2.8 × 1015 cm–3 semiconductor at E = Ec + 5 KT to the electron
(d) NA – ND = 2.8 × 1015 cm–3 population at the peak energy?

Common Data for Q. 33 and 34

A piece of intrinsic silicon at room temperature is kept at

thermal equilibrium. The position of energy level, Ex is
set exactly 0.6 eV above the intrinsic level and band gap

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 Cha pter

Carrier Transport
Phenomena 2
2.1 Introduction
In the previous chapter, we considered the semiconductor in equilibrium and determined the holes and
electron concentration in valence and conduction band, respectively. Since the current will flow in semiconductor
due to there holes and electrons thus the knowledge of concentration of these carriers will help in understanding
electrical properties of the semiconductor. The process by which these charged particles move is called transport
phenomena. In this chapter we will study two basic transport mechanism in semicunductor crystal: drift - the
movement of charge particles due to elecric field, and diffusion - the flow of charge particles due to density
gradient. In this chapter we will assume that thermal equilibrium will be maintained even if holes and electrons
flow.

2.2 Carrier Drifting

When electric field is applied then holes and electrons will experience force and they will experience
net movement provided that there are available energy states in conduction band and valence band.
We have already seen that electric field will only force movement of carriers inside the band itself not
inter band. The electrons and holes both are charged particles and thus they experience force due to electric
field and net movement of charge due to electric field is called drift.

2.2.1 Drift Current Density

If we have positive volume charge density (number of charge particles per unit volume multiplied by
charge on each particle), moving with average drift velocity vd , the drift current density will be

Idrift 1 dQ
Jdrift
Cross section area Cross section area dt
Let the charges are moving in x direction thus
dx
Jdrift vd …(2.1)
dt
where is charge density
Suppose a semi-conductor has concentration of holes as p and let holes has drift velocity of vdp then
Jpdrf = epvdp amp/cm2 …(2.2)
e is charge on each hole.

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 52 Electronic Devices And Circuits

The equation of motion of a positively charge hole in the presence of an electric field is
F = mp*a = eE …(2.3)
where e is the magnitude of the electronic charge, a is the acceleration, E is the electric field, and mp*
is the effective mass of the hole. If the electric field is constant, then we expect the velocity to increase linearly
with time. However, charged particles in a semiconductor are involved in collisions with ionized impurity atoms
and with thermally vibrating lattice atoms. These collisions, or scattering events, alter the velocity characteristics
of the particle.
As the hole accelerates in a crystal due to the electric field, the velocity increases. When the charged
particle collides with an atom in the crystal, for example, the particle loses most, or all, of its energy. The
particle will again begin to accelerate and gain energy until it is again involved in a scattering process. This
continues over the over again. Throughout this process, the particle will gain an average drift velocity which, for
low electric fields, is directly proportional to the electric field. We may then write
v dp = pE …(2.4)
where p is the proportionality factor and is called the hole mobility. The mobility is an important parameter
of the semiconductor since it describes how well a particle will move due to an electric field. The unit of mobility
is usually expressed in terms of cm2/V-s.
By combining Eqs. (2.2) and (2.4), we may write the drift current density due to holes as
Jp\drf = (ep)vdp = e ppE …(2.5)
The drift current due to holes is in the same direction as the applied electric field.
Similarly if we assume that concentration of electron is n and charge on each electron is –q then
Jndrf = vdn = (–en)vdn …(2.6)
The average drift velocity of an electron is also proportional to electric field for small field but the
direction of motion of electron due to electric field will be apposite to the direction of electric field because
electron is negatively charged. Thus we can write
vdn = – nE …(2.7)
where n is the electron mobility and is a positive quantity. Equation (2.6) may now be written as
Jn\drf = (–en)(– nE) = e nnE …(2.8)
The conventional drift current due to electrons is also in the same direction as the applied electric field
even though the electron movement is in the opposite direction
Electron and hole mobilities are functions of temperature and doping concentrations, as we will see in
the next section.
Since both electrons and holes contribute to the drift current, the total drift current density is the sum
of the individual electron and hole drift current densities, so we may write
Jdrf = e( nn + pp)E …(2.9)

REMEMBER • The holes and elecctrons move in apposite direction but then both contribute current in same
direction. The current flow in direction of holes and apposite to direction of electrons

Example 2.1

To calculate the drift current density in a semiconductor for a given electric field.
Consider a gallium arsenide sample at T = 300 K with doping concentrations of N a = 0 and
N d = 10 16 cm –3 . Assume complete ionization and assume electron and hole mobilities given
in table 2.1. Calculate the drift current density if the applied electric field is E = 10 V/cm
Solution 2.1

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 Carrier Transport Phenomena 53

Since Nd > Na, the semiconductor is n type and the majority carrier electron concentration is given by

2
Nd Na Nd Na
n n12 1016 cm 3
2 2

The minority carrier hole concentration is

n12 (1.8 106 )2

p 3.24 10 4 cm 3
n 1016
For this extrinsic n-type semiconductor, the drift current density is
Jdrf = e( nn + np)E e nNdE
Then
Jdrf = (1.6 × 10–19)(8500)(1016)(10) = 136 A/cm2

Till now we have assumed that drift velocity of the charged particle is linearly related to electric field for
small electric fields. Now lets see what happen when electric field increases :

Fig 2.1 : drift velocity with respect to electric field

From the figure (2.1) we can see that for small electric field the drift velocity of particle increase
linearly with electric field. In this region the amount of energy provided by electric field go to the charge
particles, since velocity is low so collisions will be less and amount of energy dissipated in heat due to collision
will be less. But as the electric field is increased above 103 V/cm the velocity of particle increase and the
collision of moving particles with atoms also increase due to which the amount of energy dissipated in heat also
increase thus velocity increase slow down and v E. After = 104 V/cm the velocity become constant it means
now with increase in electric field all the extra amount of energy provided to system by electric field is lost in
heat due to excessive collision and velocity become constant. In other words if we use
vdrf = E
where is mobility of particle, from figure 2.2 we can get how changes with electric field
Thus we can see that for low electric field the mobility of charge particle is constant and another view
point to explain figure 2.1 and 2.2 is that electric field 103 V/cm the velocity of particles is high that lead to
increase in collision due to which mobility decreases, and above 104 V/cm the velocity of particle is even higher
that lead to large number of collisions due to which mobility further decreases.

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 54 Electronic Devices And Circuits

Fig 2.2 : mobility of particle with respect to electric field

Expression of drift velocity and mobility

If E is the electric field and m* is effective mass of the particle then

m*a = qE
qE
a
m*
If is the time difference between two collissions then
vdrf = a

qE
vdrf
m*
q
…(2.10)
m*

REMEMBER • From equation (2.10) it is clear that higher the effective mass of particle lower is the mobility.
• mobility of the particle tell us the ease with which it can drift

2.2.2 Mobility effects

There are two types of collision or scattering mechanisms that dominate in a semiconductor and affect
the carrier mobility: phonon or lattice scattering, and ionized impurity scattering.

Phonon Scattering
The atoms in a semiconductor crystal have a certain amount of thermal energy at temperatures above
absolute zero that causes the atoms to randomly vibrate about their lattice position within the crystal. The
lattice vibrations cause a disruption in the perfect periodic potential function. A perfect periodic potential in a
solid allows electrons to move unimpeded, or with no scattering, through the crystal. But the thermal vibrations
cause a disruption of the potential function, resulting in an interaction between the electrons or holes and the
vibrating lattice atoms. This lattice scattering is also referred to as phonon scattering.
Since lattice scattering is related to the thermal motion of atoms, the rate at which the scattering occun
is a function of temperature. If we denote as the mobility that would be observed if only lattice scattering existed,
then the scattering theory states that to first order
L T–3/2 …(2.11)
Mobility that is due to lattice scattering increases as the temperature decreases. Intuitively, we expect

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 Carrier Transport Phenomena 55

the lattice vibrations to decrease as the temperature decreases, which implies that the probability of a scattering
event also decreases, thus increasing mobility.

Impurity Scattering
The second interaction mechanism affecting carrier mobility is called ionized impurity scattering. We
have seen that impurity atoms are added to the semiconductor to control or alter its characteristics. These
impurities are ionized at room temperature so that a coulomb interaction exists between the electrons or holes
and the ionized impurities. This coulomb interaction produces scattering or collisions and also alters the velocity
characteristics of the charge carrier. If we denote I, as the mobility that would be observed if only ionized
impurity scattering existed, then to first order we have
I T 3/2 …(2.12)
If temperature increases, the random thermal velocity of a carrier increases, reducing the time the
carrier spends in the vicinity of the ionized impurity center. The less time spent in the vicinity of a coulomb
force, the smaller the scattering effect and the larger the expected value of 1. If the number of ionized impurity
centers increases, then the probability of a carrier encountering an ionized impurity center increases, implying
a smaller value of I.

Fig 2.3 : (a) Variation of mobility with temperature, showing both types of scattering
(b) Variation of mobility with doping concentration
In figure 2.3 (a) we can see that at lower temperature the impurity scattering is dominant thats why
mobility increase with temperative but for higher temperature phonon scattering is dominant and mobility
decrease with rise in temperature.
From figure 2.3 (b) we can see that mobility decrease with rise in doping concentration because of
crowding due to increase in impurity atoms which increase the collisions of moving charged particles.

REMEMBER Practically if we have an n type semiconductor with Nd = 1 × 10 cm will 16

16 –3 have higher
mobility of electron ( n) than compensated semiconductor with Nd = 2 × 10 –3 cm and
Na = 1 × 1016 cm–3
If L is the mean time between collisions due to lattice scattering, then dt/ L is the probability of a lattice
scattering event occurring in a differential time dt. Likewise, if 1 is the mean time between collisions due to
ionized impurity scattering, then dt/ 1 is the probability of an ionized impurity scattering event occurring in the
differential time dt. If these two scattering processes are independent, then the total probability of a scattering
event occurring in the differential time dt is the sum of the individual events, or
dt dt dt
…(2.13)
I L

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where is the mean time between any scattering event.

1 1 1
…(2.14)
I L

where I is the mobility due to the ionized impurity scattering process and L is the mobility due to the
lattice scattering process. The parameter is the net mobility. With two or more independent scattering
mechanisms, the inverse mobilities add, which means that the net mobility decreases.

REMEMBER If in a question 1, 2, 3, … are mobility of particle due to independent scattering mechanisms

then total mobility will be
1 1 1 1
1 2 3

2.2.3 Conductivity
Since
Jdrf = e( nn + pp)E = E …(2.15)
where s is conductivity of the semiconductor material.
The unit of s is ( – cm)–1. Thus
= e( n n + pp) …(2.16)
1 1
and resistivity …(2.17)
e( nn p p)

Consider a bar of semiconductor material as shown in figure 2.4

Fig 2.4 : Bar of semiconductor material as a resistor

Voltage applied to the bar is V, the electric field will be
V
E
L
J= E
I = EA
Here A is the cross sectional area of the semiconductor bar,

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 Carrier Transport Phenomena 57

V L L
=R …(2.18)
I A A
and = e( nn + pp) …(2.19)

REMEMBER • For intrinsic semiconductor

n = p = ni
= nie( n + p) and J = Jn + Jp

Jn > Jp that is drift current density due to electron will be greater than drift current density
due to holes because n > p

• For n type semiconductor

n >> p and n Nd
e Nd n and J = Jn
• For p type semiconductor
p >> n and p Na
q Naup and J Jp

The V - I characteristic of semiconductor bar shown in figure 2.4 will be as shown in figure 2.5. Here we
can see that the current increase linearly with voltage initially then the relation become less linear and after
some value of V the I become constant. This can simply be justified by the fact that velocity is initially linearly
related to E field and then for higher value of electronic field v E and then for further higher value of electric
field v become constant.

Fig 2.5 : V-I characteristics for identical physical structures

2.2.4 Effect of Temperature on conductivity

Case 1: For Intrinsic semiconductor

Here = e(ni n + ni p)
= eni( n + p)
for simplicity we assume n = p = then
= (2eni )
We konw that for low temperature T3/2 and for high temperature T–3/2 and number of carriers

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 58 Electronic Devices And Circuits

3 /2
Eg
ni CT exp
kT

Thus we can see that for low temperature (below 300 K, room temperature) both mobility and ni are
increasing so increase. But for high temperature (above 300 K, room temperature) mobility decrease with
3 3
factor of but ni rises with factor of and ni also rise because with rise in temperature Ego decrease and kT
2 2
Eg
increase so exp increase so for high temperature also increase
kT

Fig 2.6 : Conductivity, mobility and concentration verses temperature

Note: Thus in an intrinsic semiconductor conductivity always increase with temperature. Thus resistance of intrinsic
semiconductor bar will decrease with rise in temperature. Thus resistance of intrinsic semiconductor has negative
temperature coefficient.

Case 2: The Extrinsic semiconductor - p type or n type

If we take n type semiconductor, we know that carrier concentration in conduction band first increase
from T = 0 to 300 k and then remain constant for T = 300 k to 600 k and then again increase with temperature
because after 600 k the extrinsic semiconductor act as intrinsic semiconductor. Thus combining this with
mobility wrt temperature we can get conductivity

Fig 2.7 : Concentration of electron, mobility and conductivity versus temperature for silicus

Note: For extrinsic semiconductor increases with temperature for 0 k to 300 K, then decreases for 300 K to
600 K and then increase for T > 600 K

Case 3: The metals

In metals the concentration of carrier remain constant but with rise in temperature mobility reduces

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due to which reduces. Thus resistance of metal bar increases with temperature.

REMEMBER Resistance of
• Intrinsic semiconductor bar has negative temperature coefficient
• Metal bar has positive temperature coefficient
• extrinsic semiconductor bar has negative temperature coefficient for (T < 300 K and
T > 600 k) but positive temperature coefficient for 300 K < T < 600 K

2.2.5 Four point probe method to measure sheet resistivity

One of the basic properties of a semiconductor is its resistivity, which is determined by the availability of
free electrons or holes in a semiconductor. Resistance of a semiconductor bar is given by
Resistivity Length
R …(2.20)
Area of current flow
If we consider a very thin flim, then resistivity of that flim is given by sheet resistivity and this can be
expressed by
Resistivity
Sheet resistivity …(2.21)
Thickness
To determine sheet resistivity we can follow two processes.

1 Point Probe method

In the 2-point probe method, current and voltage are measured in the same wire. In this method the
measured voltage also includes voltage drop in wire due to RI loss.
For high resistivity this method can be used as contact resistance and spreading resistance are negligible
in this case, However for low resistivity measurement this method cannot be used.

Fig 2.8 : 2-point probe method

2 Four - Point Probe method

In the four-point probe method, current is sent in two probes and voltage is measured by the two other
probes. Current probes are connected in the outer section of voltage probe with proper spacing. In the 4-point
probe method, the voltmeter reading purely shows the voltage drop across the semiconductor as voltage drop
across voltmeter is negligible due to its very high resistance.
In an ideal case, sheet resistivity (Rs) is given by
V
Rs …(2.22)
ln 2 I
V
Rs 4.532
I

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But for practical case, sheet resistance is given by

V
Rs CF 4.532
I
where, CF is the correction factor.
If we know sheet resistivity, then multiplying it by thickness (t), we get resistivity ( ) of the semiconductor
material.
so; = Rs × t …(2.23)

Fig 2.9 : 4-point probe method

2.3 Carrier Diffusion

Diffusion take place when there is concentration gradient, the particles travel from high concentration
region to low concentration region.
We may consider a classic physics example in which a container, as shown in Fig. 2.10 is divided into
two parts by a membrane. The left side contains gas molecules at a particular temperature and the right side is
initially empty. The gas molecules are in continual random thermal motion so that, when the membrane is
broken, the gas molecules flow into the right side of the container. Diffusion is the process whereby particles
flow from a region of high concentration toward a region of low concentration. If the gas molecules were electrically
charged, the net flow of charge would result in a diffusion current.

Fig 2.10 : Container divided by a membrane with gas molecules on one side

2.3.1 Diffusion current density

Consider a case when concentration of electron inside semiconductor bar with respect to distance is as
shown in figure (2.11)
The electron will flow from high concentration to low concentration and flow of current in always apposite
to direction of electrons.
Thus
dn
Jndiff e
dx
dn
Jndiff eD n …(2.24)
dx

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Fig 2.11 : Non uniformly doped semiconductor

Where Dn is called the electron diffusion coefficient, has units of cm2/s, and is a positive quantity. If the
electron density gradient becomes negative, the electron diffusion current density will be in the negative x
direction.
Similarly if we have a p-type semiconductor with non uniform doping as shown in figure 2.12.

Fig 2.12 : Non uniformly doped semiconductor

We can see that holes will flow from high concentration to low concentration.
Thus
dp
Jpdiff e
dx
dp
Jpdiff eD p …(2.25)
dx

The parameter Dp is called the hole diffusion coefficient, has unit of cm2/s

Example 2.2

Assume that, in an n -type gallium arsenide semiconductor at T = 300K, the electron

concentration varies linearly from 1 × 10 18 to 7 × 10 17 cm –3 over a distance of 0.10 cm.
Calculate the diffusion current density if the electron diffusion coefficient is D n = 225 cm 2/s
Solution 2.2
The diffusion current density is giveny by
dn n
Jn/diff eDn eDn
dx x

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19 1 1019 7 1017
(1.6 10 )(225) 108 A/cm2
0.10

2.3.2 Total Current Density

We now have four possible independent current mechanisms in a semiconductor. These components
are electron drift and diffusion currents and hole drift and diffusion currents. The total current density is the
sum of these four components, or, for the one-dimensional case,
Total current density = Electron drift current + hole drift current + electron diffusion current + hole
diffusion current.
dn dp
J en n Ex ep p Ex eDn eDp …(2.26)
dx dx
This equation .may be generalized to three dimensions as

J en n E ep p E eDn n eDp p …(2.27)

The expression for the total current in a semiconductor contains four terms. Fortunately in most situations,
we will only need to consider one term at any one time at a particular point in a semiconductor.

Note: One very important point that should be kept in mind is that until and unless a battery is applied in the
current and current density in semiconductor bar will be zero. That is at equilibrium whether semiconductor is
uniformly doped or non uniformly doped the current will always be zero if no external supply is applied I = 0

2.4 Non Uniformly doped semiconductor material

In above note we read that no current will flow in non uniformly doped semiconductro at thermal
equilibrium. It is easy to understand that a uniformly doped semiconductor material will have zero current at
equilibrium as no electric field exist. But in non uniformly doped semiconductor material how the current in
zero that is why electron or hole are not moving even it concentration gradient exist.

REMEMBER If n-type semiconductor or p-type semiconductor are non uniformly doped and no external
battery is applied then no carriers will flow even if concentration gradient exist

Fig 2.13 : (a) Non uniformly doped semiconductor (b) doping profile
Explaination of how equilibrium is obtained here:-Initially the semiconductor is not at equilibrium or
equilibrium is not maintained thus electron start moving from high concentration region to low concentration
region, that in from C to D (fig 2.14). Since no battery is applied across the semiconductor so no electron enter

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from terminal A thus in region around C positive donor ions are left and as electrons moved to region close to D
then negative charge develope in region close to D. Due to this electric field generate from C to D. Since
electron want to flow from C to D due to concentration gradient but due to electric field exist from C to D which
appose movement of electron due to concentration gradient. Thus equilibrium is maintained due to this electric
field, and electrons do not move, and I = 0.

Fig 2.14 : (a) Non uniformly doped semiconductor not at equilibrium (b) at equilibrium

Note: In above case we can see that region C is at higher potential than region D

So no current flow at equilibrium. In semiconductor bar or in any semiconductor device at equilibrium

no current will flow and when no current flow then the fermi level (EF) will be a straight line with zero slope.

REMEMBER In semiconductor physics it is the convention that if no current flow or at equilibrium EF will be
a straight line with zero slope.

In above case since semiconductor in region around C is heavily doped so EF will be close to EC but
region around D is less doped so EF will be little for away from EC, and at equilibrium EF should be straight line.
Thus the energy band diagram will be as shown in figure (2.15)

Fig 2.15 : Energy band diagram for a semiconductor in thermal equilibrium with a
non uniform donor impurity concentration
Few very important conclusions from fig. (2.15):-
1. We know that induced electric field is in x direction and here EC, EV, EFi all rises in x direction.
Thus EC, EV, EFi rises in direction of electric field inside the semiconductor. Thus slope of EC, EV,
EFi tell us about existence of non zero electric field in semiconductor

REMEMBER Always remember that all the values in band diagram are in electron volts (ev) and to convert
the value into volt we have to divide by value e .If EF has non zero slope means I 0 and if EC,

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EV, EFi has non zero slope the E 0 in semiconductor

2. Electric field in semiconductor

1 dE Fi 1 dEV 1 dEC
Ex …(2.28)
e dx e dx e dx
3. The electric potential is related to electron potential energy by the charge (–e), so we can write
d 1 dE Fi
Ex
dx e dx
1
( EF EFi ) …(2.29)
q
Thus as we move in x, EF – EFi reduce so potential reduce

Example 2.3

Consider a n-type semiconductor with N d = 1 × 10 16 / cm -3 , NC = 1 × 10 22 / cm -3 , T = 300 K

connected as shown in figure. Plot the band diagram of the semiconductor bar

Solution 2.3
Obviously current will flow and thus semiconductor is not in equilibrium :
5
Ex 50V/cm
1mm

and current will flow in x direction. Thus EC, EV, EF and EFi will have non zero slope. Also the semiconductor
is uniformly doped thus EC – EF will be constant thus band diagram will be

Slope of EC, EV, EFi, EF will be

1 dEFi
E
q dx
dEFi
= 50 eV/cm = slope
dx

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 Carrier Transport Phenomena 65

One very important observation from above example is

Here figure (a) show uniformly doped semiconductor which is open circuited. It’s band diagram is shown
with solid lines in figure (c). Here potential difference between A and B is zero so EC, EV has zero slope.
Now 5V battery is applied thus point B remain at same potential as in previous case but potential of A point
has been increased by 5 V thus the new band diagram will be as shown in dotted lines. The starting point of
EC and EV fall by 5 eV. Thus another point we learn is that higher potential point will be below the lower
potential points.
One more learning from example 2.3 is that since electron flow in conduction band, here 5 V battery is
applied thus current will flow from A to B and electron will flow from B to A, the holes flowing in valence band
will flow from A to B.
In dotted band diagram of figure (c) of example 2.3 since electron flow from B to A so we can assume
electrons are small iron balls that are left at B will slide down to A, and holes as empty air bubbles which when
left at A will go to B as air bubbles in water try to rise up.

Example 2.4

Find the band diagram of non uniformly doped p -type semiconductor

Solution 2.4
Here the concentration of holes decrease with x, thus holes will try to move in x leaving behind negative
acceptor ions and will create positive charge in right side thus electric field will be produced in negative x
direction which stops flow of holes due to concentration gradient. Thus right part of semi conductor will
have higher potential.

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Since semiconductor is in equilibrium thus EF will have zero slope and EV will be close to EF at x = 0 and
as x increase the gap between EV and EF increase due to decrease in doping. The band diagram will be
V

The learning of band diagram is valid here also.

1 dEC 1 dE Fi 1 dEV
here also Electric Feild (E x )
e dx e dx e dx

Example 2.5

Find the potential difference between two points A and B in non uniformly doped
semiconductor

Assume it is silicon semiconductor with n i = 10 × 10 10 cm –3 .

Solution 2.5
We know that point lower in band diagram is at higher potential.
(a) Here it is an n-type semiconductor the band diagram will be (here semiconductor is at equilibrium)

Thus A is at higher potential than B

1 NC NC
thus VA – VB kT ln kT ln
e NB NA

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kT NA
ln
e NB

kT
VA – VB (ln(100), NA = 1 × 1017 cm–3, NB = 1 × 1015 cm–3
e
If T = 300 k
VA – VB = 0.119 V
(b) Here it is a p-type semiconductor the band diagram will be

Here B is lower than A so B is at higher potential.

Thus
kT NA kT NB
VB – VA ln ln
e ni e ni

kT NA
ln , NA = 2 × 1017 cm–3, NB = 1 × 1014 cm–3
e NB

VB – VA = 0.196 V

At equilibrium since current is equal to zero, taking non uniformly doped n-type semiconductor with doping
concentration n(x).
Jn = Current density due to drift + Current density due to diffusion
dn( x )
Jn 0 e n n( x )E x eDn
dx
Dn 1 dn( x )
Ex
n n( x ) dx

REMEMBER Einstein Relation

Dn kT Dp kT D D
and . Thus T and unit of is volts.
n e p e

Thus
kT 1 dn( x )
Ex …(2.31)
e n( x ) dx
Similarly in non uniformly doped p-type semi conductor with dopping concentration p(x) at equilibrium
Jp = Current density due to drift + Current density due to diffusion
Dpdp( x )
Jp 0 e p p( x )E x e
dx

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kT 1 dp(x )
Ex …(2.32)
e p(x ) dx

Example 2.6

Assume that the donor concentration in an n -type semiconductor at T = 300 K is given by

N d ( x )= 10 16 – 10 19 x (cm –3 )
where x is given in cm and ranges between 0 x 1 m
Solution 2.6
Taking the derivative of the donon concentration, we have
dNd ( x )
= –1019 (cm–4)
dx
The electric field is given by Eq. (2.31), so we have
(0.0259)( 1019 )
Ex
(106 1019 x )
At x = 0, for example, we find
Ex = 25.9 V/cm

Table 2.1 : Typical mobility and diffusion coefficient values at T = 300 K ( = cm2/V-s and D = cm2/s)

m Dn p Dp
Silicon 1350 35 480 12.4
Gallium arsenide 8500 220 400 10.4
Germanium 3900 101 1900 49.2

From above discussion we can see that

Dn Dp
T …(2.33)
n p

Since for temperature greater than 300 K, T–3/2, thus

D T–1/2 …(2.34)
In the previous chapter we have learned that mobility of carrier decreases at high doping because of
crowding and disturbance in lattice of semiconductor. Thus if we plot mobility of carrier versus carier concentration
will be

Fig 2.16 : Variation of mobility with doping concentration

Thus for small doping increase in concentration do not effect the mobility of carrier but for high doping
mobility start decreasing

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2.5 The Hall effect

The Hall effect is a consequence of the forces that are exerted on moving charges by electric and
magnetic fields. The Hall effect is used to distinguish whether a semiconductor is n type or p type and to
measure the majority carrier concentration and majority carrier mobility. The Hall effect device, as discussed in
this section, is used to experimentally measure semiconductor parameters. However, it is also used extensively
in engineering applications as a magnetic probe and in other circuit applications.
The force on a particle having a charge e and moving in a magnetic field is given by
F = ev × B …(2.35)
where the cross product is taken between velocity and magnetic field so that the force vector is
perpendicular to both the velocity and magnetic field.
Figure 2.17 show the arrangements made to analyze hall effect. The current is flowing in x direction,
magnetic field exist in z-direction.
The current will be produced by flow of electrons and holes, since electrons are negative charged particles
and if current is in x directions then electrons will flow in –x direction and holes will flow in x direction. The
force on electron and hole using equation (2.35) will be in –y direction.
In a p-type semiconductor (p0 > n0), there will be a buildup of positive charge on the y = 0 surface of
the semiconductor and, in an n-type semiconductor (n0 > p0), there will be a buildup of negative charge on the
y = 0 surface. This net charge induces an electric field in the y-direction as shown in the figure. In steady state,
the magnetic field force will be exactly balanced by the induced electric field force. This balance may be written as

Ix

Fig 2.17 : Geometry for measuring the Hall effect

F = e(E + v × B) = 0 …(2.36)
Thus we can see that force due to magnetic field in balanced by the force due to generated electric field.
Thus current flow in x directions is constant at equilibrium. The induced electric field is called Hall field. The
hall field produces a voltage across the semiconductor which is called hall voltage.
From equation (2.36), for n type semiconductor velocity of electron is in –x and magnetic field is in z.
Thus
e[E – (vx × Bz)] = 0
( E y = vx Bz) …(2.37)
So electric field will be induced in negative y direction.

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Thus y = 0 surface will be at lower potential than y = W surface

Thus electric field is in –y direction.

Note: We can see that the force on electron due to magnetic field is in –y direction and the induced electric field
in –y direction provide force on electron in y direction. Thus at equilibrium both balance each other.
From the figure (2.17) in case of n type semiconductor
VH = –EHW …(2.38)
In case of p type semiconductor VH will be positive and EH will be in y direction. The magnitude of VH
will be
VH = vx BzW
for p type semiconductor, if Jx is current density and p is hole concentration
Jx Ix
vx
ep (ep )Wd

I x Bz
VH …(2.39)
epd

I x Bz
and p …(2.40)
eVH d
Similarly for n type semiconductor
I x Bz
VH …(2.41)
end
I x Bz
and n …(2.42)
eVH d

REMEMBER • Hall effect can help us to determine type of extrinsic semiconductor, n type or p type. For
n type semiconductor VH is negative and for p type semiconductor it is positive.
• Obviously the polarity with VH is measure can change the result for example if in figure 2.17
we place vott meter in apposite manner then we would get apposite result. So if directly the
question is being asked the above statement (VH negative for n type and positive for p type
semiconductor) is correct else we have to check from all arrangement given in question.

The hall coefficient for p-type semiconductor is

1
RH …(2.43)
ep
and for n type semiconductor is
1
RH …(2.44)
en
Using hall effect arrangement we can find mobility of carriers also for p-type semiconductor
Jx = ep pEx
Ix Vx
ep p
Wd L

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IxL
p …(2.45)
epV xWd

for n type semiconductor also

I xL
n …(2.46)
enV xWd

Example 2.7

Consider the geometry shown in Figure 2.17. L et L = 10 –1 cm, W = 10 –2 cm, and d =

10 –3 cm. Also assume that I x = 1.0 mA, V x = 12.5 V, B z = 500 gauss = 5 × 10 –2 tesla, and
V H = –6.25 mV. Determine the majority carrier concentration and mobility.
Solution 2.7
A negative Hall voltage for this geometry implies that we have an n-type semiconductor using eq.(2.42), we
can calculate the electron concentration as

(10 3 )(5 10 2 )
n
(1.6 10 19 )( 6.25 10 3 )

= 5 × 1021 m–3 = 5 × 1015 cm–3

The electron mobility is then determined from Eq. (2.44) as

(10 3 )(10 3 )
n
0.10 m2 /V-s
(1.6 10 19 )(5 1021 )(12.5)(10 4 )(10 5 )

or n = 1000 cm2/V-s

Example 2.8

A small concentration of minority carrier is injected into a homogeneous semiconductor

crystal at one point and having electric field of 10 V/cm is applied a cross the crystal so that
minority carrier in that crystal will be moving at distance of 1 cm in 20 s. Calculate
mobility in cm 2 /V-sec
Solution 2.8
Here
E = 10 V/cm
and v = 1 cm/20 sec
v= E
v
2 103 cm2 /Vsec
E
Example 2.9

Calculate intrinsic conductivity and intrinsic resistivity of germanium at room temperature

assume n i = 2.5 × 10 13 /cm -3 , n = 3800 cm 2 /V-sec, p = 1800 cm 2 /V-sec
Solution 2.8
i = eni( n + p)
= 1.6 × 10–19 × 2.5 × 1013 (3800 + 1800)

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i= 0.0224/ cm

1
li 44.6 -cm
i

Example 2.10

Consider a semiconductor with electron and hole concentration n and p. Find the concentration
of n and p such that conductivity is minimum.
Solution 2.8
Here
= ne n + pe p

ni2
for minimum conductivity d 0 and p
dn n

d d n12
eq n e p 0
dn dn n

d e
1
n12e p
n
dn n2
for minimum we neet d 0
dn
p
n ni
n

n12 p
and p ni
n n
2
d
we can prove that will be negative thus will be minimum at these values of n and p
dn 2

Example 2.11

A semiconductor has following parameters

2
n = 7500 cm /V-sec
2
p = 300 cm /V-sec
n i = 3.6 × 10 12 /cm 2
find (a) min
(b) hole and electron concentration for min
Solution 2.11
We know that for smin

p n
n ni and p ni
n p

and = e(n n + p p)

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min
2eni p n

19
(a) Thus min 2 1.6 10 3.6 1012 7500 300
= 1.72 × 10–3 / cm

p 300
(b) n ni 3.6 1012
n 7500

= 7.2 × 1011 / cm3

7500
p ni n
3.6 1012
p 300

= 1.8 × 1013/cm3

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the following geometry: d = 10–3 cm, W = 10–2 cm,

and L = 10–1 cm. The following parameters are
measured: Ix = 0.75 mA, Vx = 15 V, VH = +5.8 mV,

1 Subjective Practice Problems

and Bz = 1000 gauss = 10–1 tesla. Determine (a) the
conductivity type, (b) the majority carrier
concentration, and (c) the majority carrier mobility.
1 . Consider a homogeneous gallium arsenide 6 . (a) Three volts is applied across a 1-cm-long
semiconductor at T = 300 K with Nd = 1016 cm–3 semiconductor bar. The average electron drift velocity
and Na = 0. is 104 cm/s. Find the electron mobility, (b) If the
(a) Calculate the thermal-equilibrium values of electron mobility in part (a) were 800 cm2/V-s, what
electron and hole concentrations. is the average electron drift velocity?
(b) For an applied E-field of 10 V/cm, calculate the
drift current density 7 . A perfectly compensated semiconductor is one in
(c) Repeat parts (a) and (b) if N d = 0 and which the donor and acceptor impurity
Na = 1016 cm–3. concentrations are exactly equal. Assuming complete
ionization, determine the conductivity of silicon at
2 . A silicon crystal having a cross-sectional area of T = 300 K in which the impurity concentrations are
0.001 cm2 and a length of 10–3 cm is connected at its (a) Na = Nd = 1014 cm–3, and
ends to a 10-V battery. At T = 300 K, we want a (b) Na = Nd = 1018 cm–3
current of 100 mA in the silicon. Calculate:
(a) the required resistance R, 8 . A semiconductor material has electron and hole
(b) the required conductivity, mobilities n and p , respectively. When the
(c) the density of donor atoms to be added to achieve conductivity is considered as a function of the hole
this conductivity, and concentration p0, (a) show that the minimum value
(d) the concentration of acceptor atoms to be added of conductivity, min, can be written as
to form a compensated p-type material with the 1/2
2 i( n p)
conductivity given from part (b) if the initial min
concentration of donor atoms is Nd = 1015 cm–3. ( n p)

3 . (a) A silicon semiconductor is in the shape of a where i is the intrinsic conductivity, and (b) show
rectangular bar with a cross-sectional area of that the corresponding hole concentration is
1/2
100 m2, a length of 0.1 cm, and is doped with n
p0 ni .
5 × 1016 cm–3 arsenic atoms. The temperature is
p
T = 300 K, Determine the current if 5 V is applied
across the length, (b) Repeat part (a) if the length is 9 . Three scattering mechanisms are present in a
reduced to 0.01 cm. (c) Calculate the average drift particular semiconductor material. If only the first
velocity of electrons in parts (a) and (b). scattering mechanism were present, the mobility
would be 1 = 2000 cm2/V-s, if only the second
4 . (a) A GaAs semiconductor resistor is doped with
mechanism were present, the mobility would be
acceptor impurities at a concentration of Na = 1017 2
2 = 1500 cm /V-s, and if only the third mechanism
cm–3. The cross-sectional area is 85 m2. The current
were present, the mobility would be 3 = 500 cm2/V-s.
in the resistor is to be I = 20 mA with 10 V applied.
What is the net mobility?
Determine the required length of the device, (b)
Repeat part (a) for silicon. 10. Assume that the mobility of electrons in sillicon at
T = 300 K is n = 1300 cm2/V-s. Also assume that
5 . A silicon Hall device in fig. 2.17 at T = 300 K has
the mobility is limited by lattice scattering and varies
as T3/2. Determine the electron mobility at (a)
T = 200 K and (b) T = 400 K.

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 Carrier Transport Phenomena 75

11. Consider a sample of silicon at T = 300 K. Assume 0 x 25 m. The electron diffusion coefficient is
that the electron concentration varies linearly with D n = 25 cm 2 /s and the electron mobility is
distance, as shown in Fig. The diffusion current 2/V-s. The total electron current density
n = 960 cm
density is found to be Jn = 0.19 A/cm2. If the electron through the semicondyctor is constant and equal to
diffusion coefficient is Dn = 25 cm2/s, determine the Jn = –40 A/cm2. The electron current has both
electron concentration at x = 0. diffusion and drift current components. Determine
the electric field as a function of x which must exist
in the semiconductor.

16. In n-type silicon, the Fermi energy level varies

linearly with distance over a short range. At x = 0,
E F – E Fi = 0.4 eV and, at x = 10 –3 cm,
EF – EFi = 0.15 eV. (a) Write the expression for the
electron concentration over the distance. (b) If the
electron diffusion coefficient is Dn = 25 cm2/s,
calculate the electron diffusion current density at
(i) x = 0, and (ii) x = 5 × 10–4 cm.
12. The electron concentration in silicon decreases 17. (a) Assume that the mobility of a carrier at T = 300 K
linearly from 1016 cm–3 to 1015 cm–3 over a distance is = 925 cm2/V-s. Calculate the carrier diffusion
of 0.10 cm. The cross-sectional area of the sample is coefficient. (b) Assume that the diffusion coefficient
0.05 cm2. The electron diffusion coefficient is 25 of a carrier at T = 300 K is D = 28.3 cm2/s. Calculate
cm2/s. Calculate the electron diffusion current. the carrier mobility.
13. The hole concentration is given by 18. Consider fig. 2.17 a gallium arsenide sample at
p= 1015 exp (–x/Lp) cm–3 T = 300 K. A Hall effect device has been fabricated
with the following geometry: d = 0.01 cm,
for x 0 and the electron concentration is given W = 0.05 cm, and L = 0.5 cm. The electrical
by 5 × 1014 exp (+x/Ln) cm–3 for x 0. The values parameters are: Ix = 2.5 mA, Vx = 2.2 V, and
of Lp and Ln are 5 × 10–4 cm and 10–3 cm, respectively. B z = 2.5 × 10 –2 tesla. The Hall voltage is
The hole and electron diffusion coefficients are VH = –4.5 mV. Find: (a) the conductivity type, (b)
10 cm2/s and 25 cm2/s, respectively. The total current the majority carrier concentration, (c) the mobility,
density is defined as the sum of the hole diffusion and (d) the resistivity.
current density at x = 0 and the electron diffusion
current density at x = 0. Calculate the total current 19. Consider fig. 2.17 silicon at T = 300 K. A Hall effect
density. device is fabricated with the following geometry:
d = 5 × 10 –3 cm, W = 5 × 10 –2 cm, and
14. The hole concentration in p type GaAs is given by L = 0.50 cm. The electrical parameters measured
p = 10 16 (1 – x / L ) cm –3 for 0 x L where are: Ix = 0.50 mA, Vx = 1.25 V, and Bz = 650 gauss
L = 10 m. The hole diffusion coefficient is = 6.5 × 10 –2 tesla. The Hall field is
10 cm2/s. Calculate the hole diffusion current density EH = –16.5 mV/cm. Determin (a) the Hall voltage,
at (a) x = 0, (b) x = 5 m, and (c) x = 10 m. (b) the conductivity type, (c) the majority carrier
16. The electron concentration in silicon at T = 300 K concentration, and (d) the majority carrier mobility.
is given by
x
n( x ) 1016 exp
18
where x is measured in m and is limited to

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 76 Electronic Devices And Circuits

Common Data for Q.4 and 5

Consider the following energy band diagram. Take the
semiconductor represented to be Si maintained at

1 Objective Practice Problems T = 300°K with E i – E F = E G/4 at x = L and

EF – Ei = EG/4 at x = 0. Note the choice of EF as the
energy reference level. Given that band gap of Si is
Common Data for Q.1 and 2 1.12 eV, hole mobility p = 459 cm2/V-sec, and intrinsic
Consider a homogeneous gallium arsenide semiconductor concentration ni = 1010 cm–3
at T = 300 K with the following parameters:
Donor concentration : Np = 1016 cm–3,
Electron mobility: ( n) = 7500 cm2/V-s
Intrinsic concentration : ni = 1.8 × 106 cm–3

1 . The thermal equilibrium value of hole concentration

in the material will be
(a) 1016 cm–3 (b) 3.24 × 10–4 cm–3
4
(c) 3.24 × 10 cm –4 (d) 1.8 × 10–10 cm–3
4 . The semiconductor is in
2 . If an electric field of 10 V/cm is applied to the material (a) equilibrium
then, the drift current density will be (b) non-equilibrium
(a) 75 A/cm2 (b) 120 A/m2 (c) equilibrium and non-equilibrium depends on the
(c) 75 A/m2 (d) 120 A/cm2 distance x
(d) Cann’t say
3 . A silicon semiconductor is in the shape of a
rectangular bar with a cross-sectional area of 5 . The electrostatic potential ( V ) inside the
100 m2, a length of 0.1 cm and is doped with semiconductor as a function of x is
5 × 1016 cm–3 arsenic atoms. The temperature
T = 300 K and mobility of electron is arsenic atoms.
The temperature T = 300 K and mobility of electron
is 1100 cm2/V-s. If 5 V is applied across the length of
(a)
the semiconductor then,
At T = 300 K, for silicon
intrinsic concentration : ni = 1.5 × 1010 cm–3
hole mobility : 2
p = 480 cm /V-sec
electron mobility: 2
n = 1350 cm /V-sec
and for germanium,
intrinsic concentration : ni = 2.4 × 1013 cm–3 (b)
hole mobility : 2
p = 1900 cm /V-sec
electron mobility: 2
n = 3900 cm /V-sec
At T = 300 K the conductivity (in ( – cm)–1) of
intrinsic silicon germanium are respectively.
(a) 4.39 × 10–6, 2.23 × 10–2 (c)
(b) 2.23 × 10–2, 4.39 × 10–6
(c) 3.24 × 10–3, 1.49 × 10–7
(d) 1.49 × 10–7, 3.24 × 10–3

(d)

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 Carrier Transport Phenomena 77

6 . Two GaAs wafers, one n-type and one p-type, are

uniformly doped such that Np(wafer 1) = NA(wafer
2) ni. Which wafer will exhibit the larger resistivity?
(a) Resistivity of wafer 2 is greater than resistivity of (c)
wafer 1
(b) Resistivity of wafer 1 is greater than resistivity of
wafer 2
(c) Resistivity of wafer 1 is greater than resistivity of
wafer 1
(d) None of the above
(d)
Common Data for Q.7 and 8
Consider the following energy band diagram of silicon
sample maintained at 300 K.
Common Data for Q.9 to 11
A silicon device maintained at 300 K is characterized by
the following energy band diagram.

7 . The semiconductor is in
(a) equilibrium
(b) non-equilibrium
(c) equilibrium and non-equilibrium depends on the
distance ‘x’
(d) equilibrium at x = L/2, and non-equilibrium at
x = 0, L 9 . The semiconductor is degenerate
8 . The electrostatic potential (V) inside the L 2L
(a) Near x 0 (b) For x
semiconductor as a function of x is 3 3
(c) Near x = L (d) At x = x1

10. Assume that the intrinsic concentration of silicon is

1010 cm–3. At x = x2, what is the value of hole
concentration p?
(a) (a) 7.63 × 106 /cm3 (b) 1.35 × 1013/cm3
10
(c) 10 /cm 3 (d) 1.72 × 1016/cm3

11. The kinetic energy of the hole shown on the diagram

is
EG
(a) EV (b)
3
(b) EG
(c) (d) zero
3

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 78 Electronic Devices And Circuits

Common Data for Q.12 and 13 Common Data for Q.16 and 17
A sample of GaAs is subjected to an electric field of Consider the equilibrium energy band diagram shown
100 V/cm. Given that effective mass of electron is below.
0.067 × 9.1 × 10–31 kg and effective mass of hole is
0.34 × 9.1 × 10–31 kg

12. What is the velocity (m/s) of an electron in the

conduction band if it is initially at rest and is
accelerated by this field for a period of 0.1 psec?

13. What is the velocty of hole (in m/s) in the valence

band if it is initially at rest and is accelerated by this
field for a period of 0.1 psec?

14. A voltage of 2.5 V is applied to a sample of silicon 16. What is the value of the effective electric field for
whose cross-sectional area is 0.1 m × 1 m. The electrons (in kV/cm)?
length of the path is 0.1 m. If the material is doped
n-type with ND = 1018 cm–3, what is the current in 17. What is the effective electric field for holes
the sample (in mA)? (Given that n = 230 cm2/sec) (in kV/cm)?

15. Consider a p-type Si sample of NA = 1018 cm–3 and

N D = 0. Over a length of 1 mm, the elctron
concentration drops linearly from 1016 cm–3 to
1013 cm–3. What is value of the electron diffusion
current density (in nA/cm2)? (Given that electron
diffusion constant Dn = 9 cm2/sec)

GATE MASTERS PUBLICATION

 Cha pter

Non Equilibrium
Excess Carriers in
Semiconductor 3
3.1 Introduction
In previous chapter we assumed that even if voltage is applied across semicondutor then also equilibrium
will be maintained in the semicondutor and the concentration of electron and holes concentration will not
change due to this. In this chapter we will study the behavior (how these excess carriers are generated and their
time and space variations) of excess holes and electrons in valence and conduction band respectively .
Excess electrons and excess holes do not move independently of each other. They diffuse, drift, and
recombine with the same effective diffusion coefficient, drift mobility, and lifetime. This phenomenon is called
ambipolar transport. We will develop the ambipolar transport equation which describes the behavior of the
excess electrons and holes. The behavior of excess carriers is fundamental to the operation of semiconductor
devices. Several examples of the generation of excess carriers will be explored to illustrate the characteristics
of the ambipolar transport phenomenon.
The Fermi energy was previously defined for a semiconductor in thermal equilibrium. The creation of
excess electrons and holes means that the semiconductor is no longer in thermal equilibrium. We can define
two new parameters that apply to the nonequilibrium semiconductor: the quasi-Fermi energy for electrons and
the quasi-Fermi energy for holes.
There are many ways by which excess carrier are generated but in this chapter we will investigate
creation of excss carriers by absorption of photons.

3.2 Carrier Generation and Recombination

We know that in a semiconductor there are two random process going simultaneously that is generation
and recombination. Generation is the process by which new electron hole pair are created and recombination is
process by which electron and holes get finished. At a fixed temperature, or at thermal equilibrium the
concentration of electrons and holes is a constant thus recombination completely balance generation. Now if
temperature is increased the generation rate will increase as more and more bonds will break and concentration
of electron and hole in condution and valence band will increase and due to this the recombination rate also
increase. Thus again at constant higher temperature the concentration of electron and hole become constant
and generation rate is balanced by recombination rate.

3.2.1 Semiconductor in Equilibreium

We have determined the thermal-equilibrium concentration of electrons and holes in the conduction

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 80 Electronic Devices And Circuits

and valence bands, respectively. In thermal equilibrium, these concentrations are independent of time. However,
electrons are continually being thermally excited from the valence band into the conduction band by the random
nature of the thermal process. At the same time, electrons moving randomly through the crystal in the conduction
band may come in close proximity to holes and "fall' into the empty states in the valence band. This recombination
process annihilates both the electron and hole. Since the net carrier concentrations are independent of time in
thermal equilibrium, the rate at which electrons and holes are generated and the rate at which they recombine
must be equal. The generation and recombination processes arc schematically shown in Fig. 3.1
– –
Ec

Electron-hole Electron-hole
generation recombination

Ev
+ x +

Fig 3.1 : Electron-hole generation and recombination

Let Gn0 and Gp0 be the thermal-generation rates of electrons and holes, respectively, given in units of
cm–3 s–1. For the direct band-to-band generation, the electrons and holes are created in pairs, so we must have
that
Gn0 = Gp0 …(3.1)
Let Rn0 amd Rp0 be the recombination rates of electrons and holes, respectively, for a semiconductor in
thermal equilibrium, again, given in units of cm–3 s–1. In direct band-to-band recombination, electrons and
holes recombine in pairs, so that
R n 0 = Rp0 …(3.2)
In thermal equilibrium, the concentrations of electrons and holes ate independent of time; therefore,
the generation and recombination rates are equal, so we have
Gn0 = Gp0 = Rn0 = Rp0 …(3.3)

3.2.2 Excess Carrier in Semiconductor

We understood that in band to band generation and recombitnation electron and hole both are generated
together and destroyed together. This generation rate of electron will always be same as that of generation rate
of holes, similarly recombination rate of electron will always be same as that of recombination rate of hole. Few
symbols that we will use in the chapter are
Table 3.1 Relevent notation used in this chapter
Symbol Definition
n0, p0 Thermal equilibrium electron and hole concentrations
(independent of time and also usually position).
n, p Total electron and hole concentrations (may be functions of time and/or position).
n = n – n0 Excess electron and hole concentrations (may
p = p – p0 be functions of time and/or position).
g ' n , g 'p Excess electron and hole generation rates.
R ' n , R 'p Excess electron and hole recombination rates.

n0, p0 Excess minority carrier electron and hole lifetimes.

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 Non Equilibrium Excess Carriers In Semiconductors 81

There are three type of generation

1. Photo generation
When light of wave length fall on the semiconductor and each photon has energy h greater than band
gap of the semiconductor material then electrons in valence band will get energy from photons and will jump
from valence band to conduction band and generate an electron hole pair. These new carriers are called excess
carriers.
If h < Eg then all energy transfered from photons to electron will produce only vibrations in electron of
valence band and no new carriers will be generated.
If h = Eg then elecctrons will transit from valence band to conduction band that is potential energy of
electron will change,
If h > Eg then also electron will transit from valence band to conduction band that is potential energy
of electron will also change by Eg and (h – Eg) will become the kinetic energy of the electron as shown in
Fig 3.2
Thus to generate excess carrier

electron

h > Eg
1 2 3 Eg

3 > 2 > 1 hole

Fig 3.2 : Photogeneration

h >Eg …(3.4)

Eg
and c , the critical frequency..
h
We assume a thin semiconductor (low doping) plate is connected with a voltage source and light falls on
the plate. The experiment is performed where light of different frequencies fall on the semiconductor bar and
we draw plot of I vs. as shown in Fig.3.3 (b).

h I1
I2 I1 > I2 > I3
I3
mA I

V c

(a) (b)

Fig 3.3 (a) Experimental set-up for determining current vs frequency plot (b) current vs frequency plot
We can see that when frequency is below the critical frequency then there are no excess carrier and the
current will be very small because number of carrier are less and very small amount of current flow. This is

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 82 Electronic Devices And Circuits

called dark current. When frequency of photons is greater than c then new electron - hole pairs are generated
which increase conductivity of the semiconduction bar. These new excess carrier start conducting due to applied
field .
So current increases rapidly. For higher frequencies, the current will remain constant as generation
rate (which depends on the number of photons per second in light, intensity of light) will be constant. If we
increase the intensity of light (number of photon per second increases) then generation rate will increase. As a
result, current increases. In Fig. 3.3(b), it has been shown that current increases with increasing intensity of
light (I1 > I2 > I3).

Note: • In Fig 3.2 we can see that few electron which are excited to conduction have higher energy than the
energy that is common for conduction band electron (all most all have energy equal to Ec). Thus these
excited electron loose energy to the lattice in scattering events until its energy reaches to Ec these excess
carrier are free to contribute to conductivity of material.
• generally if h <Eg then photons are not absorbed by material. This property is used to find Eg (band
gap) of material.
• An important technique for measuring the band gap energy of a semiconductor is the absorption of
incident photons by the material. In this experiment photons of selected wavelengths are directed at the
sample, and relative transmission of the various photons is observed. Since photons with energies greater
than the band gap energy are absorbed while photons with energies less than the band gap are transmitted,
this experiment gives an accurate measure of the band gap energy.
If a beam of photons with h > Eg falls on a semiconductor, there will be some predictable amount of
absorption, determined by the properties of the material. We would expect the ratio of transmitted to incident
light intensity to depend on the photon wavelength and the thickness of the sample. To calculate this dependence,
let us assume that a photon beam of intensity I0, (photons/cm2-s) is directed at a sample of thickness l. The
beam contains only photons of wavelength , selected by a monochromator. As the beam passes through the
sample, its intensity at a distance x from the surface can be calculated by considering the probability of absorption
within any increment dx. Since a photon which has survived to x without absorption has no memory of how far
it has traveled, its probability of absorption in any dx is constant. Thus the degradation of the intensity -dI(x)/dx
is proportional to the intensity remaining at x:
dI( x )
= I(x) …(3.5)
dx
The solution to this equation is
I( x ) = I0e– x …(3.6)
and the intensity of light transmitted through the sample thickness / is
I t = I0e– l …(3.7)
The coefficient is called the absorption coefficient and has units of cm–1.
This coefficient will of course
vary with the photon wavelength and with the material. In a typical plot of vs. wavelength there is negligible
absorption at long wavelengths (h small) and considerable absorption of photons with energies larger than Eg.
The relation between photon energy and wavelength is E = hc/ . If E is given in electron volts and in
micrometers, this becomes E = 1.24/ .

2. Phonon Generaration
Phonon generation occurs when a semiconductor is under thermal excitation. With increase of
temperature of the semiconductor, lattice vibrations increase which give rise to more phonons. Due to more
lattice vibrations, covalent bonds in the semiconductor break down and electron-hole pairs are generated.

3. Impact Ionization

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 Non Equilibrium Excess Carriers In Semiconductors 83

In this process, one energetic charge carrier will create another charge carrier. When a semiconductor
is under an electric field, then between two successive collisions, electrons gain energy from the applied electric
field and hit other Si-atoms. In this process, a bond breaks out generating more carriers. For a very high electric
field, it results in avalanche breakdown.

Si Si
e
e h
e e

e e

Si Si

Fig 3.4 : Impact ionization

In recombination, a pair of electron and hole gets annihiliated. It does not mean that they are destroyed,
but when a free electron in the conduction band falls to the valence band and recombines with a hole, it becomes
a bound electron in the valence band.

Note: Thus if we assume that impact lonization exist then the V-I charactrestic of semiconductor box studied in
prerous chapter will be

Semiconductor bar Impact

Ionisation

Velocity
saturate
I V

The figure show I- V chracteristic, initially the current increase linearly with V but then at high electric field the
velocity of carrier saturate and current become constant. For even higher Electric field current suddenly increase
due to impact ionisation.

There are three type of recombination

Recombination is the process by which electron and hole come together and form a covalent bond or
electron jump from conduction bond to valence bond.
e
1. Radiative Recombination:
Heat
It occurs for direct semiconductors (like GaAs). In this process
e
electrons from the conduction band minimum falls to the valence band Ec
maximum without changing the momentum, and one photon of energy
h (Eg = h ) is emitted. Electrons which are excited to higher energy
states in the conduction band will come to the conduction band minimum h = Eg Recombination
by releasing energy as heat. Then from conduction band minimum it h = Eg
falls to valence band maximum radiating wave of energy hv = Eg .
Sometimes it is called direct recombination.
Ev
2. Schockley - read - hall Recombination Fig 3.5 Radiative Recombination
In this recombination process electrons from the conduction band

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 84 Electronic Devices And Circuits

minimum come to a defect level intermediate between Ec and Ev by radiating energy as photons or phonons and
then jump from that intermediate level to the valence band. This type of recombination is basically seen in
impure semiconductors as semiconductors with defect levels. Generally, the defect level lies in the middle of the
forbidden gap.

e
Ec Ec
Photon or
phonon
e
Photon or
phonon

Ev Ev
h

Fig 3.6 : S-R-H recombination process

3. Non Radiative Recombination

Here the transition of electron from conduction band to valence band do not produce photon rather the
energy is simply released in the form of heat. Such recombination take place in indirect band gap materials
where transition of electron from conduction band to valence band need change of momentum.
To maintain conservation of momentum the phonon is generated (phonon is simply lattice vibration)
and energy is conserved by releasing energy as heat. This will be discussed later.

Conduction Conduction
band band

Heat
Eg
Phonon

Valence
band
Valence band
k k

Fig 3.7 : (a) Direct recombination (b) Indirect recombination

3.2.3 Direct Recombination of electrons and holes

The excess electron and holes are generated by an external force at a particular rate. Let g'n be the
generation rate of excess electrons and g'p be the excess hole. These generation rates have unit of cm–3 s–1. For
direct band to band generation the concentration of excess carriers (holes and electrons) will be same and the
generation rate of electrons and holes will also be same.
Thus g'n = g'p …(3.8)
Let n0 and p0 are the thermal equilibrium concentration of electrons and hole, and n and p are excess
electron and hole concentration. The total concentration of electron and hole will be
n = n0 + n …(3.9)

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 Non Equilibrium Excess Carriers In Semiconductors 85

p = p0 + p …(3.10)
At equilibrium n0p0 = n2
i but when excess carrier are generated then np n 2.
i

Note: Thus at non equilibrain mass action law is not valid.

At equilibrium the concentration of electrons and holes are fix thus generation rate will be same as that
of the recombination rate. The generation rate of electron and hole are same, also recombination rate of electrons
and hole are same because we consider band to band generation and recombination thus at equilibruin
Gn0 = Gp0 = Rn0 = Rp0
Also recombination rate is proportional to concentration of electron and hole.
rate of recombination concentration of electron × concentration of holes
R n 0 = Rp0 = r n0p0 = r ni2
at equilibrium Gn0 = Gp0 = Rn0 = Rp0 = r ni2
The general formulae that relate generation rate, recombination rate and change in concentration of
carrier If n(t) is electron concentration wrt t then

dn(t )
= generation rate – recombination rate
dt
Similaly if p(t) is hole concentration wrt t then

dp(t )
= generation rate – recombination rate
dt
Now consider a case when external for generate excess carrier and at t = o the external
so are is turned off
Suppose the external force generate excess carrier, if force is constant then generation rate of carrier
will be constant and this generation rate will not continuously build up carrier because as the carrier concentration
increase the recombination rate increase and will balance the generation rate.
A steady-state generation of excess electrons and holes will not cause a continual buildup of the carrier
concentrations. As in the case of thermal equilibrium, an electron in the conduction band may “fall down” into
the valence band, leading to the process of excess electron-hole recombination. The recombination rate for
excess electrons is denoted by R'n and for excess holes by R'p. Both parameters have units of cm–3 s–1. The excess
electrons and holes recombine in pairs, so the recombination rates must be equal. We can then write
R'n = R'p …(3.11)
In the direct band-to-band recombination that we are considering, the recombination occurs
spontaneously! thus, the probability of an electron and hole recombining is constant with time. The rate at
which electrons recombine must be proportional to the electron concentration and must also be proportional to
the hole concentration. If there are no electrons or holes, there can be no recombination.
When at t = 0 the external force is turned off the generation rate due to external force become zero. The
generation rate will now be equal to thermal generation rate that is equal to gn0 = gp0. If n(t) and p(t) are
concentration of electron and holes then recombination rate will be
R= r n(t) p(t)
Thus
The net rate of change in the electron concentration can be written as

dn(t )
= generation rate recombination rate
dt

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 86 Electronic Devices And Circuits

dn(t ) 2
r [ ni n(t )p(t )] …(3.12)
dt
where
n(t) = n0 + n(t) …(3.13)
and
p (t ) = p0 + p(t)
We can see that when at t = 0 source of external force is turned off then recombination will be more and
generation is less thus concentration of electrons and holes will reduce

Note: That t = 0, n(0) = no + n(0) and p(0) = p0 + p(0) and with time the concentration of electron and hole
will decrease and at t = the thermal equilibrium will be achieved and at t = , n = n0 and p = p0. That is all
excess carrier will be recombined.
Since excess electrons and holes are always generated in pairs and recombine in pairs, thus we have
n(t) = p(t). (Excess electron and hole concentrations are equal so we can simply use the phrase excess
carriers to mean either). The thermal-equilibrium parameters, n0 and p0, being independent of time, Eq.
(3.12) becomes

d( n(t )) 2
r [ ni ( n0 n(t ))( p0 p(t ))] …(3.15)
dt

r n(t )[( n0 p0 ) n(t )]

Equation (3.15) can easily be solved if we impose the condition of low-level injection. Low-level injection
puts limits on the magnitude of the excess carrier concentration compared with the thermal equilibrium carrier
concentrations. In an extrinsic n-type material, we generally have n0 >> p0 and, in an extrinsic p-type material,
we generally have p0 >> n0. Low-level injection means that the excess carrier concentration is much less than
the thermal equilibrium majority carrier concentration. Conversely, high-level injection occurs when the excess
carrier concentration becomes comparable to or greater than the thermal equilibrium majority carrier
concentrations.
If we consider p-type material (p0 >> n0) under low-level injection ( n(t) << p0), then Eq, (3.15)
becomes

d( n(t ))
= – rp0 n(t) …(3.16)
dt
The solution to the equation is an exponential decay from the initial excess concentration, or

n (t ) n(0)e r p0t n(0)e t / n0

…(3.17)
where n0 = ( rp0)–1 and is a constant for the low-level injection. Equation (3.17) describes the decay
of excess minority carrier electrons so that n0 is often referred to as the excess minority carrier lifetime.

Note: • From equation (3.17) we can see that excess carrier concentration will decay exponentialy with time
• The time n0 is called the life time of the excess minority carrier it is the time at which the concentration
decay to 1/e times the concentration at t = 0
If we talk about excess carrier concentration then

d n(t )
= generation rate of excess carrier – Recombination rate of excess carrier
dt

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 Non Equilibrium Excess Carriers In Semiconductors 87

The Recombination rate of excess carrier will be

d( n(t )) n(t )
R'n r p0 n(t ) …(3.18)
dt n0

For the direct band-to-band recombination, the excess majority carrier holes recombine at the same
rate, so that for the p-type material

n(t )
R'n Rp …(3.19)
n0

In the case of an n-type material (n0 >> p0) under low-level injection ( n(t) << n0), the decay of
minority carrier holes occurs with a time constant p0 = (arn0)–1, where p0 is also referred to as the excess
minority carrier lifetime. The recombination rate of the majority carrier electrons will be the same as that of the
minority carrier holes, so we have

n(t )
R'n Rp …(3.20)
p0

The generation rates of excess carriers are not functions of electron or hole concentrations. In general,
the generation and recombination rates may be functions of the space coordinates and time.

REMEMBER • In ptype semiconductor excess electrons are important and in ntype semiconductor excess
holes are important
• From equation (3.19) and (3.20) we can see that in case of direct band to band recombination
the excess majority carrier decay at exactly the same rate as the minority carrier

Example 3.1

Consider an n type semiconductor with n i = 1 × 10 10 cm –3 , N d = 1 × 10 16 cm –3 . The light

source is throwing light on the semiconductor due to which excess carrier are generated
12 cm –3 and 12 cm –3 . If life time of hole is 1ns and light source is
n = 1 × 10 p = 1 × 10
turned off at t = 0 then find recombination rate excess holes and electrons for t = 0 also
plot n ( t ) and p ( t ) for t > 0.
Solution 3.1
Here equilrium concentration is
n0 = 1 × 1016 cm–3
ni2 (1 1010 )2
and p0 1 104 cm 3
n0 1 1016
Just before t = 0
n = n0 + = 1 × 1016 + 1 × 1012 1 × 1016 cm–3
n
p = p0 + 4 12 1 × 1012 cm–3
p = 1 × 10 + 1 × 10
after t = 0 the light source is turned off thus recombimation rate of excess hole and electron will be
p 1 1012
R'n Rp 1 1021 cm 3 s 1

p0 1ns
Thus for t > 0
t / p0
p(t) p0 p (0)e

= 1 × 104 + (1 × 1012) e–t/1ns

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 88 Electronic Devices And Circuits

and
n(t) = n0 + n(0) e–t/ n0
p (0)
Since R'n Rp
p0

p (0)
from above equation we can see that R'n
p0

p (0) n (0)
p0 n0

p0 = n0

t / p0
n (t ) n0 n(0)e
n(t) = 1 × 1016 + 1012 e–t/1ns
We can plot n(t) and p(t) for t > 0

16 –3
(1.0001) × 10 cm

1 × 1016 cm –3 n (t )
12 –3
1 × 10 cm

4 –3 p (t )
1 × 10 cm
t

From above example we can see that at t = the semiconductor will reach thermal equilibration n(t)=no
and p(t)= p0

Note: From above example it is clear that why excess minority carrier are important, becauce the excess majority
carrier have very less effect in number of majority carrier cuncentation.

3.3 Time and Space Variation of Excess Carrier

In the previous section we have analyzed only the case that is light source is turned off at t = 0 and then
how the excess carrier changer with time. There are many other cases which can easily be analyzed using
continuity equation.

3.3.1 The Continuity Equation

We will find out continuity equation for holes and electrons

Case 1: For p- type semicanductor

Consider a differential volume element in which holes are flowing in x direction as shown in Fig 3.8.Fig 3.8
shows a differential volume element in which a one-dimensional hole-particle flux is entering the differential

element at x and is leaving the element at x + dx. The parameter F px ( x ) is the hole-particle flux, or flow, and
has unit of number of holes/cm2-s. For the x component of the particle current density shown, we may write
Fpx
Fpx ( x dx ) Fpx ( x ) dx …(3.21)
x

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 Non Equilibrium Excess Carriers In Semiconductors 89

This equation is a Taylor expansion of Fpx ( x dx ) , where the differential length dx is small, so that only
first two tems in the expansion are significant.

dz
Fpx (x )
+
F+px (x + dx )

dy

x x + dx

Fig 3.8 : Differential volume showing × component of the hole-particle flux

If flux of holes leaving the volume element at (x + dx) is greater than flux of hole entering volume
element at x then it is obvious that the hole are decreasing inside the volume element. Thus

p F px
dxdy dz [F px ( x dx ) F px ( x )]dydz dxdydz …(3.22)
t x

Thus if Fpx ( x dx ) Fpx ( x ) then holes decrease in volume element and if Fpx ( x ) Fpx ( x dx ) then hole
increase in volume element. Since Fpx ( x ) in flux of hole thus current density will be Jp(x) eF px ( x ) .

p 1 J p (x )
dxdy dz dydz …(3.23)
t e x
The generation rate and recumbination rate will also effect the hole concentration. The generation
increase the hole concentration and recombination decrease the hole concentration. Thus complete equation
that show change hole concentration with time is

p
dxdy dz 1 J p (x )
dydz g p dxdydz rp dxdydz …(3.24)
t e x
where p is the density of holes. The first term on the right side of Eq. (3.24) is the increase in the
number of holes per unit time due to the hole flux, the second term is the increase in the number of holes per
unit time due to the generation of holes, and the last term is the decrease in the number of holes per unit time
due to the recombination of holes. The recombination rate for holes is given by p/ pt where pt includes the
thermal equilibrium carrier lifetime and the excess carrier lifetime.
Thus equation (3.24) can be written as

p 1 J p (x )
gp rp …(3.25)
t e x

p 1 Jp ( x ) p
gp …(3.26)
t q x pt

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 90 Electronic Devices And Circuits

Similarly one dimensional continuty equation for electrons cunbe wretten, in Fig (3.8) assume that flux
enterning the volume element at x is Fnx ( x ) and leaving at x + dx is Fnx ( x dx ), we can write

n Fnx ( x )
dxdy dz dxdydz g ndxdydz rndxdydz …(3.27)
t x
If Jn(x) is density of current then Jn(x) = – e Fnx(x)
Thus

n 1 J n(x )
dxdy dz dxdydz g ndxdydz rndxdydz …(3.28)
t e x

n 1 J n (x )
gn rn …(3.29)
t e x
In equation 3.28 the first term is showing change in electron concentration due to flow of current and
second term show generation of electron and third term show decrease in electron due to recombination,
n
recombination rate
nt

n 1 J n(x ) n
gn …(3.30)
t e x nt

3.3.2 Time - Dependent Diffusion Equations

We know that

dP
Jp e p pE eD p
dx
dn
and Jn e n nE eD n
dx
Thus we get

p ( pE) 2
p p
p Dp gp …(3.31)
t x x 2
pt

and

n ( nE ) 2
n n
n Dn gn …(3.32)
t x x2 nt

which can be written as

2
p p E p p
Dp p E p gp …(3.33)
x 2
x x pt t
and
2
n p E n n
Dn n E n gn …(3.34)
x2 x x pt t
Equations (3.33) and (3.34) are the time-dependent diffusion equations for holes and electrons,

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 Non Equilibrium Excess Carriers In Semiconductors 91

respectively. Since both the hole concentration p and the electron concentration n contain the excess
concentrations, Eqs (3.33) and (3.34) describe the space and time behavior of the excess carriers.
The thermal-equilibrium concentrations, n0 and p0, are not functions of time. For the special case of a
homogeneous semiconductor, n0 and p0 are also independent of the space coordinates. Equations (3.33) and
(3.34) may then be written in the form
2
( p) ( p) E p ( p)
Dp p E p gp …(3.35)
x2 x x pt t
and
2
( n) ( n) E n ( n)
Dn 2 n E n gn …(3.36)
x x x nt t
Note that the Eqs. (3.35) and (3.36) contain terms involving the total concentrations, p and n, and
terms involving only the excess concentrations, p and n.
Consider, again, the generation and recombination terms in the above equation. For electrons we may
write
g – R = gn – Rn = (Gn0 + g'n) – (Rn0 + R'n) …(3.37)
where Gn0 and g'n are the excess electron generation rates and thermal-equilibrium electron, respectively.
The terms Rn0 and R'n are the thermal-equilibrium electron and excess electron recombination rates, respectively.
For thermal equilibrium, we have that
Gn0 = Rn0 …(3.38)
so eq. (3.37) reduces to
n
g–R g n Rn gn …(3.39)
n
where n is the excess minority carrier electron lifetime.
For the case of holes, we may write
g – R = gp – Rp = (Gp0 + g'p) – (Rp0 + R'p) …(3.40)
where Gp0 and g'p are the thermal-equilibrium hole and excess hole generation rates, respectively. The
terms Rp0 and R'p are the thermal-equilibrium hole and excess hole recombination rates, respectively. Again, for
thermal equilibrium, we have that
G p 0 = Rp0 …(3.41)
so that Eq. (3.40) reduces to
p
g–R gp Rp gp …(3.42)
p
where p is the excess minority carrier hole lifetime.
The generation rate for excess electrons must equal the generation rate for excess holes. We may then
define a generation rate for excess carriers as g', so that g'n = g'p g'. We also determined that the minority
carrier lifetime is essentially a constant for low injection. Then the term g – R in the ambipolar transport
equation may be written in terms of the minority-carrier parameters.
The ambipolar transport equation, given by Eq. (3.35), for a p-type semiconductor under low injection
then becomes
2
( n) ( n) n ( n)
Dn 2 nE g …(3.43)
x x n0 t

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 92 Electronic Devices And Circuits

The parameter n is the excess minority carrier electron concentration, the parameter n0 is the minority
carrier lifetime under low injection, and the other parameters are the usual minority carrier electron parameters.
Similarly, for an extrinsic n-type semiconductor under low injection, the ambipolar transport equation
becomes
2
( p) ( p) p ( p)
Dp pE g …(3.44)
x 2
x p0 t
The parameter p is the excess minority carrier hole concentration, the parameter p0 is the minority
carrier hole lifetime under low injection, and the other parameters are the usual minority carrier hole parameters.
It is extremely important to note that the transport and recombination parameters in Eqs. (3.43) and
(3.44) are those of the minority carrier. Equation (3.43) and (3.44) describe the drift, diffusion, and recombination
of excess minority carriers as a function of spatial coordinates and as a function of time. Recall that we had
imposed the condition of charge neutrality; the excess minority carrier concentration is equal to the excess
majority carrier concentration. The excess majority carriers, then, diffuse and drift with the excess minority
carriers; thus, the behavior of the excess majority carrier is determined by the minority carrier parameters.

REMEMBER If in any question with excess carrier then the equation (3.35) and (3.36) can be simpified by
using following table

Table 3.2 Common ambipolar transport equation simplifications

( n) ( p)
Steady state 0, 0
t t
2 2
( n) ( p)
Uniform distribution of excess carriers(uniform generation rate) Dn 2
0, D p 0
x x2
Zero electric field ( n) ( n)
E 0, E 0
x x
No excess carrier generation g' = 0
n p
No excess carrier recombination (infinite lifetime) 0, 0
n0 p0

Example 3.2

Consider an infinitely large, homogeneous n -type semiconductor with zero applied electric
field. Assume that at time t = 0, a uniform concentration of excess carriers exists in the
crystal, but assume that g ' = 0 for t > 0. If we assume that the concentration of excess
carriers is much smaller than the thermal-equilibrium electron concentration, then the low-
injection condition applied. Calculate the excess carrier concentration as a function of time
for t 0.
Solution 3.2
Since the semicundoctor is ntype thus the excess minority carrier will be holes. Given that at t = 0, uniform
concentration of excess carrier thus variation with x is not present. Thus using equation (3.44) we get
2
( p) p p p
Dp pE g
x 2 x p0 t
p
Since E = 0, g' = 0, 0 as uniform concentration of excess carriers exist. Thus
x

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 Non Equilibrium Excess Carriers In Semiconductors 93

p p
t p0
t / p0
{ p(t ) p(0)e } …(3.45)
Here p(0) is the uniform concentration of excess carrier that exists at t = 0. From charge neutrality
–t/ p0
n(t) = p(t) = p(0)e

Example 3.3

Again consider an infinitely large, homogeneous n-type semiconductor with a zero applied
electric field. Assume that, for t < 0, the semiconductor is in thermal equilibrium and that,
for t 0, a uniform generation rate exists in the crystal. Calculate the excess carrier
concentration as a function of time assuming the condition of low injection.
Solution 3.3
2
p
The generation rate is uniform thus variation in excess carrier with respect to x will be Zero. Thus 2
x
p
and 0. Since generation rate of hole is a constant and uniform thus using equation (3.44) we get
x
2
p p p p
Dp pE g
x2 x p0 t

p p
g
t p0

t / p0
p( t ) g p0 (1 e ) …(3.46)
Thus for t < 0 there are no excess carrier and for t > 0 excess minority carrier follow equation (3.46)

p( t)

g p0

From above example we can see that even if uniform generation rate exist the concentration of excess
carrier will not increase continuously, reather it increase and achieve a fixed maximum value. The maximum
steady value is equal to p = g' p0. Here for charge neutrality p = n = g' p0.
The increase in holes and electrons increase the recombination rate also which balance the generation
thus at steady state n and p become constant.

Example 3.4

Consider a semiconductor bar with light falling all over the bar as shown in figure. If
intensity of photons is 1 × 10 24 cm –3 , if out of 1000 photons only one photon generates an
electron hole pair and n 0 = 1ns. Then plot excess minority carrier profile wrt time, if at
t = 100 sec the light source is turned off.
Solution 3.4

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94 Electronic Devices And Circuits

Since generation of excess carrier will be uniform thus no variation wrt x the generation rate will be
1
1 1024 cm 3s 1 = 1 × 1021 cm–3 s–1
1000
Thus at t = 0 the light source is turned on, then for t > 0 the excess minority carrier concentration will be
n(t) = g n (1 – e–t/ n0)
n(t) = 1 × 1012 (1 – e–t/ n0)cm–3
Thus the plot of n(t) will be as shown in figure. The steady state 1 × 1012/cc value is reached at
t = 4 n0 = 4ns

n (t )

12
1 × 10 /cc

t
4 n0

Thus at t = 100s when the excess carrier concentration is constant, the light source turn off thus now
g' = 0. For t > 100 s n(t) will be
( t 100)/ n
n (t ) n(100)e 0

( t 100)/ n0
(1 1012 )e
Thus plot of n(t) will be

n( t )

12
1 × 10 /cc

t
100 s

Example 3.5

Consider a p -type semiconductor that is homogeneous and infinite in extent. Assume a zero
applied electric field. For a one-dimensional crystal, assume that excess carriers are being
generated at x = 0 only, as indicated in Fig. The excess carriers being generated at x = 0
will begin diffusing in both the + x and – x directions. Calculate the steady-state excess
carrier concentration as a function of x .
Solution 3.5
g

x
x=0
Thus generation of excess carrier take place at x = 0 only and in rest of all x the generation rate is Zero.
From eqution 3.43 we have

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 Non Equilibrium Excess Carriers In Semiconductors 95

2
( n) ( n) n ( n)
Dn nE g
x 2
x n0 t
( n)
From our assumptions, we have E = 0, g' = 0 for x 0, and 0 for steady state. Assuming a one-
t
dimensional crystal, above equation reduce to
d2 ( n) n
Dn =0 …(3.47)
dx 2 n0

Dividing by the diffusion coefficient, Eq. (3.47) may be written as

d2 ( n ) n d2 ( n) n
2
0 …(3.48)
dx Dn n0 dx 2 L2n

where we have defined L2n Dn n0 .

The parameter Ln has the unit of length and is called the minority
carrier electron diffusion length. The general solution to Eq. (34.8) is
x / Ln
n (x) Ae Bex / Ln …(3.49)
As the minority carrier electrons diffuse away from x = 0, they will recombine with the majority carrier
holes. The minority carrier electron concentration will then decay toward zero at both x = + and x = – .
These boundary conditions means that B 0 for x > 0 and A 0 for x < 0. The solution to Eq. (3.48) may
then be written as
n (x) n(0)e x / Ln x 0 …(3.50)
and
x / Ln
n (x) n(0)e0 x …(3.51)
where n(0) is the value of the excess electron concentration at x = 0. The steady-state excess electron
concentration decays exponentially with distance away from the source at x = 0.
As before, we will assume charge neutrality; thus, the steady-state excess majority carrier hole
concentration also decays exponentially with distance with the same characteristic minority carrier electron
diffusion length Ln. Fig 3.9 is a plot of the total electron and hole concentrations as a function of distance. We
are assuming low injection, that is, n(0) << p0 in the p-type semiconductor. The total concentration of majority
carrier holes barely changes. However, we may have n(0) >> n0 and still satisfy the low-injection condition.
The minority carrier concentration may change by many orders of magnitude.
Carrier concentration
(log scale)
p 0 + n(0)

p0

n 0 + n (0)

n0

x=0 x
Fig 3.9 : Steady-state electron and hole concentrations for the case when excess electrons and holes are
generated at x = 0

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Example 3.6

Consider a n type semiconductor shown in figure. the light source is active only at x = 0
thus generates excess carrier only at x = 0. If excess minority carrier concentration is
1 × 10 13/cm 3 at x = 0. Then find spatial variation of excess minority carrier at steady state.
( L p = 10 m)

n type
semiconductor

x
x=0

Solution 3.6
The variation of excess minority carrier wrt x will be
x / Lp
p(x ) 1 1013 e for x 0
13 x / Lp
and p(x) 1 10 e for x 0

p(x )
1 × 1013 /cc

Always remenber that the variation of excess minority and excess majority carrier wrt x and wrt time
will always be same. The diffusion lenght is Ln Dn n0 and Lp Dp p0 .

Example 3.7

The excess hole population is illustrated in figure. Suppose the semiconductor is n type with
N d = 10 17 /cc, minority Carrier life time is 10 –4 sec and cross section area of the sample is
10 –4 cm 2 . What is the hole recombination current if hole mobility is 640 cm 2 /V–sec.

14 p(x )/cc
5 × 10

x ( m)
0 2

Solution 3.7

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 Non Equilibrium Excess Carriers In Semiconductors 97

We know that if the the excess minority carrier are constant then there might be a constant source from
which the excees hole are entering into semicanductor bar. The total excees hole are
1
(5 1014 / cc) (2 10 4 cm) cross section area
2
= 5 × 106 excess holes
Thus excess hole recombination rate will be
p 5 106
R'p 5 1010 / sec
p0 10 4
Thus in a second 5 × 1010 excess hole recombine and the excess hole concentration is a constant thus this
many holes (5 × 1010) will enter the semiconductor bar and produce recombination current
Recombination current will be
(e × 5 × 1010) = 1.6 × 10–19 × 5 × 1010
= 8.0 × 10–9 Amp

Example 3.8

Consider the arrangement shown in figure, the electron flux is 10 19 /cm 2 –sec

p type semiconductor
e–
Na = 1017 / cc

x I

the excess minority carrier in p -type semiconductoon is n ( x ) = N 0 exp(– x / L n ).If p = 600

cm 2/V-s, n = 1600 cm 2/N-sec, L n = m, T =300 K. Find the value of N o .
Solution 3.8
Since the current flow should be constant, the current flow between semiconductor bar and the metal plate
is
I = (Flux of electron) × e × cross section carea
J = 1.6 × 10–19 × 10+19
J = 1.6A/cm2
The current in semicondutor at x = 0 will flow due to diffusion of excess minority carrier only. Thus

d x
1.6 A/cm2 eD n N exp
dx 0 Ln x 0

19 N0
1.6 A / cm2 1.6 10 Dn
Ln
Ln
N0 19
Dn 10
kT 3
Since Dn n = 1600×25×10
q
N0 = 2.5 × 1013 / cc

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Example 3.9

N -type GaAs semiconductor doped with N d = 10 16 /cc. The minority carrier life time is
2 × 10 –7 sec and generation rate is 2 × 10 21 /cc-sec. Find the excess carrier recombination
rate and steady state increase in conduction if n = p = 1000 cm2 /V sec and n i = 1 × 10 10
cm 3 .
Solution 3.9
To generation rate is 2 × 1021/cc-sec and life time is 2 × 10–7 sec. Thus concentration of excess carrier will
be 4 × 1014/cc.
(a) excess carrier recombination rate

p generation rate life time of carrier

R'n Rp generation rate
p0 life time of carrier

= 2 × 1021 / cc sec
(b) The conducivity will be
= e(n n + p p)
= e[n0 + n) n + (p0 + p) p]
= e (n0 + p0 + n + p)
Since n = p = 1000 cm /V-sec and n0 = 1016,
2

ni2
p0 , n p 4 1014 / cc
n0

Thus p 0 = 1 × 104/cc
= 1.6 × 10–19 × 1000 × (1016 + 104 + 4 × 1014 + 4 × 1014)
= 108 × 1.6 × 10–19 × 103 × 1014
= 1.72/ cm

Example 3.10

In silicon semiconductor material doping concentration N d = 1 × 10 15 /cc, N a = 0. At

equilibrium recombination rate R p 0 = 1 × 10 11 /cm 3 sec. A uniform generation rate produces
an excess carrier concentration n = p = 1 × 10 14 / cm 3 .
( 1 ) By what fector does the total recombination rate increase
( 2 ) What is excess minority carrier life time
( 3 ) What is excess majority carrier life time
Solution 3.10
(1) We know that ni for silicon is 1.5 × 1010/cc. Thus at equilibrium
ni2 (1.5 1010 )2 2.25 1020
p0
n0 1 1015 1 1015
= 2.25 × 105 / cc
p0 2.25 105
Thus Rp 0
p0 p0

2.25 105
Thus 1 × 1011
p0

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 Non Equilibrium Excess Carriers In Semiconductors 99

= 2.25 × 10–6 sec

p0
Thus recombination rate of the carrier when excess carrier exist inside semiconductor
p p0 2.25 105 1 1014
Rp 6
p0 2.25 10
= (1011) + (4.4 × 1019)
Thus recombition rate increase by 4.4 × 1019/cm3 sec
(2) We have already calcualated excess minority carries life time p0 = 2.25 × 10–6
(3) Since R'n = R'p that is the the recombition rate of excess minority carries and excess majority carrier is
same, thus
R'n = R'p
n p
n0 p0
Since n = p p0 = n0
Thus excess majority carrier life time = 2.25 × 10–6 sec

Note: In above example we have taken the excess minority carrier and minority carrier at equilinium have same
life time, And this assumption is valid in semiconductor physics.

3.4 Dielectric relaxation time constant

We have assumed in the previous analysis that a quasi-neutrality conditions exists – that is, the
concentration of excess holes is balanced by an equal concentration of excess electrons. Suppose that we have
a situation as shown in Fig. 3.10, in which a uniform concentration of holes p is suddenly injected into a portion
of the surface of a semiconductor. Dielectric relaxation times indicates the time during which excess carriers in
a semiconductor become neutralized.
There are three defining equations to be considered. Poisson’s equation is

E …(3.52)

The current equation, Ohm’s law, is

J= E …(3.53)
The continuity equation, neglecting the effects of generation and recombination, is

J …(3.54)
t
The parameter is the net charge density and the initial value is given by e( p). We will assume that p
is uniform over a short distance at the surface. The parameter is the permittivity of the semiconductor.

p n type
holes

Fig 3.10 : The injection of a concentration of holes into a small region at the surface of an n-type
semiconductor

Taking the divergence of Ohm's law and using Poisson's equation, we find

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 100 Electronic Devices And Circuits

J E …(3.55)
Substituting Eq. (3.55) into the continuity equation, we have
d
…(3.56)
t dt
Since Eq. (3.56) is a function of time only, we can write the equation as a total derivative. Equation
(3.56) can be rearranged as

=0 …(3.57)
t
Equation (3.57) is a first-order differential equation whose solution is
(t / d )
(t ) (0)e …(3.58)
where

d …(3.59)

and is called the dielectric relaxation time constant. For Si, r = 11.8 and for GaAs r = 13.2, so
dielectric relaxation time is more in case of GaAs, i.e. excess carriers generated in GaAs takes more time to
neutralize.

REMEMBER From here we learn that

• Whenever excess carrie enter into a material then to maintain change neutrality other excess
carrier are also generated inside. For example if holes enter into a semiconductor then
electron are generated inside to maintain charge neatrality.

• The time required to maintain charge neatrality is called relaxation time, it depend on
1
conductivity of material. d is proportional to , if more conductivity then d is low..

Example 3.11

Calculate the dielectnic relaxation time constant for a particular semiconductor with donor
impurity concentration N d = 1 × 10 16 /cc, n = 1200 cm 2 /v sec, r = 11.7.
Solution 3.1
The conductivity is found as
19
e n Nd (1.6 10 )(1200)(1016 ) 1.92( -cm) 1

The permittivity of silicon is

14
r 0 (11.7)(8.85 10 )F / cm
The dielectric relaxation time constant is then
14
(11.7)(8.85 10 )
d
5.39 1013 s
1.92
or
d = 0.539 ps

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 Non Equilibrium Excess Carriers In Semiconductors 101

3.5 Quasi-Fermi Energy Level

The thermal-equilibrium electron and hole concentrations are functions of the Fermi energy level. We
can write
EF EFi
n0 ni exp …(3.60)
kT
and
EFi EF
p0 ni exp …(3.61)
kT
where EF and EFi are the Fermi energy and intrinsic Fermi energy, respectively, and ni is the intrinsic
carrier concentration. Fig 3.11 (a) shows the energy-band diagram for an n-type semiconductor in which
EF > EFi. For this case we may note from Eqs. (3.60) and (3.61) that n0 > ni and p0 < ni, as we would expect.
Similarly, Fig. 3.11(b) shows the energy-band diagram for a p-type semiconductor in which EF < EFi. Again we
may note from Eqs (3.60) and (3.61) that n0 < ni and p0 > ni, as we would expect for the p-type material. These
results are for thermal equilibrium.
If excess carriers are created in a semiconductor, we are no longer in thermal equilibrium and the Fermi
energy is strictly no longer defined. However, we may define a quasi-Fermi level for electrons and a quasi-Fermi
level for holes that apply for nonequilibrium. If n and p are excess electron and hole concentration, respectively,
we may write:
EFn EFi
n0 + n ni exp …(3.62)
kT

Ec Ec
Electron energy
Electron energy

EF
EFi EFi
EF
Ev Ev

(a) (b)

Fig 3.11 : Thermal-equilibrium energy-band diagrams for (a) n-type semiconductor, and (b) p-type
semiconductor

and
EFi EFp
p0 + p ni exp …(3.63)
kT
where EFn and EFp are the quasi-Fermi energy levels for electrons and holes, respectively. The total
electron concentration and the total hole concentration are functions of the quasi-Fermi levels.
Thus at non equilibrium we have two femi levels EFn and EFp.

Example 3.12

Consider an n-type semiconductor at T = 300 K with carrier concentrations of n 0 = 10 15

cm –3, n i = 10 10 cm –3, and p 0 = 10 5 cm –3 . In nonequilibrium, assume that the excess carrier
concentrations are n = p = 10 –13 cm –3 .

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 102 Electronic Devices And Circuits

Solution 3.12
The Fermi level for thermal equilibrium can be determined from Eq. (3.60). We have
n0
EF – EFi kT ln 0.2982 eV
ni
We can use Eq. (3.62) to determine the quasi-Fermi level for electrons in nonequilibrium. We can write
n0 n
EFn – EFi kT ln 0.2984 eV
ni
Equation (3.63) can be used to calculate the quasi-Fermi level for holes in nonequilibriu. We can write
n0 p
EFi – EFp kT ln 0.179 eV
ni

Fig 3.12 (a) shows the energy-band diagram with the Fermi energy level corresponding to thermal
equilibrium. Fig 3.12 (b) now shows the energy-band diagram under the nonequilibrium condition. Since the
majority carrier electron concentration does not change significantly for this low-injection condition, the quasi-
Fermi level for electrons is not much different from the thermal-equilibriurn Fermi level. The quasi-Fermi
energy level for the minority carrier holes is significantly different from the Fermi level and illustrates the fact
that we have deviated from thermal equilibrium significantly. Since the electron concentration has increased
the quasi-Fermi level for electrons has moved slightly closer to the conduction band. The hole concentration has
increased significantly so that the quasi-Fermi level for holes has moved much closer to the valence band. We
will consider the quasi-Fermi energy levels again when we discuss forward-biased pn junctions.

0.2982 eV 0.2982 eV
0.2984 eV

Ec Ec
EFn
Electron energy
Electron energy

EF EF
EFi EFi
EFp
0.179 eV
Ev Ev

(a) (b)

Fig 3.12 : (a) Thermal-equilibrium energy-band diagram for N d = 10 15 cm –3 and n i = 10 10 cm –3 .

(b) Quasi-Fermi levels for electrons and holes if 10 13 cm –3 excess carriers are present

3.6 Photo Conductive Device

There are a number of applications for devices which change their resistance when exposed to light. For
example, such light detectors can be used in the home to control automatic night lights which turn on at dusk
and turn off at dawn. They can also be used to measure illumination levels, as in exposure meters for cameras.
Many systems include a light beam aimed at the photo-conductor, which signals the presence of an object
between the source and detector. Such systems are useful in moving-object counters, burglar alarms, and many
other applications. Detectors are used in optical signaling systems in which information is transmitted by a light
beam and is received at a photoconductive cell.

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 Non Equilibrium Excess Carriers In Semiconductors 103

Considerations in choosing a photoconductor for a given application include the sensitive wavelength
range, time response, and optical sensitivity of the material. In general, semiconductors are most sensitive to
photons with energies equal to the band gap or slightly more energetic than band gap. Less energetic photons
are not absorbed, and photons with h >> Eg are absorbed at the surface and contribute little to the bulk
conductivity.
For example, CdS (Eg = 2.42 eV) is commonly used as a photoconductor in the visible range, and
narrow-gap materials such as Ge (0.67 eV) and InSb (0.18 eV) are useful in the infrared portion of the spectrum.
Some photoconductors respond to excitations of carriers from impurity levels within the band gap and therefore
are sensitive to photons of less than band gap energy.
The optical sensitivity of a photoconductor can be evaluated by examining the steady state excess carrier
concentrations generated by an optical generation rate go . If the mean time each carrier spends in its respective
band before capture is n and p, we have
n= ngo and p = tpgo …(3.64)
and the photoconductivity change is
= qgo ( n n + p p) …(3.65)
For simple recombination, n and p will be equal. If trapping is present, however, one of the carriers
may spend little time in its band before being trapped. From Eq. (3.65) it is obvious that for maximum photocon-
ductive response, we want high mobilities and long lifetimes. Some semiconductors are especially good candidates
for photoconductive devices because of their high mobility; for example, InSb has an electron mobility of about
105 cm2/V-s and therefore is used as a sensitive infrared detector in many applications.

Example 3.13

Consider the semiconductor bar with doping N d = 1 × 10 16 /cc, N a = 0, n i = 1 × 10 10 /cc. If

hole are falling on the semiconductor bar then find the variation of excess minority carrier
profile with if at x = 0 p = 1 × 10 12 /cc.

n type
holes
semiconductor

x=0 x=L
Solution 3.13
p
Since it is given that we have to find variation with x at steaty state, thus we have E = 0, 0. Thus
t
2
p p p p
Dp pE g p(cm –3)
x 2
x p0 t
p(0)
2
p p
Dp =0
x2 p0

p ( x ) = p(0)e–x/Lp
x
Here Lp Dp p0

Thus

and p = p0 + p

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104 Electronic Devices And Circuits

p(cm–3)
2
ni x / Lp
(1 1012 )e 1 × (1012 + 104)
n0

4
10
(1 1010 )2 12 x / Lp
10 e x
1 1016

x / Lp
{104 1012 e }

REMEMBER We have seen that energy of photos band gap will be absorbed. The energy of photon of
hc
frequency is h or .

Example 3.14

In a very long p -type Si bar with cross-sectional area = 0.5 cm 2 and N a = 10 17 cm –3 , we

inject holes such that the steady state excess hole concentration is 5 × 10 16 cm –3 at x = 0.
What is the steady state separation between F p and E c at x = 1000 Å ? What is the hole
current there? How much is the excess stored hole charge? Assume that p = 500 cm 2 /V-s
and p = 10 –10 s.
Solution 3.14
kT
Dp p 0.0259 500 12.95 cm/s
q
10
Lp Dp p 12.95 10 3.6 10 5 cm
x 10 5
Lp 17 16 3.6 10 5
p p0 pe 10 5 10 e
( Ei Fp )/ kT ( Ei Fp )/ kT
1.379 1017 ni e (1.5 1010 cm 3 )e

1.379 1017
Ei – Fp ln 0.0259 0.415 eV
1.5 1010
1.1
Ec – Fp eV 0.415 eV 0.965 eV
2
We can calculate the hole current from Eq. (3.65)
x
dp Dp Lp
Ip eAD p eA ( p )e
dx Lp
10 5
12.95 3.6 10 5
1.6 10 19 0.5 5
5 1016 e
3.6 10
3
= 1.09 × 10 A
Q p = eA( p)Lp

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 Non Equilibrium Excess Carriers In Semiconductors 105

= 1.6 × 10–19(0.5)(5 × 1016)(3.6 × 10–5)

= 1.44 × 10–7 C

3.7 Recombination Centers

When at equlibrium the electron and hole concentration are n0 and p0. If n and p are excess carrier
that are generated, then n = p to maintain charge neutrality. The recombination rate of excess carrier will be
p
R'n Rp
p0

If impurities are added in semiconductor then these impurities add empty states within forbidden band
gap and there act as recombination centers and these aid recombination.

REMEMBER Impure semiconductor has higher recombination rate and less life time of carriers.

Example 3.15

A bar of Si is doped with boron at 10 15 cm –3 . It is exposed to light such that electron-hole

pairs are generated throughout the volume of the bar at the rate of 10 20 /cc-sec.
The recombination lifetime is 10 s. What are (a) p 0 , (b) n 0 , (c) p ', (d) n ', (e) p , (f) n , and
(g) the np product? (h) If the light is suddenly turned off at t = 0, find n '( t ) for t > 0
Solution 3.1
(a) p0 = Na = 1015 cm–3 is the equilibrium hole concentration.
ni2
(b) n0 105 cm 3
is the equilibrium electron concentration.
p0
(c) In steady state, the rate of generation is equal to the rate of recombination
p
1020/s cm3

p' 1020 / s cm3 1020 / s cm3 10 5 s 1015 cm 3

(d) n' = p' = 1015 cm–3

(e) p = p0 + p' = 1015 cm–3 + 1015 cm–3 = 2 × 1015 cm–3
(f) n = n0 + n' = 105 cm–3 + 1015 cm–3 1015 cm–3.
The non-equilibrium minority carrier concentration is often much much larger than the small equilibrium
concentration.
(g) np 2 × 1015 cm–3 × 1015 cm–3 = 2 × 1030 cm–6 >> ni2 1020 cm 6 . The np product can be very
different from ni2 .
(h) For t > 0
t/ t/
n'(t) n (0)e 1015 cm 3 e
Therefore, n' decays exponentially toward its equilibrium value of zero. The characteristic time of the
exponential decay is the carrier lifetime, .

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 106 Electronic Devices And Circuits

6 . A Si sample with 1016/cm3 donors is optically excited

such that 1019/cm3 electron-hole pairs are generated
per second uniformly in the sample. The laser causes

1 Subjective Practice Problems

the sample to heat up to 450 K. Find the quasi-Fermi
levels and change in conductivity of the sample upon
shining the light. Electron and hole lifetime are both
10 s. Dp = 12 cm2/s; Dn = 36 cm2/s; ni = 1014 cm–3
1 . Consider a semiconductor in which n0 = 1015 cm–3
at 450 K. What is the change in conductivity upon
and ni =1010 cm–3. Assume that the excess carrier
shining light.
lifetime is 10–6 s. Determine the electron hole
recombination rate if the excess hole concentration 7 . An n-type Si sample with Nd = 1015 cm–3 is steadily
is p = 5 × 1013 cm–3. illuminated such that g op = 10 21 EHP/cm 3 -s.
If n = p = 1 s for this excitation, calculate the
2 . A semiconductor, in themal equilbrium, has a hole
separation in the quasi-Fermi levels, (Fn – Fp). Draw
concentration of p0 = 1016 cm–3 and an intrinsic
a band diagram
concentration of ni = 1010 cm–3. The minority carrier
lifetime is 2 × 10–7 s. 8 . A Si sample with 1015/cm3 donors is uniformly
(a) Determine the thermal-equilibrium optically excited at room temperature such that
recombination rate of electrons. 1019/cm3 electron-hole pairs are generated per
(b) Determine the change in the recombination rate second. Find the seperation of the quasi-Fermi levels
of electrons if an excess electron concentration and change of conductivity upon shining the light.
of n = 1012 cm–3 exists. Electron and hole lifetime are both 10 s and
3 . An n -type silicon sample contains a donor Dp =Dn =12 cm2/s.
concentration of Nd = 1016 cm–3. The minority carrier 9 . A 100-mW laser beam with wavelength = 6328 Å is
hole lifetime is found to be p0 = 20 s. focused onto a GaAs sample 100 m thick. The
(a) What is the lifetime of the majority carrier absorption coefficient at this wavelength is
electrons?
3 × 104 cm–1. Find the number of photons emitted
(b) Determine the thermal equilbrium generation
per second by radiative recombination in the GaAs,
rate for electrons and holes in this material.
assuming perfect quantum efficiency. What power is
(c) Determine the thermal equibrium recombination
delivered to the sample as heat?
rate for eletrons and holes in this material.
10. Consider a p-type semiconductor that has a band
4 . (a) A sample of semiconductor has a cross-section
gap of 1.0 eV and minority electron lifetime of 0.1 s
area of 1 cm 2 and a thickness of 0.1 cm.
and is uniformly illuminated by light having photon
Determine the number of electron - hole pairs
that are generated per unit volume per unit time energy of 2.0 eV.
by the uniform absorption of 1 watt of light at a (a) What rate of uniform excess carrier generation
wavelenghth of 6300 Å. Assume each photon is required to generate a uniform electron
creates one electron-hole pair. concentration of 1010/cm3?
(b) If the excess minority carrier lifetime is 10 s, (b) How much power per cm3 must be absorbed in
what is the steady-state excess carrier order to create the excess carrier population of
concentration? part (a)? (You may leave your answer in units of
eV/s-cm3.)
5 . Consider a one-dimensional hole flux as shown in (c) If the carriers recombine via photon emission,
Fig. 3.8. If the generation rate of hole in this approximately how much optical power per cm3
diffrential volume is gp = 1020 cm–3-s–1 and the will be generated? (You may leave your answer
recomination rate is 2 × 1019 cm–3 s–1, what must be in units of eV/s-cm3.)
the gradient in the particle current density to
maintain a steady-state hole concentration?

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 Non Equilibrium Excess Carriers In Semiconductors 107

11. Consider the following equlibrium band diagram for resistor. The width and height of the sample are
a portion of a semicondutor sample with a built-in 10 m, and 1.5 m, respectively, and the length
electric field : of the sample is 20 m. Calculate the resistance
of the sample.
Ec

Ei

Ev

1
EF
energy Objective Practice Problems
position
Common Data for Q.1 and Q.2
(a) Sketch the Fermi level as a function through
At T = 300 K, an n-type silicon sample contains a donor
the indicated point, EF, across the width of the
concentration Nd = 1016 cm–3 and intrinsic concentration
band diagram above.
ni = 1.5 × 1010 cm–3 the minority carrier hole lifetime is
(b) On the band diagram, sketch the direction of
found to be p0 = 20 s.
the electric field constant or position dependent?
(c) On the following graph, sketch and label both 1 . What will be the thermal-equilibrium hole
the electron and hole concentrations as a funtion recombination rate in this material?
of position across the full width of the sample. (a) 22.25 × 109 cm–3 s–1
(b) 5.0 × 1020 cm–3 s–1
12. Figure is a part of the energy band diagram of a
(c) 1.125 × 109 cm–3 s–1
p -type semiconductor bar under equilibrium
(d) 8.88 × 1010 cm–3 s–1
consitiona (i.e., EF is a constant). The valance band
edge is sloped because doping is nonuniform along 2 . What is the lifetime of the majority carrier electrons?
the bar. Assume that Ev rises with a slope of /L. (a) 5.63 × 108 s (b) 4.45 × 106 s
(c) 1.13 × 109 s (d) 8.89 × 106 s
EF
Ev Common Data For Q.3 and 4
Consider a bar of p -type silicon material that is
hemogreneously doped to a value of 3 × 1015 cm–3 at
T = 300 K. The applied electric field is zero. A light
x source is incident on the end of the semiconductor as
0 L
shown in figure.
(a) Write an expression for the electric field inside
this semiconductor bar.
(b) Within the Boltzmann approximation, what is Light p type
the electron concentration n(x) along the bar?
Assume that n(x = 0) is n0. Express your answer
x=0 x
in terms of n0, , and L.
The excess-carrier concentration generated at x = 0 is
13. A sample of n-type silicon is at the room temperature. p(0) = n(0) = 10 13 cm–3. Assume the following
When an electric field with a strength of 1000 V/cm parameters (neglect surface effects):
2 –7
is applied to the sample, the hole velocity is measured n = 1200 cm /V-s n0 = 5 × 10 s
2 –7
and found to be 2 × 105 cm /sec. p = 400 cm /V-s p0 = 1 × 10 s
(a) Estimate the thermal equilibrium electron and 3 . The steady-state excess electron concentration at any
hole densities, indicating which is the minority
distance x into the semiconductor is
carrier.
(b) Find the position of EF with respect to Ec and Ev. 13 Ln Ln
(a) 10 exp (b) 1013 exp
(c) The sample is used to make an integrated circuit x x

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 108 Electronic Devices And Circuits

8 . Carrier concentration n and p under steady state

x x
(c) 10 13
exp (d) 1013 exp conditions are
Ln Ln
n p
4 . The electron diffussion current density (in mA/cm2) (a) 2.15 × 1015 per cm3 4.65 × 1019 per cm3
at a distance x in the semicinductor will be (b) 9.34 × 104 per cm3 1.07 × 1015 per cm3
Ln (c) 1.07 × 1015 per cm3 9.32 × 104 per cm3
x
(a) 12.6 exp (b) 12.6 exp (d) 2.15 × 1015 per cm3 1.07 × 1015 per cm3
Ln x
x x 9 . What is the resistivity of the semiconductor before
(c) 3.11exp (d) 4.05 exp illumination?
Ln Ln
(a) 0.2302 ohm-cm (b) 1.85 ohm-cm
Common Data For Q.5 and 6 (c) 4.34 ohm-cm (d) 0.54 ohm-cm
Consider an n-type gallium arsenide semiconductor at
T = 300 K doped at Nd = 5 × 1016 cm–3 and intrinsic 10. What is the resistivity of the semiconductor after
concentration ni = 106 cm–3. illumination?
(a) 1.85 ohm-cm (b) 0.54 ohm-cm
5 . The change in Fermi level EF – EFi will be (c) 4.34 ohm-cm (d) 0.2302 ohm-cm
(a) 2.405 eV (b) –0.9284 eV
(c) 0.66228 eV (d) –0.66228 eV Common Data for Q. 11 and 12
In a silicon semiconductor material at T = 300 K, the
6 . If the excess-carrier concentration is 0.1 Nd then, doping concentrations are Nd = 1015 cm–3 and Na = 0.
quasi-Fermi energy level for electrons will be The equilibrium recombination rate is Rp0 = 10 11
(a) 0.0025 eV above the Fermi level EF cm–3-s–1. A uniform generation rate produces an excess-
(b) 0.0025 eV below the Fermi level EF carrier concentration of n = p = 1014 cm–3.
(c) 0.6253 eV above the Fermi level EF
(d) 0.6253 eV below the Fermi level EF 11. The excess-carrier lifetime is ___________ × 10–7 s.
12. By _____________ × 109 factor does the total
Common Data for Q. 7, 8, 9 and 10
recombination rate increase?
The equilibrium and steady state conditions before and
after illumination of a semiconductor are characterized 13. A direct gap semiconductor sample is illuminated at
by the energy band diagram shown below. one end with light of = 500 nm (green), with an
intensity of 1 mW/cm2. The area of the illuminated
EC EC
surface is 1 cm2. The number of photons striking the
sample per second is ___________ × 1015.
EF EN
0.3 eV 0.318 eV Common Data for Q. 14 and 15
Ei Ei
0.3 eV A sample of GaAs doped with NA = 1017 cm–3. For GaAs,
Ep intrinsic concentration is ni = 2.2 × 106 cm–3, mobility
EV EV of electron is n = 5300 cm2 /V-sec, and mobility of hole
is p = 230 cm2/V sec.
(a) Before (b) After
14. The conductivity (in the dark) of a sample of GaAs is
At T = 300, the intrinsic concentration ni = 1010 per
_______ ( -cm)–1?
cm3, n = 1345 cm2/V-sec and p = 458 cm2/V-sec.
15. If the sample is illuminated such that the excess
7 . The value of the equilibrium carrier concentration electron concentration is 1016 cm–3, the excess hole
n0 and p0 respectively, are concentration is ________ × 1016 cm–3?
(a) 1.07 × 1015 per cm3, 9.32 × 104 per cm3
(b) 1.07 × 1015 per cm3, 2.15 × 1015 per cm3
(c) 9.32 × 1015 per cm3, 1.07 × 104 per cm3
(d) 2.15 × 1015 per cm3, 9.32 × 1015 per cm3

GATE MASTERS PUBLICATION

 Cha pter

The pn Junction
and pn Junction
Diode 4
4.1 Introduction
In this chapter we will study the properties of pn junction. All the semiconductor devices have at least
one junction. This junction is between p and n region. The understanding of pn junction will help us in
understanding the working of other semiconductor devices. We will study about electrostats of pn junction at
equilibrium and then will study about the current from the pn junction.

4.2 Band Diagram of pn Junction

The pn junction can be viewed as junction formed by joining p type semiconductor and n type semiconductor.
let us draw the band diagram of p and n semiconductor before they are joined as shown in Fig 4.1(a). In general
the Fermi level show the level of electrons in a material.
An analogy is semiconductor is a tank and electron concentration is water then Fermi level is equivalent
to level of water(electrons) in the tank (semiconductor). Suppose p and n semiconductor are two tanks with
water level shown by EF, now when we join these two semiconductors (tanks) then water (electron) will flow
from tank which has higher level of water to tank which has lower level of water. Thus when we join p and n type
semiconductor then electron flow from n type semiconductor to p type semiconductor. When electron move
from n region to p region then positive ions of the donors become uncovered and electron going in p region
uncover the negative acceptor ions. Thus we get a region of uncovered ions around the junction with positive
ions in n side and negative ions in p side. Due to seperation of ions there is an internal electric field present only
in region having uncovered charges. Since positive ions are present in n side thus n side get higher potential
and p side get negative potential due to negative ions. Thus when junction is formed the n side get higher
potential than p side, thus n side move down in band diagram and p side move up.
Thus at equilibrium the Fermi level of whole device will be a straigh line with zero slope as shown in
Fig 4.1(b) we can see that n region has band diagram below p region. So n region is at higher potential than p
region. The electric field exist in that region where uncovered ions are present, and we know that where electric
field exist Ec and Ev changes thus in band diagram we can see that Ec and Ev have non zero slope in region near
junction and this region is called depliction region.
The built in potential in pn junction is potential difference between two ends of depletion region, that is
potential difference between point A and B. Obviously A is at higher potential than B. In pn junction at equilibrium
the Fermi level become a straigh line with zero slope. Now the water level (EF) is same in both the tanks thus
water (electrons) will not flow and at equilibrium no carrier flow.

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 P-N junction diode 109

Note: Thus at equilibrium the Fermi level of whole device will be a straight line with zero slope (This is calid for
all semiconductor devices). Device can be any semiconductor device. Hence equilibrium means no external force
is applied, no temperature gradient, no external voltage, no ligh falling an device.
Ec Ec
EFn

e
–
e Fn

EFi EFi
electron flow
e Fp
when junction eVbi
is made
EFp
Ev Ev

(a)
depletion region
Ec B

EFi D

e Fp
A
Ec
EF
Ev
e Fn

C
EFi

Ev
p region n region

(b)

Fig 4.1 : (a) p and n region before equilibrium (b) pn junction at equilibrium as E F is straight line with zero
slo pe
Now let us look at p – n junction in another way:-
When p and n semiconductors are joined then at the metallurgical junction there is an abrupt change in
doping at the junction. Initially at the metallurgical junction, there is a very large density gradient in both the
electron and hole concentrations, Majority carrier electrons in the n region will begin diffusing into the p region
and majority carrier holes in the p region will begin diffusing into the n region. If we assume there are no
external connections to the semiconductor, then this diffusion process cannot continue indefinitely. As electrons
diffuse from the n region, positively charged donor atoms are left behind Similarly, as holes diffuse from the p
region, they uncover negatively charged acceptor atoms. The net positive and negative charges in the n and p
regions induce an electric field in the region near the metallurgical junction, in the direction from the positive
to the negative charge, or from the n to the p region.

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 110 Electronic Devices And Circuits

Na negative Nd positive
charge charge

B A
Space charge region

“Diffusion E-field “Diffusion

force” on force” on
holes electrons

E-field E-field
force on force on
holes electrons

Fig 4.2 : The space charge region, the electric field, and the forces acting on the charged carriers
The net positively and negatively charged regions are shown in Fig. 4.1. These two regions are referred
to as the space charge region. Essentially all electrons and holes are swept out of the space charge region by the
electric field. Since the space charge region is depleted of any mobile charge, this region is also referred to as
the depletion region; these two terms will be used interchangeably. Density gradients still exist in the majority
carrier concentrations at each edge of the space charge region. We can think of a density gradient as producing
a "diffusion force" that acts on the majority carriers. These diffusion forces, acting on the electrons and holes at
the edges of the space charge region, are shown in the figure. The electric field in the space charge region
produces another force on the electrons and holes which is in the opposite direction to the diffusion force for
each type of particle. In thermal equilibrium, the diffusion force and the E-field force exactly balance each other.

4.3 pn Junction Under Zero Bias

We have considered the basic pn junction structure and discussed briefly how the space charge region
is formed. In this section we will examine the properties of the step junction in thermal equilibrium, where no
currents exist and no external excitation is applied. We will determine the space charge region width, electric
field, and potential through the depletion region.

4.3.1 Built In Potential Barrier

The build in potential is potential difference between points A and B which will be same as potential
difference between points C and D (Fig 4.1(b)).
We can see that Vc – VD = Fn + Fp

EF EFi
Here Fn
e n side

EFi EF
and Fp
e p side

We know that if doping in n region is Nd and in p region is Na, thus in n side

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 P-N junction diode 111

EF EFi
n0 ni exp
kT

EF EF kT n
fn ln 0
e e ni
kT N
Fn ln d
e ni
Similarly in p side, p0 = Na and
EFi EF
p0 ni exp
kT
kT N
fp ln a
e ni
Vbi = Fp + Fn

kT N N
ln a 2 d …(4.1)
e ni

Another way to look at built in potential is that in Fig 4.1(a). Before forming the contact there is difference
in the Fermi level of p and n side, when the contact is made then fermi level of whole device become straight
line thus there is built in potential by which n side has to go down by EFn – EFp that make this happen in
equilibrium. Since band diagram of n side is going down thus it get high potential and
Vbi = gap between EFn and EFp
Vbi = Fn + Fp

Example 4.1

Consider a semiconductor bar with non uniform doping as shown in figure. Find out the
potential difference between point A and B.

n(x ) (cm –3)

1 × 1018

16
1 × 10

x
A B

Solution 4.1
We can see that with increase in x the doping reduces so the band diagram at equilibrium will be as shown
in figure. Since A is at lower level in band diagram but B is above A thus A is at higher potential than B
VA – VB = FA – FB
kT N kT N
ln A ln B
q ni q ni
where NA is doping at A and NB is doping at B.

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 112 Electronic Devices And Circuits

A B
Ec

EF
e
e FA
FB

EFi
Ev

kT NA
VA – VB ln
q NB
VA – VB= 0.1151 V

`Thus we can see that voltage difference between two points in semiconductor is
kT concentration of electrons at point p1
Vp1 – Vp2 ln
q concentration of electrons at point p2
ni2
Since we can write electron concentration
hole concentration
Thus
kT concentration of hole at point p2
Vp1 – Vp2 ln
q concentration of hole at point p1
Remember that these formulae written a above are valid at equilibrium only.
From the above example if we want to find potential difference between point A and B in figure 4.2 that
is built in potential :
kT electron concentration at A
VA – VB ln
q electron concentration at B

kT N kT NN
VA – VB ln 2 d ln a 2 d
q ni / Na q ni

Example 4.2

To calculate the built-in potential barrier in a pn junction.

Consider a silicon pn junction at T = 300 K with doping densites N a = 1 × 10 18 cm –3 and
N d = 1 × 10 15 cm –3 . Assume that n i = 1.5 × 10 10 cm –3 .
Solution 4.2
The built-in potential barrier is determined from Eq. (4.1) as

(10)18 (1015 )
Vbi (0.0259)ln 0.754 V
(1.5 1010 )2

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4.3.2 Electric Field

In space charge region or depletion region there is seperation between positive and negative charges so
electric field exist in space charge region. The electric field do not exist outside the space charge region and if
we assume that p and n sides are uniformly doped and its is an abrupt punction where the change in doping is
abrupt from p to n side then the charge densities will be as shown in Fig 4.3(b).
We will assume that the space charge region abruptly ends in the n region at x = + xn and abruptly ends
in the p region at x = –xp(xp is a positive quantity).
The electric field is determined from Poisson’s equation which, for a one-dimensional analysis, is

d2 ( x ) (x) dE( x )
…(4.2)
dx 2 s dx
where (x) is the electric potential, E(x) is the electric field, (x) is the volume charge density, and s
is the permitivity of the semiconductor. From Fig. 4.3, the charge densities are
( x ) = –eNa –xp < x < 0 …(4.3)
and
( x ) = eNd 0 < x < xn …(4.4)
The electric field in the p region is found by integrating Eq.(4.2), we have that
(x) eNa eNa
E dx dx x C1 …(4.5)
x s s

where C1 is a constant of integration. The electric field is assumed to be zero in the neutral p region for
x < –xp since the currents are zero in thermal equilibrium. As there are no surface charge densities within the
pn junction structure, the electric field is a continuous function. The constant of integration is determined by
setting E = 0 at x = –xp. The electric field in the p region is then given by
eNa
E (x xp ) xp x 0 …(4.6)
s
In the n region, the electric field is determined from

( eNd ) eNd
E dx x C2 …(4.7)
x x

where C2 is again a constant of integration. The constant C2 is determined by setting E = 0 at x = xn,

since the E-field is assumed to be zero in the n region and is a continuous function. Then
eNd
E ( xn x) 0 x xn …(4.8)
x
Maximum electric field will be at x = 0.
From Eq. (4.6) and Eq.(4.8), putting x = 0,
eNa eNd
we have Emax xp xn …(4.9)
x x
From Eq. (4.9) we have
Naxp = Naxn …(4.10)

Note: Equation (4.10) states that the number of negative charges per unit area in the p region is equal to the
number of positive charges per unit area in the n region.

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Fig 4.10(c) is a plot of the electric field in the depletion region. The electric field direction is from the
n to the p region, or in the negative x direction for this geometry(That’s why electric fied is shown in negative x
directions). For the uniformly doped pn junction, the E-field is a linear function of distance through the junction,
and the maximum (magnitude) electric field occurs at the metallurgical junction. An electric file exists in the
depletion region even when no voltage is applied between the p and n regions.

(a) p n

–x p +x n

–x p +
(b)
– 0 +x n
Space
charge

–x p 0 +x n
(c)
E-field

Vbi Electric
potential
0
(d) –x p xn

Fig 4.3 : (a) p-n junction diode (b) Charge stared in the space charge region (c) Electric filed created in the
depietion region due to the presence of uncovered charge (d) Variation of potential in depletion region
The potential in the junction is found by integrating the electric field. In the p region then, we have
eNa
(x ) E( x )dx ( x x p )dx …(4.11)
s
or

eNa x2
(x ) xp x C1 …(4.12)
s 2
where C1 is again a constant of integration. The potential difference through the pn junction is the
important parameter, rather than the absolute potential, so we may arbitrarily set the potential equal to zero at
x = –xp. The constant of integration is then found as
eNa
C1 x 2p …(4.13)
2 s
so that the potential in the p region can now be written as
eNa
(x ) ( x x p )2 ( x p x 0) …(4.14)
2 s
The potential in the n region is determined by integrating the electric field in the n region, or
eNd
(x) ( xn x )dx …(4.15)
s

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 P-N junction diode 115

Then

eNd x2
(x ) xn x C2 …(4.16)
s 2
where C2 is another constant of integration. The potential is a continuous function, so setting Eq.(4.14)
equal to Eq.(4.16) at the metallurgical junction, or at x = 0, gives
eNa
C2 x 2p …(4.17)
2 s

The potential in the n region can thus be written as

eN d x2 eN a
(x ) xn x x p2 (0 x xn ) …(4.18)
s 2 2 s

Fig 4.3(d) is a plot of the potential through the junction and shows the quadratic dependence on distance.
The magnitude of the potential at x = xn is equal to the built-in potential barrier. Then from Eq.(4.18) we have
e
Vbi | (x x n )| ( Nd x n2 Na x p2 ) …(4.19)
2 s

4.3.3 Space Charge W idth

We can determine the distance that the space charge region extends into the p and n regions from the
metalurgical junction. This distance is known as the space charge width. From Eq.(4.10), we may write, for
example
Nd x n
xp …(4.20)
Na
Then, substituting Eq.(4.20) into Eq. (4.19) and solving for xn, we obtain
1/2
2 s Vbi Na 1
xn …(4.21)
e Nd Na Nd
Equation (4.21) gives the space charge width, or the width of the depletion region, xn extending into
the n-type region for the case of zero applied voltage.
Similarly, if we solve for xn from Eq.(4.10) and substitute into Eq.(4.19), we find

1/2
2 s Vbi Nd 1
xp …(4.22)
e Na Na Nd

where xp is the width of the depletion region extending into the p region for the case of zero applied
voltage.
The total depletion or space charge width W is the sum of the two components, or
W = xn + xp …(4.23)
Using Eqs.(4.21) and (4.22), we obtain

1/2
2 s Vbi Na Nd
W …(4.24)
e Na Nd

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The built-in potential barrier can be determined from Eq. (4.1), and then the total space charge region
width is obtained using Eq.(4.24)

Note: Equation (4.9) describes the maximum electric field present in the metallurgical junction.
Using Eq.(4.21) in Eq.(4.9) gives

1/2
e 2 s Vbi Na Nd 2Vbi
Emax …(4.25)
s e Na Nd W

Example 4.3

To calculate the space charge width and electric field in a pn junction

Consider a silicon pn junction at T = 300 K with doping concentrations of N a = 10 16 cm –3
and N d = 10 15 cm –3 .
Solution 4.3
The built-in potential barrier is Vbi = 0.635 V. The space charge width is
1/2
2 s Vbi Na Nd
W
e Na Nd

2(11.7)(8.85 1014 )(0.635) 1016 1015

1.6 10 19 (1016 )(1015 )
= 0.951 × 10–4 cm = 0.951 m
we can find xn = 0.864 m, and xp = 0.086 m.
The peak electric field at the metallurgical junction, using Eq. for example, is
eNd x n (1.6 10 19 )(1015 )(0.864 10 4 )
Emax
s (11.7)(8.85 10 14 )
= –1.34 × 104 V/cm

REMEMBER • Emax will occur at junction always.

• In any question if we have to find xn or xp always find W and then use
xn + xp = W
and xn Nd = Naxp

Na
Thus we get xn W
Na Nd
Nd
and xp W
Na Nd
• There is no need to learn formulae of xn and xp only learn formulae of W.
If we look at band diagram of Fig 4.1(b) then we can see that no carriers are moving. The movement of
electrons (iron ball) from conduction band of n side to conduction band of p side there is a potential barrier in
term of hill that electrons have to climb. This barrier is equal to eVbi (in electron volts). Similarly the holes that
are air bubbles wont to travel from valence band of p region to valence band of n region and there also they get
a barrier of eVbi (in eV) which they have to climb. At equilibrium no carriers are moving.

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4.4 pn Junction Under Reverse bias

There are two options of applying biasing around the pn junction, one option is to apply positive voltage
to n region and other option is to apply negative voltage to n region. Whenever a bias is applied then Fermi level
of the device will no more be a straight line with zero slope as now device is not at equilibrium any more.
When biasing is done such that positive voltage is applied to n-region and thus the band diagram of
n region move down by amount of eVR as shown in Fig 4.4. The external applied voltage supports the internal
electric field present inside space charge region. Thus the potential across the depletion region will be
Vdep region = (Vbi + Va)
Thus the electric field inside the depletion region increases. Since electric field is present due to seperation
of positive and negative charges. Since electric field is more inside depletion region thus number of positive and
negative charges must increase thus for a given impurity doping concentration the number of positive and
negative charges will increase only if the space charge width W increase. Thus in this kind of blasing width of
depletion region will increase.

p n

Va = VR

(a)
p p
Ec n n

eVbi
EFi e(Vbi + VR)
e Fp

EF EFp
Ev eVR Ec
EFn
e F

Ev
(b) (c)
Fig 4.4 : (a) pn junction biased with positive voltage applied at n region.
(b) band diagram at equilibrium (c) band diagram of biased pn junctions.
While drawing band diagram of biased pn junction we can have assumed that potential of n region go
above potential of p region by VR, volts thus n side of band diagram move down by eVR, as shown in Fig 4.4(c).
Now the barier seen by electrons in conduction band of n region to go into conduction band of p region increase
thus there is no chance that electrons can move, similarly barrier for holes in valence band of p region also
increase and they cannot go into valence band of n region. Thus this kind of biasing further stop flow of carriers
and this is called reverse biasing of pn junction.

4.4.1 Space Charge Width and Electric Field

The depletion width will increase as we have already discussed. The depletion width can be found by
replacing Vbi by Vbi + VR in equation (4.24)

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Thus

1/2
2 s ( Vbi VR ) Na Nd
W …(4.26)
e Na Nd

showing that the total space charge width increases as we apply a reverse-bias voltage.

Eapp

E
p n

VR
+ –

Fig 4.5 : A pn junction, with an applied reverse-bias voltage, showing the directions of
the electric field induced by V R and the space charge electric field
We can find xn and xp, width of depletion region simly by using eq.(4.26) and
xn + xp= W
Naxp = Ndxn
Similarly maximum value of electric field will be

2( Vbi VR )
Emax …(4.27)
W

Example 4.4

To calculate the width of the space charge region in a pn junction when a reverse-bias
voltage is applied.
Again, consider a silicon pn junction at T = 300 K with doping concentrations of
N a = 10 16 cm –3 and N d = 10 15 cm –3 . Assume that n i = 1.5 × 10 10 cm –3 and let V R = 5 V.
Solution 4.4
The built-in potential barrier is Vbi = 0.635 V. The space charge width is determined as
1/2
2(11.7)(8.85 10 14 )(0.635 5) 1016 1015
W
1.6 10 19 (1016 )(1015 )
so that
W = 2.83 × 10–4 cm = 2.83 m

4.5 pn Junction Under Forward Bias

If we bias the pn junction such that negative voltage is applied at n region. Thus the n side of the band
diagram will move up by eVF, VF is forward bias applied since negative voltage is applied at n side thus the
external electric field will appose the internal electric field thus net electric field inside the depletion region will
reduce and thus the depletion region width will also reduce.

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 P-N junction diode 119

Ec

e(Vbi – VF)
EFi
p n
Ec
EFp eVF EFn
Ev
EFi
VF

(a) (b)
Fig 4.6 : (a) forward biased pn junction (b) band diagram of forward biased pn junction at equilibrium
When the barrier seen by electrons and holes at equilibrium movement was eVbi then no carrier move
but at this kind of biasing when barrier reduce so the carriers will start moving, electron will move from n region
to p region and holes will move from p region to n region. Thus current will flow through the device.

4.5.1 Space Charge and Electric Field

The electric field Eapp is opposite to the internal depletion region electric field E which means that the
magnitude in the space charge region must decrease below the thermal equilibrium value due to applied voltage.
As we know that electric field originates on positive charge and terminates on negative charge, this means that
the number of charges or electrons and holes must decrease and hence the depletion space charge width W
decreases. Therefore, W decreases with an increasing forward bias VF. We know that electric fields in neutral p
and n regions are at least very small or zero. Now the built-in barrier potential can be replaced by total potential
barrier and the total space charge width can be written as
1/2
2 s ( Vbi VR ) Na Nd
W …(4.28)
e Na Nd

Eapp

p n
E

VF
+ –

Fig 4.7 : A p-n junction under forward bias showing applied field and internal electric field
The magnitude of electric field in the depletion region decreases with an applied forward bias voltage.
The maximum electric field in the pn junction is given by

2
E= (Vbi VF )
W

4.6 Depletion capacitance of the pn junction

We know that in reverse bias pn junction has positive and negative charges stored in depletion region

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 120 Electronic Devices And Circuits

and when the applied voltage change the width of depletion region also change due to which the amount of
charge stored also changes. Thus due to V there in Q inside the pn junction thus there is capacitance,
Q
C
V
charge density
p n
–eNd
–x p
x
xn
–eNa
VR
w

(a) (b)
charge density
p n
–eNd dQ
–(x p + dx p) –x p
x
x n x + dx
n n

–eNa
VR + VR –dQ
w
(c) (d)
Fig 4.8 : (a) pn junction width reverse bias of V R (b) charge density of pn junction shown in fig. 4.8(a)
(c) pn junction with reverse bias of V R + V R (d) charge density of pn junction shown in fig. 4.8 (c)
Since dQ' = eNddxn = eNadxp …(4.30)
dQ dx n
Thus = C' eN d …(4.31)
dVR dVR
Here dQ' is charge per unit area thus capacitance (C') will also be per unit are. We know that
1/2
2 s ( Vbi VR ) Na 1
xn …(4.32)
e Nd Na Nd
The junction capacitance can be written as
dQ dx n
C' eNd …(4.33)
dVR dVR
so that
1/2
e Na Nd
s
C' …(4.34)
2( Vbi VR )( Na Nd )
Exactly the same capacitance expression is obtained by considering the space charge region extending
into the p region xp.
If we compare Eq.(4.26) for the total depletion width W of the space charge region under reverse bias
and Eq. (4.34) for the junction capacitance C', we find that we can write

s
C' …(4.40)
W
Equation (4.40) is the same as the capacitance per unit area of a parallel plate capacitor. Considering
Fig. 4.8 we may have come to this same conclusion earlier. Keep in mind that the space charge width is a

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 P-N junction diode 121

function of the reverse bias voltage so that the junction capacitance is also a function of the reverse bias voltage
aplied to the pn junction.

Depletion
capacitance

–4 –3 –2 –1 0

Reverse bias (V)

Fig 4.9 : Variation of depletion capacitance with reverse bias

REMEMBER Since depletion width

W VR
When pn junction is reverse biased and VR >> Vbi. Thus depletion capacitance which is also
called transition capacitance will be

1
C
VR

4.7 One Sided pn Junction

We know that the region which has more doping will have less depletion width. Thus if
Nd > Na then xn < xp and if Nd < Na then xp < xn. Suppose we have a pn junction with heavly doped p side that
is
Na >> Nd
then x n >> xp

2 ( Vbi VR )
and W xn
q Nd

This type of junction is p+n junction

Thus maximum electric field will be

eNd x n eNd W
Emax

The junction capacitance of p+n junction will be

s e s Nd
C' …(4.41)
W 2( Vbi VR )

The depletion layer capacitance of a one-sided junction is a function of the doping concentration in the

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low-doped region. Equation 4.41 may be manipulated to give

2
1 2( Vbi VR )
…(4.42)
C e s Nd

–x p +

+x n
(a) Space charge
distribution

p –eNa –
p+ n
+eNd
–x p +
–x p 0
+x n (b) Electric-field
distribution
–Emax

1
C 2

– 2
Slope =
–eNa e sNd

–Vbi 0 VR

Fig 4.10 :Space charge density of a Fig 4.11 :Distribution of (a) space-change
2
+
one-sided p n junction (b) electric-field, and (c) (1/C') versus V of a
2
R

uniformly doped pn
which shows that the inverse capacitance squared is a linear function of applied reverse-bias voltage.
Figure 4.11 shows a plot of Eq. (4.42). The built-in potential of the junction can be determined by
extrapolating the curve to the point where (1/C')2 = 0. The slope of the curve is inversely proportional to the
doping concentration of the low-doped region in the junction; thus, this doping concentration can be
experimentally determined. The assumptions used in the derivation of this capacitance include uniform doping
in both semiconductor regions, the abrupt junction approximation, and a planar junction

Example 4.5

To determine the impurity doping concentrations in a p + n junction given the parameters

from Figure 4.11
Assume a silicon p + n junction at T = 300 K with n i = 1.5 × 10 10 cm –3 . Assume that the
intercept of the curve in Fig. 4.11 gives V bi = 0.855 V and that the slope is 1.32 × 10 15
( F / c m 2) –2( V ) –1.
Solution 4.5
The slope of the curve in Fig. 4.11 given by 2/e sNd, so we may write
2 2
Nd
e s (slope) (1.6 10 19
)(11.7)(8.85 10 14
)(1.32 105 )
or Nd = 9.15 × 1015 cm–3
From the expression for Vbi, which is

Na Nd kT NN
Vbi Vi ln ln a 2 d
ni2 e ni

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 P-N junction diode 123
we can solve for Na as

ni2 eVbi (1.5 1010 )2 0.855

Na exp exp
Nd kT 9.15 10 15
0.0259
which yields
Na = 5.34 × 1018 cm–3

4.8 Non uniformly doped junctions

In the pn junctions considered so far, we have assumed that each semiconductor region has been uniformly
doped. In actual pn junction structures, this is not always true. In some electronic applications, specific nonuniform
doping profiles are used to obtain special pn junction capacitance characteristics.

4.8.1 Linearly Graded Junctions

If we start with a uniformly doped n-type emiconductro, for example, and diffuses acceptor atoms through
the surface, the impurity concentrations will tend to be like those shown in Fig. 4.12(a). The point x = x' on the
figure corresponds to the metallurgical junction. The depletion region extends into the p and n regions from the
metallurgical junction as we have discussed previously. The net p-type doping concentration near the metallurgical
junction may be approximated as a linear function of distance from the metallurgical junction. Likewise, as a
first approximation, the net n-type doping concentration is also a linear function fo distance extending into the
n region from the metallurgical junction. This effective doping profile is referred to as a linearly graded junction.
p region n region

Na
Impurity conc.

Nd
(a)

Surface x=0

Space charge
density
–x 0 +
–
(b)
x0

–eNa

–x 0 0 x0
(c)
Electric field

Vbi Potential
(d)
Fig 4.12 : (a) impurity concentrations of a pn junction with a nonuniformly doped p region
(b) Space charge density in a linearly graded pn junction (c) electric field (d) Potential

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 124 Electronic Devices And Circuits

Fig 4.12(b) shows the space charge density in the depletion region of the linearly graded junction. For
convenience, the metallurgical junction is placed at x = 0. The space charge density can be written as
(x ) = eax …(4.43)
where a is the gradient of the net impurity concentration.
The electric field and potential in the space charge region can be determined from Poisson’s equation.
We can write

dE (x) eax
…(4.44)
dx s s

so that the electric field can be found by integration as

eax ea
E dx (x2 x02 ) …(4.45)
s 2 s
and maximum electric field is given by
ea W
Emax|x = 0 x02 , where, x0
2 s 2

ea W2 eaW2
Emax|x = 0 …(4.46)
2 s 2 8 s

The electric field in the linearly graded junction is a quadratic function of distance rather than the
linear function found in the uniformly doped junction. The maximum electric field again occurs at the
metallurgical junction. We may note that the electric field is zero at both x = +x0 and at x = –x0. The
electric field in a nonuniformly doped semiconductor is not exactly zero, but the magnitude of this field is small,
so setting E = 0 in the bulk regions is still a good approximation.
The potential is again found by integrating the electric field as

(x ) Edx …(4.47)

If we arbitrarily set = 0 at x = –x0, then the potential through the junction is

ea x 3 ea
(x ) x02 x x03 …(4.48)
2 s 3 3 s

The magnitude of the potential at x = +x0 will equal the built-in potential barrier for this function. We
then have that

2 eax03
( x 0) Vbi …(4.49)
3 s

eaW3
So Vbi ,
12 s

W
Putting x0
2

12 s Vbi
and W3 …(4.50)
ea
For applied reverse bias of VR,
1/3
12 s ( Vbi VR )
W1
ea

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 P-N junction diode 125

So, we get a depletion layer width (applied voltage)1/3.

Now to calculate the depletion capacitance we apply a reverse bias voltage across pn junction and then
applied voltage is changed by dV and change in stored charge is calculated dQ' the capacitance will be

dQ
C'
dV
Thus charge density for applied voltage VR + dV is shown in Fig 4.13

charge density
charge density
eax o eax o
dQ

–x o –(x 0 + dx 0)–x o
x
xo x o x o + dx o

–eax o –dQ –eax o

(a) (b)

Fig 4.13 : (a) Charge density when voltage applied is V R (b) charge density when voltage applied is V R + dV R .
Thus dQ' = (dx0)e ax0
We assume the figure whose area give dQ' as rectangular, dQ' has unit of coulomb/cm2 that is charge per
unit area, thus
dQ dx0
C' eax0
dVR dVR
Here C' is capacitance per unit area
Thus
dx0
C' eax0
dVR
W
Since x0
2

aW dW
C' e
4 dVR
1/3 1/3
12 s VR 12 1 2 /3
ea VR
ea ea 3
2/3
ea 12 s
C' VR 1/3
3 ea

C' VR 1/3

4.8.4 Hyper Abrupt Junction

In the previous case we assumed that doping profile was linearly related to x, we may have case where
the charge density in space charge region is non linearly related to x, that is
doping xm

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When m = 0 means uniform doping abrupt junction m = 1 means linearly graded junction.
We have seen that when m = 0 then

W (Vbi VR )1/2 and C (Vbi VR ) 1/2

and when m = 1 then
W (Vbi + VR)1/3 and C' (Vbi + VR)–1/3
Thus general is

W (Vbi VR )1/m 2
and C (Vbi VR ) 1/m 2

Thus if capacitance at certain value of VR is given then by using value of m we can find capacitance at
any other reverse bias voltage. These pn junctions which are used as capacitances whose value can be changed
by changing voltage are voltage variable capacitances and are called varactor diode.

Example 4.6

The pn junction has doping in p region and n region as N a = 1 × 10 16 / cm 3 and

N d = 1 × 10 15 / cm 3. If Electric field inside depletion region is shonw in figure.
Find out is the device in forward bias or reverse bias, the location of the junction.
(take n i = 1 × 10 10 / cm 3 and T = 300 K)

–5 1 3
x ( m)

10 mV/m

Solution 4.6
Given that Na = 1 × 1016/cm3, Nd = 1 × 1015 / cm3, thus built in voltage will be

kT NN
Vbi ln a 2 d
q ni
Vbi = 0.6550 V
The total potential across depletion region will be equal to area under electric field curve. Thus total
potential across depletion region is
1 Mv
Vdep 10 8 m
2 m
Vdep = 40 V
Since Vdep > Vbi thus device is in reverse bias also the reverse bias applied will be
Vbi + VR = 40
VR = 40 – Vbi
VR = 39.344 V
The junction will be at x = 1 m because electric field is always maximum at junction.

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 P-N junction diode 127

Example 4.7

Consider a n – n + junction made between two n type semiconductors with

Nd = 1 × 1015 / cm3 and Nd = 1 × 1018 / cm3. Find out the build in potential, take T = 300K
and n i = 1 × 10 10 / cm 3 .
Solution 4.7
If we draw band diagram before connecting the two n type semiconductor, since n+ is heavily doped thus
band diagram will be as shown in figure

n region n+ region
Ec Ec
EFn EFn
+

electron will flow

EFi EFi

Ev Ev

Taking the analogy of two tanks with water level shown by Fermi level so electron will flow from n+ to n
region thus when electron will flow from n+ to n region then they leave behind uncovered positive ions and
at equilibrium the fermi level of whole device becomes a straight line with zero slope thus band diagram will
be

n region A n+ region
Ec

B
EF C

Ev

The n+ region is at higher potential than n region thus built in potential is

kT concentration of electrons at B
VB – VA ln
q concentration of electrons at A

kT 1 1018
ln
q 1 1015

Vbi = 0.1784 V
The electric field can be obtained using poisson equation

dE
dx s

Thus between –2 m x –1 m the E(x) will be

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 128 Electronic Devices And Circuits

x
5 1015 e
E (x ) dx
2 s

(5 1015 )e
E (x ) ( x 2)
s

For E(x) between –1 m and 1 m electric field remain constant and for 1 m to 2 m since charge
density is negative so electric field fall or keep decreasing and at x = 2 m the electric field will be zero as
electric field is zero outside depletion region. Thus electric field will be
E(x )
0.908 mV/cm

x ( m)
–2 –1 1 2

The electric field at x = 0 is 9.0 & 5 mV/cm. The applied voltage will be (assuming built in to be zero)
area under electric field plot. Thus

1
Vapplied (2 4) 10 4
0.980 mV/cm
2
= 3 × 98 = 294 V

Example 4.8

A silicon PIN junction has the doping profile as shown in figure (a). The I region corresponds
to ideal intrinsic region in which there is no impurity doping concentration. A reverse bias
is applied such that depletion width extends from –2 m to 2 m. Find out magnitude of
electric field at x = 0 and the reverse bias voltage applied to get this condition.
(Nd – Na)/cm
3

15
5×10
1 2
x
–2 –1
15
–5×10

I region
Solution 4.8
The n type region with Nd = 5 × 1015 /cc exist for x < –1 m and p type region will exist for x > 1 m. The
charge density will be
charge density(cm –3)

5×10 e
15

1 2
x
–2 –1
15
–(5×10 )e

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 P-N junction diode 129

The electric field can be obtained using poisson equation

dE
dx s

Thus between –2 m x –1 m the E(x) will be

x
5 1015 e
E (x ) dx
2 s

(5 1015 )e
E (x ) ( x 2)
s

For E(x) between –1 m and 1 m electric field remain constant and for 1 m to 2 m since charge
density is negative so electric field fall or keep decreasing and at x = 2 m the electric field will be zero as
electric field is zero outside depletion region. Thus electric field will be
E(x)
0.908 MV/cm

x( m)
–2 –1 1 2

The electric field at x = 0 is 9.085 MV/cm. The applied voltage will be (assuming built in to be zero)
area under electric field plot. Thus

1
Vapplied (2 4) 10 4
0.980 mV/cm
2
= 3 × 98 = 294 V
1
Vapplied (2 4) 10 4
0.980 mV/cm
2
= 3 × 98 = 294 V

4.9 pn Junction Current

We have observed that when the pn junction is forward biased then the barrier seen by the carriers will
reduce, also the electric field inside the depletion region will reduce. At equilibrium we know that the diffusion
of electron from n side to p side and diffusion of holes from p side to n side is stopped due to electric field that
generate inside the depletion region. Thus when forward bias is applied then electric field reduces so the
carriers can diffuse. Let us observe the band diagram at equilibrium, as shown in Fig 4.13(a) the potential
barrier seen by electron (electron are iron ball and it is difficult to climb the hill of barrier) and holes (holes are
air bubbles and have to go down to move from p region to n region). Fig 4.13(b) shows the energy-band diagram
of a reverse-biased pn junction. The potential of the n region is positive with respect to the p region so the Fermi
energy in the n region is lower than that in the p region. The total potential barrier is now larger than for the
zero-bias case, so the barrier increase and the holes, electron will not move. Fig 4.13(c) now shows the energy-
band diagram for the case when a positive voltage is applied to the p region with respect to the n region. The
Fermi level in the p region is now lower than that in the n region. The total potential barrier is now reduced. The

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 130 Electronic Devices And Circuits

smaller potential barrier means that the electric field in the depletion region is also reduced. The smaller
electric field means that the electrons and holes are no longer held back in the n and p regions, respectively.
There will be a diffusion of holes from the p region across the space-charge region where they now will flow into
the n region. Similarly, there will be a diffusion of electrons from the n region across the space-charge region
where they will flow into the p region. The flow of charge generates a current through the pn junction.
VR VR
– + – +

W W W

p n p n p n

E E E

e(Vbi – Va )
Ec
eVbi
EFn
e(Vbi + VR)
EFp EFn EFp EFp
Ev
EFn

(a) (b) (c)

Fig 4.13 : a pn junction and its associated energy-band diagram for
(a) zero bias, (b) reverse bias, and (c) forward bias
Thus holes will inject into n-region and electrons will inject into p-region. These carriers will be minority
carriers in the region and they will diffuse and will recombine also.

REMEMBER Thus carriers will cross the depletion region through diffusion. Thus we say that current flow in
diode or pn junction. Always remember that minority carriers produce effective current by
diffusion.

4.9.1 Ideal Current voltage Relationship

We will assume that the p-n junction is an abrupt junction and semiconductor is neutral outside the
depletion region, also the excess minority carrier that enter the region satisfy low level injection that is excess
minority carrier are less than doping of the region

Table 4.1 : Commonly used terms and notation for this chapter
Na Acceptor concentration in the p region of the junction
Nd Donor concentration in the n region of the pn junction
nn0 = Nd Thermal equilibrium majority carrier electron concentration in the n region
ppo = Na Thermal equilibrium majority carrier hole concentration in the p region

ni2
np0 Thermal equilibrium minority carrier electron concentration in the p region
Na

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 P-N junction diode 131

ni2
pn0 Thermal equilibrium minority carrier hole concentration in the n region
Nd
np Total minority carrier electron concentration in the p region
pn Total minority carrier hole Concentration in the n region
np(–xp) Minority earner electron concentration in the p region at the space-charge edge
pn (x n ) Minority carrier hole concentration in the n region at the space charge edge
np = np – np0 Excess minority carrier electron concentration in the p region
pn = pn – pn0 Excess minority carrier hole concentration in the n region

We know that potential difference between two points

kT concentration of electrons at point p1

Vp1 – Vp2 ln
q concentration of electrons at point p2

At thermal equilibrium, across the depletion region

Vp1 – Vp2 = Vbi
where p1 is point at edge of depletion region and n region and p2 is point at edge of depletion region and
p side.
Thus electron concentration at p1 is nn0
nn0 = Nd
and electron concentration at p2 is np0
ni2
np0
Na
kT NN
Vbi ln a 2 d
q ni
also we get that
eVbi
np0 nn0 exp …(4.52)
kT
This equation relates the minority carrier electron concentration on the p side of the junction to the
majority carrier electron concentration on the n side of the junction in thermal equilibrium.
If a positive voltage is applied to the p region with respect to the n region, the potential barrier is
reduced. Fig 4.14(a) shows a pn junction with an applied voltage Va. The electric field in the bulk p and n
regions is normally very small. Essentially all of the applied voltage is across the junction region. The electric
field Eapp induced by the applied voltage is in the opposite direction to the thermal equilibrium space charge
electric field, so the net electric field in the space charge region is reduced below the equilibrium value. The
delicate balance between diffusion and the E-field force achieved at thermal equilibrium is upset. The electric
field force that prevented majority carriers from corssing the space charge region is reduced; majority carrier
electrons from the n side are now injected across the depletion region into the p material, and majority carrier
holes from the p side are injected across the depletion region into the n material. As long as the bias Va is
applied, the injection of carriers across the space charge region region continues and a current is created in the
pn junction. This bias condition is known as forward bias; the energy-band diagram of the forward-biased pn
junction is shown in Fig 4.14(b)

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 132 Electronic Devices And Circuits

Wp Eapp Wn p n
– – – +++
E Ec
p – – – +++ n e( Vbi – Va)
– – – +++ EFi EFn
eVa
EFp
Ev

+ Va –

(a) (b)
Fig 4.14 : (a) A pn junction with an applied forward-bias voltage showing the directions of the electric field
induced by V a and the space charge electric field. (b) Energy-band diagram of the forward-biased pn junction
The potential barrier Vbi in Eq.(4.52) can be replaced by (Vbi – Va) when the junction is forward biased.
Equation (4.52) becomes
e( Vbi Va ) eVbi eVa
np nn0 exp nn0 exp exp ...(4.53)
kT kT kT
If we assume low injection, the majority carrier electron concentration nn0. for example, does not change
significantly. However, the minority carrier concentration, np, can deviate from its thermal-equilibrium value
np0 by orders of magnitude. Using Eq.(4.52), we can write Eq.(4.53)
eV a
np n p 0 exp
kT
When a forward-bias voltage is applied to the pn junction, the junction is no longer in thermal equilibrium.
The left side of Eq.(4.54) is the total minority carrier electron concentration at the edge of depletion region and
p region, which is now greater than the thermal equilibrium value. The forward-bias voltage lowers the potential
barrier so that majority carrier electrons from the n region are injected across the junction into the p region,
thereby increasing the minority carrier electron concentration. We have produced excess minority carrier
electrons in the p region.
Similar to this due to forward bias the holes will inject into n region. Thus we will get that at the edge of
space charge region in n-region the hole concentration will be
eVa
pn pn0 exp …(4.55)
kT
Thus when forward bial of Va is applied across pn junction then excess minority carrier at the edges of
the space charge region will be as shown in Fig 4.15
p n
p n(x n) = p n0 exp eVa
kT
Hole injection
Electron injection
np(–x p) = np0 exp eVa
kT

p n0
np 0
–x p x = 0 x n
Fig 4.15 : Excess minority carrier concentrations at the space charge edges generated by the forward bias
voltage

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 P-N junction diode 133

As the excess minority carrier move inside the region then they will recombine and will reduce. That is
eVa
if at xn total hole concentration is pn0 exp but as we go inside n region hole concentration will reduce to
kT
pn0. The total hole concentration at edge of space charge region in n region is pn, and pn0 was hole concentration
already present in n region.
Thus
excess hole concentration = pn – pn0
eVa
pn0 exp 1 …(4.56)
kT
and excess electron concentration at edge of space charge region in p side is
eVa
np – np0 np0 exp 1 …(4.57)
kT

Example 4.9

To calculate the minority carrier hole concentration at the edge of the space charge region
of a pn junction when a forward bias is applied.
Consider a silicon pn junction at T = 300 K so that n = 1.5 × 1010 cm –3 . Assume the n -type
doping is 1 × 10 16 cm –3 and assume that a forward bias of 0.60 V is applied to the pn
junction. Calculate the minority carrier hole concentration at the edge of the space charge
region.
Solution 4.9
From Eq.(4.55), we have
eVa
pn pn0 exp
kT
The thermal-equilibrium minority carrier hole concentration is
ni2 (1.5 1010 )2
pn 0 2.25 104 cm 3
Nd 1016
We then have
0.60
pn 2.25 104 exp 2.59 1014 cm 3
0.0259

4.9.2 Distribution of minority carrier

When pn junction is in forward bias then continuously holes will diffuse from p region to n region and
electrons will diffues from n region to p region. So we can visualise the case as shown in Fig 4.16
electrons
holes
np pn

p region n region

np0 pn0
–x n xn

Fig 4.16 : Visualising minority carriers movement

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 134 Electronic Devices And Circuits

Here holes fall on n region and electrons fall on p region and at x = xn hole concentration will be pn and
at x = – xp electron concentration will be np. Since there is no electric field inside neutral region and with
increase in x hole concentration in n region will reduce due to recombination and hole concentration will be
equal to pn0 at x = and electron concentration in p-region will also reduce as we go deep inside p-region and
at x = – the electron concentration will be np0
So clearly with all knowledge from chapter 3 we get
eVa
pn (x n ) pn0 exp
kT
eVa
np(–xp) np0 exp
kT

pn(x ) = pn0
np(x – ) = np0
We assume that width of n and p region is very large (Wn >> Lp and Wp >> Ln) with respect to
diffusion length of minority carriers. Thus

eVa xn x
pn ( x ) pn0 pn0 exp 1 exp …(4.58)
kT Lp

eVa xp x
and n p (x ) np0 np0 exp 1 exp …(4.59)
kT Lp

The excess minority carrier will be

eVa xn x
pn ( x ) pn ( x ) pn0 pn0 exp 1 exp …(4.60)
kT Lp

eVa xp x
and np(x ) np ( x ) np0 np0 exp 1 exp …(4.61)
kT Lp
p n
The minority carrier concentrations decay
exponentially with distance away from the junction to
their thermal equilibrium values. Fig 4.17 shows these
results. Again, we have assumed that both the n-region
and the p-region lengths are long compared to the pn (x)
minority carrier diffusion lengths. np(x)
To review, a forward-bias voltage lowers the
p n0
built-in potential barrier of a pn junction so that np0
electrons from the n region are injected across the
–x p x = 0 x n
space charge region, creating excess minority carriers Fig 4.17 Steady state minority carrier concentration
in the p region. These excess electrons begin diffusing in a pn junction under forward bias
into the bulk p region where they can recombine with
majority carrier holes. The excess minority carrier electron concentration then decreases with distance from
the junction. The same discussion applies to holes injected across the space charge region into the n region.

4.9.2 Ideal pn Junction Current

We know that electric field is zero inside neutral region, thus at the edges of the space charge region in

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 P-N junction diode 135

n and p region the electric field will be zero thus drift current will be zero inside the depletion region and at
edges of depletion region. The total current will be sum of current due to diffusion of electron and holes. Thus
the total current in the pn junction will be sum of hole diffusion current at xn and electron diffusion current at
–xp. Thus electron and hole current densities will be as shown in Fig 4.18
Current
density
p n

Jtotal = Jp (x n) + Jn (–x p)
Jp (x n )

Jn(–x p)

–x p x = 0 x n
Fig 4.18 : Electron and hole current densities through the space charge region of a pn junction
We can calculate the minority carrier hole diffusion current density at x = xn from the relation
dpn ( x )
J p( x n ) eDp …(4.62)
dx x xn
Since we are assuming uniformly doped regions, the thermal-equilibrium carrier concentration is
constant, so the hole diffusion current density may be written as

d( pn ( x ))
J p( x n ) eDp …(4.63)
dx x xn

Taking the derivative of Eq.(4.60) and substituting into Eq.(4.63), we obtain

eDp pn0 eVa
J p( x n ) exp 1 …(4.64)
Lp kT
The hole current density for this forward-bias condition is in the +x direction, which is from the p to the
n region.
Similarly, we may calculate the electron diffusion current density at x = –xp. This may be written as
d( np ( x ))
Jn(–xp) eDn …(4.65)
dx x xp

Using Eq.(4.64), we obtain

eDn np0 eVa

Jn(–xp) exp 1
Ln kT

The electron current density is also in the +x direction.

An assumption we made at the beginning was that the individual electron and hole currents were
continuous functions and constant through the space charge region. The total current is the sum of the electron
and hole currents and is constant through the entire junction. Fig 4.18 shows a plot of the magnitudes of these
currents.
The total current density in the pn junction is then

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 136 Electronic Devices And Circuits

eDp pn0 eDn np0 eVa

J Jp ( x n ) Jn ( x p ) exp 1
Lp Ln kT

Equation (4.67) is the ideal current-voltage relationship of a pn junction.

We may define a parameter Js as

eDp pn0 eDn np0

Js
Lp Ln

so that equation (4.67) may be written as

eVa
J Js exp 1 …(4.69)
kT

Equation (4.69), known as the ideal-diode equation, gives a good description of the curent voltage
characteristics of the pn junction over a wide range of currents and voltages. Although Eq.(4.69) was derived
assuming a forward-bias voltage (Va > 0), there is nothing to prevent Va from being negative (reverse bias).
Equation (4.69) is plotted in Fig. 4.19 as function of forward-bias voltage Va. If the voltage Va becomes negative
(reverse bias) by a few kT/e V, then the reverse-bias current density becomes independent of the reverse-bias
voltage. The parameter Js is then referred to as the reverse saturation current density. The current-voltage
characteristics of the pn junction diode are obviously not bilateral.

p n
J
+ Va –

J
+ –
Va

–Js Va

Fig 4.19 : Ideal I – V characteristic of a pn junction diode

Example 4.10

To determine the ideal reverse saturation current density in a silicon pn junction at

T = 300 K. Consider the following parameters in a silicon pn junction:
Na = Nd = 10 16 cm –3 n i = 1.5 × 10 10 cm –3
D n = 25 cm 2/s p0 = n0 = 5 × 10 –7 s
D p = 10 cm 2 /s r = 11.7
Solution 4.10
The ideal reverse saturation current density is given by

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 P-N junction diode 137

eDn np0 eDp pn0

Js
Ln Lp
which may be rewritten as

1 Dn 1 Dp
Js eni2
Na n0 Nd p0

Substituting the parameters, we obtain Js = 4.15 × 10–11 A/cm2.

We can see that the excess minority carriers that produce diffusion current are decreasing as we go
deep inside the p and n region, thus diffusion current due to electron and hole will decrease as we go inside p
region and n region respectively. For example

eDp pn0 eVa xn x

Jp( x ) exp 1 exp ,( x xn ) …(4.70)
Lp kT Lp
and
eDn np0 eVa xp x
Jn ( x ) exp 1 exp ,( x xp ) …(4.71)
Lp kT Lp
Since total current will remain same but the minority carrier diffusion current will decrease exponentially
in each region. We have assumed that at the edges of the space charge region electric field is zero thus current
is due to diffusion only, but as we go into p and n region then diffusion current due to minority carrier decrease
thus the difference between total current and minority carrier diffusion current is current produced by movement
of majority carriers and thus they are called majority carrier current.

Note: Majority carrier current are always drift current

Fig 4.20 shows the various current components through the pn structure. The drift of majority carrier
holes in the p region far from the junction, for example, is to supply holes that are being injected across the
space charge region into the n region and also to supply holes that are lost by recombination with excess
minority carrier electrons. The same discussion applies to the drift of electrons in the n region.

Current
density
p n
JTotal

Majority carrier Majority carrier

hole current electron current
Jp( x n)
Jn(–x p)
Electron diffusion Hole diffusion
current current

–x p x = 0 x n

Fig 4.20 : Ideal electron and hole current components through a pn junction under forward bias

REMEMBER Majority carrier will always move by drifting, minority carrier will always move by diffusion

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 138 Electronic Devices And Circuits

The fact that we now have drift current densities in the p and n regions implies that the electric field in
these regions is not zero as we had originally assumed. We can calculate the electric field in the neutral regions
and determine the validity of our zero-field approximation.
We can see that deep inside n region current flow is only due to drifting of electrons and deep inside p
region current flow is only due to drifting of holes.

Example 4.11

To calculate the electric field required to produce a given majority carrier drift current.
Consider a silicon pn junction at T = 300 K with the parameters given in Example 4.10 and
with an applied forward-bias voltage V a = 0.65 V.
Solution 4.11
The total forward-bias current density is given by
eV
J Js exp 1
kT
We determined the reverse saturation current density in Example 7.2, so we can write

11 0.65
J (4.15 10 ) exp 1 3.29 A/cm2
0.0259
The total current far from the junction in the n-region will be majority carrier electron drift current, so
must be
Jn 3.29
E 1.52 V/cm
e n Nd (1.6 10 )(1350)(1016 )
19

Note: We assumed, in the derivation of the current-voltage equation, that the electric field in the neutral p and n
regions was zero. Although the electric field is very small compared to that present in the depletion region, but at
x >> Ln or x >> Lp, drift current dominates due to high concentration of majority carriers. Though the electric
field is not zero. In neutral region, the magnitude is very small, so the approximation of zero field in neutral region
is valid.
One very important observation is that the concentration of excess carrier that enter in a region depend
on the forward bias applied and doping of the region. That is
eVa
pn (x n ) pn0 exp 1
kT

ni2 eVa
pn (x n ) exp 1
ND kT

eVa
and np(– xp) np0 exp 1
kT

ni2 eVa
np(– xp) exp 1
Na kT

Thus the concentration of excess minority carrier is exponentially related to Va (applied voltage) and
inversely related to doping of the region

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 P-N junction diode 139

Note: Thus region which has higher doping will have lower concentration of excess minority carrier. Thus in
p n junction diode p region is heavily doped and n region is low doping. Thus for a forward bias voltage the
concentration of excess minority carrier in n region will be higher than excess minority carrier in p region. Thus
more holes will enter in n region and less electrons will enter in p region. Thus diffusion current due to holes will
be greater than diffusion current due to electrons.
Similarly in p n+ junction the electrons in p region will be more than holes in n region. Thus diffusion current due
to electrons will be more than diffusion current due to electrons holes.

4.9.3 Temperature Effects

The current in pn diode for applied voltage Va is
eVa
J Js exp 1 …(4.72)
kT
Here J is current density and Js is ideal reverse saturation current density.
eDn np0 eDp pn0
Js …(4.73)
Ln Lp
ni2 ni2
Here np0 ,p , thus Js ni2 .
Na n0 Nd
Since Js ni2 thus Js is avery strong function of temperature.For a silicon pn junction, the ideal reverse
saturation current density will increase by approximately a factor of two for every 10°C increase in temperature.
The forward-bias current-voltage relation was given by Eq.(4.69). This relation includes Js as well as the
eVa
exp factor, making the forward-bias current-voltage relation a function of temperature also. As temperature
e
kT
increases, less forward-bias voltage is required to obtain the same diode current. If the voltage is held constant,
the diode current will increase as temperature increases. The change in forward-bias current with temperature
is less sensitive than the reverse saturation current.

4.9.4 The Short Diode

We assumed in the previous section that the width of n and p region is large and the profile of the excess
minority carrier was exponentially decaying with respect to x. Now consider a case where width of n region is
smaller than Lp and width of p region is greater than Ln. When the width of n region is less than Lp then the
profile will not be exponential but a linear profile as shown in Fig 4.21
Wn

p n

–x p 0 xn
(a)
np pn

np0 p n0

x
–x p 0 xn
Wn + x n
(b)
Fig 4.21 : (a) pn diode with W n << L p (b) minority carrier concentration

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Thus

eVa x n Wn x
pn ( x ) pn0 exp 1 ,x xn …(4.74)
kT Wn

and the diffusion current due to excess holes in n region will be a constant
d pn ( x )
Jp eD p
dx
eDp pn0 eVa
exp 1 …(4.75)
Wn kT

The minority carrier hole diffusion current density now contains the length Wn in the denominator,
rather than the diffusion length Lp. The diffusion current density is larger for a short diode than for a long diode
since Wn << Lp. In addition, since the minority carrier concentration is approximately a linear function of
distance through the n region, the minority carrier diffusion current density is a constant. This constant current
implies that there is no recombination of minority carriers in the short region. Also, the minority carrier
concentration at n-type surface is greater than pn0.

4.10 Small-Signal Model of the pn Junction

Till now we have analyzed the dc characteristic of the pn junction diode but when a small signal is
applied across the junction then the characteristic of pn junction will change.

4.10.1 Diffusion Resistance

The ideal current-voltage relationship of the pn junction diode was given by Eq.(4.69), where J and Js
are current densities. If we multiply both sides of the equation by the junction cross-sectional area, we have

eVa
ID Is exp 1 …(4.76)
kT

where ID is the diode current and Is is the diode reverse saturation current.

1
Slope = r
d

I IQ

–Is Vo Va
V

Fig 4.22 : Curve showing the concept of the small-signal diffussion resistance

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 P-N junction diode 141

Assume that the diode is forward-biased with a dc voltage V0 producing a dc diode current IDQ. If we
now superimpose a small, low-frequency sinusoidal voltage as shown in Fig. 4.22, then a small sinosoidal current
will be produced, superimposed on the dc current. The ratio of sinusoidal current to sinusoidal voltage is called
the incremental conductance. In the limit of a very small sinusoidal current and voltage, the small-signal
incremental conductance is just the slope of the dc current-voltage curve, or

dID
gd …(4.77)
dVa Va V0
The reciprocal of the incremental conductance is the incremental resistance, defined as

dVa
rd …(4.78)
dVa Va V0

where IDQ is the dc quiescent diode current.

If we assume that the diode is biased sufficiently far in the forward-bias region, then the (–1) term can
be neglected and the incremental conductance becomes

dID e eV0 IDQ

gd Is exp …(4.78)
dVa Va V0
kT kT Vt
The small-signal incremental resistance is then the reciprocal function, or
Vt
rd …(4.80)
IDQ
The incremental resistance decreases as the bias current increases, and is inversely proportional to the
slope of the I–V characteristic as shown in Fig. 4.22. The incremental resistance is also known as the diffusion
resistance.

4.10.2 Diffusion capacitance

In reverse bias the diode has depletion capacitance or transition capacitance which is due to depletion
region of the structure. In forward bias also the capacitance exist because of diffusion of excess minority carriers,
Q
as we know that total amount of excess carrier present in a region depend on the applied voltage. Thus
V
exist in the structure the capacitance exist. If we take width of depletion region to be very small thus concentration
of minority carrier will be

p n
eVa
np0 exp eVa
kT pn0 exp
kT
np0
pn0
x
0

Fig 4.23 : Minority carrier concentration in pn diode in forward bias

Thus in n side the excess carrier concentration will be

eVa x
pn ( x ) pn0 exp 1 exp
kT Lp
Thus total excess carrier in n side will be

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 142 Electronic Devices And Circuits

Qp A e pn ( x )dx
0

where A is cross section area

eVa
Qp eALp pn0 exp 1 …(4.81)
kT
The diffusion current due to holes in n region is
eDp pn0 A eVa
Ip0 exp 1 …(4.82)
Lp kT
Similarly we can find total excess charge in p region

eVa
Qn eALn np0 exp 1 …(4.83)
kT

and diffusion current due to electrons in p region is

eDn np0 A eVa
In 0 exp 1 …(4.84)
Ln kT
Thus capacitance
dQ d(Qp Qn )
C
dV dVa
( eALp pn0 eALn np0 ) eVa
exp
kT / e kT
eALp pn0 eVa eALn np0 eVa
exp exp
VT kT VT kT

Using eq 4.84 and 4.82 we get that

1 L2p L2n
C Ip 0 I
VT Dp Dn n0
1
C p I p0 n In0 …(4.85)
VT
The expression of equation (4.85) show diffusion capacitance, here In0 is current due to electron diffusion
at edge of depletion region in p region, Ip0 is current due to hole diffusion current at edge of depletion region in
n region, n0 is electron lifetime at edge of depletion region in p region and p0 is lifetime of holes at edge of
depletion region in n region.
The diffusion capacitance tends to dominate the capacitance terms in a forward-biased pn junction. The
small-signal diffusion resistance can be fairly small if the diode current is a fairly large value. As the diode
current decreases, the diffusion resistance increases. We will consider the impedance of forward-biased pn
junctions again when we discuss bipolar transistors.
We can see that excess electrons and holes are present in a pn diode when it is forward biased. This

eVa
phenomenon is called charge storage. Clearly the stored charge is proportional to p n 0 exp 1 and
kT

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 P-N junction diode 143

eVa
n p 0 exp 1 . Therefore, the stored charge, Q (coulombs), is proportional to I, which is also proportional
kT

to eeV/kT – 1.
Q I
There is a simple explanation to this proportionality. I is the rate of minority charge injection into the
diode. In steady state, this rate must be equal to the rate of charge recombination, which is Q/ s .
Q
I
s
sis called the charge-storage time. In a one-sided junction, s is the recombination lifetime on the
lighter-doping side, where charge injection and recombination take place. In general, s is an average of the
recombination lifetimes on the n side and the p side. In any event, I and Q are simply linked through a charge-
storage time.
4.10.3 Small Signal Equivalent Circuit of Diode
For small signals the diode act as a resistor in parallel to diffusion and junction or depletion capacitanace.
Also an element rs is added which represent the resistance of neutral region. Thus the model will be as shown in
Fig 4.24
rd

rs

ID Cd

Cj

Va

Vapp

Fig 4.24 : Complete small-signal equivalent circuit of pn junction

4.11 Minority Carrier Profile in case of reverse bias

When reverse bias is applied across the pn junction diode then electric field will increase inside the
depletion region and we can see that the direction of electric field inside depletion region is from n region to p
region as shown in Fig. 4.25

p n

VR
Fig 4.25 : pn junction in reverse bias

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As we know that here diffusion of holes from p region to n region and diffusion of electron from n region
to p region will be stopped, but due to very large electric field inside depletion region the holes that will be
present at the edge of depletion region in n side will be swept to p region and electrons at the edge of depletion
region in p side will be swept to n side thus minority carrier holes in n region will be zero at edge of depletion
region and minority carrier electrons in p region will be zero at edge of depletion region. Thus the minority
carrier profile keeping in mind that minority carrier at edges of depletion region will be zero and far away from
edges inside neutral region will be equal to thermal equilibrium concentration. Thus minority carrier profile is
minority carrier profile

pn0
np0

x
Fig 4.26 : minority carrier profile in reverse bias pn junction
Here we have assumed that depletion width is small,
Thus

x
pn ( x ) pn0 1 exp , x 0 …(4.86)
Lp

x
and np(x ) np0 1 exp , x 0 …(4.87)
Ln

4.12 Current equation for practical diode

While deriving the current equation of a diode we assumed the diode is ideal. Also we assumed that in
reverse bias the current through diode is constant and equal to –Is and is independent of applied reverse bias.
Also in forward bias after forward bias is few times of Vt then current increase exponentially but practical diode
donot follow all these characteristics. We will discuss the reasons and current equation in practical diode.
In reverse bias the depletion width increase and the electric field is large inside the depletion region,
due to high electric field the generation of carriers take place in the depletion region. The generation of new
electron-hole pair inside depletion region is due to breaking of the covalent bonds inside depletion region. These
generated carriers will be swept out of the depletion region due to electric field.This generation process is
schematically shown in Fig.4.27. The flow of charge is in the direction of a reverse-bias current. This reverse-
bias generation current, caused by the generation of electrons and holes in the space charge region, is in
addition to the ideal reverse-bias saturation current.

REMEMBER • In reverse bias generation of carrier take place in the depletion region
• The current in reverse bias is flowing due to drift of the carrier due to electric field. Thus
current is drift current.

Reverse bias generation current is given by

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 P-N junction diode 145

eni W
Jgen …(4.88)
2 0

Here W is width of depletion region, t0 is life time of carrier.

The total reverse-bias current density is the sum of the ideal reverse saturation current density and the
generation current density, or
JR = Js + Jgen ...(4.89)

p E-field n
Ec
–

EFi –

EFp –
–
Ev Ec
–
EFn
+ – EFi
Jgen
+
Ev
+

Fig 4.27 : Generation process in a reverse-biased pn junction

Note: The ideal reverse saturation current density Js is independent of the reverse-bias voltage. However, Jgen is a
function of the depletion width W, which in turn is a function of the reverse-bias voltage. The actual reverse-bias
current density, then, is no longer independent of the reverse-bias voltage.

Example 4.12

To determine the relative magnitudes of the ideal reverse saturation current density and the
generation current density in a silicon pn junction at T = 300 K. Consider the silicon pn
junction described in Example 4.10 and let 0 = p 0 = r n 0 = 5 × 10 –7 s.

Solution 4.12
The ideal reverse saturation current density was calculated in Example 4.10 and was found to be
Js = 4.15 × 10–11 A/cm2. The generation curretn density is again given by
eni W
Jgen
2 0

and the depletion width is given by

1/2
2 s Na Nd
W ( Vbi vR )
e Na Nd
If we assume, for example, that Vbi + VR = 5 V, then using the parameters given in Example 4.10 we find
that W = 1.14 × 10–4 cm, and then calculate the generation current density to be
Jgen = 2.74 × 10–7 A/cm2

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4.12.1 In forward bias

When pn diode is forward biased then holes will diffuse from p region to n region and electrons will
diffuse from n region to p region. Ideally we assumed that there is no recombination of carriers inside the
depletion region but practically some electrons and holes will recombine inside depletion region and they will
not become part of minority carrier distribution. Obviously the recombination of carrier will be maximum at the
junction and will reduce as we move away from the junction.

REMEMBER In forward bias recombination of carrier take place inside depletion region

Thus the carrier will get recombined inside depletion region due to which recombination current density
will be produced. If W is width of depletion region, 0 is lifetime of carrier then recombination current density
will be

eVa eWni eVa

Jrec J r 0 exp exp …(4.90)
2kT 2 0 2kT

Thus we can see that recombination current increase with applied forward bias voltage.

4.12.2 Total forward bias current

The total forward-bias current density in the pn junction is the sum of the recombination and the ideal
diffusion current densities. Fig 4.28 shows a plot of the minority carrier hole concentration in the neutral n
region. This distribution yields the ideal hole diffusion current density and is a function of the minority carrier
hole diffusion length and the applied junction voltage. The distribution is established as a result of holes being
injected across the space charge region. If, now, some of the injected holes in the space charge region are lost
due to recombination, then additional holes must be injected from the p region to make up for this loss. The flow
of these additional injected cariers, per unit time, results in the recombination current. This added component
is schematically shown in the figure.

p n

Recombination
p
pn(0) = pn0 exp eVa
kT

pn(x) exp –x
Lp
pn(0)

x=0

Fig 4.28 : Because of recombination, additional holes from the p region must be injected into
the space charge region to extablish the minority carrier hole concentration in the n region
The total forward-bias current density is the sum of the recombination and the ideal diffusion current
densities, so we can write

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 P-N junction diode 147

J = Jrec + JD …(4.91)
where Jrec is given by Eq.(4.90) and JD is given
eVa
JD Js exp …(4.92)
kT
The (–1) term in Eq. (4.69) has been neglected. The parameter Js is the ideal reverse saturation current
density, and from the previous discussion, the value of Jr0 from the recombination current is larger than the
value of Js.
If we take the natural log of Eqs.(4.90) and (4.92) we obtain
eVa
In Jrec ln Jr0
2kT
Va
ln Jr0
2Vt

Total
In(J) current Ideal diffusion
current, JD
(slope = 1)

Recombination
current, Jrec
In(JR0) (slope = 1/2)

In(Js)

eVa
kT
Fig 4.29 : Ideal diffusion, recombination, and total current in a forward-biased pn junction

4.12.3 Deviation of V-I Characteristic of pn Junction Diode from its ideal

Earlier we have dicussed about the exponential V-I characteristics of pn junction diode. However in
practical diode, exponential characteristics is only followed for some region of its operation. For low forward
bias diode current reduces from its exponential value due to recombination. After that current increases
exponentially with voltage (follow exponential rule). At higher diode current ohmic effect comes into play.
Current in a pn junction diode varies exponentially with the voltage applied across the junction. For low current,
we have approximated this voltage equal to the voltage applied across the diode by neglecting the resistance of
p and n region. But for higher current, voltage drop across the semiconductor region is significant which results
lower voltage drop across pn junction and lower voltage across junction results lower current. In semi-log V-I
characteristics [Fig. 4.30] all these regions are clearly showed.
In reverse bias, an ideal diode should have constant current (reverse saturation current) independent
of the applied reverse bias. Though in a practical case we get a slightly increasing current. Increase in reverse
current is due to the increase in generation current which increases with increasing reverse bias. At very high
reverse bias avalanche breakdwon occurs.

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Ideal exponential nature

In(J)

Ohmic effect

Exponential nature

Recombination effected region

Js 0 V
Breakdwon
Generation current

Fig 4.30 : Practical V-I characteristics of pn junction diode in forward as well as in reverse bias

Note: Generally in silicon diode the current is less and in germanium the current is more thus for silicon diode
Va Na
ID Is exp 1 and for germanium diode ID Is exp 1
2VT VT
One more non ideality is that the practical diodes have finite cut in voltage that is when forward bias
voltage is applied then current donot start flowing as soon as Va > 0, but current rises exponentially when
Va > Vcut in. The cut in voltage for silicon diode is 0.7 V and for germanium diode is 0.2 V. Thus for silicon and
germanium diode the current versus voltage plot will be

ID Ge Si

V
0.2 V 0.7 V

Fig 4.31 : Comparison between Si and Ge diodes

The cut in voltage decrease with temperature, generally it decrease by 2.5 mV/°C.

4.13 Junction Break down

In reverse bias we have seen the minority carrier profile in Fig 4.26, we can see that due to change in
carrier concentration the electron will diffuse from p region toward the depletion region and holes will diffuse
from n region to depletion region. These minority carrier when reach to the edges of depletion region they are
drifted due to electric field inside the depletion region and the constant current –Is flow through the diode.

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 P-N junction diode 149

REMEMBER In reverse bias current flow from n to p thus we put a minus sign with the current.

Ideally the diode can handle any amount of voltage in reverse bias but practically at a particular value of
reverse bias voltage the current through the pn diode increases abruptly and this voltage is called the breakdown
voltage.
There are three mechanism by which reverse bias break down in a pn junction take place
1. Zeren effect
2. avalanche effect
3. punch through breakdown
1. Zener effect: - Zener break down take place when the pn junction is heavily doped, due to heavy
doping the depletion width is very small. Now when reverse bias is applied then the electric field in
the depletion region is very large as depletion region thickness is very small. Due to very high
electric field the covalent bond breaks and when covalent bond break they generate new electron-
hole pair and with lot of charges at a particular break down voltage the current increases abruptly.
This breakdown voltage is called zeren breakdown voltage. As the bond energy decrease with rise in
temperature so with rise in temperature less electric field is required thus breakdown voltage
reduces. Thus in zener effect breakdown voltage decrease with rise in temperature. Thus zener
breakdown voltage have negative temperature coefficient.
2. Avalanche Breakdown : - This type of breakdown take place in pn diode in which both sides are
lightly doped and depletion region width is large. The applied reverse bias voltage produces electric
field inside depletion region. Since depletion width is large the electron entering from the p region
is drifted by electric field and electron gain very high kinetic energy as drifting is done for large
region. The electron with high kinetic energy collide with atomic electron and generate electron
hole pair by breaking covalent-bond. The newly created electron and hole will be drifted and they
will move in apposite direction due to electric field and gain enough energy and strike atoms and
produce another electron hole pair by breaking covalent band. This is called avalanche process and
lead to production of large number of carriers and current increases abruptly when breakdown
occur. The avalanche process schematic is shown in Fig 4.32

Space charge region

p n

E-field

(+)
(–)

(+)
(–)
(–)
np pn

Diffusion Diffusion
of electrons (–) (–) of holes
O W

Fig 4.32 : Avalanche breakdown process in a reverse-biased pn junction

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If we assume that a reverse-bias electron current In0 enters the depletion region at x = 0 as shown
in Fig. 4.32 the electron current In will increase with distance through the depletion region due to
the avalanche process. At x = W, the electron current may be written as
In(W) = MnIn0
Measurements of carrier multiplication M in junctions near breakdown lead to an empirical relation

1
Mn
1 ( V / Vbr )n

where the exponent n varies from about 3 to 6, depending on the type of material used for the
junction. where Mn is a multiplication factor. The hole current is increasing through the depletion
region from the n to p region and reaches a maximum value at x = 0. The total current is constant
through the pn junction in steady state.
Generally critical electric field Ecrit is that electric field at which breakdown of p-n junction take
place. Here Ecrit is the maximum electric field inside depletion region at which breakdwon of the pn
junction take place.
If we consider, for example, a one-sided p*n junction, the maximum electric field is given by

eNd x n
Emax …(4.95)
s

The depletion width xn is given approximately as

1/2
2 s VR 1
xn …(4.96)
e Nd
where VR is the magnitude of the applied reverse-bias voltage. We have neglected the built-in
potential Vbi.
If we now define VR to be the breakdown voltage VB, the maximum electric field, Emax, will be
defined as a critical electric field, Ecrit, at breakdown. Combining Eqs (4.95) and (4.96), we may
write

2
sEcrit
VB …(4.97)
2eNB

where NB is the semiconductor doping in the low-doped region of the one-sided junction.
Since avalanche breakdown occur because fast moving carrier gain enough energy and when they
hit the electrons of atoms then they break the covalent bond. When the temperature increase the
vibration of atom increase as their thermal energy increases now the collision between moving
electron and holes (due to electric field) and vibrating atom increase and the carriers are not able
to get enough energy to break covalent bond. Thus more electric field will be required. Thus
breakdown voltage increase with temperature. Thus avalance breakdown has positive temperature
coefficient.

Comparison between zeren breakdown and avalanceh breakdown

• Zener breakdown need heavily doped pn junction and avalanche breakdown need lightly doped pn
junction.
• Zener breakdown voltage is small and has value around 6 V but avalanche breakdwon voltage is
large and has value around 30 V.

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• Zener breakdown voltage has NTC and avalanche breakdown voltage has PTC
• Zener breakdown is non-destructive but avalanche breakdown is destructive.
• Zener breakdown take place in specially designed diodes and avalanche breakdown take place in
normal diodes.
• If in a device zener breakdown take place then avalanche breakdown will not take place.
• From Fig 4.33 we can see that in forward bias the plot remain same as that of normal diode, but in
reverse bias if diode is designed for zeren breakdown then breakdown Occur at 6 V otherwise
avalanche breakdown will take place at 30 V.

ID

–30V –6V
V

forward bias
Reverse
Avalanche Zener bias
breakdonw breakdown

Fig 4.33 : I-V characteristic of diode/

3. Punch through Breakdown:
When the diode has width of n or p region very small then as we apply reverse bias voltage the
depletion width keep increasing. If n side or p side has smaller width then whole region would get
covered by depletion region and when this occur then current in the device increases abruptly.
There are 4 possibilities
1. p-n junction with width of p side very small, now when reverse bias voltage is applied then depletion
region width increase and depletion region width in p region also increase.

Wp

p n

VR

Fig 4.34 : p-n junction with reverse bias voltage

When width of depletion region in p region is equal to Wp then it is called punch through breakdown
as shown in figure 4.35.
Width of depletion region is

2 1 1
W VR
e Na Nd

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and punch through breakdown occur when width of depletion region in p-side is equal to Wp, that
is

Nd
W = Wp
Na Nd

2 VBd N a Nd Nd
= Wp
e N a Nd N a N d

(N a N d )N a e
V Bd Wp 2 …(4.98)
Nd 2

At punch through in this case the p side is completely depleted, thus the device now simply work as
n semiconductor bar where I will increase linearly with V. Now the current flow will be due to
electrons as p side is gone out of picture.

n
I

–VBd
V + V –

VBd

(a) (b)

Fig 4.35 : (a) I-V characteristic for punch through breakdown pn diode (b) pn diode at punch through
breakdown.

2. p-n junction with width of n side very small. All analysis is similar. Here punch through will occur
when width of depletion region in n side is equal to width of n side. Thus

Na
W = Wn
Na Nd

Nd e
V Bd Wn2 (N a N d ) …(4.99)
Na 2

The I-V characteristic will be similar to previous case.

3. p-n+ junction where p side has less doping than doping in n side. Thus most of the depletion region
will go inside the p region. If width of p side is Wp, width of depletion region for Nd >> Na will be

2 1 1 2 VR
W VR
e Na Nd e Na

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Punch through breakdown occur when (as most of depletion region is inside p-region)
W = Wp
2 VBd
= Wp
2
e Na
e
V Bd W p2 N a …(4.100)
2
The I-V characteristic will be similar to fig. 4.35(a)
4. p+ – n junction when p side is heavily doped, thus when p–n diode is reverse biased then most of the
depletion region will go in n side and when width of depletion region in n side is equal to width of
n side then punch through will occur. Width of depletion region is

2 1 1 2 VR
W VR
e Na Nd e Nd
at punch through (since most of depletion region is inside n region) thus
W = Wn
2 VBd
= Wn
2
e Nd
W n2 N d
V Bd e …(4.101)
2
The I-V characteristic will be similar to fig. 4.35(a)

4.14 Diode Turn off Transient

The pn junction is typically used as an electrical switch. In forward bias, referred to as the on state, a
relatively large current can be produced by a small applied voltage; in reverse bias, referred to as the off state,
only a very small current will exist. Of primary interest in circuit applications is the speed of the pn junction
diode in switching states. We will qualitatively discuss the transients that occur and the charge storage effects.
We will simply state the equations that describe the switching times without any mathematical derivations.

4.14.1 The Turn-off Transient

Suppose we want to switch a diode from the forward bias on state to the reverse-bias off state. Figure
4.36 shows a simple circuit that will switch the applied bias at t = 0. For t < 0, the forward-bias current is
VF Va
I IF …(4.102)
RF
The minority carrier concentrations in the device, for the applied forward voltage VF, are shown in
Fig.4.37(a). There is excess minority carrier charge stored in both the p and n regions of the diode. The excess
minority carrier concentrations at the space charge edges are supported by the forward-bias junction voltage Va.
When the voltage is switched from the forward to the reverse-bias state, the excess minority carrier concentrations
at the space charge edges can no longer be supported and they start to decrease, as shown in Fig.4.37(b)
Thus when suddenly after forward bias reverse bias is applied then diffusion of carriers (holes from p
region to n region and electrons from n region to p region) will stop. The reverse bias will support the internal
electric field of depletion region, since there are large number of holes in n side and large number of electrons
in p side at t = 0+ (Fig. 4.37 (b)). Thus the electric field will drift them and take holes from n side to p side and
electron from p side to n side. Or in other word we can say that.

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+ Va –
I
p n

t=0

IF RF IF

+ –
VF VF
– +

Fig 4.36 : Simple circuit for switching a diode from forward to reverse bias

t = 0– t = 0–
p n
t = t1 t = t1
np(x = 0) = np0 exp eVa pn(x = 0) = pn 0 exp eVa
kT kT t2 t2
t3 t3
Forward bias Forward bias ts = t 4 t 4 = ts
diffusion diffusion
of electrons of holes np0 pn 0
np(x ) pn(x ) t= Reverse bias Reverse bias t =
diffusion diffusion
np0 pn0 of electrons of holes

(a) (b)
Fig 4.37 : (a) Steady-state forward-bias minority carrier concentrations
(b) Minority carrier concentrations at various times during switching

The collapse of the minority carrier concentrations at the edges of the space charge region leads to large
concentration gradients and diffusion currents in the reverse-bias direction. If we assume, for the moment, that
the voltage across the diode junction is small compared with VR, then the reverse-bias current is limited to
approximately

VR
I IR …(4.103)
RR

As current –IR will flow the minority carrier concentration decreases as shown in Fig 4.37(b).
This reverse current IR will be approximately constant for 0+ t ts, where ts is called the storage time.
The storage time is the length of time required for the minority carrier concentrations at the space charge edge
to reach the thermal-equilibrium values. After this time, the voltage across the junction will begin to change.
The current characteristic is shown in Fig.4.38. The reverse current is the flow of the stored minority carrier
charge, which is the difference between the minority carrier concentrations at t = 0– and t = , as was shown

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 P-N junction diode 155

in Fig.4.37(b).
The storage time ts can be determined by solving the time-dependent continuity equation. If we consider
a one-sided p+n junction, the storage time is determined from the equation

ts IF
erf …(4.104)
p0
IF IR

IF

Time

t2
–IR 0.1/R
ts

Fig 4.38 : Current characteristic versus time during diode switching

where erf(x) is known as the error function. An approximate solution for the storage time can be obtained
as

IF
ts p0 ln 1 …(4.105)
IR
The recovery phase for t > ts is the time required for the junction to reach its steady-state reverse-bias
condition. The remainder of the excess charge is being removed and the space charge width is increasing to the
reverse-bias value. The decay time t2 is determined from

t2 exp( t2 / p0 ) IR
erf 1 0.1 …(4.106)
p0 t2 / p0 IF

The total turn-off time is the sum of ts and t2.

To switch the diode quickly, we need to be able to produce a large reverse current as well as have a small
minority carrier lifetime. In the design of diode circuits, then, the designer must provide a path for the transient
reverse-bias current pulse in order to be able to switch the diode quickly.

REMEMBER • Thus we can see that turn off transient is due to stored charges in the p and n side which
occur when diode was on and was conducting current
• The mechanism by which carrier cross the junction diode the type of current of the diode.
When diode is forward biased then carrier cross junction by diffusion and we say that diffusion
of minority carrier produce current. In reverse bias the carrier cross junction due to electric
field or due to drift thus in reverse bias current flow due to drifting and it is called a drift
current.

4.14.2 The Turn-on Transient

The turn-on transient occurs when the diode is switched from its “off ” state into the forward-bias “on”
state. The turn-on can be accomplished by applying a forward-bias current pulse. The first stage of turn-on
occurs very quickly and is the length of time required to narrow the space charge width from the reverse-bias
value to its thermal-equilibrium value when Va = 0. During this time, ionized donors and acceptors are neutralized

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as the space charge width narrows.

The second stage of the turn-on process is the time required to establish the minority-carrier distributions.
During this time the voltage across the junction is increasing toward its steady-state value. A small turn-on time
is achieved if the minority carrier lifetime is small and if the forward-bias current is small.

Example 4.13

Find the current I when the switch move from position A to B

1k
A
I
V0
B 10 k

50 V
10 V

Solution 4.13
When switch is at position A then current is
10
I
mA
11
but when suddenly switch is moved to position B then current should be zero ideally. Here I will be
50
= – 5mA
10

4.15 The Schottly Barrier Diode: Metal-Semiconductor Junction

The pn junction diode is a non-ohmic device because the I-V characteristic was non linear and the
device conduct for V > 0 and donot conduct for V < 0. The metal semiconductor junction can produce a
rectifying contact or non rectifying contact depending on the properties of the metal and semiconductor selected
for designing. First of all lets analyze the metal and n type semiconductor contact.

4.15.1 Characteristic of Metal - n type Semiconductor Contact

The ideal energy-band diagram for a particular metal and n-type semiconductor before making contact
is shown in Fig.4.39(a). The vacuum level is used as a reference level. The parameter m is the metal work
function (measured in volts), s is the semiconductor work function, and is is known as the electron affinity. In
Fig.4.39(a), we have assumed that m > s. The ideal thermal-equilibrium metal-semiconductor energy-band
diagram, for this situation, is shown in Fig.4.39(b). Before contact, the Fermi level in the semiconductor was
above that in the metal. In order for the Fermi level to become a constant through the system in thermal
equilibrium, electrons from the semiconductor flow into the lower energy states in the metal. Positively charged
donor atoms remain in the semiconductor, creating a space charge region.
Since electrons move from semiconductor to metal to form contact and leave behind positively charged
donor atoms, the negative charges go to metal but metal has very high concentration of charges so we can say
that depletion region or space charge region exist only in semiconductor. Thus electric field exist from

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semiconductor to metal and we get the band diagram as shown in Fig 4.39(b). One very important point that
should be considered before drawing band diagram is that location of point A and B in figure (4.39(a)) donot
change even after making the contact because no depletion region exist inside the metal and no change in
potential of metal. So point A and B remain same in band diagram.
Vacuum level

e B0 C eVbi
e Ec
e e EF A
m
s
EF
Ec e n
B EF
EF A EFi Ev
Depletion
region
Ev xn = W

(a) (b)
Fig 4.39 : (a) Energy-band diagram of a metal and semiconductor before contact
(b) Ideal energy-band diagram of a metal n-semiconductor junction for m > s

From band diagram in Fig.4.39(b) we can see that depletion width exist only in semiconductor and we
can easily find the built in potential in junction by finding potential difference between point B and C, because no
depletion region exist inside metal. So total built in will be across the semiconductor only. We can see that at
equilibrium the fermi level is a straight line with zero slope.
We can see that e B0 is the barrier height seen by electron in metal to move into semiconductor. Since
point A and B remain same even after making the contact thus
B0 = m –x …(4.107)
On the semiconductor side, Vbi is the built-in potential barrier. This barrier, similar to the case of the pn
junction, is the barrier seen by electrons in the conduction band trying to move into the metal. The built-in
potential barrier is given by

kT Nc
Vbi B0 n B0 ln …(4.108)
q Nd

which makes Vbi a slight function of the semiconductor doping, as was the case in a pn junction.
Thus at equilibrium when barrier seen by electron of metal to move to semiconductor is e B0 and barrier
seen by electron of semiconductor to move to metal is eVbi. Thus at equilibrium since no current is flowing no
carrier will be moving or we can say that number of electron moving from metal to semiconductor is equal to
number of electron moving from semiconductor to metal.
Now if voltage across device is connected such that positive is applied at semiconductor, then in the
band diagram band of semiconductor will move down and barrier seen by electrons of semiconductor to move
into metal increases and barrier is now e(Vbi + VR), and the barrier seen by electron of metal to go into
semiconductor remain constant equal to B0. The depletion region width increases and we can say that current
is very small or equal to zero. This kind of biasing is called reverse bias. The band diagram is shown in Fig.
4.40(a). Now when bias is applied such that negative is applied to the semiconductor, now the band of
semiconductor will move up as shown in Fig. 4.40(b), the depletion region width will reduce and barrier seen by
electron of semiconductor to move into metal reduces and now electrons flow from semiconductor to metal, but

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still the barrier seen by electron of metal to move to semiconductor remain the same. This kind of bias is called
forward bias and current flow in this bias.
The energy-band diagrams versus voltage for the metal-semiconductor junction shown in Fig.4.40 are
very similar to those of the pn junction given in the last chapter. Because of the similarity, we expect the current-
voltage characteristics of the Schottky barrier junction to be similar to the exponential behavior of the pn
junction diode. The current mechanism here, however, is due to the flow of majority carrier electrons. In forward
bias, the barrier seen by the electrons in the semiconductor is reduced, so majority carrier electrons flow more
easily from the semiconductor into the metal. The forward-bias current is in the direction from metal to
semiconductor; it is an exponential function of the forward-bias voltage Va.

e B0

e(Vbi + VR)
e e(Vbi – VR)
B0
Ec
Ec EF
EF

Ev
Ev

x=0 x = xn
x = xn

(a) (b)

Fig 4.40 : Ideal energy-band diagram of a metal-semiconductor junction (a) under reverse bias, and (b)
under forward bias

4.15.2 Ideal Metal-Semiconductor Properties

metal n
We can compare metal-semiconductor diode with a
+
p n diode where doping of p side is very large. In both the
cases the depletion region exist only in n type semiconductor. W
The plot of electric field, charge density, formulae to calculate –3
e(cm )
depletion width are similar to that of pn diode. All these are eNd
shown in Fig 4.41 charge density W
x
The electric field is obtained by poisson equation,
assuming uniform doping in n side, we get
eNd (a)
E (W x ) …(4.109)

The space charge region width, W, may be calculated E(x)

as we did for the pn junction. The result is identical to that of eNd
a one-sided p + n junction. For the uniformly doped Electric field W
x
semiconductor, we have
eNd W
1/2
2 s ( Vbi VR )
W xn …(4.110) (b)
eNd Fig 4.41 (a) charge density (b) electric field in
metal semiconductor junction
where VR is the magnitude of the applied reverse-

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 P-N junction diode 159

bias voltage. We are again assuming an abrupt junction approximation.

Example 4.14

Calculate the theoretical barrier height, built-in potential barrier, and maximum electric
field in a metal-semiconductor diode for zero applied bias.
Consider a contact between tungsten and n -type silicon doped to N d = 10 16 cm –3 at
T = 300 K.
The metal work function for tungsten (W) is m = 4.55 V and the electron affinity for silicon
is = 4.01 V.
Solution 4.14
The barrier height is then
B0 = m – = 4.55 – 4.01 = 0.54 V
where B0 is the ideal Schottky barrier height. We can calculate n as

kT N 2.8 1019
n
ln c 0.0259ln 0.206 V
e Nd 1016
Then
Vbi = B0 – n = 0.54 – 0.206 = 0.33 V
The space charge width at zero bias is
1/2 14
2 s Vbi 2(11.7)(8.85 10 )(0.33)
xn 19 16
eNd (1.6 10 )(10 )
or
x n = 0.207 × 10–4 cm
Then the maximum electric field is
eNd x n (1.6 10 19 )(1016 )(0.207 10 4 )
|Emax|
s (11.7)(8.85 10 14 )
or finally
|Emax|= 3.2 × 104 V/cm

The depletion capacitance exist in the metal-semiconductor junction also because as applied voltage
changes the depletion width also changes and charges in depletion region changes. Thus capacitance exist. The
capacitance per unit area is

s s eN d
C' …(4.111)
W 2 s (Vbi VR ) 2(Vbi VR )
eN d

2
1 2(V bi V R
…(4.112)
C e s Nd

4.15.3 Current Transport process in above diode

In the metal semiconductor diode the current flow is due to electron only. When the forward bias is
applied the barrier seen by electrons in semiconductor reduces and the electrons flow from semiconductor to

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 160 Electronic Devices And Circuits

metal and current flow. The flow of current is due to majority carrier only apposite to that of pn diode where
current flow due to minority carrier.
The electrons are generated by thermionic emission and thus in metal-semiconductor diode current
flow due to electrons which are generated by thermionic emission, that’s why this diode is also called hot carrier
diode. If Js m is the current density due to flow of electron from semiconductor to metal, and the current
Jm s is electron current density due to flow of electrons from metal to semiconductor at equilibrium
Jm s = Js m thus current through device = 0. When forward bias is applied Js m will increase and current will
flow from metal to semiconductor. When reverse bias is applied Js m will reduce and due Jm s some current
will flow but that will be small as barrier of B0 will not allow much electron to flow.
Fig.4.42 show the symbol of shottky diode the equation of current density will be

eVa
J JsT exp 1 …(4.113)
kT

+ Va –
I
metal n

+ Va –

Fig 4.41 : Model of shottky diode

where JsT is the reverse-saturation current density and is given by

e Bn
JsT A * T 2 exp …(4.114)
kT

The value Bn = B0 – where is due to some non ideal effect. We donot need to learn or study
about non ideal effects in shottky diode. A* is a constant.

4.15.4 Comparison of the Schottky Barrier diode and pn Junction diode

• The current flow in shottky diode is due to majority carrier only thus there is no problem of storage
charges as we had in pn diode where the minority carrier get stoned in the p and n regions and thus
it was difficult to turn the device off. Thus shottky diode have no diffusion capacitance and no turn
off transient, thus have high switching speed.
• The reverse saturation current density in normal pn diode JsT is 2 to 3 order of magnitude less than
reverse saturation current density of schottky diode. Thus in reverse bias current in schottky diode
is more than that of reverse bias current in pn diode.
• Another important difference is that cut in voltage of schottky diode is much less than cut in
voltage of pn diode.
• Noise in pn diode is greater than noise of schottky diode.

Example 4.15

To calculate the reverse-saturation current densities of a Schottky barrier diode and a pn

junction diode.

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 P-N junction diode 161
Consider a tungsten barrier on silicon with a measured barrier height of e Bn = 0.67 eV. The
constant is A * = 114 A/K 2 cm 2. Let T = 300 K.
Solution 4.15
If we neglect the barrier lowering effect, we have for the Schottky barrier diode
e Bn 0.67
JsT A * T 2 exp (114)(300)2 exp
kT 0.0259
= 5.98 × 10–5 A/cm2
Consider a silicon pn junction with the following parameters at T = 300 K.
Na = 1018 cm–3 Nd = 1016 cm–3
Dp = 10 cm2/s Dn = 25 cm2/s
p0 = 10–7 s n0 = 10–7 s
We can then calculate the following parameters:
L p = 1.0 × 10–3 cm Ln = 1.58 × 10–3 cm
pn 0 = 2.25 × 107 cm–3 Dn = 2.25 × 102 cm–3
The ideal reverse-saturation current density of the pn junction diode can be determined from Eq.(4.106)
as

(1.6 10 19 )(25)(2.25 102 ) (1.6 10 19 )(10)(2.25 104 )

Js
(1.58 10 3 ) (1.0 10 3 )
= 5.7 × 10–13 + 3.6 × 10–11 = 3.66 × 10–11 A/cm2

Generally pn diode are used for high voltage low current application but schottky diode is used for low
voltage high current applications.

4.15.5 Metal-Semiconductor ohmic contact

We have seen the case of metal semiconductor diode (metal-n type semiconductor) with m > s and we
get the diode which conduct in forward bias and current flow is ideally zero in reverse bias so the diode was non-
ohmic.
Now if we take the same metal - n type semiconductor with m < s then the band diagram will be as
shown in Fig 4.42(a). Now when contact is made then electron will flow from metal to semiconductor and thus
depletion region in semiconductor will have negative charges and electric field inside depletion region at
equilibrium will be from metal to semiconductor. Thus the band diagram will be as shown in Fig 4.42(b).
Here also depletion region exist inside the semiconductor only.
If a positive voltage is applied to the metal, there is no barrier to electrons flowing from the semiconductor
into the metal. If a positive voltage is applied to the semiconductor, the effective barrier height for electrons
flowing from the metal into the semiconductor will be approximately Bn = n, which is fairly small for a
moderately to heavily doped semiconductor. For this bias condition, electrons can easily flow from the metal into
the semiconductor.
Fig.4.42(c) shows the energy-band diagram when a positive voltage is applied to the metal with respect
to the semiconductor. Electrons can easily flow “downhill” from the semiconductor into the metal. Fig 4.42(d)
shows the case when a positive voltage is applied to the semiconductor with respect to the metal. Electrons can
easily flow over the barrier from the metal into the semiconductor. This junction, then, is an ohmic contact.

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 162 Electronic Devices And Circuits

Ec
e e
e EF
Bn n
EF
e
e m
s
EFi
Ec
EF Ev
EF EFi

Ev

(a) (b)

Fig 4.42 : Ideal energy-band diagram (a) before contact, and

(b) after contact, for a metal -n-semiconductor junction for m < s

Ec
EF

Ev

EF
Ec

Ev

(a) (b)
Fig 4.42 : Ideal energy-band diagram of a metal-n-semiconductor ohmic contact,
(c) with a positive voltage applied to the metal, and (d) with a positive voltage applied to the semiconductor

REMEMBER For metal - n type semiconductor

m > s non ohmic contact

s > m ohmic contact

for metal - p type semiconductor

m > s ohmic contact

s > m non ohmic contact

Example 4.16

An abrupt Si p - n junction ( A = 10 –4 cm 2 ) has the following properties at 300 K:

p side n side
N a = 10 17 cm –3 N d = 10 15
n = 0.1 s p = 10 s
p = 200 cm 2 /V-s n = 1300
n = 700 p = 450
The junction is forward biased by 0.5 V. What is the forward current? What is the current at
a reverse bias of –0.5 V?

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 P-N junction diode 163

Solution 4.16

Dp Dn
I eA pn n (e eV / kT 1)
Lp Ln p
= I0(eeV/kT – 1)

ni2 (1.5 1010 )2

pn 2.25 105 cm 3
nn 1015

ni2 (1.5 1010 )2

np 2.25 103 cm 3
pp 1017

For minority carriers.

kT
Dp p 0.0259 450 11.66 cm2 / s on the n side
q

kT
Dn n 0.0259 700 18.13 cm2 / s on the p side
q

6 2
Lp DpT p 11.66 10 10 1.08 10 cm

6 3
Ln DnT n 18.13 0.1 10 1.35 10 cm

Dp Dn
I0 eA pn n
Lp Ln p

19 11.66 18.13
1.6 10 0.0001 2.25 105 2.25 103
0.0108 0.00135
= 4.370 × 10–15 A
I = I0(e0.5/0.0259 – 1) 1.058 × 10–6 A in forward bias.
I = –I0 = –4.37 × 10–15 A in reverse bias.

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 164 Electronic Devices And Circuits

(a) determine Vbi,

(b) calculate xn and xp,
(c) sketch the thermal equilibrium energy band
diagram, and

1 Subjective Practice Problems (d) plot the electric field versus distance through
the junction.
(Na – Nd)(cm )
–3

1 . (a) Calculate V bi in a silicon pn junction at 16

10
T = 300 K for (a) Nd = 1015 cm–3 and Na = (i)
1015, (i) 1016, (iii) 1017, (iv) 1018 cm–3. p type
(b) Repeat part (a) for Nd = 1018 cm–3. 2 m
n type
2 . Calculate the built-in potential barrier, Vbi, for Si, –10
15

Ge, and GaAs pn junctions if they each have the

following dopant concentrations at T = 300 K: –4×1015
(a) Nd = 1014 cm–3 Na = 1017 cm–3
(b) Nd = 5 × 10 16 Na = 5 × 1016
(c) Nd = 10 17 Na = 1017 7 . An “isotype” step junction is one in which the same
impurity type doping changes from one concentration
3 . An abrupt silicon pn junction at zero bias has dopant
value to another value. An n-n isotype doping profile
concentrations of Na = 1017 cm–3 and
is shown in Figure.
Nd = 5 × 1015 cm–3. T = 300 K. (a) Sketch the thermal equilibrium energy band
(a) Calculat the Fermi level on each side of the
diagram of the isotype junction.
junction with respect to the intrinsic Fermi level. (b) Using the energy band diagram, determine the
(b) Determine xn, xp, and the peak electric field for built-in potential barrier.
this junction. Nd(cm–3)

4 . Consider the uniformly doped GaAs junction at 1016

T = 300 K. At zero bias, only 20 percent of the total
1015
space charge region is to be in the p region. The
built-in potential barrier is Vbi = 1.20 V. For zero
bias, determine 0
(a) Na, (b) Nd,
8 . A silicon pn junction at T = 300 K has the doping
(c) xn, (d) xn, and
(e) Emax. profile shown in Fig. Calculate
(a) Vbi,
5. Consider a uniformly doped GaAs pn junction at (b) xn and xp at zero bias, and
T = 300 K. The junction capacitance at zero bias is (c) the applied bias required so that xn = 30 m.
Cj(0) and the junction capacitance with a 10-V (Na – Nd)(cm )
–3

reverse-bias voltage is Cj(10). The ratio of the

15
capacitances is +5×10

C j (0)
3.13
C j (10)
Also under reverse bias, the space charge width into x=0
the p region is 0.2 of the total space charge width. –10
14

Determine
(a) Vbi and (b) Na, Nd.
9 . An abrupt silicon pn junction at T = 300 K is
6 . Considet the impurity doping profile shown in Figure uniformly doped with N a = 10 18 cm –3 and
in a silicon pn junction. For zero applied voltage, N d = 10 15 cm –3 . The pn junction area is

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 P-N junction diode 165

6 × 10–4 cm2. An inductance of 2.2 millihenry is

placed in parallel with the pn junction. Calculate n+ p p+
the resonant frequency of the circuit for reverse-bias
voltages of x=0 x
(a) VR = 1 V and (b) VR = 10 V.
–3
(Na – Nd)(cm )
10. (a) The peak electric field in a reverse-biased silicon
pn junction is Emax = 3 × 105 V/cm. The doping 16
10
concentrations are Nd = 4 × 1015 cm–3 and
Na = 4 × 1017 cm–3. Find the magnitude of the 10
14

reverse-bias voltage. 50 x ( m)
(b) Repeat part (a) for Nd = 4 × 1016 cm–3 and –10
16

Na = 4 × 1017 cm–3.
(c) Repeat part (a) for Nd = Na = 4 × 1017 cm–3. 14. A one-sided p+n junction with a cross-sectional area
of 10–5 cm2 has a measured built-in potential of
11. An ideal one-sided silicon n+p junction has uniform
Vbi = 0.8 V at T = 300 K. A plot of (1/Cj)2 versus VR
doping on both sides of the abrupt junction. The
is linear for VR < 1 V and is essentially constant for
doping relation is Nd = 50 Na. The built-in potential
barrier is Vbi = 0.752 V. The maximum electric field
VR > 1 V. The capacitance is Cj = 0.082 pF at
VR = 1 V. Determine the doping concentrations on
in the junction is Emax = 1.14 × 105 V/cm for a
either side of the metallurgical junction that will
reverse-bias voltage of 10 V. T = 300 K. Determine
(a) Na, Nd (b) xp for VR = 10, and produce this capacitance characteristic.
(c) C'j for VR = 10. 15. Silicon, at T = 300 K, is doped at Nd1 = 1015 cm–3
12. An abrupt silicon pn junction has dopant for x < 0 and Nd2 = 5 × 1016 cm–3 for x > 0 to form
concentrations of N a = 2 × 10 16 cm –3 and an n-n step junction.
Nd = 2 × 1015 cm–3 at T = 300 K. Calculate (a) Sketch the energy-band diagram.
(a) Vbi, (b) Derive an expression for Vbi.
(b) W at VR = 0 and VR = 8 V, and (c) Sketch the charge density, electric field, and
(c) the maximum electric field in the space charge potential through the junction.
region at VR = 0 and VR = 9 V. (d) Explain where the charge density came from
and is located.
13. Consider a silicon pn junction with the doping profile
16. A pn junction has the doping profile shown in Figure.
shown in Figure. T = 300 K.
(a) Calculate the applied reverse-bias voltage Assume that xn > x0 for all reverse-bias voltages.
required so that the space charge region extends (a) What is the built-in potential across the
entirely through the p region. junction?
(b) Determine the space charge width into the n+- (b) For the abrupt junction approximation, sketch
region with the reverse-bias voltage calculated the charge density through the junction.
in part (a). (c) Derive the expression for the electric field
(c) Calculate the peak electric field for this applied through the space charge region.
voltage. Na – Nd
Na0

x0
x
Nd0
–
2
–Nd0

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 166 Electronic Devices And Circuits

17. (a) Consider an ideal pn junction diode at T = 300 22. Consider a p+n silicon diode at T = 300 K. The
K operating in the forward-bias region. Calculate diode is forward biased at a current of 1 mA. The
the change in diode voltage that will cause a hole lifetime in the n region is 10–7 s. Neglecting the
factor of 10 increase in current. depletion capacitance, calculate the diode
(b) Repeat part (a) for a factor of 100 increase in impedance at frequencies of 10 kHz, 100 kHz,
current. 1 MHz, and 10 MHz.
18. Consider the ideal long silicon pn junction shown in 23. Consider a p+n silicon diode at T = 300 K. The
Figure. T = 300 K. The n region is doped with 1016 slope of the diffusion capacitance versus forward-
donor atoms per cm3 and the p region is doped with bias current is 2.5 × 10–6 F/A. Determine the hole
5 × 1016 acceptor atoms per cm3. The minority carrier lifetime and the diffusion capacitance at a forward-
lifetimes are n0 = 0.05 s and p0 = 0.01 s. The bias current of 1 mA.
minority carrier diffusion coefficients are
Dn = 23 cm2/s and Dp = 8 cm2/s. The forward-bias 24. A silicon pn junction diode at T = 300 K has a cross-
voltage is Va = 0.610 V. Calculate sectional area of 10–2 cm2. The length of the p region
(a) the excess hole concentration as a function of x is 0.2 cm and the length of the n region is 0.1 cm.
for x 0, The doping concentrations are Nd = 1015 cm–3 and
(b) the hole diffusion current density at Na = 1016 cm–3. Determine
x = 3 × 10–4 cm, and (a) approximately the series resistance of the diode
(c) the electron current density at x = 3 × 10–4 cm. and
(b) the current through the diode that will produce
W
a 0.1 V drop across this series resistance.
Va 25. A one-sided n+p silicon diode at T = 300 K with a
p n
cross-sectional area of 10–3 cm2 is operated under
forward bias. The doping levels are Nd = 1018 cm–3
x=0 x and N a = 10 16 cm –3 , and the minority carrier
parameters are p 0 = 10 –8 s, n 0 = 10 –7 s,
Dp = 10 cm2/s, and Dn = 25 cm2/s. The maximum
19. A germanium p+n diode at T = 300 K has the
diffusion capacitance is to be 1 nF. Determine
following parameters: N a = 10 18 cm –3 ,
(a) the maximum current through the diode,
Nd = 1016 cm–3, Dp = 49 cm2/s. Dn = 100 cm2/s,
–4 2
(b) the maximum forward-bias voltage, and
p0 = n0 = 5 s, and A = 10 cm . Determine the (c) the diffusion resistance.
diode current for
(a) a forward-bias voltage of 0.2 V, and 26. The critical electric field for breakdown in silicon is
(b) a reverse-bias voltage of 0.2 V. approximately Ecrit = 4 × 105 V/cm. Determine the
maximum n-type doping concentration in an abrupt
20. Consider an ideal silicon pn junction diode with the
p+n junction such that the breakdown voltage is
following parameters: n0 = p0 = 0.1 × 10–6 s,
30 V.
Dn = 25 cm2/s, Dp = 10 cm2/s. What must be the
ratio of Na/Nd so that 95 percent of the current in 27. Consider, as shown in Figure, a uniformly doped
the depletion region is carried by electrons? silicon pn junction at T = 300 K with impurity doping
concentrations of Na = Nd = 5 × 1015 cm–3 and
21. Consider two ideal pn junctions at T = 300 K, having
minority carrier lifetimes of n0 = p0 = 0 = 10–7 s. A
exactly the same electrical and physical parameters
reverse-bias voltage of VR = 10 V is applied. A light
except for the bandgap energy of the semiconductor
source is incident only on the space charge region,
materials. The first pn junction has a bandgap energy
producing an excess carrier generation rate of
of 0.525 eV and a forward-bias current of 10 mA with
g' = 4 × 1019 cm–3 s–1. Calculate the generation
Va = 0.255 V. For the second pn junction, “design”
current density.
the bandgap energy so that a forward-bias voltage of
Va = 0.32 V will produce a current of 10 A.

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 P-N junction diode 167
Illumination yields the 1/C'2 versus VR plot shown in Figure, where
C' is the capacitance per cm2. Determine
(a) Vbi, (b) Nd,
(c) n, and (d) B0.
p n
3

–15
2

×10
W

1
C
1
– VR +

28. A long silicon pn junction diode has the following –1 0 1 2

parameters: Nd = 1018 cm–3, Na = 3 × 1016 cm–3. VR(volts)
n0 = p0 = 0 = 10 s, Dn = 18 cm /s, and Dp = 6
–7 2

cm2/s. A light source is incident on the space charge 32. Compare the built in potential, breakdown voltage,
region such as shown in Figure, producing a electric field for linear graded and uniformly doped
generation current density of JG = 25 mA/cm2. The pn junction. Assuming same amount of doping.
diode is open circuited. The generation current 33. Consider the silicon PN junction in figure
density forward biases the junction, inducing a
forward-bias current in the opposite direction to the P
+
P N N
+

generation current. A steady-state condition is

reached when the generation current density and
forward-bias current density are equal in magnitude.
What is the induced forward-bias voltage at this 1.2 m 0.4 m
steady-state condition? (a) If Na = 5 × 1016 cm–3 in the P region and
Illumination Nd = 1 × 1017 cm–3 in the N region, under
increasing reverse bias, which region (N or P)
will become completely depleted first? What is
the reverse bias at this condition?
p n (b) Repeat part (a) with Na = 1 × 1016 cm–3 and
Nd = 1 × 1017 cm–3.
(c) What are the small-signal capacitances (F/cm2)
W at the bias conditions in (a) and (b)?

34. A silicon sample maintained at 300 K is characterized

– VR +
by the energy band diagram in Figure.
29. A silicon pn junction diode is doped with Na = Nd
= 1018 cm–3. Zener breakdown occurs when the peak Ec
electric field reaches 106 V/cm. Determine the
EF
reverse-bias breakdown voltage.

30. Consider a diode with a junction capacitance of Ev

18 pF at zero bias and 4.2 pF at a reverse bias voltage
of VR = 10 V. The minority carrier lifetimes are
10–7 s. The diode is switched from a forward bias x
0 L/4 L/2 3L/4 L
with a current of 2 mA to a reverse bias voltage of
(a) Does the equilibrium condition prevail? How
10 V applied through a 10 k resistor. Estimate the
do you know?
turn-off time.
(b) Roughly sketch n and p versus x.
31. A Schottky diode with n-type GaAs at T = 300 K (c) Sketch the electrostatic potential ( ) as a
function of x.

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 168 Electronic Devices And Circuits

35. Consider a piece of infinitely long semiconductor (c) Do low-level injection conditions prevail inside
sample shown in Fig.. the bar? Explain your answer.

Light 37. Consider a Schottky diode with the doping profile

shown in Figure. Assume that the built-in potential
bi is 0.8 V.

Metal N type Si

x
0
The x > 0 portion is illuminated with light. The Na
light generates GL = 1015 electron-hole pairs per cm2 4×1016
per s uniformly throughout the bar in the region
x > 0. GL is 0 for x < 0. Assume that the steady-state 16
10
conditions prevail, the semiconductor is made of
silicon, Nd = 1018 cm–3, = 10–6 s, and T = 300 K.
(a) What is the hole concentration at x = ? 1 m
Explain your answer. (a) Sketch 1/C2 vs. V (the reverse bias voltage)
(b) What is the hole concentration at x = + ? qualitatively. Do not find numerical values for
Explain your answer. C.
(c) Do low-level injection conditions prevail? (b) Sketch the electric field profile for the bias
Explain your answer. condition when Wdep = 2 m. Again, do not find
(d) Determine p'(x) for all x, where p'(x) is the excess numerical values for the electric field.
minority carrier concentration. (c) What is the potential drop across the junction in
36. The two ends of a uniformly doped N-type silicon part (b)?
bar of length 2 L are simultaneously illuminated so (d) Derive an expression of C as a function of V for
as to maintain p' = Nd excess hole concentration at Wdep > 1 m.
both x = –L and x = L. L is the hole diffusion length.
The wavelength and intensity of the illumination
are such that no light penetrates into the interior
(–L < x < L) of the bar and = 10–3. Assume the
steady-state conditions, T = 300 K, Nd >> ni, and
minority carrier lifetime of .
PN (–L) = PN (L) = Nd
1 Objective Practice Problems

1 . An abrupt silicon pn junction at zero bias has dopant

concentrations of N a = 10 17 cm –3 and
Nd = 5 × 1015 cm–3 at T = 300 K. What will be the
Si N type
(no light – L < x < L) differences in Fermi levels in n and p regions?
EF – EFi in n-region EFi – EF in p-region
x (a) 0.3294 eV 0.4070 eV
–L 0 L (b) 1.571 eV 1.272 eV
(a) Is the silicon bar at thermal equilibrium near (c) 1.272 eV 1.571 eV
x = 0? Why or why not? (d) 0.4070 eV 0.3294 eV
(b) What are the excess concentrations of holes (pN')
Common Data for Q. 2 and 3
and electron (nN') at x = –L? What are the total
electron and hole concentrations at x = –L? A silicon abrupt junction in thermal equilibrium at
T = 300 K is doped such that Ec – EF = 0.21 eV in
n-region and EF – Ev = 0.18 eV in the p region.

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 P-N junction diode 169

2 . What will be the impurity doping concentrations Nd (b) 1.71 × 1015 8.56 × 1013
and Na in n and p-regions respectively? (c) 8.56 × 1013 1.71 × 1015
Nd in n-region Na in p-region (d) 4.28 × 1015 2.14 × 1017
(a) 1.024 × 1014 cm–3 1.186 × 1014 cm–3
7 . The distance, xp that the space charge region extends
(b) 1.186 × 1014 cm–3 1.024 × 1014 cm–3
15 –3 into the p-region will be
(c) 8.43 × 10 cm 9.97 × 1015 cm–3
15 –3 (a) 0.26 m (b) 0.53 m
(d) 9.97 × 10 cm 8.43 × 1015 cm–3
(c) 1.80 m (d) 1.27 m
3 . The built in potential barrier, Vbi in the pn junction
8 . A uniformly doped silicon p+n junction at T = 300 K
will be
is to be designed such that at a reverse-bias voltage
(a) 0.178 V (b) 2.664 V
of VR = 10 V, the maximum electric field is limited
(c) 1.449 V (d) 0.690 V
to Emax = 106 V/cm. What will be the maximum
Common Data for Q. 4 and 5 doping concentration in the n region?
Consider the impurity doping profile in a silicon pn (a) 3.24 × 1011 cm–3 (b) 3.24 × 1017 cm–3
–2
(c) 5.18 × 10 cm –3 (d) 6.48 × 1017 cm–3
junction as shown in figure. Assume that zero voltage is
applied to the pn junction. (For Si, relative permittivity 9 . A silicon p+n junction at T = 300 K has doping
is r = 11.7) concentrations of N a = 10 18 cm –3 and
(Na – Nd)(cm )
–3 Nd = 5 × 1015 cm–3. The cross-sectional area of the
16 junction is A = 5 × 10–5 cm2. What will be the
10
junction capacitance for the applied reverse voltage,
p-type VR = 3 V?
0 (a) 2.605 nF (b) 1.042 nF
15
n-type (c) 0.005 pF (d) 0.521 pF
–10
10. Consider a p+n silicon diode at T = 300 K with doping
4 . The built in potential barrier, Vbi is
concentrations of N a = 10 18 cm –3 and
(a) 47.95 V (b) 24.52 V
Nd = 1016 cm–3. The minority carrier hole diffusion
(c) 0.635 V (d) 1.242 V
coefficient is Dp = 12 cm2/s and the minority carrier
5 . What will be the distances xn and xp that the space hole lifetime is p0 = 10–7 s. The cross-sectional area
charge region extends into the n and p-regions is A = 10–4 cm2. The diode current at a forward-bias
respectively? voltage of 0.50 V will be
xn (in m) xp (in m) (a) 4.14 × 10–15 A (b) 2.42 × 10–7 A
(a) 0.864 0.864 (c) 9.54 × 10–7 A (d) 27.15 × 10–15 A
(b) 1.157 1.157
11. The applied reverse-bias voltage at which the ideal
(c) 1.157 0.864
(d) 0.864 1.157 reverse current in a pn junction diode at T = 300 K
reaches 90 percent of its reverse saturation current
Common Data for Q. 6 and 7 value is
An ideal on-sided silicon n+p junction has uniform doping (a) 59.6 mV (b) 2.30 V
on both sides of the abrupt junction. The doping relation (c) 1.54 mV (d) 2.73 mV
is N d = 50 N a . The built-in potential barrier is
Common Data for Q. 12 and 13
Vbi = 0.752 V. The maximum electric field in the junction
is Emax = 1.14 × 105 V/cm for a reverse-bias voltage of A silicon step junction has uniform impurity doping
10 V at T = 300 K. concentrations of N a = 5 × 10 15 cm –3 and
Nd = 1 × 1015 cm–3, and a cross-sectional area of A =
6 . What will be the impurity dopant concentrations Nd 10–4 cm2. Let n0 = 0.4 s and p0 = 0.1 s, hole mobility
and Na in n and p-regions respectively? 2 2
p = 480 cm /V-s, electron mobility n = 1350 cm /V-s.
Nd (in cm–3) Na (in cm–3)
(a) 2.14 × 10 17 4.28 × 1015

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 170 Electronic Devices And Circuits

12. The ideal reverse saturation current due to holes region is 0.2 –cm, and the resistivity of the p region
will be is 0.1 -cm. The length of each neutral region is
(a) 4.02 × 10–14 A (b) 4.46 × 10–9 A 10–2 cm and the cross-sectional area is 2 × 10–5 cm2.
–10
(c) 4.02 × 10 A (d) 0.324 × 10–14 A What is the required applied voltage to achieve the
current of 1 mA?
13. The ideal reverse saturation current due to electrons
(a) 0.717 V (b) 0.417 V
will be
(c) 0.146 V (d) 0.567 V
(a) 0.19 × 10–15 A (b) 2.52 × 10–9 A
(c) 6.74 × 10–15 A (d) 6.74 × 10–11 A 20. The critical electric field for breakdown in silicon is
approximately Ecrit = 4 × 105 V/cm. What will be
Common Data for Q. 14 and 15
the maximum n-type doping concentration in an
The cross-sectional area of the silicon pn junction is abrupt silicon p+n junction such that the breakdown
10–3 cm2. The temperature of the diode is T = 300 K, voltage is 30 V?
and the doping concentrations are Nd = 1016 cm–3 and (a) 1.47 × 1015 cm–3 (b) 1.73 × 1016 cm–3
Na = 8 × 1015 cm–3. Assume minority carrier lifetimes of (c) 2.95 × 1015 cm–3 (d) 3.46 × 1016 cm–3
–6 –7
n0 = 10 s and p0 = 10 s. A forward bias voltage of 21. Consider the following statement
Va = 0.3 V is applied to the silicon pn junction.
P: The space charge region about the metallurgical
14. The total number of excess electrons in the p region junction is due to a pile up of electrons on the p-
will side and holes on the n-side
(a) 6.55 × 103 (b) 1.78 × 104 Q: The built-in potential is typically less than the
(c) 3.95 × 104 (d) 1.07 × 105 band gap energy converted to volts
R: ohmic contacts reduce the built in voltage drop
15. The total number of excess holes in the n region across a junction
will S: if one has a p+n step junction where NA(p side)
(a) 2.97 × 104 (b) 0.24 × 103 >> ND (n side), then it follows that xp << xn
(c) 1.19 × 103 (d) 2.68 × 103 Which of the above statements are coorect?
16. Consider a p+n silicon diode at T = 300 K. The (a) P, Q and S (b) P, Q, R
diode is forward biased at a current of 1 mA. The (c) R and S (d) Q and S
hole lifetime in the region is 10–7 s. The diode Common Data for Q. 22 and 23
impedance at a frequency of 10 kHz will be (Neglect
the depletion capacitance)? The figure shown below is a dimensioned plot of the
(a) 25.64 – j8.26 × 10–3 (b) 25.9 – j0.0814 steady state carrier concentrations inside a pn junction
(c) 0.039 + j1.21 × 10–4 (d) 25.9 + j0.0814 diode maintained at room temperature.
n or p
Common Data for Q. 17 and 18 (log scale)
pp nn
Consider a p+n silicon diode at T = 300 K. The slope of 10
17
10
15

the diffusion capacitance versus forward-bias current is

2.5 × 10–6 F/A 1010 pn
np 10 8
5
17. What is the hole lifetime? 10
3
10
(a) 5.02 × 10–6 s (b) 6.5 × 10–8 s
(c) 4.83 × 10–6 s (d) 1.3 × 10–7 s x
–x p –x n
18. If a forward-bias current of 1 mA is applied to the 2.1×10 cm
–2
1.6×10 cm
–2

junction, then the diffusion capacitance will be 22. What is the bias condition of the diode?
(a) 2.5 × 10–9 F (b) 2.5 × 10–6 F (a) Forward biased (b) Reverse Biased
–6
(c) 1.25 × 10 F (d) 1.25 × 10–9 F (c) Unbaised (d) Can’t say
19. Assume that the reverse saturation current in a diode 23. What is the value of applied voltage magnitude (VA)?
is Is = 10–10 A at T = 300 K. The resistivity of the n

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 P-N junction diode 171
(a) 0.70 V (b) 1.70 V 29. An abrupt Si p-n junction has Na = 1018 cm–3 on one
(c) 0.3 V (d) 1.30 V side and Nd = 5 × 1015 cm–3 on the othr and has a
circular cross section with a diameter of 10 m. What
Common Data for Q. 24 to 26
is the value of charge Q+ in space charge region in n
Figure shown below is a dimensioned plot of the steady side?
state carrier concentration inside a p - n junction (a) 8 × 10–4 C (b) 1.6 × 10–1 C
maintained at room temperature. (c) 3.62 × 10–12 C (d) 2.85 × 10–14 C
n or p
(log scale) Common Data for Q. 30 and 31
nn
pp 15
10 A silicon p-n junction has a built in potential of 0.65 V.
1014
The acceptor concentration on the p-side is 100 times
106
greater than the donor concentration on the n-side, and
np a reverse bias of 10 V is applied.
10
3
105
102 pn 30. What is the width of the depletion region
(a) 4.22 × 104 cm (b) 0.576 × 10–4 cm
–x p –x n
x
4
(c) 0.422 × 10 cm (d) 5.76 × 10–4 cm
24. What is the bias condition of the diode? 31. What is the value of depletion capacitance per unit
(a) Forward biased (b) Reverse bias area?
(c) unbiased (d) Cann’t be say
(a) 4.22 nF/cm2 (b) 5.22 nF/cm2
(c) 1.797 nF/cm 2 (d) 1.797 pF/cm2
25. What are the p -side and n -side doping
concentrations? Common Data for Q. 32 and 33
(a) 106, 105 (b) 103, 102
14
(c) 10 , 10 15 (d) 1017, 1017 An abrupt silicon pn junction has dopant concentrations
of Na = 2 × 1016 cm–3 and Nd = 2 × 1015 cm–3 at
26. What is the value of applied voltage magnitude VA?
T = 300 K. A reverse-bias voltage of VR = 8 V is applied
(a) 0.30 (b) 0.70 V
to the pn junction. (For Si, relative permittivity r = 11.7).
(c) 0 V (d) 0.18 V
32. The total space charge width in the pn junction will
27. A pn junction is formed in silicon between n-type
be ______ × 10–4 cm.
(ND = 1018 cm–3) and p-type (NA = 1017 cm–3)
material for equilibrium. How much of Vbi is dropped 33. The maximum electric field in the space charge
on the n-side and on the p-side? region will be _______ × 104 V/cm.
(a) 0.080, 0.80 V (b) 0.88 V, 0.88 V
34. GaAs pn junction at T = 300 K has impurity doping
(c) 0.44 V, 0.44 V (d) 0.16 V, 7.2 V
concentrations of N a = 10 16 cm –3 and
28. A silicon diode, with ND = 5 × 1017 cm–3 and N d = 5 × 10 16 cm –3 . For a particular device
NA = 1017 cm–3, is forward biased with Va = 0.5 V. application, the ratio of junction capacitance at two
Assume that the intrinsic concentration of silicon is C ( VR1 )
ni = 1.08 × 1010 cm–3. What are the minority carrier values of reverse bias voltage must be 3
V ( VR2 )
concentrations np(xn) and pn(xn) at the edge of where the reverse bias voltage VR1 = 1 V. What will
transition region? be the reverse bias voltage, VR2 (in volt)?
(a) np(xp) = 2.6 × 1011 cm–3,
pn(xn) = 5.1 × 1010 cm–3 35. An abrupt silicon junction at T = 300 K is uniformly
(b) np(xp) = 5 × 1017, pn(xn) = 1017 cm–3 doped with Na = 1018 cm–3 and Nd = 1015 cm–3. The
(c) np(xp) = 2.33 × 102 cm–3, pn junction area is 6 × 104 cm4. An inductance of
pn(xn) = 1.17 × 108 cm–3 2.2 millihenry is placed in parallel with the pn
(d) np(xp) = 5.97 × 107 cm–3, junction. What will be the resonant frequency
pn(xn) = 9.7 × 106 cm–3 (in MHz) of the circuit for reverse-bias voltage of

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 172 Electronic Devices And Circuits

VR = 1 V? If the total junction voltage Vj = 5 V, then what is the

value of the applied voltage (in volts)?
36. The minimum small-signal diffusion resistance of
an ideal forward-biased silicon pn junction diode at 41. What is the dielectric relaxation time for Si of 0.01
T = 300 K is to be rD = 48 . The reverse saturation -m resistivity (in psec)?
current is Is = 2 × 10–11 A. The maximum applied
42. Two p-n germanium diodes are connected in series
forward-bias voltage that can be applied to meet this
opposing, as shown in figure.
specification is ________ volt.
D1 D2
37. Consider a diode with a junction capacitance of
18 pF at zero bias and 4.2 pF at a reverse bias voltage –V +
of VR = 10 V. The minority carrier lifetime is 10–7 s.
The diode is switched from a forward bias with a
current of 2 mA to a reverse bias voltage of 10 V
applied through a 10 k resistor. The turn-off time
will be _______ × 10–7 sec?
5V
38. Two ideal p+n step junction diodes maintained at A 5 V battery is impressed upon this series
room temperature are identical except that arrangement. What is the value of voltage V at room
ND1 = 1015/cm3 and ND2 = 1016/cm3. If the currents temperature (in volt)?
through the diodes be ID1 and ID2, then the ratio
43. In a p +n junction, reverse biased at 10 V, the
ID1
= ________. capacitance is 10 PF. If the doping of the n side is
ID2
doubled and the reverse bias is changed to 80 V,
Common Data for Q. 39 and 40 what is the capacitance (in PF)?

Consider the equilibrium energy band diagram, for the 44. An abrupt Si p-n junction (A = 10–4 cm2) have
pn junction diode shown in figure. N d = 10 15 cm –3 (in n side), N a = 10 17 cm –3
Ec (in p-side). If the intrinsic concentration of Si is
1.5 × 1010 cm–3, then what is the total depletion
0.2 eV Ei
electron energy

Ec capacitance at –4 V (in pF)?

EF EF
Ev
Ei 0.3 eV

Ev
distance x

39. What is the value of built in potential (Vbi)? (in Volt)

40. A voltage is now applied across the pn junction diode,

as shown in figure below.

n p

– +
Va

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 Cha pter

Special Semiconductor
Devices
5
5.1 Introduction
In this chapter we will study all specially designed diodes for example zener diode , photo diodes, light
emitting diode, tunnel diode, solar cells.

5.2 Tunnel diode

Tunnel diode are special type of diodes in which both p and n region are very heavily doped due to which
the depletion region width is very small and due to very heavy doping the Fermi level is inside the conduction
band in n region and inside valance band in p region. Thus the diagram of tunnel diode will be as shown in
Fig 5.1

Ec

p n
EFi
EF
EF
Ev
Ec

Ev

Fig 5.1 : Band diagram of tunnel diode at equilibrium

Since all the state below EF are filled, thus as shown in the above figure at T = 0k the shaded region
show the filled states. Now first of all lets discuss quantum tuneling.
Tunneling is the proceess by which carrier flow from filled state to empty state when the filled and empty
state are very close to each other. The flow of carrier through tunneling is explaind by quantum mechanics and
this is not in the syllabus. The flow of carriers take place at very fast speed that is at speed of light, and the
requirement is that distance between the filled and empty state is less than /50 where is the wave length of
visible light.
The tunnel diode has p and n region and from the band diagram shown in Fig 5.1. We can see that both
the region are degenerate. We can see that at equlibrium as the Fermi level has to be a staright line with zero
slope thus the conduction band and valance band overlap on the energy scale. Since the doping of p and n region
is large thus width of depletion region will be very small and electric field will be very large, this meets all the

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 174 Electronic Devices and Circuits

condition of electron tunneling that is filled and empty state seperated by a narrow potential barrier of finite
height.
Now lets see what happen when the device is forward biased and reverse biased. Fig 5.2(a) show the
band digram at equilibrium, here no filled state is adjacent to empty state thus no tunneling take place and no
current will flow. Now when the device is reverse biased the band of n region will move down and we can see
from Fig. 5.2(b) that now the filled state in p region become adjacent to epty state in n region, this lead to flow
of electron from p to n which lead to current flow from n region to p region.

REMEMBER Here the carriers are moving due to tunneling and not due to electric field that exist inside the
depletion region.

This current is shown as negative and we can see that when the reverse bias is increased the overlap
between the filled and empty states will also increse and current will increase. Thus we can see a linear increase
in current with voltage.

I I

Ec V Ec V

Ev Ev e
–

Efp Efn Efp Efn

Ec Ec

Ev Ev

p n p n

(a) (b)

I I

Ec V Ec V

Ev Ev
–
e Efn e
–
Efn
Efp Efp
Ec Ec

Ev Ev

p n p n
(c) (b)

Fig 5.2 : Tunnel diode band diagrams and I-V characteristics for various biasing conditions: (a) equilibrium (zero bias) condition,
no net tunneling; (b) small reverse bias, electron tuneling from p to n; (c) small forward bias, electron tunneling from n to p; (d)
increased forward bias, electron tunneling from n to p decreases as bands pass by each other.

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 Special Semiconductor Devices 175

When a small forward bias is applied (Fig. 5.2(c)), EFn moves up in energy with respect to EFp by the
amount eV. Thus, electrons below EFn on the n side are placed opposite empty states above EFp on the p side.
Electron tunneling occurs from n to p as shown, with the resulting conventional current from p to n. This
forward-tunneling current continues to increase with increased bias as more filled states are placed opposite
empty states. However, as EFn continues to move up with respect to EFp, a point is reached at which the bands
begin to pass by each other. When this occurs, the number of filled states opposite empty states decreases. The
resulting decrease in tunneling current is illustrated in Fig. 5.2(d). This region of the I-V characteristic is
important in that the decrease in tunneling current with increased bias produces region of negative slope; that
is, the dynamic resistance dV/dI is negative. This negative-resistance region is useful in oscillators.

e– I
Ec

Efn
Ev Ec
Efp
V

Ev
h +

p n
(a) (b)

Fig 5.3 : Band diagram (a) and I-V characteristic (b) for the tunnel diode beyond the tunnel current region.
In (b), the tunneling component of current is shown by the solid curve and the diffusion current component is dashed.
If the forward bias is increased beyond the negative resistance region, the current begins to increase
again (Fig. 5.3). Once the bands have passed each other,
the characteristic resembles that of a conventional diode.
I
The forward current is now dominated by the diffusion
current—electrons surmounting their potential barrier from Ip
n to p and holes surmounting their potential barrier from p
to n. Of course, the diffusion current is present in the forward
tunneling region, but it is negligible compared with the
tunneling current.
The total tunnel diode characteristic as shown in Iv
Fig.5.4 has the general shape of an N (if a little imagination Vp Vf
V
is applied); therefore, it is common to refer to this
characteristic as exhibiting a type-N negative resistance. It
is also called a voltage-controlled negative resistance,
meaning that the current decreases rapidly at some critical
voltage (in this case, the peak voltage Vp, taken at the point Fig 5.4 Complete tunnel diode characteristic
of maximum forward tunneling).
The values of peak tunneling current Ip and valley current Iv (Fig.5.4) determine the magnitude of the
negative-resistance slope for a diode of given material. For this reason, their ratio Ipllv is often used as a figure
of merit for the tunnel diode. Similarly, the ratio Vp/Vf is a measure of the voltage spread between the two
positive-resistance regions.The negative resistance of the tunnel diode can be used in a number of ways to
achieve oscillation and other circuit functions. The fact that the tunneling process does not present the time

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 176 Electronic Devices and Circuits

delays of drift and diffusion makes the tunnel diode a natural choice for certain high-speed circuits. However
the tunnel diode has not achieved widespread application, because of its relatively low current operation and
competition from other devices.
The symbol for tunnel diode is

Fig 5.5 : Symbol for tunnel diode

5.3 Zener Diode

We have already seen that breakdown in a diode take place by two phenomenon : Avalanche breakdown
and zener breakdown. The zener diode are specially designed diode in which breakdown take place by zener
effect. Thus the diode is heavily doped. The doping in zener diode is heavy but not that much as in tunnel diode
thus in forward bias the zener diode has exactly same I-V charactistic as that of normal diode.
The I-V characterstic and symbol zener diode is shown in Fig 5.6 (a) and (b)

I VZ
V
+ –
forward bias
V

Reverse
bias
(a) (b)

Fig 5.6 : (a) symbol of zener diode (b) I-V characteristic of zener diode

The zener diode has a fixed zener breakdown voltage and thus this device can be used as voltage stabiliser.
The application and their use as stabiliser will be seen in analog electrinics.

5.4 Photo Detector

We have seen in previous chapters that when light fall on the semiconductor bar then due energy of the
photons the covalent bond break and generate new carriers due to which the conductivity of the matarial
changes. The generation of new carrier will take place only when the energy of the photons is greater than band
gap of semiconductor material.
There are several semiconductor device that can be used to detect the presence of photons the are know
as photodetectors,they convert optical signals into electrical signals. When excess electrons and holes are
generated in a semiconductor, there is an increase in the conductivity of the material. This change in conductivity
is the basis of the photoconductor, perhaps the simplest type of photodetector. If electrons and holes are generated
within the space charge region of a pn junction, then they will be separated by the electric field and a current
will be produced. The pn junction is the basis of several photodetector devices inciuding the photodiode and the
phototransistor.

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 Special Semiconductor Devices 177

5.4.1 Photoconductor
Fig 5.7 shows a bar of semiconductor material with ohmic contacts at each end and a voltage applied
between the terminals. The initial thermal-equilibrium conductivity is
0 = e( n n 0 + pp0) …(5.1)
If excess carriers are generated in the semiconductor, the conductivity becomes
= e[ n (n0 + n) + p (p0 + p)] …(5.2)
where n and p are the excess electron and hole concentrations, respectively. If we consider an n-type
semiconductor, then, from charge neutrality, we can assume that n = p. We wil use p as the concentration of
excess carriers. In steady state, the excess carrier concentration is given by p = GL p where GL is the generation
rate of excess carriers (cm–3-s–1) and p is the excess minority carrier lifetime.
I
+V

hv

Area = A

Fig 5.7 : Cross-section of a semiconductor

The conductivity from Eq. (5.2) can be rewritten as
= e( n n0 + p p0) + e( p)( n + p) …(5.3)
The change in conductivity due to the optical excitation, known as the photoconductivity, is then
= e( p)( n + p) …(5.4)
An electric field is induced in the semiconductor by the applied voltage, which produces a current The
current density can be written as
J = (J0 + JL) = ( 0 + )E …(5.5)
where, J0 is the current density in the semiconductor prior to optical excitation and JL is the photocurrent
density. The photocurrent density is JL = E. If the excess electrons and holes are generated uniformly
throughout the semiconductor, then the photocurrent is given by
IL = JL A = AE = eGL p( n + p)AE …(5.6)
where, A is the cross-sectional area of the device. The photocurrent is directly proportional to the
excess carrier generation rate, which in turn is proportional to the incident photon flux. If excess electrons and
holes are not generated uniformly throughout the semiconductor material, then the total photocurrent is found
by integrating the photoconductivity over the cross-sectional area.

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 178 Electronic Devices and Circuits

Since nE is the electron drift velocity, the electron transit time, that is, the time required for an
electron to flow through the photoconductor, is
L
tn …(5.7)
nE
The photocurrent can be rewritten as

p p
IL eGL 1 AL …(5.8)
tn n

We may define a photoconductor gain, ph, as the ratio of the rate at which charge is collected by the
contacts to the rate at which charge is generated within the photoconductor. We can write the gain as
IL
ph …(5.9)
eGL AL
which, using Eq. (5.8), can be written

p p
ph
1 …(5.0)
tn n

Example 5.1

To calculate the gain of a silicon photoconductor.

Consider an n -type silicon photoconductor with a length L = 100 m, cross-sectional area
A = 10 –7 cm 2 , and minority carrier lifetime p = 10 –6 s. L et the applied voltage be
V = 10 volts.
Solution 5.1
The electron transit time is determined as
L L2
tn
nE nV

(100 10 4 )2
7.41 10 9 s
(1350)(10)
The photoconductor gain is then
p p
ph
1
tn n
6
10 480
9
1 1.83 102
7.41 10 1350

Let’s consider physically what happens to a photon-generated electron, for example. After the excess
electron is generated, it drifts very quickly out of the photo conductor at the anode terminal. In order to maintain
charge neutrality throughout the entire photoconductor, another electron immediately enters the photoconductor
at the cathode and drifts toward the anode. This process will continue during a time period equal to the mean
carrier lifetime. At the end of this period, on the average, the photoelectron will recombine with a hole.
When the optical signal ends, the photocurrent will decay exponentially with a time constant equal to
the minority carrier lifetime. The switching speed of frequency response is inversely proportional to the lifetime.
From the photoconductor gain expression, we would like a large minority carrier lifetime, but the switching
speed is enhanced by a small minority carrier lifetime. There is obviously a tradeoff between gain and speed. In

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 Special Semiconductor Devices 179

general, the performance of a photodiode, which we will discuss next, is superior to that of a photoconductor.

5.4.2 Photodiode

When the is diode is forward biased then the current flow is large and is due to diffusion of the carriers.
Now when the diode is reverse biased then current flow is very small and is due to drifting of the carrier. The
current in reverse bias flow because of generation of carrier inside the depletion region (width W) and also the
minority carrier which are thermally generated with in the diffusion length of each side of the junction diffuse
into the depletion region and are swept by electric filed to produce current.
If the junction is uniformly illuminated by photons with hv > Eg, an added generation rate gop (EHP/
cm3-s) participates in this current (Fig. 5.8). The number of holes created per second within a diffusion length
of the transition region on the n side is ALpgop. Similarly ALngop electrons are generated per second within Ln of
xp0 and AWgop carriers are generated within W. The resulting current due to collection of these optically generated
carriers by the junction is
Iop = qAgop(Lp + Ln + W) …(5.11)
If we call the thermally generated current Ith, we can add the optical generation of Eq.(5.11) to find the
total reverse current with illumination. Since this current is directed from n to p, the diode equation becomes
I = Ith(eqV/kT – 1) – Iop
Lp Ln
I qA pn np ( eqV / kT 1) qAgop ( Lp Ln W ) …(5.12)
p n

Thus the I-V curve is lowered by an amount proportional to the generation rate as shown in Fig. 5.8 (b).
This equation can be considered in two parts the current described by the usual diode equation, and the current
due to optical generation.
When the device is short circuited (V = 0), the terms from the diode equation cancel in Eq. (5.12), as
expected. However, there is a short-circuit current from n to p equal to Iop. Thus the I- V characteristics of
Fig. 5.8(b) cross the I-axis at negative values proportional to gop.
hv > Eg

gop = 0
V
g1
W g2
g3

g 1 >g 2 > g 1

(a) (b)
Fig 5.8 : Optical generation of carriers in a p-n junction: (a) absorption of light by the device;
(b) I-V characteristics of an illuminated junction.
When there is an open circuit across the device, I = 0 and the voltage V = Voc is
kT
Voc ln[Iop / Ith 1]
q

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 180 Electronic Devices and Circuits

kT Lp Ln W
ln gop 1 …(5.13)
q ( Lp / p )pn ( Ln / n )np

For the special case of a symmetrical junction, pn = np and p = n, we can rewrite in terms of the
thermal generation rate pn/ n = gth and the optical generation rate gop. Neglecting generation within W:

kT gop
Voc ln for gop gth …(5.14)
q gth

REMEMBER Actually, the term gth = pn/tn represents the equilibrium thermal generation-recombination
rate. As the minority carrier concentration is increased by optical generation of EHPs, the
lifetime tn becomes shorter, and pn/tn becomes larger (pn is fixed, for a given doping and
temperature). Therefore, Voc cannot increase indefinitely with increased generation rate.

Thus we can see that when light fall on the pn juction and the pn juction is open circuited then current
through device should be zero. Now when the light falls then current due to generated carrier Iop will exist and
but total current (I) = 0 , thus in Equation(5.12) we get Ith (eqV/kT – 1) = Iop. Thus we get that some voltage will
generate acrosse the juction. The appeareance of a forward voltage across an illuminated juction is known as
photo voltaic effect.

EC

qV0
Efn
EF qVoc
EV EFp

p n
p n

(a) (b)
Fig 5.9 : Effects of illumination on the open circuit voltage of a junction: (a) junction at equilibrium;
(b) apperance of a voltage Voc with illumination.
Depending on the intended application, the photodiode of Fig. 5.8 can be operated in either the third or
fourth quarters of its I-V characteristic. As Fig. 5.10 illustrates, power is delivered to the device from the
external circuit when the current and junction voltage are both positive or both negative (first or third quadrants).
In the fourth quadrant, however; the junction voltage is positive and the current is negative. In this case power
is delivered from the junction to the external circuit(notice that in the fourth quadrant the current flows from
the negative side of V to the positive side, as in a battery. If power is to be extracted from the device, the fourth
quadrant is used; on the other hand, in applications as a photodetector we usually reverse bias the junction and
operate it in the third quadrant.

REMEMBER • the current that flow in photodiode in reverse bias is drift current.
• In reverse bias the current when pn juction is not illumination the current is Ith and this
current is called the dark current. When light fall on pn junction then the carrier generateue
to which current increase.

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 Special Semiconductor Devices 181
R E R E R

I IT
IT

p n p n p n

+ V – – VT + + V –

1st quadrant 3rd quadrant 4th quadrant

I I I

V V V

(a) (b) (c)

Fig 5.10 : Operation of an illuminated junction in the various quadrants of its I-V characteristic; in (a) and (b), power is
delivered to the device by the external circuit; in (c) the device delivers power to the load.

Thus there are three quadrant in which the photodiode can work. In
1. 1st quadrant : work as normal forward bias diode. Both V and I are positive thus absorb power.
2. 3rd quadrant : work as photo detector, both I and V are negative thus absorb power.
3. 4th quadrant: work as solar cell, I is negative and V is positive, so deliver power.

5.4.3 Solar cell

The photodiode in 4th quadrant work as solar cell. The 4th quadrant of I-V plot of photodiode is shown
in Fig 5.11). The current eqution is from equation (5.12). The value of Isc is the current when V = 0, thus
I = –Ith – Iop and Isc = Iop + Ith …(5.15)
Short circuit I

Light n p ISC

0.7 V
0
V
–
Solar cell
Ec IV

Maximum
–ISC power output
Ev + V

(a) (b)
Fig 5.11 : (a) Light can produce a current in pn junction at V = 0.
(b) Solar cell IV product is negative, indicating power generation.

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 182 Electronic Devices and Circuits

The output power is |I × V| and we can change operting point by changing load. We have already seen
all the formulae.

Output Power:
There is a particular operating point on the solar cell IV curve that maximizes the output power,
|I × V|. A load-matching circuit is usually employed to ensure that the cell operates at that point.
Output Power = Isc × Voc × FF …(5.15)
where FF (called the fill factor) is simply the ratio of the maximum |I × V| to Isc × Voc. FF is typically
around 0.75. The short-circuit current, Isc, is proportional to the light intensity as shown in Eq. (5.14).
We know that

kT gop
Voc ln …(5.16)
q gth
ni2
For high output power we need high Voc, thus we need high gop and for p-n diode the gth , thus
Nd p
kT p gop Nd
Voc ln …(5.17)
q ni2
Thus increasing Nd can raise Voc. Solar cells should therefore be doped fairly heavily. Large carrier
generation rate, G, is good for Voc. Using optical concentrators to focus sunlight on a solar cell can raise G and
improve VOC. Besides reducing the solar cell area and cell cost, light concentration can thus increase the cell
efficiency provided that the cell can be effectively cooled. If the cell becomes hot, ni2 increases and Voc drops. A
larger band-gap energy, Eg, reduces ni2 exponentially. Voc therefore increases linearly with Eg. On the other
hand, if Eg is too large, the material would not absorb the photons in a large long-wavelength (red and infrared)
portion of the solar spectrum (see Fig. 5.12) and Lsc drop.

Important terms releted to photo detector

1. Responsivity:
The resposivity of a photodetetor relates the electric current Iop flowing in the device circuit to the
optical power p incident on it.
Iop = e …(5.18)
Here is number of photons per second. Thus
p Power of light
…(5.19)
hv energy of each photon
p
Ip e …(5.20)
hv
Iop e n
Responsivity R …(5.21)
p hv 1.24
The responsivity is proportional to quantum efficiency ( ).

2. Quantum Efficiency
The quantum efficiencey (external quantum effeciency) of a photodetector is the probobility that
single photon incident an the device generate a photo carrier pair that contribute to detector current.

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 Special Semiconductor Devices 183

For a photocurrent density Jop, we collect Q carriers per unit area per second. For an incident optical
power density of Pop, the number of photons shining on the detector per unit area per second is Pop/hv. Therefore,
Jop Pop
Q …(5.22)
q hv
For a photodiode that has no current gain, the maximum Q is unity. If low-level optical signals are to be
detected, it is often desirable to operate the photodiode in the avalanche region of its characteristic In this mode
each photogenerated carrier results in a significant change in the current because of avalanche multiplication,
leading to gain and external quantum efficiencies of greater than 100%. Avalanche photodiodes (APDs) are
useful as detectors in fiber-optic systems.

5.4.4 Pin photodiode

In many photodetector applications, the speed of response is important; therefore the prompt
photocurrent generated in the space charge region is the only photocurrent of interest. To increase the
photodetector sensitivity, the depletion region width should be made as large as possible. This can be achieved
in a PIN photodiode.
The PIN diode consists of a p region and an n region separated by an intrinsic region. A sketch of a PIN
diode is shown in Fig. 5.12(a). The intrinsic region width W is much larger than the space charge width of a
normal pn junction. If a reverse bias is applied to the PIN diode, the space charge region extends completely
through the intrinsic region.
Assume that a photon flux 0 is incident on the p+ region. If we assume that the p+ region width Wp is
very thin, then the photon flux, as a function of distance, in the intrinsic region is (x) = 0e– x, where is the
photon absorption coefficient. This nonlinear photon absorption is shown in Fig. 5.12(b). The photocurrent
density generated in the intrinsic region can be found as
W W
x W
JL e GL dx e 0 e dx e 0 (1 e ) …(5.23)
0 0

This equation assumes that there is no electron-hole recombination within the space charge region and
also that each photon absorbed creates one electron-hole pair.
VR
– +

i
p +
i n +
p +
(x ) n+

W Wn
Wp x =0 x =W

(a) (b)
Fig 5.12 : (a) A reverse-biased PIN photodiode (b) Geometry showing nonuniform photon absorption

5.4.5 Avalanche Photodiode

The avalanche photodiode is similar to the PIN photodiode except that the bias applied to the avalanche
photodiode is sufficiently large to cause impact ionization. Electron-hole pairs are generated in the space charge
region by photon absorption as we have discussed previously. The generated electrons and holes now generate
additional electron-hole pairs through impact ionization. The avalanche photodiode now has a current gain

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 184 Electronic Devices and Circuits

introduced by the avalanche multiplication factor.

The electron-hole pairs generated by photon absorption and by impact ionization are swept out of the
space charge region very quickly. If the saturation velocity is 107 cm/s in a depletion region that is 10 m wide,
then the transit time is
107
t 100 ps
10 10 4
The period of a modulation signal would be 2 t, so that the frequency would be
1 1
f 12
5 GHz
2 t 200 100
If the avalanche photodiode current gain is 20, then the gain-bandwidth product is 100 GHz. The
avalanche photodiode could respond to light waves modulated at microwave frequencies.

5.4.6 Phototransistor
A bipolar transistor can also be used as a photodetector. The phototransistor can have high gain through
the transistor action. An npn bipolar phototransistor is shown in Fig. 5.13(a). This device has a large base-
collector junction area and is usually operated with the base open circuited. Fig 5.13(b) shows the block diagram
of the phototransistor. Electrons and holes generated in the reverse-biased B-C junction are swept out of the
space charge region, producing a photocurrent IL. Holes are swept into the p-type base making the base positive
with respect to the emitter. Since the B-E becomes little forward-biased, electrons will be injected from the
emitter back into the base, leading to the normal transistor action.
hv

Base Emitter

p n n
n p
IE C
E IE + VCE
n
IL

Collector B

(a) (b)
Fig 5.13 : (a) A bipolar phototransistor (b) Black diagram of the open-base phototransistor
From Figure 5.13 we see that
IE = IE + IL …(5.24)
where IL is the photon-generated current and is the common base current gain. Since the base is an
open circuit, we have IC = IE so Eq. (5.24) can be written as
IC = IC + IL …(5.25)
Solving for IC, we find

IL
IC …(5.26)
1
Relating to , the dc common emitter current gain, Eq. (5.24) becomes
IC = (1 + )IL …(5.27)

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 Special Semiconductor Devices 185

Equation (5.27) shows that the basic B-C photocurrent is multiplied by the factor of (l + ). The
phototransistor, then, amplifies the basic photocurrent. With the relatively large B-C junction area, the frequency
response of the phototransistor is limited by the B-C junction capacitance. Since the base is essentially the input
to the device, the large B-C capacitance is multiplied by the Miller effect, so the frequency response of the
phototransistor is further reduced. The phototransistor, however, is a lower-noise device than the avalanche
photodiode.

5.5 Light emitting Diodes

Photodetectors and solar cells convert optical energy into electrical energy here photons generate excess
electams and holes, which produce an electric current. We might also apply a voltage across a pn junction
resulting in a diode current, which in turn can produce photons and a light output. This inverse mechanism is
called injection electroluminescence. This device is known as a Light Emitting Diode (LED). The spectral 1
output of an LED may have a relatively wide wavelength bandwidth of between 30 and 40 nm. However, this
emission spectrum is narrow enough so that a particular color will be observed, provided the output is in the
visible range.

5.5.1 Generation of Light

We know the relationship between bandgap energy and wavelength. When a voltage is applied across a
pn junction, electrons and holes are injected across the space charge region where they become excess minority
carriers. These excess minority carriers diffuse into the neutral semiconductor regions where they recombine
with majority carriers. If this recombination process is a direct band-to-band process, photons are emitted. The
diode diffusion current is directly proportional to the recombination rate, so the output photon intensity will
also be proportional to the ideal diode diffusion current.

5.5.2 Electroluminescence
The spontaneous emission of light due to radiative recombination from within the diode structure is
known as electroluminescence. The term electroluminessce is used when optical emission result form the
application of an electric field. Thus when a p-n juction is forward biased then lot of minority carrier will cross
the juction and and thus they will recombine with majority carrier, thus recommbination generate photons. The
amount of radiative recombination and emission area within structure is dependent upon semiconductor material
used and fabrication of device.

5.5.3 Working of Light emitting diode

When heavily doped P N+ juction is forward biasesd then band digram is as shown in Fig 5.14
e(V0 – V)
EFc

Eg hv hv
eV > Eg
Eg

EFv

Injection
position
Active
Fig 5.14 : Band diagram of p-n junction under forward bias

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 186 Electronic Devices and Circuits

At high injection carrier density in such a junction there is an active region near the depletion layer that
contains simultaneously degenerate populations of electrons and holes.
The increased concentration of minority carriers in the opposite type region in the forward-biased p-n
diode of direct-bandgap materials leads to the radiative recombination of carriers across the bandgap. The
energy released by this electron-hole recombination is approximately equal to the bandgap energy Eg.
Thus the energy of photon is Eg , the wave lenght of photon will be
hc
= Eg

1.24
Eg(ev )
( m)

REMEMBER • The light output of an LED is the spontaneous emission generated by radiative recombination
of electrons and holes in the active region of the diode under forward bias.
• The semiconductor material is direct-bandgap to ensure high quantum efficiency, often III-V
semiconductors.
• An LED emits incoherent, non-directional, and unpolarized spontaneous photons that are
not amplified by stimulated emission.
• An LED does not have a threshold current. It starts emitting light as soon as an injection
current flows across the junction.

5.5.4 Efficency of LED

1. Internal quantum efficiency:

When the pn juction is forward biased then recombination of the carrier will take place, recombination
can produce a photon or simply release energy in form of heat. The internal quantum efficiency int of a
semiconductor material: the ratio of the radiative electron hole recombination coefficient to the total (radiative
and nonradiative) recombination coefficient.
This parameter is significant because it determines the efficiency of light generation in a semiconductor
material.
lf the recombination coefficient r is split into a sum of radiative and nonradiative parts, r = rr + rnr, the
internal quantum efficiency is
rr rr
int …(5.28)
r ( rr rnr )
Thus using the internal quantum efficincy we can find the intenal photon flux,
The internal photon flux
i
int …(5.28)
e
That is int is ratio of forward bias current in diode to the charge in each electron. This is the ideal case
when all recombination are radiative recombination practically when all recombination are not radiative then

i
int int …(5.29)
e
The internal quantum efficiency may also be written in term of the recombination lifetimes as r is
inversely proportional to lifetime .

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 Special Semiconductor Devices 187

Define the radiative and nonradiative recombination lifetimes r and nr

1 1 1
…(5.29)
r nr
The internal quantum efficiency is then given by
rr 1 1
r r

nr
int …(5.30)
r ( r nr )

Note: Semiconductor optical sources require int to be large (in typical direct bandgap materials r nr).
Another way to look at int is that
The internal photon flux (photons per second), generated within a volume V of the semiconductor, is
directly proportional to the carrier-pair injection rate R (electron-hole pairs/cm3-s). The steady-state excess-
1 1 1
carrier concentration n = R , where IS the total recombination lifetime .
r nr
The injection of RV carrier pairs per second therefore leads to the generation of a photon flux =
int RV photons/s.

n n
int RV int V V …(5.31)
r

Thus for high int we need high n and small

REMEMBER The excess carriers in a LED with homojunction (same materials on the p and n sides) are
neither confined nor concentrated but are spread carrier diffusion. Thus LED are generally
designed with heterojunction.
Since internal photon flux is int, thus the power level at the juction or internal power level will be
pint = int × energy of each photon

hc
int

pint = int × Eg

REMEMBER Each photon will have energy equal to band gap of the semiconductor.

Example 5.2

The radiative and nonradiative recombination lifetimes of the minority carriers in the active
region of a LED are 60 ns and 100 ns. Determine the total carrier recombination lifetime
and the power internally generated within the device when the peak emission wavelength is
870 nm at a driving current of 40 mA.
Solution 5.2
The total carrier recombination lifetime is given by

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 188 Electronic Devices and Circuits

r nr
37.5 ns
( r nr )
The internal quantum efficiency

int
0.625
r

i 1240 eV-nm
Pint int 36 mW
e 870 nm

2. Output photon flux and efficiency

The photon flux spontaneously generated in the junction active region is radiated uniformly in all directions.
However, the flux that emerges from the device (output photon flux) depends on the direction of emission.
A B

C C l1
n
active region
p

Fig 5.15 : LED with photons generated at junction, calculating output flux
e.g. Ray A at normal incidence is partially reflected. Ray B at oblique incidence suffers more reflection.
Ray C lies outside the critical angle and thus is trapped in the structure by total internal reflection.
The photon flux traveling in the direction of ray A (normal incidence) is attenuted by factor
1 = exp(– l1)
Where is the absorption coeficiant (cm–1) of the ntype material and l1 is distance from juction to
surface of the device. For normal incidence we know that refiection coefficient is (Fig 5.16)

2
2 1
r
2 1

n2 n1

Incident wave

Transmitted wave
Reflected wave

Fig 5.16 : Schematic of incident, reflected, and transmitted photons at a dielectric interface
and transmission coefficient is
=1– r

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 Special Semiconductor Devices 189

Thus efficiency for light escape will be

escape = (1 – r) …(5.31)
We can see that ray B has farther to travel and suffer a larger absorption, and the ray C suffer total
internal reflection. The rays which lie inside the cone of critical angle can escape, so called escape cone.

r C

An arbitrary point source

with spherical emission
in the active junction
Fig 5.18 : Finding fraction of light lies within escape cone.
Here we estimate the fraction of the total generated photon flux that lies within the escape cone. The
area of the circular disk cap at top of this cone is (assuming a spherical emission distribution radius r)
c
A 2 r sin r d 2 r 2 (1 cos c)
0
A
The fraction of the emitted light that lies within the solid angle subtended by this escape cone is
4 r2
1/2
1 1 1 1
3
(1 cos c) 1 1 2
2 2 n 4n2
The efficiency with which the internal photons can be extracted from the LED structure is known as the
extraction efficiency e. The output photon flux 0 is related to the internal photon flux
i
0 e e int
e
where the extraction efficiency ne specifies how much of the internal photon flux is transmitted out of
the structure.
A single quantum efficiency that accommodates both e and int is the external quantum efficiency ext

ext e int

i
The output photon flux 0 ext
e

ext is simply the ratio of the outputphoton flux 0 to the injected electron flux i/e.

3. Output optical Power

The LED output optical power P0:

i
P 0 = hv 0 ext hv
e
The internal efficiency int for LEDs ranges between 50% and just about 100%, while the extraction

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 190 Electronic Devices and Circuits

efficiency e can be rather low.

4. Responsivity
The responsivity R of an LED is defined as the ratio of the emitted optical power P0 to injected current
i, i.e. R = P0/i

P0 0 hv
R hv ext
i i e
The responsivity in W/A, when 0 is expressed in m,

1.24
R ext
0

Note: The linear dependence of the LED output power P0 on the injected current i is valid only when the current
is less than a certain value (say tens of mA on a typical LED). For larger currents, saturation causes the proportionality
to fail.

5. Power conversion efficiency

Another measure of performance is the power-conversion efficiency (or wall-plug efficiency), defined as
the ratio of the emitted optical power P0 to the applied electrical power.

P0 hv
c ext
iV eV
where V is the voltage drop across the device
Note that c ext because hv eV, where eV = EFc – EFv in a degenerate (heavily doped) junction.

Note: • Internal quantum efficiency int - only a fraction of the electron-hole recombinations are radiative in
nature
• Extraction efficiency e - only a small fraction of the light generated in the junction region can escape
from the high-index medium
• External quantum efficiency ext = e int (can be measured from the responsivity R = P0/i)
• Power-conversion (wall-plug) efficiency c - efficiency of converting electrical power to optical power
( c ext)

Example 5.3

Calculate the open-circuit voltage when solar cell with these concentration is used. Consider
a silicon pn junction at 300 k, with these parameters.
N a = 5 × 10 18 cm –3 N d = 10 16 cm –3
D n = 25 cm 2/S D p = 10 cm 2 /S
n0 = 5 × 10 –7 S p0 = 10 –7 S
IL
Consider the photocurrent density J L = = 15 mA/cm 2 . Find the open-circuit voltage of
A
the solar cell. Again find the open-circuit voltage when solar intensity increased by a factor
of 10.

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 Special Semiconductor Devices 191

Is eDn np0 eDp pn0 Dn Dp

Js eni2
A Ln Lp Ln Na Lp Nd

We may calculate Ln and Lp by

7
Ln Dn n0 25 5 10 35.4 m

7
Lp Dp p0 10 10 10 m

Then,

25 10
Js (1.6 10 19
) (1.5 1010 )2
(35.4 10 )(5 10 ) (10 10 4 )(1016 )
4 18

= 3.6 × 10–11 A/cm2

Then open-circuit voltage is given by ,

JL
Voc Vt ln 1
Js

3
JL 15 10
Vt ln 1 0.0259ln 1
Js 3.6 10 11

= 0.514 V
If the intensity of the sun in increased by 10 times, then JL = 150 mA/cm2.
If we assume, temperature remains constant, then reverse saturation current density will also remain
constant.
So, Js = 3.6 × 10–11 A/cm2
For this case, open-circuit voltage will be

JL
Voc Vt ln 1
Js

150 10 3
(0.0259)ln 1
3.6 10 11

= 0.574 V

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 192 Electronic Devices and Circuits

5 . Consider a silicon photoconductor at T = 300 K with

the following parameters:
Nd = 1016 cm–3 Na = 1015 cm–3

1
2 2
n = 1000 cm /V-s p = 430 cm /V-s
Subjective Practice Problems –6 –7
n0 = 10 s p0 = 10 s
–3
A = 10 cm 2 L = 100 m
1 . (a) Calculate the maximum wavelength of a light Assume that a voltage of 5 volts is applied and assume
source that can generate electron-hole pairs in that excess electrons and holes are uniformly
Ge, Si, and GaAs. generated at a rate of GL = 1020 cm–3-s–1. Calculate
(b) Two sources generate light at wavelengths of (a) the steady-state excess carrier concentration,
= 570 nm and = 700 nm. What are the (b) the photoconductivity,
corresponding photon energies? (c) the steady-state photocurrent, and
(d) the photoconductor gain.
2 . A light source with hv = 1.3 eV and at a power density
of 10–2 W/cm2 is incident on a thin slab of silicon. 6 . Consider an n-type silicon photoconductor that is
The excess minority carrier lifetime is 10–6 s. 1 m thick, 50 m wide, and has an applied electric
Determine the electron-hole generation rate and the field in the longitudinal dimension of 50 V/cm. If
steady-state excess carrier concentration. Neglect the incident photon flux is 0 = 1016 cm–2-s–1 and
surface effects. the absorption coefficient is a = 5 × 104 cm–1,
calculate the steady-state photocurrent if n = 1200
3 . Consider an n-type GaAs sample with p = 10–7 s. cm2/V-s, p = 450 cm2/V-s, and p0 = 2 × 10–7 s.
(a) It is desired to generate a steady-state excess
carrier concentration of p = 1015 cm–3 at the 7 . Consider a long silicon pn junction photodiode at
surface. The incident photon energy is T = 300 K with the following parameters:
hv = 1.9 eV. Determine the incident power Na = 2 × 1016 cm–3 Nd = 1018 cm–3
density required. (Neglect surface effects.) Dn = 25 cm2/s Dp = 10 cm2/s
–7 –7
(b) At what distance in the semiconductor does the n0 = 2 × 10 s p0 = 10 s
generation rate drop to 20 percent of that at the
Assume a reverse-bias voltage of VR = 5 volts is
surface?
applied and assume a uniform generation rate of
4 . The absorption coefficient in amorphous silicon is GL = 1021 cm–3-s–1 exists throughout the entire
approximately 10 4 cm –1 at hv = 1.7 eV and photodiode. Calculate
105 cm–1 at hv = 2.0 eV. Determine the amorphous (a) the prompt photocurrent density and
silicon thickness for each case so that 90 percent of (b) the total steady-state photocurrent density.
the photons are absorbed.

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 Cha pter

The Bipolar
Junction Transistor 6
6.1 Introduction
We have already studied single pn junction and we have analized the pn junction i-v charactristic and
how it function as electron switch. The transistor is a multifunction semiconductor device that, in conjunction
with other circuit elements, is capable of current gain, voltage gain, and signal-power gain. The transistor is
therefore referred to as an active device whereas the diode is passive. The basic transistor action is the control
of current at one terminal by voltage applied across two other terminals of the device.
The bipolar transistor has three separately doped regions and two pn junctions, sufficiently close together
so that interactions occur between the two junctions. We will use much of the theory developed for the pn
junction in the analysis of the bipolar transistor. Since the flows of both electrons and holes are involved in this
device, it is called a bipolar transistor.
We will first discuss the basic geometry and operation of the transistor. Since there is more than one pn
junction in the bipolar transistor, several combinations of reverse and forward-bias junction voltages are possible,
leading to different operating modes in the device. As with the pn junction diode, minority carrier distributions
in the bipolar transistor are an important part of the physics of the device—minority carrier gradients produce
diffusion currents. We will determine the minority carrier distribution in each region of the transistor, and the
corresponding currents.

6.1 The Bopolar Transistor Action

The bipolar transistor has three separately doped regions and two pn junctions. Fig 6.1 shows the basic
structure of an npn bipolar transistor and a pnp bipolar transistor, along with the circuit symbols. The three
terminal connections are called the emitter, base, and collector. The width of the base region is small compared
to the minority carrier diffusion length.

Emitter Collector Emitter Collector

n++ p+ n p++ n+ p

C C
Base B Base B
E E

(a) (b)

Fig 6.1 : Simplified block diagrams and circuit symbols of (a) npn, and (b) pnp bipolar transistors

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 194 Electronic Devices and Circuits

The (++) and (+) notation indicates the relative magnitudes of the impurity doping concentrations
normally used in the bipolar transistor, with (++) meaning very heavily doped and (+) meaning moderately
doped. The emitter region has the largest doping concentration; the collector region has the smallest. The
reasons for using these relative impurity concentrations, and for the narrow base width, will become clear as we
develop the theory of the bipolar transistor. The concepts developed for the pn junction apply directly to the
bipolar transistor.

6.1.1 The Basic principal of operation

The npn and pnp transistors are complementary devices. We will develop the bipolar transistor theory
using the npn transistor, but the same basic principles and equations also apply to the pnp device.
Fig 6.2 shows an idealized impurity doping profile in an npn bipolar transistor for the case when each region is
uniformly doped.

(Nd – Na)
E C
n++ p+ n

(a) (b)
Fig 6.2 : Idealized doping profile of a uniformly doped npn bopolar transistor
The normal bias configuration of the BJT is when base - emitter (B-E) junction is forward blased and
base collector (B-C) junction is nevers biased. In this configuration (shown in Fig 6.3). The emitter emits
electrons into base and base emits holes into emitter as B-E junction is forward biased. From our understanding
of pn junction we can understand that the number of electrons being emitted into base will be much higher than
number holes being emitter into emitter as doping of emitter is higher than doping base region.
The electrons which are minority carrier in base will travel inside base region due to diffusion as
concentration gradient exist for electrons in base region. Since the B-C junction is reverse biased thus high
electric field exist inside the depletion region of B-C junction. Due to this high electric field from collector to
base all the electrons which reach the end of base region will be swept into collector and thats why we have
almost zero minority carrier (electrons) concentration at base end towards B-C junction.
The minority carrier concentration in npn BJT biased with BE junction forward biased and BC junction
reverse biased can be easly drawn from understanding of minority carrier profile in forward biased and reverse
biased pn junction. The mode of operation of BJT where base - collector (BC) junction is reverse biased and base
- emitter (BE) junction is forward biased is called forward active mode. The biased configuration, minority
carrier profile and band diagram is shown in Fig 6.3. We can see that concentration of electrons is high in base
at emitter side as emitter has injected electrons in base and the concentration of electrons decreases exponentially
( here we have shown that decay of concentration is linear as the width of base is very small), the concentratio
of electrons become zero at end of base as the high electric field (from C to B )in depletion region of BC junction
will sweep all the electrons into the collector. The minority carrier profile in collector can be simply explained
from the minority carrier profile of reverse bias pn junction that is hole concentration will be zero in collector at
B-C junction as all holes will be swept into base by electric field (from C to B) and the concentration of holes
deep inside collector will be ni2/Nc. The concentration of holes in emitter can be exaplined as holes are injected
into emitter by base thus large concentration of holes in emitter at emitter base junction and hole concentration
reduces as we go inside emitter as holes recombine with electrons and decay is exponential.

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 Bipolar Junction Transistor 195

E-B space B-C space

charge region charge region

Emitter Base Collector

-n- -p- -n-
E-
iE n++ p+ n iC E-field field
E C
np(x )
RE B RC
– VBE+ – VCB+ pn(x )
pn0
np0
pn0
pn (x)
– VBB + – VCC+

(a) (b)

B(p) e–
E C Ec
(n) (n) EFe
Ec EFb
EF Ev EFc
Ev

Zero bias Forward active

(c)

Fig 6.3 : (a) Biasing of an npn bipolar transistor in the forward-active mode
(b) Minority carrier distribution in an npn bipolar transistor operating in the forward-active mode
(c) energy-band diagram of the npn bipolar transistor under zero bias and under a forward-active mode bias.

6.1.2 Transistor Current Relation

The minority carrier concentrations are again shown in Fig. 6.4 for an npn bipolar transistor biased in
the forward active mode. Ideally, the minority carrier electron concentration in the base is a linear function of
distance, which implies no recombination. The electrons diffuse across the base and are swept into the collector
by the electric field in the B-C space charge region.
E(n) B(p) C(n)
v
nB(0)=nB0 exp BE
Vt
i E1
Ideal E-field
iE (linear) iC

Actual
i E2

nB0

x =0 x =x B
i Ba i Bb

iB
Fig 6.4 : Minority carrier distributions and basis currents in a forward-biased npn bipolar transistor

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Assuming the ideal linear electron distribution in the base, the collector current can be written as a
diffusion current given by

dn( x ) nB(0) 0
iC eDn ABE eDn ABE
dx 0 xB

eDn ABE v
nB0 exp BE …(6.1)
xB Vt

where ABE is the cross-sectional area of the B-E junction, nB0 is the thermal equilibrium electron
concentration in the base, and Vt is the thermal voltage. The diffusion of electrons is in the +x direction so that
the conventional current is in the -x direction. Considering magnitudes only, Eq. (6.1) can be written as

v BE
iC= I s exp …(6.2)
vT

eD n ABE
here Is nB 0
xB

Note: The collector current is controlled by the base-emitter voltage; that is, the current at one terminal of the
device is controlled by the voltage applied to the other two terminals of the device. As we have mentioned this is the
basic transistor action.

Emitter Current
From Fig 6.4 we can see that total emitter current is due to diffusion of electron in base region and due
to difusion of hole in emitter region . Since BE junction is forward biased the hole enter emitter and eletron
enter into base .Thus
iE = iE1 + iE2

vBE
iE1 ic Is exp …(6.3)
vT

and iE2 = hole diffusion current

d p( x )
eD p ABE
dx

d v x
eDp ABE pEO exp BE exp
dx vT Lp

eDp vBE x
iE2 ABE pEO exp exp
Lp vT Lp
Thus at x = 0

eDp vBE
iE2 ABE pEO exp …(6.4)
Lp vT

The negative sign show that current flow in –x.

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 Bipolar Junction Transistor 197

Thus
iE = iE1 + iE2
= ic + iE2

vBE
ISE exp …(6.5)
vT

vBE
Since all current components in Eq. (6.5) are functions of exp , the ratio of collector current to
Vt
emitter current is a constant. We can write
iC
iE
where is called the common-base current gain. By considering Eq. (6.5), we see that iC < iE or < 1.
Since iE2 is not part of the basic transistor action, we would like this component of current to be as small as
possible. We would then like the common base current gain to be as close to unity as possible.

Note: In npn BJT we want that the electron emitted by emitter should be collected by collector and want minimum
involvement of holes in the process. Thus we want 1.

Base Current
As shown in Fig. 6.4 the component of emitter current iE2 is a B-E junction current so that this current
vBE
is also component of base current shown as iBa. This component of base current is proportional to exp .
Vt
There is also a second component of base current. We have considered the ideal case in which there is
no recombination of minority carrier electrons with majority carrier holes in the base. However, in reality there
will be some recombination. Since majority carrier holes in the base are disappearing, they must be resupplied
by a flow of positive charge into the base terminal. This flow of charge is indicated as a current iBb in Fig. 6.4.
The number of holes per unit time recombining in the base is directly related to the number of minority carrier
vBE
electrons in the base. Therefore, the current iBb is also proportional to exp . The total base current is the
Vt
vBE
sum of iBa and iBb, and is proportional to exp .
Vt
The ratio of collector current to base current is a constant since both currents are directly proportional
vBE
to exp . We can then write
Vt
iC
…(6.7)
iB

where is called the common-emitter current gain. Normally, the base current will be relatively small
so that, in general, the common-emitter current gain is much larger than unity (on the order of 100 or larger).

6.1.3 The Mode of Operation

How the current flow and the working of BJT in various mode of operation will be disussed in analog
electronic here we will see only see only a part of brief introduction.

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For flow of current thougth the device we need at least one of the junction (BE or BC) to be forward
biased. Fig 6.5 shows the npn transistor in a simple circuit. In this configuration, the transistor may be biased in
one of three modes of operation(to be discussed in this section). If the B-E voltage is zero or reverse biased (VBE
0), then majority carrier electrons from the emitter will not be injected into the base. The B-C junction is also
reverse biased; thus, the emitter and collector currents will be zero for this case. This condition is referred to as
cut off— currents in the transistor are zero.(Thus cut off condition is that where both the junctions are reverse
biased and no current flow in the device.)

IC –

VR RC
+ C +
VCB
–
n +
RB
B
p VCE
+
IB n –
+ +
VBE
VBB – E VCC
–
– IE

Fig 6.5 : An npn bipolar transistor in a common-emmitter circuit configuration

Now we apply forward biased across B-E junction and due to this forward bias voltage electrons will be
emitted by emitter into base and this will produce collector current. When forward bias of BE junction is small
then collector current will be small and drop across resistor will be small and if VCC is large then VCB > 0 thus
BC junction will be reverse biased(Thus we have B-E junction to be forward biased and B-C junction to be
reverse biased). The kVL across collector- emitter loop is
VCC = ICRC + VCB + VBE …(6.8)
Thus for small applied forward bias the device go into forward active mode.
As the forward-biased B-E voltage increases, the collector current and hence VR will also increase. The
increase in VR means that the reverse-biased C-B voltage decreases, or |VCB| decreases. At some point, the
collector current may become large enough that the combination of VR and Vcc produces zero voltage across the
B-C junction. A slight increase in IC beyond this point will cause a slight increase in VR and the B-C junction will
become forward biased (VCB < 0). This condition is called saturation. In the saturation mode of operation, both
B-E and B-C junctions are forward biased and the collector current is no longer controlled by the B-E voltage(We
can see that collector current is not zero in saturation).

REMEMBER In the above discussion we assumed that when VCB is less than zero then the BC junction go into
forward bias or device go into saturation but generally the junction go in forward bias when
voltage across junction is 0.3 V or 0.4 V thats why we always say that npn BJT go in saturation
when VCB is < 0.3 V or 0.4V.
Thus as we will increase the forward biased of BE junction the device will go into satration region, that

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is both the junction become forward biased due to high collector current. Since the two junction in forward
biased both will oppose each other as when BE is forward biased then it will flow current from base to emitter
and when BC is forward biased then it will flow current from base to collector. Since current flow cannot stop
thus both junction will become forward biased such that current flow donot stop thus generally if BE junction
has forward bias of VBE = 0.7 V then BC junction can have maximum value of VBC = 0.4 V. Thus BE junction will
remain at higher forward bias and collector current will keep flowing in saturation mode also the relation
vBE
iC Is exp
vT
iC
=
iB
iC
=
iE
are valid in forward acctive mode only
Fig 6.6 shows the transistor current characteristics, IC versus VCE, for constant base currents. When
the collector-emitter voltage is large enough so that the base-collector junction is reverse biased, the collector
current is a constant in this first order theory. For small values of C-E voltage, the base-collector junction
becomes forward biased and the collector current decreases to zero for a constant base current.(For making
B-C junction forward bias we need VCB = 0.4V, since VBE = 0.7V thus VCE = VCB + VBE = 0.3 V)
Writing a Kirchhoffs voltage equation around the C-E loop, we find
VCE = VCC – ICRC …(6.9)
Equation (6.9) shows a linear relation between collector, current and collector-emitter voltage This
linear relation is called a load line and is plotted in Fig.6.6. The load line, superimposed on the transistor
characteristics, can be used to visualize the bias condition and operating mode of the transistor. The cutoff mode
occurs when IC = 0, saturation occurs when there is no longer a change in collector current for a change in base
current, and the forward-active mode occurs wheti the relation IC = IB is valid. These three operating modes
are indicated on the figure.
IC Load line

Saturation Increasing
IB
Forward active

Cutoff

VCC VCE
Fig 6.6 : Bipolar transistor common-emmitter current-voltage characteristics with load line superimposed
The fourth mode of operation is reverse active mode where the BC junction is forward biased and BE
junction is reverse biased. In this mode the role of emitter and collector are reversed. Thus collector will emit
electrons in base and emitter will collect electrons, since doping of collector is less thus forward biasing BC
junction means large number of holes will enter into collector than the concentration of electrons emitted by

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 200 Electronic Devices and Circuits

emiiter into the base and hole current will be larger than the electron current leading to smaller value of r
(ratio of emitter current and collector current in reverse active mode) and r (ratio of emitter current and base
current in reverse active mode) (in above case collector is acting as emitter and emitter act as collector ).
The junction voltage conditions for the four operating modes are shown in Fig.6.7

VCB

Cutoff Forward
active

VBE

Inverse Saturation
active

Fig 6.7 : Junction voltage conditions for the four operating modes of a bipolar transistor

Note: The application of BJT as switch and amplifier and BJT curcuits will be analyzed in analog electronics.

6.2 Minority Carrier Profile

In this section we will analyze minority carrier profile inside a BJT for various mode of operation of BJT.
The minority carrier profile will be drawn from our understanding of minority carrier profile in forward bias and
reverse bias pn junction. Lets look at notion used for analysis of bipolor transistor.
Table 6.1 Notation used in the analysis of the bipolar transistor
Notation Definition
For both the npn and pnp transistors
NE, NB, NC Doping concentrations in the emitter, base, and collector
xE, xB, xC Widths of neutral emitter, base, and collector regions
DE, DB, DC Minority carrier diffusion coefficients in emitter, base, and
collector regions
LE, LB, LC Minority carrier diffusion lengths in emitter, base, and collector
regions

E, B, C Minority carrier lifetimes in emitter, hase, and collector regions

For the npn
pE0, nB0, pC0 Thermal equilibrium minority carrier hole, electron, and hole
concentrations in the emitter, base, and collector
pE(x' ), nB(x), pC(x'') Total minority carrier hole, electron, and hole concentrations
in the emitter base, and collector
pE(x' ), nB(x), pC(x'') Excess minority carrier hole, electron, and hole concentrations
in the emitter, base, and collector
For the pnp
nE0, pB0, nC0 Thermal equilibrium minority carrier electron, hole, and

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 Bipolar Junction Transistor 201

electron concentrations in the emitter, base, and collector

nE(x' ), pB(x), nC(x'' ) Total minority carrier electron, hole, and electron
concentrations in the emitter, base, and collector
nE(x' ), pB(x), nC(x'' ) Excess minority carrier electron, hole, and electron
concentrations concentrations the emitter, base, and collecto

3.2.1 Forward Active Mode

Consider a uniformly doped npn bipolar transistor with the geometry shown in Fig. 6.8. When we
consider the individual emitter, base, and collector regions, we will shift the origin to the edge of the space
charge region and consider a positive x, x' or x'' coordinate as shown in the figure.

Emitter Base Collector

-n- -p - -n-

xE xB xC

x =xE x =0 x =0 x =x B x =0 x =x C
x x x

Fig 6.8 : Geometry of the npn bipolar transistor used to calculate the minority carrier distribution
When BE junction is forward biased then holes enter into emitter and electrons enter into base and as
BC junction is reverse biased the minority carrier will be zero close to collector base junction. The exponential
decay of minority carrier in base will be appoximated by a staraight line as width of base is much less than the
diffusion length of monority carrier (LB).

Base Region
Emitter Base Collector
-n- -p- -n-

nB(x )

pE(x ) pC0
nB0
pE0 pC(x )

x =x E x =0 x =0 x =x B x =0
x x x
Fig 6.9 : Minority carrier distribution in an npn bipolar transistor operating in the forward-active mode.
The monority carrier concentration at
vBE
• x = 0 is nB0 exp
vT
• x = xB is 0

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Since, xB << LB we approximate decay of minority carrier profile as straight line (Fig 6.9)
Thus excess minority carrier concentration will be

nB0 v
n B( x ) exp BE (1 x ) …(6.10)
xB vT

Note: • LB is diffusion length of minority carrier in base, in case of npn, LB is diffusion length of elecron and in
case of pnp, LB is diffusion lenght of hole
• LB DB B0

Collector Region
The minority carrier concentration in collector will be as shown in Fig 6.9. The carrier profile will be
exponentially rising from 0 to pC0 thus excess minority carrier concentration will be
pC(x'') = pC(x'') – pC0
x
pC0 exp …(6.11)
LC

Note: Here LC DC C0

Emitter Region
The minority carrier profile will be as shown in Fig 6.9, thus excess minority carrier concentration will
be
pE(x' ) = pE(x' ) – pE0
vBE x
pE0 exp 1 exp …(6.12)
vT LE
If xE that is width of emitter is smaller than LE then exponential decay can be approximated as linear.
Thus

pE0 v
pE(x' ) exp BE 1 ( xE x) …(6.13)
xE vT

6.2 Carrier Profile in Other Mode of Operation

1 Cut Off Mode

Here both the junction are reverse biased so minority carrier profile will be same as that of the reverse
biased pn junction . the carrier profile is shown in Fig 6.10(a).
In cutoff, both the B-E and B-C junctions are reverse biased; thus, the minority carrier concentrations
are zero at each space charge edge. The emitter and collector regions are assumed to be “long” in this figure,
while the base is narrow as compared to the minority carrier diffusion length. Since xB << LB, essentially all
minority carriers are swept out of the base region.

2. Saturation Mode
Here both junction are forward biased but VBE > VBC and base will provide hole to emitter and collector

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 Bipolar Junction Transistor 203

and emitter and colletor both provide electron to base. Obviously the hole concentration in collector at edge of
junction will be

vBC ni2 v
pC(0) pC0 exp exp BC
vT NC vT
The electron concentration in base at edge of BE junction will be

vBE ni2 v
nB(0) nB0 exp exp BE
vT NB vT

and at edge BC junction will be

vBC ni2 v
n B ( xB ) nB0 exp exp BE
vT NC vT
The hole concentration in emitter at edge of BE junction

vBE ni2 v
pE(0) PE0 exp exp BE
vT NE vT

Since vBE > vBC and NE > NB > NC thus we get

nB(0) > nB(xB), pE(0) > PC(0)
We can see this in Fig 6.10(b)

Note: We can see that vBE has to be greater than vBC then only nB(0) greater than nB(xB) as then concentration
gradient inside base exist and current flow from emitter to collector.
Emitter Base Collector Emitter Base Collector
- n- -p - - n- - n- -p - - n-

pC(0)

pC(x )
pC0 pE(x )
n B0 nB0 pC0
pE0 pC(x )
nB ( x ) nB(x )
pE(x ) pE0

(a) (b)
Fig 6.10 : Minority carrier distribution in an npn bipolar transistor operating in (a) cutoff, and (b) saturation

3 Reverse Active Mode

Finally, Fig. 6.11(a) shows the minority carrier distribution in the npn transistor for the inverse-active
mode. In this case, the B-E is reverse biased and the B-C is forward biased. Electrons from the collector are
now injected into the base. The gradient in the minority carrier electron concentration in the base is in the
opposite direction compared with the forward-active mode, so the emitter and collector currents will change
direction. Fig 6.11(b) shows the injection of electrons from the collector into the base. Since the B-C area is
normally much larger than the B-E area, not all of the injected electrons will be collected by the emitter.
The relative doping concentrations in the base and collector are also different compared with those in
the base and emitter; thus, we see that the transistor is not symmetrical. We then expect the characteristics to
be significantly different between the forward-active and inverse-active modes of operation.

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 204 Electronic Devices and Circuits

Thus we can see in minority carrier profile that

vBC ni2 v
pC(0) pC0 exp exp BC
vT NC vT
vBC ni2 v
and n B ( xB ) nB0 exp exp BC
vT NB vT
Since NB > NC thus pC(0) > nB(xB) and thus hole diffusion current will be large leading to reduced
gains.
C B E

Emitter Base Collector

- n- -p - - n- p n
pC(0)
n B(x B)
pC( x ) Electron injection
n B( x ) n
pC0
pE0 n B0
pE(x )

(a) (b)
Fig 6.11 : (a) Minority carrier distribution in an npn bipolar transistor operating in the inverse-active mode
(b) Cross section of an npn bipolar transistor showing the injection and collection of electrons in the inverse-active mode
The difference in the current equation of diode and BJT is that.

va
In diode iD Is exp 1
vT

va
In BJT iC Is exp
vT

The difference is because minority carrier profile in base region ends at zero at end of base region due to
reverse bias BC junction, but in diode the minority carrier profile not end at zero rather end at minority carrier
concentration at equlibriuim.

3.3 Low Frequency Common Base Current gain

The meaning of common base is that BJT is being used with base common between input and output, in
this configuration the input is applied at emitter and output is at collector. Thus ratio of output current and
input current iC / ie = is called common base current gain. We will study about various configuration of BJT in
later section of this chapter. Now let us analyze what are all the current component in a BJT. We will do the
analyze for npn transistor.
Fig 6.12 shows different current component in an npn transistor. The factor JnE is the electron flux
injected from the emitter into the base. As the electrons diffuse across the base, a few will recombine with
majority carrier holes. The majority carrier holes that are lost by recombination must be replenished from the
base terminal. This replacement hole flux is denoted by JRB. The electron flux that reaches the collector is JnC .
The majority carrier holes from the base that are injected back into the emitter result in a hole flux denoted by
JpE. Some electrons and holes that are injected into the forward-biased B-E space charge region will recombine

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 Bipolar Junction Transistor 205

in this region. This recombination leads to the electron flux JR . Generation of electrons and holes occurs in the
reverse-biased B-C junction. This generation yields a hole flux JG . Finally, the ideal reverse-saturation current
in the B-C junction is denoted by the hole flux Jpc0 .

JnE– JnC–

E
-p- + JG C
+

-n- JpE -n-

+

+
JR– + JRB
+

Jpc+0

B
Fig 6.12 : Particle current density or flux components in an npn bipolar transistor operating in the forward-active mode

The corresponding electric current density components in the npn transistor are shown in Fig.6.13
along with the minority carrier distributions for the forward-active mode. As in the pn junction, the currents in
the bipolar transistor are defined in terms of minority carrier diffusion currents. The current densities are
defined as follows:
JnE : Due to the diffusion of minority carrier electrons in the base at x = 0.
JnC : Due to the diffusion of minority carrier electrons in the base at x = xB
JRB : The difference between JnE and JnC, which is due to the recombination of excess minority carrier
electrons with majority carrier holes in the base. The JRB current is the flow of holes into the base to replace the
holes lost by recombination.
JpE : Due to the diffusion of minority carrier holes in the emitter at x' = 0.
JR : Due to the recombination of carriers in the forward-biased B-E junction.
JpC0 : Due to the diffusion of minority carrier holes in the collector at x'' = 0.
JG : Due to the generation of carriers in the reverse-biased B-C junction.
Emitter Base Collector
-n- -p- -n-

JnE JnC
JE JC
JR
JRB
JpE JG

Jpc0

x =x E x =0 x =0 x =x B x =0
x x

JB

Fig 6.13 : Current density components in an npn bipolar transistor operating in the forward-active mode

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 206 Electronic Devices and Circuits

REMEMBER In reverse bias junction we have generation and in forward bias junction we have recombination.

The currents JRB, JpE, and JR are B-E junction currents only and do not contribute to the collector
current. The currents Jpc0 and JG are B-C junction currents only. These current componentes do not contribute
to the transistor action or the current gain.
The dc common-base current gain is defined as

IC
0 …(6.14)
IE

If we assume that the active cross-sectional area is the same for the collector and emitter, then we can
write the current gain in terms of the current densities, or

JC JnC JG Jpc0
0 …(6.15)
JE JnE JR JpE
We are primarily interested in determining how the collector current will change with a change in
emitter current. The small-signal, or sinusoidal, common-base current gain is defined as
JC JnC
…(6.16)
JE JnE JR JpE
The reverse-bias B-C currents, JG and Jpc0, are not functions of the emitter current.
We can rewrite Eq. (6.16) in the form

JnE JnC JnE JpE

…(6.17)
JnE JpE JnE JnE JR JpE
or = T …(6.18)
The factors in Eq.(8.25) are defined as

JnE
emitter injection efficiency factor …(6.19)
JnE JpE

JnC
T base transport factor …(6.20)
JnE
JnE JpE
recombination factor …(6.21)
JnE JR JpE
Ideally shoud be 1 and thus our motive is to make equal to 1. We can see that for = 1 we need
= l, T = l, = l. The emitter injection eficiancy take into account the current flow due to holes, base
transport facton T take into accunt the recombination of minority carrier in base, and recombination factor
take into account recombination in BE junction.

Emitter Injection Efficience

JnE 1
JnE JpE JpE
1
JnE

JnE = Current density due to diffusion of electrons

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 Bipolar Junction Transistor 207

dn( x )
eDn
dx
Using equation (6.10) we get

ni2 v
JnE eDn exp BE …(6.22)
NB x B vT

and J pE = Current density due to diffusion of holes

dp( x )
eDp
dx
Using equation (6.13) (assuming xE << LE)

ni2 v
J pE eDp exp BE 1
NE xE vT
ni2 v
eDp exp BE …(6.23)
NE x E vT

1 1
…(6.24)
JpE Dp NB xB
1 1
JnE Dn NE xE

Thus to have 1 we need NBxB << NExE

Thus very high emitter doping will ensure 1

Base Transport Factor

Mathematical analysis shows that base transport factor can be written as

2
1 JnC 1 xB
T
1 …(6.25)
cosh( x B / LB ) JnE 2 LB

The base transport factor T will be close to one if xB << LB. Equation (6.25) shows the reason for base
width to be less than LB.

Recombination Factor
The recombination factor can then be written as

JnE JpE 1
…(6.26)
JnE JR JpE J eVBE
1 r 0 exp
Js0 2kT

where, Jr0 = factor of recombination current

The recombination factor is a function of the B-E voltage. As VBE increases, the recombination current
becomes less dominant and the recombination factor approaches unity.

REMEMBER • For 1 we need to work at high VBE, width of base xB << diffusion length of carrier LB,
doping of emittrer much higer than doping of base

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208 Electronic Devices and Circuits

IC
• Since IE = IB + IC, IE
IC
IB 1

and
1 1
• is ratio of IC and IB, thus it is called common emitter current gain as in this configuration
emitter is common and input is at base out put is at collector.

Example 6.1

To design the ratio of emitter doping to base doping in order to achieve an emitter injection
efficiency factor equal to = 0.9967
Consider an npn bipolar transistor. Assume, for simplicity, that D E = D B , L E = L B , and
xE = xB.
Solution 6.1
Equation (6.24) reduces to
1 1
pE0 2
ni / NE
1 1
nB0 ni2 NB
so
1
0.9967
NB
1
NE
Then
NB NE
= 0.00331 or = 302
NE NB

Example 6.2

To design the base width required to achieve a base transport factor equal to T = 0.9967.
Consider a pnp bipolar transistor. Assume that D B = 10 cm 2 /s and B 0 = 10 –7 s.
Solution 6.2
The base transport factor applies to both pnp and npn transistor and is given by
1
T
0.9967
cosh( xB / LB )
Then
xB
= 0.0814
LB
We have

LB DB B0 (10)(10 7 ) 10 3
cm
so that the base width must then be
xB = 0.814 × 10–4 cm = 0.814 m

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 Bipolar Junction Transistor 209

Example 6.3

Calculate the forward-biased B-E voltage required to achieve a recombination factor equal
to = 0.9967.
Consider an npn bipolar transistor at T = 300 K. Assume that J r 0 = 10 –8 A/cm 2 and that
J s 0 = 10 –11 A/cm 2 .
Solution 6.3
The recombination factor, from Eq. (6.26), is
1
J eVBE
1 r 0 exp
Js0 2kT
We then have
1
0.9967 8
10 eVBE
1 exp
10 11 2kT
We can rearrange this equation and write
eVBE 0.9967 103
exp 3.02 105
2kT 1 0.9967
Then
VBE = 2(0.0259) ln(3.02 × 105) = 0.654 V

6.4 Non ideal effects in BJT Transistor

Ideally we assume that BJT has collector current which is independent of collector voltage, we have
assumed BJT has uniformly doped region, low injection (The concentration of minority carrier being injected is
less than majority carrier concentration in the region). These ideal approximation are not present in practical
cases thus practically we have same changes in properties of BJT transistor.

6.4.1 Base width Modulation

In forward active mode the BE junction is forward biased and BC junction is reverse biased, thus when
the forward bias of BE junction is kept constant and reverse bias of BC junction is changed then as reversed bias
of BC junction is increased the depletion width increase and the depletion width inside base also increase that
reduce the effective base width xB. Thus with increase in reverse bias of BC junction the effective base width xB
reduces and we know that collector current is invesely proportional to xB. Thus rise in reverse bias of BC
junction collector current increase. Thus effect is called base width modulation and called early effect. The
change in effective base width with change in applied reverse bias across BC junction is shown in Fig 6.14.
The Early effect can be seen in the current-voltage characteristics shown in Fig. 6.15. In most cases, a
constant base current is equivalent to a constant B-E voltage. Ideally the collector current is independent of the
B-C voltage so that the slope of the curves would be zero; thus the output conductance of the transistor would be
zero. However, the base width modulation, or Early effect, produces a nonzero slope and gives rise to a finite
output conductance. If the collector current characteristics are extrapolated to zero collector current, the
curves intersect the voltage axis at a point that is defined as the Early voltage. The Early voltage is considered
to be a positive value. It is a common parameter given in transistor specifications; typical values of Early voltage

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 210 Electronic Devices and Circuits

are in the 100 to 300 volt range.

Base Moving space
charge edge
with increasing
C-B voltage

Increasing
minority
carrier
gradient

x =0 x =x B
Fig 6.14 : The change in the base width and the change in the minority carrier gradient as the B-C space charge width changes

IC
VBE

|VA| VCE
Fig 6.15 : The collector current versus collector-emitter voltage showing the Early effect and Early voltage

From Fig. 6.15, we can write that

dIC IC
g0 …(6.27)
dVCE VCE VA
where VA and VCE are defined as positive quantities and g0 is defined as the output conductance. Equation
(6.27) can he rewritten in the form
IC = g0(VCE + VA) …(6.28)
showing explicitly that the collector current is now a function of the C-E voltage or the C-B voltage.

Note: We know that in reverse bias pn the depletion region width enter less high doped region. This is the reason
that base is having high doping than collector. Now when BC junction is reverese biased then lesser depletion
region go into base. This reduces early effect and since width of base region is small base region has to have higer
doping than collector because otherwise punch through would occus for very small reverese bias across BC junction.

Example 6.4

Calculate the change in the neutral base width with a change in C-B voltage.
Consider a uniformly doped silicon bipolar transistor at T = 300 K with a base doping of
NB = 5 × 1016 cm –3 and a collector doping of NC = 2 × 1015 cm–3. Assume the metallurgical
base width is 0.70 m. Calculate the change in the neutral base width as the C-B voltage
changes from 2 to 10 V.
Solution 6.4

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 Bipolar Junction Transistor 211

The space charge width extending into the base region can be written as
1/2
2 s ( Vbi VCB ) NC 1
xdB
e NB ( NB NC )
or
1/2
14
2(11.7)(8.85 10 )( Vbi VCB ) 2 1015 1
xdB 19 16 16
1.6 10 2 10 (5 10 2 1015 )
which becomes
xdB = {(9.96 × 10–12)(Vbi + VCB)}1/2
The built-in potential is
kT N N
Vbiln B 2 C 0.718 V
e ni
For VCB = 2 V, we find xdB = 0.052 m, and for VCB = 10 V, we find xdB = 0.103 m. If we neglect the B-
E space charge region, which will be small because of the forward-biased junction, then we can calculate
the neutral base width. For VCB = 2 V.
xB = 0.70 – 0.052 = 0.648 m
and for VCB = 10 V,
xB = 0.70 – 0.103 = 0.597 m

6.4.2 High Level Injection

Till now we assumed that minority carrier concentration which enter a region is always less than the
mojority carrier concentration of the region. Thus we assumed low level injection, but practically the base
doping is low and the minority carrier injected by emitter into base will make the approximation of low level
injection invalid when VBE is large. Due to high level injection the excees holes get generated in base region BE
junction. Due to these excees holes more holes will enter into emitter of the device which create more hole
current. Thus JPE will increase and this will reduce emitter injection efficiency. Thus due to high level injection
the emitter injection efficency reduce which reduces common base current gain. Fig 6.16 show how due to
increase in minority carrier concentration leads to high level injection and thus majority carrier concentration
also increase to maintain charge neutrality. Fig 6.17 shows a typical common-emitter current gain versus collector
current curve. The low gain at low currents is due to the small recombination factor and the drop-off at the high
current is due to the high-injection effect.
p-base
pp(x )
NB

nB(x )

nB0

x =0 x =x B
Fig 6.16 : Minority and majority carrier concentrations in the base under low and high injection
(solid line: low injection; dashed line: high injection)

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 212 Electronic Devices and Circuits

200
T = 300 K

Short circuit current gain

150
High
injection
effects
100
Recombination
effects

50

0.00 –8
10 10–6 10–4 10–2 100
Collector current (A)
Fig 6.17 : Common-emitter current gin versus collector current

6.4.3 Emitter Band gap Narrowing

We have seen that for value of (emitter injection efficiency) close to unity we need emitter doping to be
very high. When we keep on increasing the doping concentration then the distance between the impority atoms
in semiconductor keep an decreasing, when doping concentration is very high then impurity atoms interact
with each other and the discrete impurity level will become a band of energy that is discrete energy level will
split into band of energy. As the doping continues to increase, the donor band widens, becomes skewed, and
moves up toward the conduction band, eventually merging with it. At this point, the effective bandgap energy
has decreased.
Due to decrease in energy band gap the inrinsic carrier concentrattion in emitter region will increse
and the motive with which doping of emitter was increased (to make emitter n++ and reduce holes in emitter
region to a very small vallue) will not be fulfilled as ni will increase due to band gap lowering and number of holes
will also increase as now

Eg
n12E ni2 exp
kT

n12E ni2 E
and pE0 exp
NE NE kT

As the emitter doping increases, n12E increases; thus, pE0 does not continue to decrease with increased
emitter doping. If pE0 starts to increase because of the bandgap narrowing, the emitter injection efficiency
begins to fall off instead of continuing to increase with increased emitter doping.

6.4.4 Current Crowding

It is tempting to minimize the effects of base current in a transistor since the base current is usually
much smaller than either the collector or the emitter current. Fig 6.19 is a cross section of an npn transistor
showing the lateral distribution of base current. The base region is typically less than a micrometer thick, so
there can be a sizeable base resistance. The nonzero base resistance results in a lateral potential difference

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 Bipolar Junction Transistor 213

under the emitter region. For the npn transistor, the potential decreases from the edge of the emitter toward the
center. The emitter is highly doped, so as a first approximation the emitter can be considered an equipotential
region.
The number of electrons’ from the emitter injected into the base is exponentially dependent on the B-E
voltage. With the lateral voltage drop in the base between the edge and center of the emitter more electrons will
be injected near the emitter edges than in the center, causing the current to be crowded toward the edges. This
current-crowding effect is schematically shown in Fig. 6.20. The larger current density near the emitter edge
may cause localized heating effects as well as localized high-injection effects. The nonuniform emitter current
also results in a nonuniform lateral base current under the emitter. A two-dimensional analysis would be required
to calculate the actual potential drop versus distance because of the nonuniform base current. Another approach
is to slice the transistor into a number of smaller parallel transistors and to lump the resistance of each base
section into an equivalent external resistance.
Power transistors, designed to handle large currents, require large emitter areas to maintain reasonable
current densities. To avoid the current-crowding effect, these transistors are usually designed with narrow
emitter widths and fabricated with an interdigitated design. In this special type of design many narrow emitters
are connected in parallel to achieve required emitter area [Fig 6.21]
Base Emitter

IE

IB/2 IB/2

p base n+emitter p base

– –

Collector

Fig 6.19 : Cross section of an npn bipolar transistor showing the base current distribtution
and the lateral potential drop in the base region.

Base n+ Emitter n+ Base

-p - -p -

Collector current

Fig 6.20 : Cross section of an npn bipolar transistor showing the emitter current-crowding effect.

Base Emitter
terminal terminal

n n n n n
p base

n Collector

Fig 6.21 : Cross section of an interdigitated npn bipolar transistor stucture

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6.4.5 Non Uniform Base doping

Uniform base doping in BJT is impossible and generally the doping in base non uniform. Fig 6.22 shows
a doping profile in a doubly diffused npn transistor, we can start witn a uniformly doped n-type substrate, diffuse
acceptor atoms from the surface to form a compensated p-type base, and then diffuse donor atoms from the
surface to form a doubly compensated n-type emitter. The diffusion process results in a nonuniform doping
profile.

Doping

5×1019
Nd for n-type
emitter

Na for p-type
5×10
17 base
Nd for n-type
collector

5×1015

x
Fig 6.22 : Impurity concentration profiles of a double-diffused npn bipolar transistor
From the given doping concentration (Fig 6.22) we can see that in base region doping decreases from
emitter to collector. Since hole concentration in base is high at BE junction and decreases as we move toward
collector. Thus base has non uniform doping, now we know that in non uniform doped base region at equilibrium
will have electric field this electric field will stop the holes from diffusing at equilibrium. Using the concept
learned in chapter 2 we know that
p-type base region in thermal equilibrium, we can write
dNa
Jp e p Na E eDp 0 …(6.33)
dx
Then
kT 1 dNa
E …(6.34)
e Na dx
According to the example of Fig. 6.22, dNa/dx is negative; hence, the induced electric field is in the
negative x direction. Electrons are injected from the n-type emitter into the base and the minority carrier base
electrons begin diffusing toward the collector region. The induced electric field in the base, because of the
nonuniform doping, produces a force on the electrons in the direction toward the collector. The induced electric
field, then, aids the flow of minority carriers across the base region. This electric field is called an accelerating
field.
Thus due to electric field that help the motion electron from emitter to collector thus electrons emitted
by emitter will reach collector much fastly and thus speed of operation of this device (non uniform doped BJT)
will be more than speed of operation of uniform doped BJT.

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 Bipolar Junction Transistor 215

REMEMBER Now we can compare the speed of operation of these three BJTs

BJTs BJTs BJTs

Nd for emitter Nd for emitter Nd for emitter

Na for base Na for base Na for base

Nd for collector Nd for collector Nd for collector

x x x

(a) (b) (c)

Assuming that amount of doping in all three regions emitter, base and collector is same in all
three BJTs (a),(b), and (c). Now if we compare speed of operartion then in (b), using equation
(6.34) the base has electric field from collector to emitter which support electron movement
from emitter to colletor, in (a) the base has no electric field and in (c), using equation (6.34) we
can find that the electric field exist form emitter to collector that oppose electron flow from
emitter to collector. Thus (b) is faster, (a) is normal, (c) is slowest.

6.4.6 Punch Though Breakdown In BJT

Generally the BC junction is reverse biased as we keep on increasing revese bias across the junction, the
depletion width keep on increasing and the depletion width inside base region will also increase. This will
reduce the neutral base region thus to have minimum depletion region in base we keep base doping higher than
collector. Still we cannot have very high base doping as this will increase recombination in base.
It is possible for the B-C depletion region to penetrate completely through the base and reach the B-E
space charge region, the effect called punch-through. Fig 6.23(a) shows the energy-band diagram of an npn
bipolar transistor in thermal equilibrium and Fig 6.23(b) shows the energy-band diagram for two values of
reverse-bias B-C junction voltage. When a small C-B voltage, VR1, is applied, the B-E potential barrier is not
affected; thus, the transistor current is still essentially zero. When a large reverse-bias voltage, VR2, is applied,
the depletion region extends through the base region and the B-E potential barrier is lowered because of the
C-B voltage. The lowering of the potential barrier at the B-E junction produces a large increase in current with
a very small increase in C-B voltage. This effect is the punch-through breakdown phenomenon.
We can easily calculate punch though voltage, from Fig 6.24 the width of base region is WB, thus for
punch though we need depletion width of BC junction inside base should have width WB. Taking NB and NC as
doping of base and collector. If WBC is depletion region width of BC junction then
NC
xdB W
NC NB BC

NC 2 s 1 1
( Vbi VR )
NC NB e NB NC

for punch through VR >> Vbi and VR = Vpt, xdB = WB

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216 Electronic Devices and Circuits

NC 2 s NB NC
WB ( Vbi Vpt )
NC NB e NBNC

eWB2 NB( NC NB )
Vpt …(6.35)
2 s NC

E B C

Ec
EF
VR1

Ev
E B C
VR 2

Ec
EF

Ev

(a) (b)
Fig 6.23 : Energy-band diagram of an npn bipolar transistor (a) in thermal equilibrium, and
(b) with a reverse-bias B-C voltage before punch-through, VR1, and after punch through, VR2

E B C

x dB
WB
Fig 6.24 : Geometry of a bipolar transistor to calculate the punch-through voltage

Example 6.5

To design the collector doping and collector width to meet a punch-through voltage
specification.
Consider a uniformly doped silicon bipolar transistor with a metallurgical base width of
0.5 m and a base doping of NB = 1016 cm –3 . The punch-through voltage is to be Vpt = 25 V.
Solution 6.5
The maximum collector dopin concentration can be determined from Eq (6.35) as
19
(1.6 10 )(0.5 10 4 )2 (1016 )( N C 1016 )
25 14
2(11.7)(8.85 10 )N C
or

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 Bipolar Junction Transistor 217

106
12.94 1
N
which yields
NC = 8.38 × 1014 cm–3
This n-type doping concentration in the collector must extend at least as far as the depletion width extends
into the collector to avoid breakdown in the collector region. We have
1/2
2 s ( Vbi VR ) NB 1
xn
e NC NB NC
Neglecting Vbi compared to VR = Vpt, we obtain
1/2
2(11.7)(8.85 10 14 )(25) 1016 1
xn 19
1.6 10 8.38 1014 1016 8.38 1014
or
xn = 5.97 m

6.4.7 Avalanche Breakdown in BJT

Since BC junction of BJT is reverse biased and doping of base is higher than doping of collector region.
Thus width of depletion region of BC junction is large as collector is large thus avalanche breakdown may occur
in the junction. The analysis for avalanche breakdown is done in two ways.

1. Open Emitter Configuration

When emitter is open and BC junction is reverse biased thus only reverse saturation current will flow in
the reverse biased pn junction as shown in Fig 6.24 (a). Thus breakdown in this case is similar to that of the
reverse biased pn junction.

2. Open Base Configuration

Fig. 6.24(b) show the confiquration , here CE voltage is applie and this will reverse bias the CB junction
and here base terminal is left open. the current here is denoted by ICEO.

REMEMBER • ICBO means collector to base current when emitter is open

• ICEO means collector to emitter current when base is open

n p n
ICBO
E n p n C E C
ICEO ICEO I
ICBO CEO

VCB B VCE
– + – +
B
(a) (b)
Fig 6.24 : (a) Open emitter configuration with saturation current ICBO
(b) Open base configuration with saturation current ICEO

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 218 Electronic Devices and Circuits

The working of circuit show in Fig 6.24(b) is not similar to that of the reverse bias pn junction because
when high voltage is applied at collector and base is open then obviously CB junction will be reverse biased and
holes will flow form collector to base. Since holes come inside base become positive with respect to emitter thus
BE junction become slightly forward biased. Thus the ciruut of Fig 6.24(b) will approximately work as BJT in
forward active mode. The forward-biased B-E junction produces the current ICEO, due primarily to the injection
of electrons from the emitter into the base. The injected electrons diffuse across the base toward the B-C
junction. These electrons are subject to all of the recombination processes in the bipolar transistor. When the
electron reach the B-C junction, this current component is ICEO, where is the common base current gain.
We therefore have
ICEO = ICEO + ICBO …(6.36)
or
ICBO
ICEO ICBO …(6.37)
1
where is the common-emitter current gain. The reverse-biased junction current ICBO is multiplied by
the current gain when the transistor is biased in the open-base configuration.
When the transistor is biased in the open-emitter configuration as in Fig.6.24(a), the current ICBO at
breakdown becomes ICBO MICBO, where M is the multiplication factor. An empirical approximation for the
multiplication factor is usually written as
1
M …(6.38)
1 ( VCB / BVCBO )n
where n is an empirical constant, usually between 3 and 6, and BVCBO is the B-C breakdown voltage with
the emitter left open.
When the transistor is biased with the base open circuited as shown m Fig. 6.24(b), the currents in the
B-C junction at breakdown are multiplied, so that
ICEO = M( ICEO + ICBO) …(6.39)
Solving for ICEO, we obtain

MICBO
ICEO …(6.40)
1 M
The condition for breakdown corresponds to
M=1 …(6.41)
Using Eq.(6.38) and assuming the VCB VCE, Eq. (6.41) becomes

=1 …(6.42)
1 ( BVCEO / BVCBO )n

where BVCEO is the C-E voltage at breakdown in the open base configuration. Solving for BVCEO, we find

BVCEO BVCBO n 1 …(6.43)

where, again, is the common-base current gain. The common-emitter and common-base current
gains are related by

…(6.44)
1

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Normally, 1, so that
1
1– …(6.45)

Then Eq.(6.43) can be written as

BVCBO
BVCEO …(6.46)
n

The breakdown voltage in the open-base configuration is smaller, by the factor n , junction breakdown
voltage. This characteristic is shown ih Fig 6.25

Open Open
IC base emitter

ICEO

ICBO

BVCEO BVCBO
V
Fig 6.25 : Relative breakdown voltages and saturation currents of the open base and open emitter configurations

REMEMBER • In Fig (6.25) the breakdown voltage BVCEO is when base is open and current in collector is
ICEO, but when base is connected in the circuit then collector current will increase and thus
the breakdown of device will occur at voltage lower than BVCEO. Similaly when emitter is
open and current in collector is ICBO the breakdown voltage is BVCBO but when emitter is
connected then collector current increases and breakdown voltage decrease.
• As the current though reverse biased junction the breakdown voltage deacreses.

Example: 6.6

Consider a silicon bipolar transistor with a common-emitter current gain of = 100 and a
17 –3
base doping concentration of N B = 10 cm . The minimum open-base breakdown voltage is
to be 15 volts. Determine the open emitter breakdown voltage.
Solution 6.6
From Eq. (6.59), the minimum open-emitter junction breakdown voltage must be

BVCBO n BVCEO
Assuming the empirical constant n is 3, we find
3
BVCBO 100(15) 69.6 V

6.5 Frequency Limitation in BJT

The BJT will take some time to respond to the applied signal, since it take time to emit electron form
emitter and collected by collector. Thus if a signal is applied at BE junction then BJT will need time to respond

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to the applied signal thus input signal must have frequncy less that a value so that we can get faithful response
form device. The hybrid pie moded will be analyzed in analog electronics. Here we will only analyze the limitation
on frequency due to time delay factors.

6.5.1 Time delay factors

The bipolar transistor is a transit-time device. When the voltage across the B-E junction increases, for
example, additional carriers from the emitter are injected into the base, diffuse across the base, and are collected
in the collector region. As the frequency increases, this transit time can become comparable to the period of the
input signal. At this point, the output response will no longer be in phase with the input and the magnitude of
the current gain will decrease.
The total emitter-to-collector time constant or delay time is composed of four separate time constants.
We can write
ec = e + b + d + c …(6.47)
where
ec= emitter-to-collector time delay
e = emitter-base junction capacitance charging time

b = base transit time

d = collector depletion region transit time

c = collector capacitance charging time

The equivalent circuit of the forward-biased B-E junction has resistance r'e, capacitance Cje is the junction
capacitance. If we ignore the series resistance, then the emitter-base junction capacitance charging time is
e = r'e(Cje + Cp) …(6.48)
where r'e is the emitter junction or diffusion resistance. The capacitance Cp includes any parasitic
capacitance between the base and emitter. The resistance r'e is found as the inverse of the slope of the IE versus
VBE curve. We obtain
kT 1
r'e …(6.49)
e IE
where IE is the dc emitter current.
The second term, b, is the base transit time, the time required for the minority carriers to diffuse across
the neutral base region. The base transit time is related to the diffusion capacitance C of the B-E junction. For
the npn transistor, the electron current density in the base can be written as
Jn = –enB(x) v(x) …(6.50)
where v(x) is an average velocity. We can write

dx dx
v(x) or dt …(6.51)
dt v( x )
The transit time can then be found by integrating, or
xB xB xB
dx enB( x )dx
b
dt …(6.51)
0 0
v( x ) 0
( Jn )
The electron concentration in the base is approximately linear, so we can write

eVBE x
nB(x ) nB0 exp 1 …(6.52)
kT xB

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and the electron current density is given by

dnB( x )
Jn eDn …(6.53)
dx
The base transit time is then found by combining Eqs.(6.52) and (6.53) with Eq.(6.51). We find that
xB2
b …(6.54)
2Dn
The third time-delay factor is d, the collector depletion region transit time. Assuming that the electrons
in the npn device travel across the B-C space charge region at their saturation velocity, we have
xdc
d …(6.55)
vs
where xdc is the B-C space charge width and vs is the electron saturation velocity.
The fourth time-delay factor, c, is the collector capacitance charging time. The B-C is reverse biased so
that the diffusion resistance in parallel with the junction capacitance is very large. The charging time constant
is then a function of the collector series resistance rc. We can write
c = rc(C + Cs) …(6.56)
where C is the B-C junction capacitance and Cs is the collector-to-substrate capacitance. The series
resistance in small epitaxial transistors is usually small; thus the time delay c may be neglected in some cases.

Note: If in a question any information to calculation e, b, d, and c is missing then we can neglect that delay or
transit time. For example if width of base region is not given in question then we can neglect b and can write
ec = e + d + c.

6.5.2 Transistor Cut Off Frequency

The cut off frquencncy is fT and
1
fT …(6.57)
2 ec
Since gain band width product for a device is a constant, since at fT frquency gain is 1 thus beta cut off
frequncy can be pond as
f × = fT × 1
fT
f …(6.58)

Similarly alpha cut off frequency can be found

f × = fT
fT
f …(6.59)

Example 6.7

In calculate the emitter-to-collector transit time and the cutoff frequency of a bipolar
transistor, given the transistor parameters.
Consider a silicon npn transistor at T = 300 K. Assume the following parameters:
IE = 1 mA C je = 1 pF
x B = 0.5 m D n = 25 cm 2 /s

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 222 Electronic Devices and Circuits

x dc = 2.4 m r c = 20
C = 0.1 pF C s = 0.1 pF
Solution 6.7
We will initially calculate the various time-delay factors. If we neglect the parasitic capacitance, the emitter-
base junction charging time is
e = r'eCje
where
kT 1 0.0259
r'e 25.9
e IE 1 10 3
Then
e = (25.9)(10–12) = 25.9 ps
The base transit time is
xB2 (0.5 10 4 )2
b 50 ps
2Dn 2(25)
The collector depletion region transit time is
4
xdc 2.4 10
b
24 ps
vs 107

The collector capacitance charging time is

–12) = 4 ps
c = rc(C + Cs) = (20)(0.2 × 10
The total emitter-to-collector time delay is then
ec = 25.9 + 50 + 24 + 4 = 103.9 ps
so that the cutofffrequency is calculated as

1 1
fT 12
1.53 GHz
2 ec 2 (103.9 10 )

If we assume a low-frequency common-emitter current gain of = 100, then the beta cutoff frequency is

fT 1.53 109
f 15.3 MHz
0 100

6.6 Switching of BJT

The ideal swith is that which do not allow any current to flow in off condition and in on state drop across
switch should be zero and it must allow any amount of current to flow. The BJT is the device in which voltage at
terminal B control flow of current from collector to emitter thus when BE junction is reverse biased or very low
or negative voltage is applied at base then device is off and no current will flow from collector to base. Now when
applied voltage at base is very high then base current is very high which take the device into saturation. In
saturation mode of operation the BJT allow any amount of current to flow and drop across the device
VCE = 0.2 V. Thus BJT act as turned on switch in saturation mode. We do not use BJT as turn on switch in active
region because in active region the VCE drop is high.
Thus BJT act as switch in cut off and saturation mode of operation.

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6.6.1 Switching Characteristic

Consider an npn transistor in the circuit shown in Fig. 6.26 (a) switching from cutoff to saturation, and
then switching back from saturation to cutoff. We will describe the physical processes taking place in the transistor
during the switching cycle.
Consider, initially, the case of switching from cutoff to saturation. Assume that in cutoff VBE VBB < 0,
thus tbe B-C junction is reverse biased. At t = 0, assume that VBB switches to a value of VBB0 as shown in
Fig.6.26(b). We will assume that VBB0 is sufficiently positive to eventually drive the transistor into saturation.
For 0 < t < t1, the base current supplies charge to bring the B-E junction from reverse bias to a slight forward
bias. The space charge width of the B-E junction is narrowing, and ionized donors and acceptors are being
neutralized A small amount of charge is also injected into the base during this time. The collector current
increases from zero to 10 percent of its final value during this time period, referred to as the delay time.
IC

RB RC

+
+ IB + VBB0
VBE
VBB – VCC
– Time
– VBB
–VR
t =0 t =t 3

(a) (b)

IC (sat)
0.9
ts
IC td tr tr

0.1
0 t1 t2 t3 t4 t5 Time

(c)
Fig 6.26 : (a) Circuit used for transistor switching (b) Input base drive for transistor switching
(c) Collector current versus time during transistor switching

During the next time period, t1 t t2, the base current is supplying charge, which increases the B-E
junction voltage from near cutoff to near saturation. During this time, additional carriers are being injected into
the base so that the gradient of the minority carrier electron concentration in the base increases, causing the
collector current to increase. We refer to this time period as the rise time, during which the collector current
increases from 10 percent to 90 percent of the final value. For t > t2, the base drive continues to supply base
current, driving the transistor into saturation and establishing the final minority carrier distribution in the
device.
When device is working in saturation mode form time t2 to t3 then both the junction (BE and BC) are
forward biased and emitter inject electron in base, collector inject electron in base, base inject hole in collector
and emitter. Thus in saturation region the minority carrier profile is as shown in FIg 6.27(a)

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 224 Electronic Devices and Circuits

Emitter Base Collector Emitter Base Collector

ni2
ni2 NC
Qbx ni2 NB
ni2 NE
ni2 QB
QC NC QC
NE

(a) (b)

Emitter Base Collector

ni2 ni2
NE NC

(c)
Fig 6.27 : (a) Minority carrier profile in saturation (b) minority carrier profile in equilibium
(c) minority carrier profile in cut off

So we can see that large amount of charges get stored in emitter, base and collector and when at t = t3
the voltage at base terminal is made highly negative then the current in the device should ideally go to zero but
practically the collector current will keep flowing with very little change or no change because of large amount
of excess minority carrier in collector, base and emitter (Fig 6.27(a)). Thus current will keep flowing as now
excees holes will move from collector to base and excees electron will move from base to collector and collector
current will flow from collector to base. Thus the excees carrier will keep on reducing and minority carrier
profile will change form that shown in Fig. 6.27 (a) to that shown in Fig 6.27 (b). Thus at time instant t4 the
carrier profile will be that shown in Fig. 6.27(b) thus from time t3 to t4 all excess carriers are removed and the
time t4 – t3 is called storage time t5, where all stoned charge are removed. This time delay is cailed the storage
time and is denoted by ts. The storage time is the time between the point at which VBB switches to the time when
the collector current is reduced to 90 percent of its maximum saturation value. The storage time is usually the
most important parameter in the switching speed of the bipolar transister.
Now after time t4 the current start reducing as now no excees carrier are left to support flow current.
Thus from time t4 to t5 the minority carrier profile changes from that shown in Fig.6.27 (b) to that shown in
Fig.6.27(c). Now at time t5 the device is in cut off. The time difference t5 – t4 is called fall time.
The final switching delay time is the fall tf during which the collector current decrease from the 90
percent to the 10 percent value. During this time, the B-C junction is reverse biased but excess carriers in the
base are still being removed, and the B-E junction voltage is decreasing.

6.6.2 The Schottky Transistor

One method frequently employed to reduce the storage time and increase the switching speed is the use
of a Schottky-clamped transistor. This is a normal npn bipolar device with a Schottky diode connected between
base and collector, as shown in Fig.6.28(a). The circuit symbol for the Schoitky-clamped transistor is shown in
Fig. 6.28(b). When the transistor is biased in the forward active mode, the B-C junction is reverse biased;
hence, the Schottky diode is reverse biased and effectively out of the circuit. When the transistor is driven into
saturation, the B-C junction becomes forward biased; hence the Schottky diode also becomes forward biased

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 Bipolar Junction Transistor 225

and the effective turn on voltage of the Schottky diode is approximately half that of the pn junction. The amount
of excess stored charge in the base and collector is drastically reduced. The reduced excess stored charge in the
base of the Schottky transistor greatly reduces the storage time. The storage times of the order of 1 ns or less
are common in Schottky transistors.

C
C
B
B
E
E

(a) (b)

Fig 6.28 : (a) The Schottky-clamped transistor (b) Circuit symbol of the Schottky-clamped transistor

6.7 Various Configuration of BJT

Since BJT is a three terminal device when it is used as a two port network then one terminal is common
between both the ports. There are three configurations in which BJT can be used and they are
(i) common base configuration
(ii) common emitter configuration
(iii) common colector configuration

6.7.1 Common Base Configuration

In common base confguration base is common between input and output port, the input port is emitter-
base and output port is collector - base port.
E IE IC C
+ npn BJT +
in
Input Common Base
port VEB Configuration VCB Output
port

– –

B
Fig 6.29 : Common base configuration of npn BJT

Thus port 1 or input port has current and voltage IE and VEB (always current entering the port is taken
as positive). Thus for npn BJT the collector current enter the terminal, emitter current leave the terminal and
base current enter the terminal. Thus IE will be negative IB and IC will be positive
For defining BJT as a two port network we always use H parameter thus for common base configuration

VEB IE
HCB
IC VCB

Thus input charactistic of CB configuration will be plot of VEB as a function of IE and VCB

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 226 Electronic Devices and Circuits

Input characteristic of common base configuration

The characrestic is Fig 6.30. The plot VEB wrt IE for various valve of VCB is shown and we can see that
plot of VEB wrt IE is similar to that of diode plot but here the cut in voltage will be smaller than the normal diode
bacause VCB which is positive making BC junction reverse bias thus BC depletion region has electric field from
collector to base which drags electron from base to collector and produce collector current. VCB cannot be
negative, in the plot we can see that when VCB is open then the current - voltage plot will be exactly similar to
that of the diode. We can clearly see the difference between VEB – IE plot when VCB is positive and When VCB is
open.

Note: Obviosly VEB will negative and IE will be negative.

Output Characteristic of Common Base Characteristic

The output characteristic is the plot of IC as a function of VCB and IE. In forward active region when VCB
is greater than over –0.4 V the collector current IC is independent of VCB and IC = IE. In Fig. 6.31 we have
assumed that for VCB < 0 the device goes in saturation and for VCB > 0 the device remain in saturation. In many
other books we may find that saturation region exist when VCB < – 0.4 V.

VCB open
–0.4
Emitter voltage VEB, V

VCB = 0V
–0.2 +1
+10
+20

0 –10 –20 –30 –40 –50

Emitter current IE, mA

Fig 6.30 : Common base input characteristics of a typical npn transistor.

Saturation
region Active region
+50

IE=40 mA
+40
Collector current IC, mA

–30
+30

–20
+20

–10
+10

–0
0
ICO
VCB=0 Cutoff region
–0.25 0 +2 +4 +6 +8
Collector-to-base voltage drop VCB.V
Fig 6.31 : Typical common base output characteristics of a npntransistor.(we assumed =1)

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 Bipolar Junction Transistor 227

Saturation Region The region to the left of the ordinate, VCB = 0, and above the IE = 0 characteristics,
in which both emitter and collector junctions are forward-biased, is called the saturation region. We say that
“bottoming” has taken place because the voltage has fallen near the bottom of the characteristic where VCB 0.
Actually, VCB is slightly negative in this region, and this forward biasing of the collector accounts for the large
change in collector current with small changes in collector voltage.
Cutoff Region The characteristic for IE = 0 passes through the origin, but is otherwise similar to the
other characteristics. The region below ithfe IE = 0 characteristic, for which the emitter and collector junctions
are both reverse-biased, is referred to as the cutoff region.
6.7.2 The Common Emitter Configuration
In this configuration we have emitter common between both the ports of two port network, the input
port is base emitter port and output port is collector emitter port. The common emitter configuration is shown
in Fig. 6.32.

IC
B C
+ IB npn BJT +
Common emitter
Input Configuration
port VBE VCE Output
port

– –

B
Fig 6.32 : Common emitter configuration of BJT
The port 1 parameters are IB and VBE and port 2 parameters are IC and VCE. Here IB and IC both are
positive and VBE will also be positive. The H parameter for CE confiquration are

VBE IB
HCE
IC VCE

Input Characteristic of Common Emitter Configuration

The input charactristic is plot of VBE as a fuction of IB and
VCE. For npn device VCE is always positive and plot is approximately
–0.6
as that of the normal pn diode. In fig 6.33 we can see that, with the T = 25°C
collector shorted to the emitter and the emitter forward-biased, the –0.5 VCE=+1.0V
input characteristic is essentially that of a forward-biased diode. If +0.3
VBE becomes zero, then IB will be zero, since under these conditions +0.2
Base voltage VBE, V

–0.4
both emitter and collector junctions will be short-circuited, +0.1
In general, increasing V CE with constantVBE causes a –0.3
0
decrease in base width W'B and results in a decreasing recombination
–0.2
base current. These considerations account for the shape of input
characterstics shown in Fig. 6.33.. –0.1

The output characteristic of common emitter confiquration 0 +1 +2 +3 +4 +5

Base current I,BmA
The output characterstic is plot of IC wrt VCE for various
Fig 6.33 : Typical common-emitter
values of IB and is shown in Fig 6.34. The output characterstic show input characteristics of the transistor
early effect that is increase in VCE lead to increase in collector current
and for VCE > 0.2 V we have device in active region, for VCE < 0.2

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 228 Electronic Devices and Circuits

V the device is in saturation region. In cut off region current that flow in device ICEO and we know that ICEO =
( + 1) ICBO.

Saturation
iC region
vCE= …
Active
region vCE= …

vCE= …

vCE= …

–VA 0 vCE

Fig 6.34 : The outpu characteristics of a CE configuration of BJT.

REMEMBER If in a question we have to find total collector current then

IC = I + ICEO
= I + ( + 1)ICBO

IC ICBO
I ICBO

6.8 Eber Moll (EM) MODEL

We can approximate the BJT in forward active mode, where BE junction is forward biased and BC
junction is reverse biased with a large signal model as shown in Fig 6.35.
C
iC

i
F E

iB
B

+ iE DE
(ISE = IS / F)

v BE
–
E
Fig 6.35 : Large-signal equivalent-circuit models of the npn BJT operating in the forward active mode.
Here we have shown forward biased BE junction as diode and collector current is Fi E . Thus we can see

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 Bipolar Junction Transistor 229

that

Is vBE
iE exp
F vT

iC = FiE
Here F is common base current gain in forward active mode.
Similarly we have large signal model for reverse active mode BJT where BC junction is forward biased
and it is shown by a diode and here emitter current will be RiC. Here R is common base current gain in
reverse active mode. Fig 6.36 show large signal model of reverse active mode BJT
C

iC DC
(ISC = IS/ R)

i
R C

E
Fig 6.36 : Model for the npn transistor when operated in the reverse active mode
(i.e., with the CBJ forward biased and the EBJ reverse biased)
The model of Fig. 6.36 can be combined with that of Fig. 6.37 to obtain the circuit model shown in
Fig. 6.38. Note that we have relabelled the current through DE and DC, and the corresponding control currents
of the controlled sources, as iDE and iDC. Ebers and Moll, two early workers in the area, have shown that this
composite model can be used to predict the operation of the BJT in all of its possible modes. To see how this can
be done, we derive expressions for the terminal currents iE, iC, ad iB in terms of the junction voltages vBE and
vBC. Toward that end, we write an expression for the current at each of the three nodes of the model in Fig. 6.38
as follows:
i E = iDE – RiDC …(6.60)
iC = –iDC + FiDE …(6.61)
i B = (1 – F)iDE + (1 – R)iDC …(6.62)
Then we use the diode equation to express iDE and iDC as

iDE iSE ( evBE / vT 1) …(6.63)

and iDC iSC ( evBC / vT 1) …(6.64)

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 230 Electronic Devices and Circuits

C
iC

DC i DC i
F DE

B
iB
DE i DE i
R DC

iE
E

Fig 6.38 : The Ebers-Moll (EM) model of the npn transistor.

The diode DE in Fig 6.36 has scale current ISE and in Fig 6.37 diode DC has scale current ISC. Generally
the area of BC junction is mach greater than EB junction thus
ISC >> ISE
The two scale currents have, of course, the same ratio as the areas of the corresponding junctions.
Furthermore, a simple and elegant formula relates the scale currents ISE, ISC, and IS and the current gains F
and R, namely
FISE = RISC = IS …(6.65)

E B C

p n

Fig 6.39 : Cross-section of an npn BJT.

Substituting for iDE and iDC in Eqs.(6.60), (6.61) and (6.62) and using the relationship in Eq.(6.62)
yield the required expressions:
IS
iE ( evBE / vT 1) IS ( evBC / vT 1) …(6.66)
F

IS
iC IS ( evBE / vT 1) ( evBC / vT 1) …(6.67)
R

IS IS
iB ( evBE / vT 1) ( evBC / vT 1) …(6.68)
F R

where

F
F …(6.69)
1 F
and

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 Bipolar Junction Transistor 231

R
R …(6.70)
1 R
As a first application of the EM model, we shall use it to predict the terminal currents of a transistor
operating in the forward active mode. Here vBE is is positive and in the range of 0.6 V to 0.8 V, and vBC is
negative. One can easily see that terms containing evBC / vT will be negligibly small and can be neglected to obtain

IS 1
iE evBE / vT IS 1 …(6.71)
F F

1
iC IS evBE / vT IS 1 …(6.72)
R

IS 1 1
iB evBE / vT IS …(6.73)
F F R

In each of these three equations, one can normally neglect the second term on the right-hand side.
Thus far, we have stated the condition for forward active mode operation as vCB 0 to ensure that the
CBJ is reverse biased. In actual fact, however, a pn junction does not

iC
Saturation Active mode
mode I
F E

–0.4 V 0 vCB

Expanded
scale

Fig 6.39 : The iC–vCB characteristic of an npn transistor fed with a constant emitter current IE. The transistor enters the
saturation mode of operation for vCB < –0.4 V, and the collector current diminished.

Become effectively forward biased until the forward voltage across it exceeds approxi-mately 0.5 V. It
follows that one can maintain active mode operation of an npn transistor for negative vCB down to approximately
-0.4 V or so. This is illustrated in Fig. 3.9, which shows a sketch of iC versus vCB for an npn transistor operated
with a constant-emitter current IE. Observe that iC remains constant at FIE for vCB going negative to
approximately –0.4 V. Below this value of vCB > the CBJ begins to conduct sufficiently that the transistor leaves
the active mode and enters the saturation mode of operation, where iC decreases. We shall study BJT saturation
next. For now, however, note that we can use the EM equations to verify that the terms containing evBC/vT remain
negligibly small for vBC as high as 0.4 V.

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 232 Electronic Devices and Circuits

(a) the ideal case when no recombination occurs in

the base, and
(b) the case when xB = LB = 10 m.

1
(c) Assuming DB = 10 cm2/s, calculate the diffusion
Subjective Practice Problems current density at x = 0 and x = xB for the
conditions in parts (a) and (b). Determine the
ratio J(x = xB)/J(x = 0) for the two cases.
1 . The parameters in the base region of an npn bipolar
transistor are Dn = 20 cm2/s, nB0 = 104 cm–3, 6 . An npn silicon bipolar transistor at T = 300 K has
xB = 1 mm, and ABE = 10–4 cm2. uniform dopings of NE = 1019 cm–3, NB = 1017 cm–3,
(a) calculate the magnitude of IS. and NC = 7 × 1015 cm–3. The transistor is operating
(b) Determine the collector current for in the inverse-active mode with VBE = –2 V and
(i) vBE = 0.5 V, (ii) vBE = 0.6 V, and VBC = 0.565 V.
(iii) vBE = 0.7 V. (a) Sketch the minority carrier distribution through
the device.
2 . (a) In a bipolar transistor biased in the forward-
(b) Determine the minority carrier concentrations
active region, the base current is iB = 6.0 mA
at x = xB and x'' = 0.
and the collector current is i C = 510 A.
(c) If the metallurgical base width is 1.2 m,
Determine , , and iE.
determine the neutral base width.
(b) Repeat part (a) if iB = 50 mA and iC = 2.65 mA.
7 . A uniformly doped silicon pnp bipolar transistor at
3 . A uniformly doped silicon npn bipolar transistor is to
T = 300 K with dopings of NE = 5 × 1017 cm–3,
be biased in the forward-active mode with the B-C
NB = 1016 cm–3, and NC = 5 × 1014 cm–3 is biased in
junction reverse biased by 3 V. The metallurgical
the inverse-active mode. What is the maximum B-C
base width is 1.10 m. The transistor dopings are
voltage so that the low-injection condition applies?
NE = 1017 cm–3, NB = 1016 cm–3, and NC = 1015 cm–3,
(a) For T = 300 K, calculate the B-E voltage at which 8 . The following currents are measured in a uniformly
the minority carrier electron concentration at doped npn bipolar transistor:
x = 0 is 10 percent of the majority carrier hole InE = 1.20 mA IpE = 0.10 mA
concentration. InC = 1.18 mA IR = 0.20 mA
(b) At this bias, determine the minority carrier hole IG = 0.001 mA Ipc0 = 0.001 mA
concentration at x' = 0. Determine
(c) Determine the neutral base width for this bias (a) , (b) ,
(c) T, (d) , and
4 . A silicon npn bipolar transistor is uniformly doped
(e) .
and biased in the forward-active region. The neutral
base width is xB = 0.8 m. The transistor doping 9 . A silicon npn transistorat T = 300 K has an area of
concentrations are N E = 5 × 10 17 cm –3 , 10–3 cm2, neutral base width of 1 m, and doping
NB = 1016 cm–3, and NC = 1015 cm–3. concentrations of NE = 1018 cm–3, NB = 1017 cm–3,
(a) Calculate the values of pE0, nB0, and pC0. NC = 1016 cm–3. Other semiconductor parameters
(b) For VBE = 0.625 V, determine nB at x = 0 and pE are DB = 20 cm2/s, E0 = B0 = 10–7 s, and C0 = 10–6 s.
at x' = 0. Assuming the transistor is biased in the active region
(c) Sketch the minority carrier concentrations and the recombination factor is unity, calculate the
through the device and label each curve. collector current for:
(a) VBE = 0.5 V, (b) IE = 1.5 mA, and
5 . Consider a pnp bipolar transistor. Assume that the
(c) IB = 2 A.
excess minority carrier hole concentrations at the
edges of the B-E and B-C space charge regions are
pB(0) = 8 × 1014 cm–3 and pB(xB) = –2.25 × 104
cm–3, respectively. Plot, on the same graph, pB(x)
for

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 Bipolar Junction Transistor 233

10. Consider a uniformly doped npn bipolar transistor (a) Determine the hole diffusion current density in
at T = 300 K with the following parameters: the base for V BC = 5 V, V BC = 10 V, and
NE = 1018 cm–3 NB = 5 × 1016 cm–3 VBC = 15 V.
NC = 10 cm
15 –3 (b) Estimate the Early voltage.
DE = 8 cm2/s DB = 15 cm2/s
14. The base width of a bipolar transistor is normally
DC = 12 cm /s
2
small to provide a large current gain and increased
TE0 = 10–8 s TB0 = 5 × 10–8 s
–7 speed. The base width also affects the Early voltage.
C0 = 10 s
In a silicon npn bipolar transistor at T = 300 K, the
xE = 0.8 mm xB = 0.7 mm
Jr0 = 3 × 10–8 A/cm2 doping concentrations are N E = 10 18 cm –3 ,
For VBE = 0.60 V and VCE = 5 V, calculate NB = 3 × 1016 cm–3, and NC = 5 × 1015 cm–3. Assume
(a) the currents JnE, JpE, JnC and JR, and DB = 20 cm2/s and B0 = 5 × 10 –7 s, and let
(b) the current gain factors , T, , , and . V BE = 0.70 V. Using voltages V CB = 5 V and
VCB = 10 V as two data points, estimate the Early
11. Three npn bipolar transistors have identical voltage for metallurgical base widths of
parameters except for the base doping concentrations (a) 1.0 m, (b) 0.80 m, and
and neutral base widths. The base parameters for (c) 0.60 m.
the three devices are as follows:
Device Base doping Base width 15. Consider a silicon npn bipolar transistor with uniform
A NB = NB0 xE = xE0 dopings of NE = 5 × 1018 cm–3, NB = 1017 cm–3, and
B NB = 2NB0 xE = xE0 NC = 5 × 1015 cm–3. Assume the common base
C B = NB0 xE = xE0/2 current gain is = 0.9920. Determine
(a) BVCBO,
(The base doping concentration for the B device is
(b) BVCEO, and
twice that of A and C, and the neutral base width for
(c) the base-emitter breakdown voltage. (Assume
the C device is half that of A and B.)
n = 3 for the empirical constant.)
(a) Determine the ratio of the emitter injection
efficiency of (i) device B to device A, and (ii) 16. Consider a silicon npn transistor at T = 300 K. Assume
device C to device A. the following parameters:
(b) Repeat part (a) for the base transport factor. IE = 0.5 mA Cje = 0.8 pF
(c) Repeat part (a) for the recombination factor. xB = 0.7 mm Dn = 25 cm2/s
(d) Which device has the largest common-emitter xdc = 2.0 mm rc = 30
current gain ? Cs = C = 0.08 pF = 50
(a) Calculate the transit time factors.
12. Repeat problem 11 for three devices in which the
(b) Calculate the cutoff and beta cutoff frequencies,
emitter parameters vary. The emitter parameters for
fT and f , respectively.
the three devices are as follows:
Device Base doping Base width 17. Assume the base transit time of a BJT is 100 ps and
A NE = NE0 xE = xE0 carriers cross the 1.2 m B-C space charge region at
B NE = 2NE0 xE = xE0 a speed of 107 cm/s. The emitter-base junction
C NE = NE0 xE = xE0/2 charging time is 25 ps and the collector capacitance
and resistance are 0.10 pF and 10 W, respectively.
13. A silicon pnp bipolar transistor at T = 300 K has
Determine the cutoff frequency.
uniform dopings of NE = 1018 cm–3, NB = 1016 cm–3,
and NC = 1015 cm–3. The metallurgical base width is
1.2 m. Let DB = 10 cm2/s and B0 = 5 × 10–7 s.
Assume that the minority carrier hole concentration
in the base can be approximated by a linear
distribution. Let VEB = 0.625 V.

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 234 Electronic Devices and Circuits

3 . What will be the values of p E 0 , n B 0 and p C 0

(in cm–3)?
pE0 nB0 pC0

1
(a) 4.5 × 102 2.25 × 104 2.25 × 105
Objective Practice Problems (b) 2.25 × 104 4.5 × 102 2.25 × 105
(c) 2.25 × 105 2.25 × 104 4.5 × 102
Common Data for Q.1 and 2 (d) 4.5 × 102 2.25 × 105 2.25 × 104

1 . In a bipolar transistor biased in the forward-active 4 . At x = 0, total minority carrier electron

region, the base current is is iB = 6.0 mA and the concentration, nB for VBE = 0.625 V will be
collector current is iC = 510 mA. What will be the (a) 1.34 × 106 cm–3 (b) 3.02 × 1010 cm–3
10
(c) 6.8 × 10 cm –3 (d) 6.80 × 1014 cm–3
values of , and is iE ?
iE 5 . At x = 0, total minority carrier hole concentration,
(a) 0.9884 85 516 A pB for VBE = 0.625 V will be
(b) 0.0117 13.25 504 A (a) 1.36 × 1011 cm–3 (b) 6.12 × 1015 cm–3
(c) 0.8673 8.5 516 A. 13
(c) 1.36 × 10 cm –3 (d) 3.02 × 1011 cm–3
(d) 0.9884 85 504 A.
Common Data For Q. 6 and 7
2 . Consider the geometry of an npn transistor as shown
in figure below. An npn silicon bipolar transistor at T = 300 K has uniform
Emitter Collector dopings of N E = 10 19 cm –3 , N B = 10 17 cm –3 and
Base
- n- -p - - n- NC = 7 × 1018 cm–3. The transistor is operating in the
inverse-active mode with VBE = – 2 V and VBC = 0.565 V.
xE xB xC 6 . The minority carrier concentrations (in cm–3) at
x = xB and x" = 0 will be respectively
x =xE x =0 x =0 x =x B x =0 x =x C
x x x
(a) 6.7 × 1012, 9.56 × 1013
(b) 2.97 × 1012, 9.56 × 1013
A uniformly doped silicon npn bipolar transistor is to (c) 6.7 × 1012, 2.97 × 109
be biased in the forward-active mode with the B-C (d) 2.97 × 1012, 2.97 × 109
junction reverse biased by 3 V. The metallurgical
7 . If the metallurgical base width is 1.2 m, what will
base width is 1.10 m. The transistor dopings are
be the neutral base width of the transistor ?
NE = 1017 cm–3, NB = 1016 cm–3 and NC =1015 cm–3
(a) 0.994 m (b) 1.187 m
at T = 300 K. What is the required B-E voltage at
(c) 1.006 m (d) 1.20 m
which the minority carrier electron concentration at
x = 0 is 10 percent of the majority carrier hole Common Data For Q. 8 to 10
concentration ?
A uniform doped silicon pnp transistor is biased in the
(a) 0.016 V (b) 24.51 V
forward-active mode. Its geometry has been shown in
(c) 0.0408 V (d) 0.635 V
the figure below. The doping concentrations are
Common Data For Q. 3 to 5 NE = 1018 cm–3, NB = 5 × 1016 cm–3 and NC = 1015 cm–3.
A silicon npn bipolar transistor is uniformly doped and
Emitter Base Collector
biased in the forward-active region. The neutral base -p - - n- -p -
width is x B = 0.8 m. The transistor doping
concentrations are NE = 5 × 1017 cm–3, NB = 1016 cm–3, xE xB xC
and NC = 1015 cm–3.
x =xE x =0 x =0 x =x B x =0 x =x C
x x x

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 Bipolar Junction Transistor 235

8 . What will be the thermal equilibrium minority carrier 14. Consider the transistor shown in figure below :
concentrations, nB0, pB0 and nC0 (in cm–3)?
nB0 pB0 nC0
(a) 2.25 × 102 2.25 × 105 4.5 × 103
(b) 2.25 × 102 4.5 × 103 2.25 × 105
(c) 4.5 × 103 2.25 × 102 2.25 × 105
(d) 4.5 × 103 2.25 × 105 2.25 × 102
+
9 . For VEB = 0.650 V, total minority carrier hole 6V –
concentration, pB at x = 0 will be
(a) 4.68 × 103 cm–8 (b) 7.93 × 1013 cm–3
4
(c) 5.54 × 10 cm –3 (d) 3.57 × 1014 cm–3 The transistor is operating in
(a) Forward-Active region
10. For VEB = 0.650 V, total minority carrier (electron)
(b) Reverse-Active region
concentration, nE at x' = 0 will be
(c) Saturation region
(a) 1.78 × 1013 cm–3 (b) 7.91 × 1012 cm–3
2 –8
(d) Cutoff region
(c) 2.34 × 10 cm (d) 4.31 × 102 cm–3
15. Consider the transistor shown in figure below.
Common Data For Q. 11 and 12

The following currents are measured in a uniformly doped

npn bipolar transistor:
InE = 1.20 mA IpE = 0.10 mA
InC = 1.18 mA IR = 0.20 mA
IG = 0.001 mA Ipc0 = 0.001 mA
+
11. What wijl be the values of , and ? 6V –

(a) 0.787 0.923 3.69

The transistor is operating in
(b) 0.923 3.69 0.787
(a) Forward-Active region
(c) 0.787 3.69 0.923
(b) Reverse-Active region
(d) 3.69 0.787 0.923
(c) Saturation region
12. What will be the values of T and respectively ? (d) Cutoff region
(a) 0.983 and 0.923 (b) 0.923 and 3.69
16. The transistor given below is operating in
(c) 0.787 and 0.867 (d) 0.983 and 0.867

13. Consider the transistor shown in figure below.

–
3V +
+
6V –

+
6V –

(a) Forward-Active region

(b) Reverse-Active region
What is the region of operation of the transistor ? (c) Saturation region
(a) Forward-Active (b) Reverse-Active (d) Cutoff region
(b) Saturation (d) Cutoff

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 236 Electronic Devices and Circuits

17. An npn silicon transistor is biased in the inverse active The mode of operation of the transistor is
mode with VBE = – 3 V and VBC = 0.6 V. The doping (a) reverse active mode
concentrations are NE = 1018 cm–3, NB = 1017 cm–3 (b) cut off mode
and N C = 10 16 cm –3 . Other parameters are (c) forward active mode
x B = 1 m, E 0 = B 0 = C 0 = 2 × 10 –7 s, (d) saturation mode
DE = 10 cm2/s, DB = 20 cm2/s, DC = 15 cm2/s and 21. If the value of forward is on the order of 100, while
A = 10–3 cm2. The collector and emitter currents in reverse is on the order of 0.1, then what will be
the transistor will be respectively (Neglect geometry the value of F and R ?
factors and assume that the recombination factor is
F R
unity) (a) 0.049 0.49
(a) 1.19 mA, 0.829 mA (b) 0.829 mA, 1.19 mA (b) 0.99 0.09
(c) 0.359 mA, 0.47 mA (d) 0.47 mA, 0.359 mA (c) 0.09 0.99
Common Data For Q. 18 and 19 (d) 0.49 0.049

The electron and hole currents inside a pnp BJT biased 22. To increase the upper frequency limit of pnp
in the active mode are plotted in figure. All the currents transistor with the help of
are referenced to I1, the hole current injected to the (1) Physical size of the device should be kept small
base. (2) Base width should be kept small to reduce transit
Hole current time
Ip In
(3) Base, emitter and collector areas should be kept
small to reduce junction capacitance
Which of the above statements are correct?
I1 I1 0.999I1 0.999I1 (a) (1), (2) (b) (2), (3)
(c) (1), (3) (d) (1), (2), (3)

0.001I1 10–6 I1
23. For an Si pnp transistor biased in the active region
0.001I1
with = 1, width of the base region = 0.5 m, hole
x diffusion coefficient Dp = 15 cm2/sec. If the frequency
E B C
response is dominated by transit time delay, what is
18. What is the value of common emitter dc current gain the approximate upper frequency limit ?
( dc) ? (a) 1.91GHz (b) 1.91MHz
(a) 100 (b) 99 (c) 8.33 GHz (d) 8.33 MHz
(c) 999 (d) 499
24. Consider the transistor whose IC–VCE curvese are
19. What is the base current (IB) ? shown in figure.
(a) .999 I1, mA (b) 0.999 I1 Amp IB=40 A
(c) 1.999 I1 mA (d) 1.999 I1 Amp 5.4
5
20. Consider the transistor shown in figure below.
30 A
+V 4
IC(mA)

3.7
3 20 A

RC 2
10 A
4.9 V 1
4.8 V
0
4.1 V 0 0.5 1 2 3 4 5
VCE(V)
RE
What is the value of early voltage (Volt)?
(a) –11 V (b) 0.5 V
(c) –100 V (d) –20 V

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 Bipolar Junction Transistor 237

25. What is mode of operation of the transistor circuit 28. Which transistors have the largest value of collector
shown in figure below? junction capacitance with VCB reverse biased at
+V 10 V?
(a) 1 (b) 2
(c) 3 (d) 2 and 3
RE
29. Assume the base transit time of a BJT is l00 ps and
0.7 V carriers cross the 1.2 n B-C space charge region at
a speed of 107 cm/s. The emitter-base junction
charging time is 25 ps and the collector capacitance
–5 V
and resistance are 0.10 pF and 10 , respectively.
RC The cutoff frequency fT will be
(a) 2.3 GHz (b) 1.15 GHz
(c) 0.575 GHz (d) 7.24 GHz
–V
(a) reverse active mode 30. Consider the circuit shown below. If VS = 0.63 V,
(b) cut off mode I1 = 275 A, and I2 = 125 A then the value of I3 is
(c) forward active mode
(d) saturation mode

26. If a pnp transistor is marie with the name dimension I1

I2
and doping concentration as an npn. then which of
the following statement is true ?
(a) the value of in npn is greater with respect to
VS +
pnp transistor – I3
(b) the value of in pnp is greater with respect to
npn transistor
(c) the value of is same in npn and pnp transistor (a) –400 A (b) 400 A
(d) None of the above (c) –600 A (d) 600 A

Common Data For Q. 27 to 28 31. Consider the circuit shown below. For the source
Three npn transistors in identical swept that tnmnrtcr voltage VS = 0.63 V, the currents are IC = 275 A
(2) has a bass region twioe as long as transistor (1), sad and IB = 5 A.
transistor (3), has a base ngioo doped twice as heavily as
tranaiater (1). All other dopings and lengths are Identical
for the three tranaistora.
w 2w
n p n n p n

VS +
Na = N1 N1 –
(1) (2)
w
The forward common emitter gain F is
(a) 56 (b) 55
(c) 0.9821 (d) 0.9818
2N1
(3)

27. Which transistors have the largest value of punch

through voltage ?
(a) 2 and 3 (b) 2
(c) 1, 2, 3 are same (d) 3

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 238 Electronic Devices and Circuits

32. Consider the transistor circuit shown in figure below. 38. What is base transit time (in psec) for electron in
VCC the npn prototype transistor base doping level of
1017 cm–3 and base width of wB = 0.1 m and electron
diffusion constant Dn = 20 cm2/sec?

39. If the collector current is IC = 100 A, what will be

the value of transconductance gm(in ms) of the BJT?
RC IC1 IC2 RC
Common Data For Q. 40 to 41
Using the prototype model (ignore the apparent band
Vin Vref gap narrowing and its effect on injection efficiency) for
Q1 Q2
an npn with NDE = 1019 cm–3, NAB = 2 × 1017 cm–3,
N DC = 10 17 cm –3 let V BE = 0.8 V, V CB = 2 V.
The metallurgical widths are w EB = 0.2 m and
IEE wBM = 0.2 m. The minority carrier diffusion constant
DPE = 3.8 cm2/sec, DnB = 15 cm2/sec and intrinsic carrier
concentration ni = 1.08 × 1010 cm–3.
For the case, Vin = Vref + 0 3 V, what is the ratio of 40. What is the value of ?
lC1/lC2 ?
(a) 103 (b) 300 41. What is the value of ?
(c) 105 (d) 3 × 103
42. Consider the figure shown below.
33. The collector current of bipolar is iC = 2 mA if the 1020
output resistance is greater than 10 . What is the
value of early voltage VA for the transistor? 1019
(a) VA < 20 V (b) VA < 10 V
(c) VA > 10 V (d) VA > 20 V
1018
|ND – NA|(cm–3)

Common Data For Q. 34 to 35 NAB(0+)

17
2×10
For a BJT, IC = 5.2 A, IB = 50 A, and ICBO = 0.5 A. 17
10
34. The value of is NAB(WB)
2×1016
(a) 103 (b) 91
1016
(c) 83 (d) 51

35. The value of IE is 1015

(a) 5.25 mA (b) 5.4 mA 0 0.2 0.4 0.6 0.8
(c) 5.65 mA (d) 5.1 mA
Transition regions
Common Data For Q. 36 to 37 Depth ( m)
The leakage current of a transistor are ICBO = 5 A and
Find the built in electric field in base region
ICEO = 0.4 mA and IB = 30 A
(in kV/cm)
36. The value of is
Common Data For Q. 43 to 45
(a) 79 (b) 81
(c) 80 (d) None of the above Given an npn BJT where IEn = 100 A, IEp = 1 A,
ICn = 99 A and ICp = 0.1 mA
37. The value of IC is
(a) 2.4 mA (b) 2.77 mA 43. What is the value of base current (in mA) ?
(c) 2.34 mA (d) 1.97 mA 44. What is the value of gain, dc?

45. What is the value of ICEO (in A)

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 Bipolar Junction Transistor 239

Common Data For Q. 46 to 48 Assume that one-half of the base current enters from
Given a pnp BJT where IEp = 1 A, IEn = 0.01 A, each side of the emitter strip and flows uniformly to the
ICp = 0.98 A, and ICn = 0.1 A. centre of the emitter. Assume the following parameters
for the transistor:
46. What is the value of base current IB (in A)?
NB = 1016 cm–3 xB = 0.70 m
= 400 cm 3/V-s S =8 m
47. What is the value of dc? p
Emitter length L = 100 m
48. What is the value of ICEO?
52. The resistance between x = 0 and x = S/2 for the
Common Data For Q. 49 to 50
flow of base current (IB) will be _______ .
A Si pnp BJT with NAE = 5 × 1017/cm3, NDB = 1015/cm3,
NAC = 1014/cm3 and wB = 3 m is maintained under 53. If IB = 20 A then, the voltage drop between x = 0
equilibrium conditions at room temperature. and x = S/2 will be ______ mV.

49. What is the net potential difference (in volt) between 54. If VBE = 0.6 V at x = 0 then what will be the
the collector and emitter ? percentage of the number of electrons being injected
into the base at x = S/2, compared to x = 0.
50. If built in potential of E-B junction is 0.757 V, then
the maximum magnitude of the electric field in the Common Data For Q.55 to 56
E-B depletion region is ___________ × 104 V/cm. An npn silicon bipolar transistor has a base doping
concentration of NB = 1017 cm–3, a collector doping
51. In a particular bipolar transistor, the base transit time
concentration of NC = 1016 cm–3, a metallurgical base
is 20 percent of the total delay time. The base width
width of 1.1 m and a base minority carrier diffusion
is 0.5 m and the base diffusion coefficient is
coefficient of DB = 20 cm2/s. The transistor is biased in
DB = 20 cm2/s. The cutoff frequency, fT will be
the forward-active region with VBE = 0.60 V. If VCB changes
_______ MHz.
from 1 V to 5 V then answer the follwoing.
Common Data For Q. 52 to 54
55. The corresponding change in the neutral base width
Consider the npn transistor shown in figure.
will be _________ m.

56. The corresponding change in the collector current

L will be________A/cm2.

S
IB/2 Emitter IB/2
Base
Collector

x =0 x B x =S/2

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 Chapter

Metal Oxide Semiconduc-

tor (MOS) Capacitor 7
Introduction
In this chapter we will study about the heart of MOSFET device that is MOS capacitor. MOSFET will
be discussed in analog electronics here we will discuss only MOS capacitor. In this chapter we will study how
application of potential on the metal can invert the semiconductor surface close to oxide.

7.1 The Two Terminal MOS Structure

The two terminal MOS capacitor structure is shown in (Figure :7.1) The metal may be aluminium or
some other type of metal, although in many cases, it is actually a high-conductivity polycrystalline silicon that
has been deposited on the oxide; however, the term metal is usually still used. The parameter tox in the figure is
the thickness of the oxides and ox is the permittvity of the oxide.

Metal

tox insulator(oxide)
ox

Semiconductor
substrate

Fig 7.1 The basic MOS capacitor structure

The oxide act as an insulator and thus no current can flow between the two terminals. Thus current in
the MOS structure is always zero. We assume that oxide is ideal insulator with zero charges and metal has
infinite positive and negative changes.

Gate M O S Body

Fig 7.2 Block Representation of MOS Capacitor

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 Metal Oxide Semiconductor (MOS) Capacitor 241

The semiconductor can be p or n type semiconductor and it has finite concentration of changes. No
electric field can be found inside metal, but electric field can exist inside oxide and inside semiconductor.

Band diagram of MOS structure Metal oxide Semiconductor before making acontact

Vacuum level
exi
EC

e m
ex

EFm E g = 9 eV EC
Efi
Efs
EV

EV
Metal Silicon dioxide p-type silicon

Fig 7.3 Band diagram of Metal, oxide and semiconductor before forming a contact.
We can see that m that is work function of metal, thus the amount of energy to liberate electrn from
metal or amount of energy required to make electron free from metal is m. The oxide SiO2 has band gap of
9.1e V and we have p type semiconductor.
We can see that s > m thus when the Metal, oxide and semiconductor are joined to make MOS
structure then at equilibrium the fermi level of whole structure should be a straight line with no slope thus to
from a contact to the electrons will flow from metal to semiconductor as s > m.
Since electrons will flow from metal to semiconductor in this case then depletion region exist in
semiconductor, the metal will obtain positive charges and ptype semiconductor will have depletion region with
negative charges. Thus at equilibrium the band diagram will be as show in (Fig 7.4) and we assume that whole
oxide will be depleted because thickness of oxide is very less.

Vacuum level
Metal Oxide p-type semiconductor

eVox0
Oxide
conduction band
exi

B ex
A
ex D
e EC
m Eg
e = 2
m C
E fi
e fp
e s0
EF
EV

M O S
depletion region

Fig 7.4 Energy band diagram through the MOS structure in thermal equilibrium after contact

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 242 Electronic Devices And Circuits

The Fermi level is a constant through the entire system at thermal equilibrium. We may define ( m as
a modified metal work function the potential required to inject an electron from the metal into the conduction
band of the oxide. Similarly, is defined as a modified electron affinity. The voltage Vox0 is the potential drop

across the oxide for zero applied gate voltage and is not necessarly zero because of the difference between m

and . The potential s0 is the surface potential for this case.)

Thus before contact the metal and semiconductor were not having same energy of electrons but when
contact is made then fermi level of whole structure become straight line but we can see that in band diagram
variation in EC and Ev in (Fig 7.4) show presence of electric field from metal-oxide interface to inside the
semiconductor till the point in semiconductor where depletion region exist. Thus at equilibrium electric exist in
oxide and in semiconductor.
The potential difference between point A and B is potential across oxide and potential difference between
C and D is potential across semiconductor. Thus at equilibrium we have potential stored across semiconductor
and oxide. This potential is due to difference between m and s, when contact is made the fermi level of whole
device become a straight line and thus we can say that so and Voxo are due to m – s 0. Thus if we sum the
energies from the Fermi level on the metal side to the Fermi level on the semiconductor side, we have
Eg
e m eVox 0 = ex e s0 e fp (7.1)
2
Equation (9.63) can be rewritten as

Eg
Vox0 + = m x fp (7.2)
s0 2e

We can define a potential ms as

Eg
ms m x fp (7.3)
2e

which is know as the metal-semiconductor work function difference.

Or simply can say that
s – m = Vox0 + s0 (7.4)
In the previous case we used metal as gate of the device, we may se degenerately doped polysilicon
deposited on the oxide as the gate Fig:7.5(b) show energy band diagram of MOS capacitor with n+ polysilicon
gate and p-type substrate. In this case before making contact we assume that fermi level of n+ polysilicon is at
EC, thus EF = EC for n+ polysilicon. In Fig:7.5 (a) the band diagram before making contact is shown
Vacuum level
EC eVox ex
ex ex EC
m Eg
9.1 eV s ex 2
EF = EC Efi
EC EC EF = EC e fp EF
EV
Efs n + poly
EV EV
EV
EV S
n+ polysilicon oxide p-Substrate M O

(a) (b)

Fig : 7.5 (a) n + polysilicon gate MOS structure band diagram before (b) band diagram
after making contact

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 Metal Oxide Semiconductor (MOS) Capacitor 243

Eg
Here m – s = x x Fp (7.5)
2e

Eg
ms = 2e
fp (7.6)

Here also – ms = Vox0 + s0 (7.7)

Similarly we may have MOS capacitor with p+ polysilicon gate, hare EF = EV thus the band diagram
afte making contect will be as shown Fig : 7.6

ex

EC

p + poly Eg EC
2 Efi
e fn
EF = EV EF
EV
M O S

Fig7.6 p + polysilicon gate MOS structure band diagram

we see that

Eg Eg Eg
ms x x fp fp
e 2e 2e

Example : 7.1

To calculate the metal-semiconductor work function difference ms for a given MOS system and
semiconductor doping.
For an aluminum-silicon dioxide junction, m = 3.20 V and for a silicon-silicon dioxide junction, =
3.25 V. We may assume that Eg = 1.11 eV. Let the p-type doping be Na = 1014 cm–3.

Solution : 7.1
For silicon at T = 300 K, we may calculate fp as

Na 1014
= Vt in = (0.0259) In = 0.228 V
fp ni 1.5 1010

Then the work function difference is

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 244 Electronic Devices And Circuits

Eg
= m fp = 3.20–(3.25 + 0.555 + 0.228)
ms 2e

or ms = – 0.83 V

7.2 MOS Capacitor at Equilibrium

We have already analyzed MOS capacitor at equilibrium and see the band diagram of the structure. We
have observed that semiconductor has depletion region at equilibrium. Lets analyze the charge density, electric
equilibrium

t ox
M O S
M O S
eNaxd
eNaxd si
Gate M O S Body xd
ox
x
xd x

–eNa
(a) change density (b) electric field

Fig 7.7 The charge density and electric field in MOS structure at equilibrium
We assume that width of depletion region is xd, the semiconductor is p-type and has charge density of
eNa. Thus total negative charges in depletion region of semiconductor is eNaxd the equal and opposite positive
charges will get accumulated at metal-oxide interface also. Since Metal has inifite charges thus there will be
approximately zero depletion width inside it thus in charge density plot we have shown charge density at metal-
oxide interface with a delta function and area of this delta function will be eNaxd and since it is showing positive
charge density thus it is drawn upward. We have also assumed that there are no charge inside oxide. Thus we
get charge density plot as shown in Fig 7.7(a). To get the electric field plot we use Poisson equation
Thus

dE
=
dx
Thus inside Metal E = 0 as = 0 and at interface of metal-oxide we get a delta function in charge
density plot, thus
eN a x d
Eox = (7.9)
ox

Also the electric field from metal to semiconductor in the structure is perpendicular to the interface
thus we will use the continuity equation to get electric field value at edge of semiconductor-oxide to semiconductor
side. Thus
Dsi = Dox
si Esi = ox Eox

eN a x d
Esi = (7.10)
si

eN a x d
Thus electric field at the oxide-semiconductor interface toward semicondutor side is Esi = .
si

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 Metal Oxide Semiconductor (MOS) Capacitor 245
Now in this region = – eNa thus electric field will decay and it will become zero at x = xd.
The potential can be found by intergrating electric field plot. Integration of electric field plot in oxide
will give potential across oxide and integration of electric field in semiconductor will give potential across
semiconductor.
eN a xd
Vox0 = .tox (7.11)
ox

1 eN a xd2
and s0 = (7.12)
2 ox
Thus s – m = Vox0 + s0

eN a xd 1 eN a xd2
= tox (7.13)
ox 2 si

Study Note
If in a question we have s – m. then using above quadratic equation we can find depletion region width xd at
equilibrium

7.3 Applying Voltage to MOS Structure

When external voltage is applied to MOS structure then it might support or oppose the internal electric
field. The applied external voltage Va and electric field due to it is shown in Fig 7.8

E ext

M O S

E int

Va

Fig 7.8 External voltage is applied to MOS structure

When Va is applied such that external electric field support internal electric field then obviously the
electric field inside the MOS structure will increase and this increase in electric field will be due to increase in
charge density. There will be zero depletion region in metal and to get more negative ions the depletion region
will increase in semiconductor . Since Vox0 and s0 are the potential across oxide and semicondutor at equilibrium.
Now after applying external voltage Va is voltage across oxide is Vox and across semicondutor is s then
Va = (Vox – Vox0) + ( s – s0) (7.14)
= Vox + s – Vox0 – s0 (7.15)
Va = Vox + s + ms (7.16)
Thus is Va is applied electric field will increase which increase depletion region width in semicondutor.
Thus electric field plot inside MOS structure will be

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 246 Electronic Devices And Circuits

M O S
eNa xd3
ox V3

eNa xd2 eNa xd3 V 3 > V 2 > V 1

ox V2 si

eNa xd1 eNa xd2

V1 si
ox eNa xd1
si
xd1 xd2 xd3
depletion width increasing

Fig 7.9 Electric field inside MOS struture with increasing applied voltage
Thus we can see that more the applied voltage more is electric field and more is depletion width inside
semicondutor. Also we can see that Vox and s that is potential across oxide and semicondutor increase when
some external voltage is applied. It is very obvious that if in Fig :7.8 we apply negative value of Va then externa
electric field will appose internal electric field and electric field and depletion region inside semicondutor will
reduce. The value of external applied voltage for which electric field inside MOS struture become zero is called
flat band voltage.

In general if depletion width in semicondutor is xd then

REMEMBER
eN a x d 1 e N a x d2
Vox = .t ox and s=
ox
2 si

7.3.1 Flat Band voltage

Flat band voltage is that external applied voltage for which no band bending exist. We have seen that at
equilibrium the band diagram of MOS structure had band bending in oxide and semicondutor as m s. Thus
if we apply Va (external voltage) to MOS structure then band bending will change. If electric field due to
external applid voltage support internal electric field then band bending will increase and if it oppose internal
electric field then band bending will reducre. since
Va = (Vox – Vox0) + ( s – s0) (7.17)
Since at flat band there is no band bending thus no electric field inside structure thus no potential
across oxide and semiconductor. That is
Vox = 0, s = 0
VFB = (0 – Voxo) + (0 – so)
= – (Voxo + so)
VFB = + ms (7.18)

7.3.2 Threshold voltage

Let us analyze the band diagram of MOS struture when positive gate voltage is applied. We know that
when positive gate voltage is applid then positive charges go to metal and equivalent negative charges are
accumulated inside depletion voltage more positive charges get accumulated at metal and to maintain charge

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 Metal Oxide Semiconductor (MOS) Capacitor 247

neutrality depletion region width will increase inside semicondutor. Another way to look at this point is that
when Va is positive (Fig 7.8), then external electric field pushes holes in p-type semicondutor away from oxide-
semicondutor interface and thus more the electric field lead to larger depletion region width inside semicondutor.
Due to increase in Va, Vox and s also increase due to which band bending increase as shown in Fig 7.10

Vox0 Vox
EC EC

EFi EFi
s0
s
fp
EF EF
EV EV

M O S M O S

(a) (b)

Vox Vox

EC
EC
EFi EFi
Fp
s Fp
s EF
EF EV
EV

M O S M O S

(c) (d)

Vox

EC

EFi
Fp
EF
s fp
EV

M O S

(e)

Fig 7.10 (a) band diagram of MOS structure equilibrium (b) band diagraom of MOS structure when V a > 0 is
applied (c) band diagram of MOS structure when s = Fp (d) band diagram of MOS sturcture when s > Fp (e)
band diagram of MOS structure when s = 2 F
In Fig :7.10(a) we show band diagram of MOS structure at equilibirum and as the applied voltage Va

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 248 Electronic Devices And Circuits

is increased the total electric field increase due to which more band bending occur and we can see the band
bending in Fig 7.1(b), (c), (d), (e). In the above figure we can see that as band bending increase the EFi is
coming close to EF thus the p-type substrate is becoming less p-type. In band diagram of Fig : 7.10 (c) the EFi =
EF at oxide semicondutor interface ( s = Fp). Thus at the interface the semicondutor become intrinsic and on
further increase of Va the band bending will increase that will make the semicondutor at the oxide-semicondutor
interface n-type as EFi will go beyond EF. Thus a very significant property of MOS is that we can invert the
characteristic of semicondutor at oxide-semicondutor ductor interface by apply gate voltage.
If Fp is the gap between EFi and EF in p-type semicondutor, thus fp define the amount of doping in
semicondutor. If by applying gate voltage the band bending at oxide-semicondutor EFi go beyond EF such that EF
– Fi = Fp. then the n-type semicondutor produced at oxide-semicondutor interface will have approximately
same concentration of electrons as the concentration of holes in p-type substrate, or the n-type region created
at oxide-secmicondutor interface has same conductivity as that of the p-type substrate. The band diagram for
this condition is shown in Fig 7.10(e) and this condition is called inversion and here s = 2 Fp.

Na
Here = VT ln (7.19)
Fp ni

Thus at complete inversion s =2 Fp and depletion region width will be

2 s 2 Fp
xdT = e Na
(7.20)

Study Note
The depletion region width is

2 s s
xd = e Na

s Fp
Thus xdT = 2 (7.21)
e Na

The applied voltage (Va) at which s = 2 Fp or inversion take place at oxide-semicondutor interface is
called threshold voltage. Thus at inversion condition
VTh = (Vox – Vox0) + ( s – s0) (7.22)
VTh = Vox + s + ms
Here s = 2 Fp

s Fp
and xdT = 2 e Na

eN a x d
Since Vox = tox
ox

eN a x d T
at threshold Vox = tox (7.23)
ox

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The charge distribution in MOS structure at threshold is shown in (Figure :7.11)

M O

xdT

Fig 7.11 Charge density in MOS structure at threshold.

Thus we can say that area of delta function in Fig 7.11 is eNaxdT. Also
|Qss| = |charges in semicondutor per unit area|= eNaxdT
eN a x d T
Vox = tox
ox

Qss
= tox (7.24)
ox

If we take Cox as oxide capacitance per unit area

Qss
Vox = C (7.25)
ox

Thus the threshold voltage will be

Q ss
VTH = C +2 Fp + ms (7.26)
ox

Q ss
VTH = C +2 Fp + VFB (7.27)
ox

Since ms = VFB thus we can write equation equation 7.26 as equation 7.27.

REMEMBER Learn the proof of VTH equation because many times in GATE questions have been asked related
to equation (7.26) and (7.27). We can see that VTH can be changed by

1. Cox increase lead to VTH decrease

2. tox increase lead to VTH increase

3. doping of substrate increase will make VTH to increase

4. ms increase VTH increase

Similarly many more conlusion can be seen through equation (7.26) and (7.27)

7.3.3 Effect of non zero oxide charges

Till now we assumed that oxide is ideal and has zero charges inside itself. Now if we take non zero
charges in oxide, that is Qox is charge per unit area in oxide and let us take Qox > 0. Remember that MOS

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 250 Electronic Devices And Circuits

structure work on concept of charge neutrality, let us do analysis to make things more clear.

MOS structure at equilibrium with non zero oxide charges

At equilibrium when metal oxide and semicondutor are connected to make contact then there will be
non zero potential generated across oxide (Vox0) and semicondutor ( s0) as m s. Even if Qox 0 then also at
equilibrium the condition will remain same as that of ideal case that is
Vox0 + s0 = – ms (7.28)

Study Note
This condition of equation (7.28) will always be satisfied even if oxide has charges or not because this condition is
due to m s and when contact is made then EF of whole device should be a straight line with zero slope.

Flat band voltage

Flat band voltage is that voltage at which no band bending occur in band diagram of MOS structure.
Since no band bending occur it means no electric field exist inside MOS structure and this means no depletion
region exist in semicondutor. We have already calculated the flat band voltage for ideal case, now let us calculate
flat band voltage for case when oxide has charges. Since oxide has charges and we will assume that oxide
charges are present at oxide semicondutor interface.
Since Vox0 + s0 = – ms
and when external voltage is applied then
Va = (Vox – Vox0) + ( s – s0)
Fig 7.12 show the charge density inside MOS structure at flat band. Qox show charge density in oxide
and semicondutor has no charge density as no depletion rregion exist and Qm show charge density in metal
present at metal-oxide interface. We can also see that Qox is present at oxide-semicondutor interface.

M O S
Qm Qox

Fig 7.12 Charge density in MOS structure at equilibrium

Thus applying charge neutrality
Qm + Qox = 0
Qm = – Qox
–Q ox
Vox = C (7.29)
ox

Study Note

ox
We can write equation (7.29) because oxide capacitance per unit area is Cox = t and charge density across oxide
ox

is – Qox and + Qox. Thus voltage is charge/capacitance.

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Thus the flat band volatge

–Q ox
VFB = – Vox0 + ( s – s0)
C ox
Since no charge exist in semicondutor, thus s =0
Qox
VFB = –Vox0 – s0 – Cox

Qox
VFB = ms – (7.30)
Cox

Threshold Voltage
We know that threshold voltage is that applied voltage at which inversion of the semicondutor as
semicondutor-oxide interface take place and for this s = 2 Fp. Since MOS structure work only on the concept
of charge neutrality we have seen in the previous (ideal) case where no oxide charge exist then metal oxide
interface had charge density equal to eNaxdT that is equal and opposite to charge density in semicondutor. Since
in this case also s = 2 Fp, thus

2 s
2 Fp
xdT =
e Na

s Fp
xdT = 2
e Na
Thus the plot of charge density will be as shown in Fig 7.13(a)
We can see that (charge neutrality)
Qm + Qox – eNaxdT = 0
Qm = eNaxdT – Qox (7.31)

M O S
M S
Qox Eox O
Qm
Esi

xdT

xdT
– eNa

(a) (b)

Fig 7.13(a) charge density plot (b) electric field plot in MOS structure
Now we can find the electric field plot using poisson equation. No electric field exist in metal, the
electric field in oxide will be
dE
=
dx
In oxide = ox and effect of delta charge density (Qm) will be seen in oxide

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 252 Electronic Devices And Circuits

Qm
E = dx
ox ox

eN a xdT Qox
Eox = (7.32)
ox

Now this electric field is perrendicular from Metal to oxide to semicondutor thus to find value of electric
field at oxide semicondutor interface toward semicondutor side we use bounday condition and poission equation
taking effect of Eox and Qox respectively . Thus

E ox ox
Esi = .dx
si si

E ox ox Qox
=
si si

eN a xdT Qox Qox

=
si si

eN a xdT
Esi = (7.33)
si

Then in semicondutor due to charge density – eNa the electric field will decay and
eN a xdT x
E = . 0 < x < xdT. (7.34)
si

Thus we can see that electric field is as shown in Fig 7.13(b). Thus Vox can be calculated by intergrating
electric field in oxide Fig :7.13 (b). Thus

eN a xdT Qox
Vo x = tox
ox

eN a xdT Qox
Vox =
Cox

Qss Qox
Vo x = (7.35)
Cox

Study Note
|Qss| is magnitude of charge density inside semicondutor and Cox is capacitance per unit area.
Thus at threshold using
Va = (Vox – Vox0) + ( s – s0)
VTH = Vox + s – Vox0 – s0

Qss Qox
VTH = +2 Fp + ms (7.36)
Cox

Thus from above equation we can see that when Qox is positive then VTH reduces from the ideal value
equation (7.27). The simple reason behind this is that we need charge density equal to – eNaxdT inside

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semicondutor at threshold, now when no oxide charge is present then external supply has to provide charge
density of + eNaxdT to metal thus positive supply is to be applied. When positive oxide charge density is present
in oxide then for maintaining charge density external supply has to provide charge density of eNaxdT – Qox only
and if negative charge density exist in oxide then charge density of eNaxdT + Qox should be provided by external
supply to maintain charge neutrality. Thus VTH increase when Qox is negative and decrease when Qox is positive.
We can write equation (7.36) using (7.30) as
eN a xdT
VTH = 2 Fp VFB (7.37)
Cox

Example :7.2

To calculate the flat-band voltage for an MOS capacitor a p-type semiconductor substrate. Consider an
MOS structure with a p-type semiconductor substrate doped to Na = 1016 cm–3, a silicon dioxide insulator
with a thickness of tox = 500A, and n+ polysilicon gate. Assume that Qox = 1011 electronic charges per cm2.
The work function diffrence, from is ms = – 1.1 V.
Solution 7.2
The oxide capacitance can be found as

14
3.9 8.85 10
ox
Cox = 8 = 6.9 10–8 F/cm2
t ox 500 10

The equivalent oxide surface charge density is

Qox = (1011)(1.6 10 19) = 1.6 10–8 C/cm2

The flat-band voltage is then calculated as

Qox
VFB = ms–
ms = – 1.33 V
Cox

Example :7.3

To design the oxide thickness of an MOS system to yield a specified threshold voltage. Consider an n+
polysilicon gate and p-type silicon substrate doped to Na = 3 1016cm–3. Assume Qox = 1011cm–2. Determine
the oxide thickness such that VTH = +0.65 V. (Assume ms = –1.13 V)

Solution 7.3
The various parameters can be calculated as

Na 3 1016
Fp = Vt In = (0.0259) In = 0.376 V
ni 1.5 1010

1/2
1/2 4
4 s fp
4 11.7 8.85 10 0.376
and xdT = eN a 19 = 0.18 m
1.6 10 3 1016

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 254 Electronic Devices And Circuits

then |QSS(max)| = eNaxdT = (1.6 10–19)(3 1016)(0.18 10–4)

or |QSS(max)| = 8.64 10–8 C/cm2
The oxide thickness can be determined from the threshold voltage equation

t ox
VTH = (|QSS(max)|– Qox) + ms +2 Fp
ox

Then
8
8.64 10 1011 1.6 10 19

0.65 = 14 tox – 1.13+2(0.376)

3.9 8.85 10

or 0.65 = 2.0 105tox–0.378

Which yields tox = 504 A

7.3.4 Various region of operation of MOS structure

In the previous section we have seen how applied voltage can invert the semicondutor at oxide-
semicondutor interface. Here we will see a bigger picture of various region of operation of MOS strucure.

1. Accumulation region
When external voltage is applied to MOS structure such that positive is conneted to semicondutor as
shown in Fig :7.14(a). We can see that external electric field is from semicondutor to metal.

Efield

M O S
p-type
semiconductor

Va Va

EC

Efi
Gate M O
Negative Fp
voltage
applied EF
s
EV

(c)

Fig 7.14 (a) external voltage applied for accumulation mode (b) capactor equivalent of MOS structure (c)
band diagram of MOS structure in accumulation mode

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Remember that current will never flow in MOS structure as insultor is present. Thus MOS structure
can be seen as a capcitor as shown in Fig :7.14(b). When voltage Va is applied as shown in Fig :7.14 then
external electric field will be from semicondutor to metal, this electric field will push majority carrier holes
toward oxide-semicondutor interface. Thus the accumulation of the holes at oxide-semicondutor interface
represent plate of capacitor with positive charges and metal show plate of capacitor with negative charges.
The energy-band diagram of the MOS capacitor with the p-type substrate, for the case when a negative
voltage is applied to the top metal gate, the holes in the p-type substrate are attracted to the semiconductor oxide
interface. The majority carrier concentration near the surface becomes large than the equilibirum hole concentration
in substrate; hence, this condition is called carrier accumulation on the surface, is shown in Fig :7.14(a). The
oxide electric field is directed towards the gate electrode. The negative surface potential also causes the valence
band to bend towards Fermi level at the interface, which implies that there is an accumulation of holes. The
Fermi level is a constant in the semiconductor since there is no current through the oxide.
In Fig 7.14 (c) we can see that band bending occur and since here band bending is toward EF we take it
as negative thus we say that hare surface potential of semicondutor is negative( here s is negative). In bulk
region
EFi – EF = Fp
and concentration of holes

Fp
Po = Na = ni exp V
T

Thus at oxide semicondutor interface

EF – EFi = ( Fp + s )
connection of holes

Fp s
P o = ni exp VT

s
= Na exp V (7.38)
T

Thus the concentration of holes increase at oxide semicondutor interface and it is exponentially related
to s.

Study Note
This mode of operation is called accumulation mode of operation as holes get acculated at oxide-semicondutor
interface

2. Depletion mode of opertion

We have already analyzed what happen when external voltage is applied to MOS structure with p-type
substrate with positive applied at metal as shown in Fig 7.15. The band diagram will be as shown in Fig 7.10(a)
at equilibrium and when voltage Va is applied the band diagram will be as shown in Fig 7.15 (b), here external
electric field will support internal electric field thus total electric field will increase. This electric field will push
majority carrier holes in semicondutor away from oxide semicondutor interface and depletion region width in
semicondutor will increase, the semicondutor close to oxide will become less p-type and the band bending will

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take place and band diagram will be as shown in Fig 7.10 (b). As the applied voltage will increase and s that is
potential across semicondutor will increase, (here s will be positive) band bending increase and the band
diagram changes from Fig 7.10(a) to Fig 7.10(c). In Fig 7.10(c) we can see that s = Fp and semicondutor at
oxide-semicondutor interface has EF = EFi and semicondutor become intrinsic.

E ext

E field

M O S

E int

Va

(a) (b)

Fig 7.15 (a) Capacitor equivalent of MOS structure (b) Voltage applied with positive at metal
When value of s lie between 0 and Fp then MOS capcitor is said to be in depletion mode of operation.
Here the width of depletion region is xd and

2 s s
xd = e Na
(7.39)

Thus charge density that is – eNaxd is proportional to s .

In Fig 7.15(a) we have shown the MOS structure as a capacitor, here positive plate of capacitor is metal
and negative plate is the depletion region in semicondutor.

3. Weak inversion mode of operation

When the applied voltage in Fig 7.15(b) is increased further then electric field increase and the depletion
region width inside semicondutor increase and band bending increase. The increase in s and further band
bending lead to EFi going be low EF in semiconductor at oxide semiconductor interface. Thus the semicondutor
at the oxide semiconductor interface will become n-type. Thus this is called weak inversion region. The band
diagram will be same as shown in Fig 7.10(d) and if we increase Va further then s = 2 Fp and band diagram will
be as shown in Fig 7.10(e). Thus when s = 2 Fp then n region close to oxide-semiconductor interface will have
same conductivity as the conductivity of bulk p-type substrate and we assume that at this point complete inversion
take place.
In weak inversion the value of s exist between Fp and 2 Fp. In this region also we assume that the
negative charges are the ions in depletion region of semiconductor. Thus negative plate of capacitor is depletion
region of semiconductor and positive plate is metal. Thus the charge density in weak inversion will remain same
as – eNaxd and

2 s s
xd = e Na (7.40)

The value of Va for which s =2 Fp is called threshold voltage

REMEMBER Remember that in weak inversion and depletion mode of operation the negative charge in
semiconductor is due to ions in depletion region only.

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4. Strong Inversion
In depletion and weak inversion mode of operation we assumed that negative charges in semiconductor
are due to depletion region only and thus due to negatiave ions only. Thus we get that charge density was
proportional to s . Here we have neglected that the electric field which is pushing back holes away from
oxide-semiconductor interface will also attract electrons to the oxide semiconductor interface thus negative
charges will be due to electron also.

Study Note
But the approximation stated above is valid and we can carry on with this approximation

Now when applied is increased above VTH then we assume that electrons will be attracted to oxide-
semiconductor interface and with increase in voltage when the positive charge at plate of capacitor increase then to
balance this, negative charges will come at the plate of capacitor by not the ions of depletion region of semiconductor
but by the the electrons. Thus now with increase in applied voltage (Va) the depletion region width do not
increase as now balance or charge neutrality is done by electrons. Thus maximum depletion region width in
semiconductor is

2 s 2 Fp
xdT = e Na

s Fp
= 2 (7.41)
e Na
Thus in strong inversion the charge density is due to electron, thus when s >2 Fp then charge density

in semiconductor will be proportional to exp s . The simple explaination to this is that when s is the amount
VT
of band bending then EF come close to EC and we know that relationship that electron concentration is
exponentially related to (EC – EF) since it reduces as s increase so electron concentration increase in the
semiconductor at semiconductor-oxide interface.

Study Note
When fs ³ 2fFp the electron concentration increases rapidly with very small changes in surface potential, the space
charge width has essentially reached a maximum value.

Fig :7.16 show the total charge density (C/cm2) in the silicon as a function of the surface potential. At
flat band, the total charge is zero. For 0 s fp, we are operating in the depletion mode since the inversion
charge has no yet been formed. In this region acceptors in Si are depleted off creating immobile negative ion
layer at the oxide-semiconductor interface. This region is called the depletion region. For fp s 2 fp, the
Fermi energy at the surface is in the upper half of the band diagram, which implies an n-type material, but we
don’t have threshld inversion point. In this region where inversion have just started is called weak inversion
region, For s > 2 fp inversion charge density increase rapidly (exponentially) with increase in surface potential,
this region is called strong invertion region.

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 258 Electronic Devices And Circuits

10–4
p-type Si (300 K)
N a = 4 1015cm–3 (Strong inversion)
e s
10–5 exp
(Accumulation) 2kT
e| s |
exp

|Qs|(C/cm2)
10–6 2kT
2 fp
10–7
Flat band
Weak
10–8
Depletion inversion
EV EC
fp
–9
10
–0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0
s(V)

Figure :7.16 Variation of surface charge density for p-type Si MOS (accumulation charge and invertion
charge) as a function potential

7.4 Capacitor-Voltage Characteristic

The MOS capacitor structure is the heart of the MOSFET, A great deal of information about the MOS
device and the oxide-semiconductor interface can be obtained form the capacitances versus voltage or C-V
characteriestics of the device. The capacitances of a device is defined as
dQ
C =
dV
where dQ is the magnitude of the differential in charge on one plate as a function of the differential
change in voltage dV across the capacitor. The capacitance is a small-signal or ac parameter and is measured by
superimmposing a small ac voltage on an applied dc gate voltage. The capacitance, then, is measured as a
function of the applied dc gate voltage.

7.4.1 Ideal C-V Characteristic

First we will consider the ideal C-V characteristic of the MOS capacitor and then discuss some of the
deviations that occur from these idealized results. We will initially assume that there is zero change trapped in the
oxide and also that there is no change trapped at the oxide-semiconductor interface.
There are three operating conditions of interest in the MOS capacitor: accumulation, depletion and
inversion Fig 7.17(a) shows the energy-band diagram of a MOS capacitor with a p-type substrate for the case
when a negative voltage is applied to the gate, inducing an accumulation layer of holes in the semiconductor at
the oxide-semiconductor interface. A small differential change in voltage across the MOS struture will cause a
differential change in charge on the metal gate and also in the hole accumulation charge, as shown in Fig 7.17(b).
The differential changes in charge density occur at the edges of the oxides, as in a parallel-plate capacitor. The
capacitance C per unit area of the MOS capacitor for this accumulation mode is just the oxide capacitance, or

C (acc) = Cox= ox
(7.43)
t ox

Fig 7.18(a) shows the energy-band diagram of the MOS device when a small positive voltage is applied

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to the gate, inducing a space charge region in the semiconductor. Fig 7.18(b) shows the charge distribution
through the device for this condition. The oxide capacitance and the capacitance of the depletion region are in
series. A small differential change in voltage across the capacitor will cause a differential change in the space
charge width. The corresponding differential changes in charge densities are shown in the figure. The total
capacitance of the series combination is

1 1 1
= (7.44)
C depl Cox CSD

|dQ’|

+Q’
EC
Efi
EF
–Q’
EV
|dQ’|

(a) (b)

Fig 7.17 (a) Energy-band diagram through a MOS capacitor for the accumulation mode (b) Differential
charge distribution at accumulation for a differential change in gate volatage

|dQ|
EC
+Q
E fi
EF dx
Xd
EV

xd |dQ|
–Q

(b)
(a)

Fig 7.18(a) Energy-band diagram through a MOS capacitor for the depletion mode (b) Differential charge
distribution at depletion for a differential change in gate voltage

Cox CSD
or C(depl) = (7.45)
Cox CSD
Since Cox = ox/tox and CSD = s/xd, Equatin (7.45) can be written as
Cox ox
C (depl) = (7.46)
Cox
1 tox ox
xd
C SD s

As the space charge width increase, the total capacitance C (depl) decreases.We had defined the threshold
inversion point to be condition when the maximum depletion width is reached but there is essentially zero
inverison charge density. This condition will yield a mininum capacitance C min which is given by

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 260 Electronic Devices And Circuits

ox
C min = (7.47)
ox
t ox x dT
s

Fig 7.19(a) shows the energy-band diagram of this MOS device for the inversion condition. In the ideal
case, a small incremental change in the voltage across the MOS capacitor will cause a differential change in the
inversion layer charge density. The space charge width does not change. If the inversion charge can respond to
the change in capacitor voltage as indicated in Fig 7.19(b), then the capacitance is again just the oxide capacitance,
or

C (inv) = C ox ox
(7.48)
t ox
Fig 7.20 shows the ideal capacitance versus gate voltage, or C-V characteristic of the MOS capacitor
with a p-type substrate. The three dashed segments correspond to the three components Cox, C SD, and C min,
The solid curve is the ideal net capacitance of the MOS capacitor. Moderate inversion, which is indicated in the
figure, is the transition region between the point when only the space charge density changes with gate voltage
and when only the inversion charge density changes with gate voltage.
Metal Oxide p-type semiconductor
|dQ’|
EC
+Q’
E fi
EF
XdT
EF EV

xdT S –Q’
M O
|dQ’|
(b)
(a)

Fig 7.19 (a) Energy-band diagram through an MOS capacitance for the mode (b) Differential charge
distibution at inversion for a low-frequency change in gate voltage

Cox C Cox

Accumulation CFB CSD Strong

inversion
Moderate
inversion
Depletion
C min

VFB 0 VT VG

Fig 7.20 Ideal low-frequency capacitance versus gate voltage of a MOS capacitor with a p-type substrate.
Individual capacitance components are also shown.
The point on the curve that corresonds to the flat-band condtion is of interest. The flat-band condition
occurs between the accumulation and depletion conditions. The capacitance at flat band is given by

ox
C FB
ox kT s (7.40)
tox
s e eN a

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We may note that the flat-band capacitance is a function of oxide thickness as well as semiconductor
doping. The general location of this point on the C-V plot is shown in Fig 7.20.

Example :7.4

To calculate Cox, C min and C FB for an MOS capacitor. Consider a p-type silicon substrate at T = 300 K
doped to Na = 1016cm–3. The oxide is silicon dioxide with a thickness of 550 A and the gate is aluminum.

Solution 7.4:
The oxide capacitance is

3.9 8.85 10 –14

ox
Cox = = 6.28 10–8F/cm2
t ox 550 10 –8

To find the minimum capacitance, we need to calculate

1016
fp = V t In N a = (0.0259) In = 0.347 V
ni 1.5 1010
and
1/ 2
4 s fp
1/ 2
4 11.7 8.85 10 –14 0.347
xdT = = 0.30 10–4 cm
eN a 1.6 10 19 16
10

Then

3.9 8.85 10 –14

ox
C min = = 2.23 10–8F/cm2
–8 3.9 –4
t ox ox
x dT 550 10 0.3 10
s
11.7

We may note that

Cmin .23 10 –8
Cox = 6.28 10 –8 = 0.355

The flat-band capacitance is

ox
C FB =
ox kT s
t ox
s e eN a

14
3.9 8.85 10
=
3.9 11.7 8.85 10 –14
–8
550 10 0.0259
11.7 1.6 10 –9 1016

= 5.03 10–8F/cm2

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 262 Electronic Devices And Circuits

We may also note that

C FB 5.03 10 –8
C ox = = 0.80
6.28 10 –8

The same type of ideal C-V characteristics are obtained for an MOS capacitor with an n-type substrate by
changing the sign of the voltages axis. The accumulation condition is obtained for a positive gate bias and
the inversion condition is obtained for a negative gate bias. The ideal curve is shown in Fig 7.21

C
Strong Accumulation
inversion Depletion
Moderate
inversion

0 VG

Fig 7.21 Ideal low-frequency capacitance versus gate voltage of a MOS capacitor with an n-type substrate

7.4.2 Frequency Effects

Fig 7.19(a) showed the MOS capacitor with a p-type substrate and biased in the inversion condition.
We have argued that a differential change in the capacitor voltage in the ideal case causes a differential change
in the inversion layer charge density. However, we must consider the source of electrons that produces a change
in the inversion charge density.
There are two source of electrons that can change the charge density of the inversion layer. The first
source is by diffusion of minority carrier electrons from the p-type substrate across the space charge region.
This diffusion process is that in a reverse-biased pn junction that generates the ideal reverse saturation current.
The second source of electrons is by thermal generation of electron-hole pairs within the space charge region.
This process is again the same as that is a reverse-biased pn junction generating the reverse-biased generation
current. Both the these processes generate electrons at a particular rate. The electron concentration in the
inversion layer, then, cannot change instantaneously.
If the ac voltage across the MOS capacitor changes Low
frequency
rapidly, the change in the inversion layer charge will
not be able to respond. The C-V characteristics will C

then be a function of the frequency of the ac signal Accumulation

High
used to measure the capacitance. frequency

In the limit of a very high frequency, the

inversion layer charge will not respond to a Inversion
differential change in capacitor voltage. At a high-
0 VG
signal frequency, the differeitial change in charge
Fig 7.22: Low frequency and high frequency capacitance versus
occurs at the metal and in the space charge width in gate voltage of a MOS capacitor with a p type substrate.
the semiconductor. capacitance of the MOS capcitor
is then C min which we discussed earlier.
The high-frequency and low-frequency limits of the C-V characteristic are shown in Fig 7.22. In general,
high frequency corresponds to a value on the order of 1MHz and low frequency corresponds to values in the
range of 5 to 100 Hz. Typically, the high-frequency characteristic of the MOS capacitor are measured.

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7.4.3 Fixed Oxide Charge Effects

In all of the discussion concerning C-V charatieristic so far, we have assumed an ideal oxide in which
there are no fixed charge at oxide or oxide-semiconductor interface. These two types of charges will change the
C-V charateristic.
We previously discussed how the fixed oxide charge affects the threshold voltage. The charge will also
affect the flat-band voltage, the flat-band voltage is given by

Qox
VFB = ms
Cox
where Qox is the equivalent fixed oxide charge and ms is the metal-semiconductor work function
difference. The flat-band voltage shifts to more negative voltages for a positive fixed charge. Since the oxide
charge is not a function of gate voltage, the curves shows a parallel shift with oxide charge, and the shape of the
C-V curves remains the same as the ideal charateristic. Fig 7.23 shows the high frequency characteristics of a
MOS capacitor with a p-type substrate for several values of fixed positive oxide charge.
The C-V characteristic can be used to determine the equivalent fixed charge. For a given MOS structure,
ms and Cox are know, so the ideal flat-band voltage and flat-band capacitance can be calculated. The experimental
value of flat-band voltage can be measured from the C-V curve and the value of fixed oxide charge can then be
determined. The C-V measurements are a valuable diagnostic tool to characterize a MOS device. This
characterization is especially useful in the study of radiation effects on MOS devices.

Qox3 > Qox2 > Qox1 > 0

C
Cox Qss = 0(ideal)

Cmin
VFB3 VFB2 V FB1 VFB0 0 VG

Fig 7.23 High-frequency capacitance versus gate voltage of a MOS capacitor with a p-type substrate for
several value of effective trapped oxide charge

7.5 MOS Structure with n type Substrate

We have analyzed the MOS structure with p-substrate, now if we change the semiconductor to n-type
then the analysis will be exactly similar but apposite as that for MOS with p substrate.
We can see in Fig 7.24(b) the band diagram of MOS with n-type substrate when contact is not made
between metal, oxide and semiconductor. Now when contact is made then electron flow from semiconductor to
metal as m > s. Now the semiconductor close to oxide-semiconductor become less n-type and depletion
region is created in semiconductor and band bending occur as show in Fig :7.24(c). Here point A is at lower
potential than B and C is at lower potential then D. Here we will take Vox0 and s0 as potential difference
between A and B, C and D repectively.
We can see that Vox0 and s0 are due to m s and Vox0 and s0 are negative here, also
Vox0 + s0 = – ms (7.50)
We can see that when external voltage is applied as shown in Fig :7.24(a) then there are various mode
of operation which exist in MOS structure. These mode are

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 264 Electronic Devices And Circuits

1. Accumulation mode
When Va is positive then external applied voltage produce external electric field from metal to
semiconductor, this electric field will pull majority carrier electron from n substrate to oxide-semiconductor
interface. Thus electron will get accumulated at oxide semiconductor interface. Here accumulation region exist
for Va > 0. The band diagram will be as shown in Fig :7.24(d). If we take MOS as a capacitor then positive plate
of capacitor is metal and negative plate is semiconductor. We can see that semiconductor at semiconductor-
oxide interface become more n-type.
Vaccum
exi level
EC
e m
M O S ex e s
n type 9 eV
semiconductor
E Fm EC
Metal E FS
Va
EV
oxide
EV
semiconductor
(a) (b)

Accumulation of electron
eVox0
B EC
--- -- -
e s0 D EF
EC
EF Gate M O
positive
gate voltage EV

EV
Metal Oxide Semiconductor
(C) (d)

EC
EC
EF EF
Gate M O Gate M O s Fn
negative s
Efi negative E fi
gate voltage gate voltage
EV
EV

(e) (f)

Fig 7.24 (a) MOS sturcture with external applied voltage (b) band diagram of MOS before forming contact
(c) band diagram after making contact (d) band diagram in accumulation mode (e) (f) band diagram in weak
inversion mode

2. Depletion mode of operation

When negative gate voltage is applied in Fig 7.24(a) then external electric field is such that it pushes
electron away from oxide-semiconductor interface and depletion region with negative ions of donor is present.
This depletion region now act as positive plate of capacitor and metal act as negative plate of capacitor. As the
applied voltage Va become more negative then s the semiconductor potential increase and depletion width

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 Metal Oxide Semiconductor (MOS) Capacitor 265

increase. The band diagram will be as shown in Fig 7.24(e). The depletion mode of operation exist when
0 < | s|< Fn as when | s| = Fn then semiconductor at oxide-semiconductor interface become intrinsic. as
shown in band diagram Fig 7.24(f).

3. Weak inversion
When external applied voltage Va is increased further then band bending will increase and EFi will go
above EF in band diagram for the semiconductor close to oxide-semiconductor interface. Thus semiconductor
become p-type near the oxide-semiconductor interface. Thus inversion take place when | s|> Fn. The complete
inversion is assumed when | s|= 2 Fn that is p-type inverted region near oxide semiconductor interface has
same conductivity as that of n-type bulk region. The band diagram of MOS structure when s = 2 Fn is shown
in Fig 7.25(a). In Figure 4.25(a) we can see that depletion region width is xdT

2 s s 2 s 2 Fn
xdT = . (7.51)
e Nd e Nd

EC
EF
Gate M O Fn Fn
negative E fi
voltage
applied EV
xdT

(a)

M O S M O S
eNd

xdT

eNd xdT
–
eNd xdT si
Qm –
ox

(b) (c)

Fig 7.25 (a) The band diagram (b) charge density (c) electric field in MOS structure at threshold.
Here Nd is doping is substrate. The charge density will be as shown in Fig 7.25(b). The delta charge
density will be of area – eNdxdT. The electric field plot will be found by applying poission equation. The electric
field will be as shown in Fig 7.25(c). The electric field in oxide will be
– eN d xdT
Eox = dx (7.52)
ox ox

and electric field at oxide-semiconductor interface toward semiconductor will be calculated using
boundary condition
E ox ox – eN d x dT
Esi = (7.53)
si si

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 266 Electronic Devices And Circuits

Then in semiconductor electric field reduce as constant space chare density exist in semiconductor
thus
– eN d
E = xd T x ,0<x<x .
dT
si

Thus the applied voltage to get inversion, s = –2 Fn, is

VTH = (Vox – Vox0) + ( s – s0) (7.54)
= Vox + s – Vox0 – s0
We can calculate Vox from Fig 7.25(b)
eN d xdT
Vox = tox (7.55)
ox

Q ss
Vox = (7.56)
C ox
Here |Qss| is magnitude of charge density in depletion regin of semiconductor it is equal to eNdxdT

Fig 4.25 and Cox = ox

that is oxide capacitance per unit area.
t ox
and s = –2 Fn

Q ss
VTH = 2 Fn ms (7.57)
C ox
Thus the threshold voltage will be negative for MOS structure with n substrate. Also we can see that the
Flat band voltage can be easily calculated using equation (7.54) by keeping s = 0 and Vox = 0 as at Flat band
no depletion region or electric field exist in MOS structure. Thus
VFB = – Vox0 – s0 (7.58)
VFB = ms (7.59)
Here we can also include effect of oxide charges in MOS sturcture. We know that MOS structure
function on concept of charge neutrality it means that at threshold when charge density in semiconductor is
eNdxdT and xdT is depletion width due to s = 2 Fn then metal must get – eNdxdT charge density and then we get
electric field as shown in Fig 7.25(c). Now let us say that oxide has charge density Qox then to maintain charge
neutrality metal need only
Qm Qox eN d xdT
Charge Charge density Charge density
= 0
density on in oxide in semiconductor
metal

Qm = – eNdxdT – Qox
Thus if Qox is negative then we need less Qm than what we need in ideal case when oxide no charges, and
if oxide has positive charge density then more Qm is needed. Thus |VTH|will increase when Qox is positive and
|VTH|will decrease if Qox is negative. Thus we modify equation (7.57)

Q ss Q ox
VTH = 2 Fn ms (7.60)
C ox C ox

Q ss
VTH = 2 Fn V FB (7.61)
C ox

Qox
and VFB = ms (7.62)
C ox

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 Metal Oxide Semiconductor (MOS) Capacitor 267

4. Strong Inversion
When Va is increased further then the depletion layer width do not increase inside semiconductor
because now the positive charges coming to semiconductor oxide interface will be not due to ions but due to
holes. Thus maximum depletion region width is xdT and after this holes get accumulated at oxide-semiconductor
interface.

Study Note
The explaination is similar to that of MOS with p substrate

7.6 Depletion Mode MOS Sturcture

The MOS structure we studied till now were those where we need to make a inverted layer in p or n
semiconductor by application of external voltage. The MOS structure are used in design of enhancement mode
MOSFET, but there may be other structure where the oxide-semiconductor interface already has inverted
semconductor layer as shown in Fig 7.26(a) and 7.26(b)

– +
– +
– +
– +
Gate p-type Body Gate n-type Body
M O – M O +
semiconductor semiconductor
– +
– +
– +
– +
p-type layer
n-type layer
(a) (b)

Fig 7.26 Depletion mode MOS structure (a) p-type substrate (b) n-type substrate.
In these structure already inverted layer is present. When the gate voltage in Fig 7.26(a) is positive
then obviously the electric field will push back holes and will increase negative charge density in oxide-
semiconductor interface but when gate voltge is negative then the negaitve charge density in oxide semiconductor
interface will reduce and the value of VTH for this structure is that voltage where the inverted region is removed.
Thus VTH for MOS structure of Fig 7.26(a) is negative. Similarly in MOS structure of Fig 7.26(b) the inverted
region will be removed when gate voltage is positive thus VTH will be positive for this MOS structure.

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 268 Electronic Devices And Circuits

metal-semiconductor work function difference of

ms = –0.35 V is required. Determine the silicon
doping required to meet this specification when
the gate is (a) n+ polysilicon, (b) p+ polysilicon.

1 Subjective Practice Problems

1 . The dc charge distribution of four ideal MOS

6 . Consider an n+ polysilicon-silicon dioxide-n-type
silicon MOS capacitor. Let N d = 1015 cm –3 .
capacitors are shown in Figure. For each case: Calculate the flat-band voltage for (a) tox = 500 A
(a) Is the semiconductor n-or p-type ? when Qox is (i) 1010cm–2, (ii) 1011cm–2, and (iii)
(b) Is the device biased in the accmulation, 5 1011cm –2. (b) Repeat part (a) when tox =
depletion, or inversion mode? 250 A.
(c) Draw the energy-band diagram in the
semiconductor region. 7 . An Al-silicon dioxide-silicon MOS capacitor has
an oxide thickness of 450 A and a doping of Na =
1015cm–3. The oxide charge density is Qox =
3 1011cm–2. Calculate (a) the flat-band voltage
and (b) the threshold voltage.
M O S M O S

(a) (b) 8 . Consider an MOS capacitor with an n+ polysilicon

gate and n-type silicon substrate. Assume Na =
10 16 cm –3 and let E F – E C = 0.2 eV in the
n+polysilicon. Assume the oxide has a thickness
of tox = 300 A. Also assume that (polysilicon) =
S S
(signal-crystal silicon). (a) Sketch the energy-
M O M O
band diagrams (i) for VG = 0, and (ii) at flat band.
(c) (d)
(b) Calculate the metal-semiconductor work
2 . Calculate the maximum space charge width xdT
function difference. (c) Calculate the treshold
and the maximum space charge density
voltage for the ideal case of zero fixied oxide
|QSS(max)|in p-type silicon, galium arsenide,
charge and zero interface states.
and germanium semiconductors of an MOS
structure. Let T = 300 K and assume Na =
9 . An ideal MOS capacitor with an aluminum gate
1016cm–3 Repeat part if T = 200 K.
has a silicon dioxide thickness of tox = 400 A on
a p-type silicon substrate doped with an acceptor
3 . Consider n-type silicon in an MOS structure. Let
concentration of Na = 1016cm–3. Determine the
T = 300 K. Determine the semiconductor doping
capacitances Cox, C FB, C min, and C (inv) at (a)
so that | Q SS (max)|= 7.5 10 –9 C/cm 2 .
f = 1 Hz and (b) f = 1 MHz. (c) Determine VFB
Determine the surface potential that results in
and VT.
the maximum space charge width.

1 0 .Consider an SOS capacitor shown in Figure.

4 . Determine the metal-semiconductor work
Assume the SiO2 is ideal (no trapped charge)
function difference ms in an MOS structure with
and has a thickness of tox = 500 A. The doping
p-type silicon for the case when the gate is (a)
concentration are Nd = 1016cm–3 and Na =
n+ polysilicon, and (b) p+ polysilicon. let Na =
1016cm–3, (a) Sketch the energy band diagram
6 1015cm –3.
through the device for (i) flat-band, (ii) VG =
+3V, and (iii) VG = –3 V. (b) Calculate the flat-
5 . Consider a MOS structure with n-type silicon. a

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 Metal Oxide Semiconductor (MOS) Capacitor 269
band voltage. (c) Estimate the voltage across the
oxide for (i) VG = +3 V and (ii) VG = –3 V. (d)
tox

VG n type SiO2 p type

1 Objective Practice Problems

1 . Consider the dc charge distribution of an ideal

MOS capacitor shown in figure below.

1 1 .The high-frequency C-V characteristic curve of +Q’

an MOS capacitor is shown in Figure. The area

of the device is 2 10 –3 cm 2 . The metal-
semiconductor work function difference is ms =
–0.50 V, the oxide is SiO2, the semiconductor is
Ionized acceptor
silicon, and the semiconductor doping
concentration is 2 10 16 cm –3 . (a) Is the – Q’

semiconductor n or p type? (b) What is the oxide electrons

thickness? (c) What is the equivalent trapped
oxide density? (d) Determine the flat-band
What is the type of semiconductor and mode of
capacitance. of biasing ?
C( F)
(a)n-type, depletion (b) n-type, inversion
200 (c)p-type, depletion (d) p-type, inversion

CFB

2 . Consider the dc charge distribution of an ideal

MOS capacitor shown in figure below.

20
+Q’
VFB 0 VG
= –0.8 V

1 2 .Consider the high-frequency C-V plot shown in

Figure. (a) Indicate which points correspond to Ionized acceptor
flat-band, inversion, accumulation, threshold, and – Q’

depletion mode.
M O S
C

5 What is the type of of semiconductor and mode

4
of biasing ?

(a) n-type, depletion (b)n-type, inversion

3
(c) p-type, depletion (d)p-type, inversion
1 2 3 . Consider the dc charge distribution of an ideal
MOS capacitor shown in figure below.
0 VG

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 270 Electronic Devices And Circuits

(c) 1.6 10–7C/cm2 (d) 4.8 10–8C/cm2

’
+Q
Common Data For Q. 7 and 8 :

Holes Consider n-type silicon in an MOS structure at

T = 300 K.
7 . What will be the semiconductor doping so that
maximum space charge density, |QSS(max)|=
– Q’ 7.5 10–9C/cm2.
M O S
(a) 6.54 1016cm–3 (b) 6.54 1014cm–3
What is the type of semiconductor and mode of
(c) 3.27 1014cm–3 (d) 6.64 1014cm–3
biasing ?
8 . The surface potential that results in the
(a) n-type, depletion (b) n-type, accumulation
maximum space charge width is
(c) p-type, depletion (d)p-type, accumulation
(a) 0.518 V (b) – 0.518 V
4 . Consider the dc charge distribution of an ideal
(c) 0.259 V (d) – 0.259 V
MOS capacitor shown in figure below.
9 . Consider an MOS structure with n-type silicon.
Holes
A metal-semiconductor work function difference
+Q
’
of ms = – 0.35 V is required. For an aluminium-
Ionized donor silicon dioxide junction, m = 3.20 V and for a
silicon-silicon dioxide junction = 3.25 V and
Eg = 1.11 eV. If the gate is aluminium, then the
silicon doping required to meet the specification
is
– Q’
(a) 3.42 1014cm–3 (b) 2.28 1014cm–3
M O S
(c) 2.28 104cm–3 (d) 3.43 104cm–3
What is the type of semiconductor and mode of
biasing ? Common Data For Q. 10 and 11 :

(a) n-type, depletion (b) n-type, inversion An ideal MOS capacitor with an aluminium
gate has a silicon dioxide thickness of tox =
(c) p-type, depletion (d) p-type, inversion 400 A on a p-type silicon substrate doped with
Common Data for Q. 5 and 6 : an acceptor concentration of Na = 1016cm–3.

Consider a p-type silicon semiconductor of an 1 0 . The oxide capacitance, Cox will be

MOS structure. Let T = 300 K and assume Na (a) 8.63 10–8F/cm2 (b) 5.57 10–9F/cm2
= 1016cm–3.
(c) 3.45 10–5F/cm2 (d) 2.21 10–8F/cm2
5 . The maximm space charge width, xdT is
1 1 .The flat-band capacitance, C FB will be
(a) 0.30 m (b) 3 10–12 cm
(a) 2.52 10–7F/cm2 (b) 6.43 10–8F/cm2
(c) 0.18 m (d) 1.88 10–12 cm
(c) 1.65 10–8F/cm2 (d) 4.23 10–9F/cm2
6 . The maximum space charge density
|QSS(max)|is Common Data For Q. 12 and 13 :

(a) 2.19 10–4C/cm2 (b) 4 10–3C/cm2 A MOSFET has the following parameters :
n+poly gate, tox = 80 A, Nd = 1017cm–3, Qss =

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 Metal Oxide Semiconductor (MOS) Capacitor 271
5 1010cm–2 and ms = –20.32 V 1 6 .What is the value of ND ?

1 2 .What is the threshold voltage of this MOSFET (a) 2.45 1019/cm3 (b) 2.45 109/cm3

(a) –1.53 V (b)–0.32 V (c) 7.29 1014/cm3 (d)7.29 104/cm3

(c) –1.21 V (d)–0.814 V 1 7 .Complete the following table making use of the
ideal sturcture C-V characteristic in figure
1 3 .The device is

(a) enhancement PMOS (b) depletion PMOS C

(c) enhancement NMOS (d)depletion NMOS

a b
1 4 .Which of the following plot identify the voltage
corresponding to accumulaton (ACC), c
depletion (Depl), and inversion (INV) in ideal
n-type devices ? d e

VG
ACC Depl INV
INV Depl ACC
(a) VS (b) VS

0 VT For each of the biasing conditions named in the

VT 0
table employ letters ( a – e ) to identify the
corresponding bias point on the ideal MOS-C C-V
Depl Depl INV
(c) INV ACC
VS (d)
ACC
VS characteristic.

VT 0 0 VT
Bias Condition Capacitance (a–e)
Inversion
Common Dta For Q. 15 to 16 : Depletoin
Flat band
The energy band diagram for an ideal MOS-C
VG = VT
operated at T = 300 K is sketched in figure below.
Accumulation
Note that the applied gate voltage causes band
bending in the semiconductor such that EF = Ei
(a) a,c,b,d,e (b) a,c,e,d,b
at the Si – SiO2 interface and ni = 1010/cm3.
(c) e,c,b,d,a (d) a,b,c,d,e
Common Data For Q. 18 to 21 :

Figure shows the dimensional energy band

Ec
diagram for an ideal MOS-C operated at T =
E FM
300 K with VG 0. Note that EF = Ei at the
E FS Si-SiO2 interface.
Ei 0.29 eV
0.56 eV
Ei
Ec
0.29 eV
+ + x Ei 0.56 eV
0 W
EF
1 5 .What is the value of s (surface potential) ?
0.6eV
E FM E
(a) 0.29 V (b)–0.29 V
(c) 0.59 V (d)–0.59 V

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 272 Electronic Devices And Circuits

1 8 .What is the vlaue of surface potential ( s) ? Common Data For Q. 25 and 26 :

(a) 0.3 V (b)–0.3 V An Al-silicon dioxide-silicon MOS capacitor

has an oxide thickness of 450 A and a doping of
(c) 0.56 V (d)–0.56 V
Na = 1015cm–3. For Al-silicon dioxide junction,
1 9 .For the value of ni = 1010, the of NA is m = 3.20 V and = 3.25 V, Eg = 1.11 eV. the
oxide charge density is Qox = 3 1011cm–2.
(a) 9.7 1014/cm3 (b) 1.073 1015/cm3
2 5 .The flat-band voltage will _____ volt.
(c) 1.073 1019/cm3 (d)9.7 1021/cm3
2 6 .What will be the threshold voltage (in volt) ?
2 0 .For the value of VG = 0.6, the value of x0 is

(a) 0.10 m (b) 0.10 10–4m

Common Data For Q. 27. and 28 :
(c) 0.70 m (d)0.7 10–4m
An NMOS device has the following parameter
2 1 .For the value of VG = 0.6 V, what is the voltage
n+ poly gate, tox = 400 A, Na = 1015cm–3, Qox
drop ( ox) across the oxide?
= 5 1010cm–2 and ms = 1.0 V
(a) 0.3 V (b) 0.56 V
2 7 .What is the threshold voltage, Vsss (in volt) ?
(c) 0.6 V (d)0.9 V
2 8 .What is the value of source to body voltage, VSB
2 2 .In the MOS process, structure like the gate of a (in volt) such that the threshold voltage, VT =
transistor are used to make capacitors as well. If 0?
the oxide thickness is 4 nm, what area is needed
Common Data For Q. 29 to 31 :
to achieve a capacitance of 1 pF? (the
permittivity of silicon dioxde is 3.9 o) An NMOS-C is maintained at T = 300 k, x0 =
0.1 m and the silicon doping is NA = 1015/cm3
(a) 1.16 10–6cm2 (b) 3.82 10–5cm2
and ni = 1010/cm3
(c) 4.51 10–6cm2 (d) None of the above
2 9 .If s = F, then the depletion width (w) will be
Common Data For Q. 23 and 24 : ________ m .

A 400 A oxide is grown on p-type silicon with 3 0 .What is the value of Es (in kV/cm) when s =
Na = 5 1015cm–3. The flat band voltage is F ?
–0.9 V. (assume negligible oxide charge)
3 1 .If the area of the MOS-C is 3 10–2cm2, what
2 3 .At the threshold inversion point, the surface is the oxide thickness (x0) in m ?
potential will be ____volt.

2 4 .What will be the threshold voltage (in volt) ?

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