TABLE OF CONTENTS:

SL No: Experiment Name

1. Study of timer circuit using NE555 & Configuration for monostable & astable multivibrator.

2. Study of characteristics curves of F.E.T & B.J.T

3. study the class A,C & push-pull Power amplifier

4. Realization of PLL using VCO

Construction of a simple Function Generator using IC

5.

6. Study of DAC

7. Study of zener diode as voltage regulator

EXPERIMENT NAME :- Study of timer circuit using NE555 & Configuration for
monostable & astable multivibrator.

OBJECTIVE :Study of characteristics of IC 555 timer connected as Astable Multi

vibrator.

Multivibrators and CMOS Oscillators can be easily constructed from discrete

components to produce relaxation oscillators for generating basic square wave output
waveforms. But there are also dedicated IC’s especially designed to accurately produce the
required output waveform with the addition of just a few extra timing components. One such
device that has been around since the early days of IC’s and has itself become something of
an industry “standard” is the 555 Timer Oscillator which is more commonly called the “555
Timer”.The 555 timer which gets its name from the three 5kΩ resistors it uses to generate the
two comparators reference voltage, is a very cheap, popular and useful precision timing
device that can act as either a simple timer to generate single pulses or long time delays, or as
a relaxation oscillator producing stabilized waveforms of varying duty cycles from 50 to
100%.The 555 timer chip is extremely robust and stable 8-pin device that can be operated
either as a very accurate Monostable, Bistable or Astable Multivibrator to produce a variety
of applications such as one-shot or delay timers, pulse generation, LED and lamp flashers,
alarms and tone generation, logic clocks, frequency division, power supplies and converters
etc, in fact any circuit that requires some form of time control as the list is endless.The single
555 Timerchip in its basic form is a Bipolar 8-pin mini Dual-in-line Package (DIP) device
consisting of some 25 transistors, 2 diodes and about 16 resistors arranged to form two
comparators, a flip-flop and a high current output stage as shown below. As well as the 555
Timer there is also available the NE556 Timer Oscillator which combines TWO individual
555’s within a single 14-pin DIP package and low power CMOS versions of the single 555
timer such as the 7555 and LMC555 which use MOSFET transistors instead. A simplified
“block diagram” representing the internal circuitry of the 555 timer is given below with a
brief explanation of each of its connecting pins to help provide a clearer understanding of
how it works.

555 Timer Block Diagram

• Pin
1. – Ground, The ground pin connects the 555 timer to the negative (0v) supply rail.
• Pin
2. – Trigger, The negative input to comparator No 1. A negative pulse on this pin “sets” the
internal Flip-flop when the voltage drops below 1/3Vcc causing the output to switch
from a “LOW” to a “HIGH” state.
• Pin
3. – Output, The output pin can drive any TTL circuit and is capable of sourcing or sinking
up to 200mA of current at an output voltage equal to approximately Vcc – 1.5V so
small speakers, LEDs or motors can be connected directly to the output.
• Pin
4. – Reset, This pin is used to “reset” the internal Flip-flop controlling the state of the
output, pin 3. This is an active-low input and is generally connected to a logic “1” level
when not used to prevent any unwanted resetting of the output.
• Pin
5. – Control Voltage, This pin controls the timing of the 555 by overriding the 2/3Vcc level
of the voltage divider network. By applying a voltage to this pin the width of the output
signal can be varied independently of the RC timing network. When not used it is
connected to ground via a 10nF capacitor to eliminate any noise.
• Pin
6. – Threshold, The positive input to comparator No 2. This pin is used to reset the Flip-
flop when the voltage applied to it exceeds 2/3Vcc causing the output to switch from
“HIGH” to “LOW” state. This pin connects directly to the RC timing circuit.
• Pin
7. – Discharge, The discharge pin is connected directly to the Collector of an internal NPN
transistor which is used to “discharge” the timing capacitor to ground when the output
at pin 3 switches “LOW”.
• Pin
8. – Supply +Vcc, This is the power supply pin and for general purpose TTL 555 timers is
between 4.5V and 15V.
The 555 Timers name comes from the fact that there are three 5kΩ resistors connected
together internally producing a voltage divider network between the supply voltage at pin 8
and ground at pin 1. The voltage across this series resistive network holds the negative
inverting input of comparator two at 2/3Vcc and the positive non-inverting input to
comparator one at 1/3Vcc.

The two comparators produce an output voltage dependant upon the voltage difference at
their inputs which is determined by the charging and discharging action of the externally
connected RC network. The outputs from both comparators are connected to the two inputs
of the flip-flop which in turn produces either a “HIGH” or “LOW” level output at Q based on
the states of its inputs. The output from the flip-flop is used to control a high current output
switching stage to drive the connected load producing either a “HIGH” or “LOW” voltage
level at the output pin.The most common use of the 555 timer oscillator is as a simple astable
oscillator by connecting two resistors and a capacitor across its terminals to generate a fixed
pulse train with a time period determined by the time constant of the RC network. But the
555 timer oscillator chip can also be connected in a variety of different ways to produce
Monostable or Bistable multivibrators as well as the more common Astable Multivibrator.

555 Timer and Its Applications

This 555 timer circuit will remain in either state indefinitely and is therefore bistable. Then
the Bistable 555 timer is stable in both states, “HIGH” and “LOW”. The threshold input (pin
6) is connected to ground to ensure that it cannot reset the bistable circuit as it would in a
normal timing application.

555 Timer Output

The output (pin 3) of the standard 555 timer or the 556 timer, has the ability to either “Sink”
or “Source” a load current of up to a maximum of 200mA, which is sufficient to directly
drive output transducers such as relays, filament lamps, LED’s motors, or speakers etc, with
the aid of series resistors or diode protection.This ability of the 555 timer to both “Sink”
(absorb) and “Source” (supply) current means that the output device can be connected
between the output terminal of the 555 timer and the supply to sink the load current or
between the output terminal and ground to source the load current. For example.

Sinking and Sourcing the 555 Timer Output

In the first circuit above, the LED is connected between the positive supply rail ( +Vcc ) and
the output pin 3. This means that the current will “Sink” (absorb) or flow into the 555 timer
output terminal and the LED will be “ON” when the output is “LOW”.The second circuit
above shows that the LED is connected between the output pin 3 and ground ( 0v ). This
means that the current will “Source” (supply) or flow out of the 555 timers output terminal
and the LED will be “ON” when the output is “HIGH”.The ability of the 555 timer to both
sink and source its output load current means that both LED’s can be connected to the output
terminal at the same time but only one will be switched “ON” depending whether the output
state is “HIGH” or “LOW”. The circuit to the left shows an example of this. the two LED’s
will be alternatively switched “ON” and “OFF” depending upon the output. Resistor, R is
used to limit the LED current to below 20mA.It was said earlier that the maximum output
current to either sink or source the load current via pin 3 is about 200mA and this value is
more than enough to drive or switch other logic IC’s, LED’s or small lamps etc. But what if
we wanted to switch or control higher power devices such as motors, electromagnets, relays
or loudspeakers. Then we would need to use a Transistor to amplify the 555 timers output in
order to provide a sufficiently high enough current to drive the load.

555 Timer Transistor Driver

The transistor in the two examples above, can be replaced with a Power MOSFET device or
Darlington transistor if the load current is high. When using an inductive load such as a
motor, relay or electromagnet, it is advisable to connect a freewheel (or flywheel) diode
directly across the load terminals to absorb any back emf voltages generated by the inductive
device when it changes state.Thus far we have look at using the 555 Timer to generate
monostable and bistable output pulses. In the next tutorial about Waveform Generation we
will look at connecting the 555 in an astable multivibrator configuration. When used in the
astable mode both the frequency and duty cycle of the output waveform can be accurately
controlled to produce a very versatile waveform generator.

An astable multivibrator consists of two amplifying stages connected in a positive feedback

loop by two capacitive-resistive coupling networks. The amplifying elements may be junction
or field-effect transistors, vacuum tubes, operational amplifiers, or other types of amplifier.
The example diagram shows bipolar junction transistors.The circuit is usually drawn in a
symmetric form as a cross-coupled pair. Two output terminals can be defined at the active
devices, which will have complementary states; one will have high voltage while the other
has low voltage, (except during the brief transitions from one state to the other).

Operation

Figure 1: Basic BJT astable multivibrator

The circuit has two astable (unstable) states that change alternatively with maximum
transition rate because of the "accelerating" positive feedback. It is implemented by the
coupling capacitors that instantly transfer voltage changes because the voltage across a
capacitor cannot suddenly change. In each state, one transistor is switched on and the other is
switched off. Accordingly, one fully charged capacitor discharges (reverse charges) slowly
thus converting the time into an exponentially changing voltage. At the same time, the other
empty capacitor quickly charges thus restoring its charge (the first capacitor acts as a time-
setting capacitor and the second prepares to play this role in the next state). The circuit
operation is based on the fact that the forward-biased base-emitter junction of the switched-
on bipolar transistor can provide a path for the capacitor restoration.

State 1 (Q1 is switched on, Q2 is switched off):

In the beginning, the capacitor C1 is fully charged (in the previous State 2) to the power
supply voltage V with the polarity shown in Figure 1. Q1 is on and connects the left-hand
positive plate of C1 to ground. As its right-hand negative plate is connected to Q2 base, a
maximum negative voltage (-V) is applied to Q2 base that keeps Q2 firmly off. C1 begins
discharging (reverse charging) via the high-value base resistor R2, so that the voltage of its
right-hand plate (and at the base of Q2) is rising from below ground (-V) toward +V. As Q2
base-emitter junction is reverse-biased, it does not conduct, so all the current from R2 goes
into C1. Simultaneously, C2 that is fully discharged and even slightly charged to 0.6 V (in the
previous State 2) quickly charges via the low-value collector resistor R4 and Q1 forward-
biased base-emitter junction (because R4 is less than R2, C2 charges faster than C1). Thus C2
restores its charge and prepares for the next State C2 when it will act as a time-setting
capacitor. Q1 is firmly saturated in the beginning by the "forcing" C2 charging current added
to R3 current; in the end, only R3 provides the needed input base current. The resistance R3
is chosen small enough to keep Q1 (not deeply) saturated after C2 is fully charged.When the
voltage of C1 right-hand plate (Q2 base voltage) becomes positive and reaches 0.6 V, Q2
base-emitter junction begins diverting a part of R2 charging current. Q2 begins conducting
and this starts the avalanche-like positive feedback process as follows. Q2 collector voltage
begins falling; this change transfers through the fully charged C2 to Q1 base and Q1 begins
cutting off. Its collector voltage begins rising; this change transfers back through the almost
empty C1 to Q2 base and makes Q2 conduct more thus sustaining the initial input impact on
Q2 base. Thus the initial input change circulates along the feedback loop and grows in an
avalanche-like manner until finally Q1 switches off and Q2 switches on. The forward-biased
Q2 base-emitter junction fixes the voltage of C1 right-hand plate at 0.6 V and does not allow
it to continue rising toward +V.

State 2 (Q1 is switched off, Q2 is switched on):

Now, the capacitor C2 is fully charged (in the previous State 1) to the power supply voltage V
with the polarity shown in Figure 1. Q2 is on and connects the right-hand positive plate of C2
to ground. As its left-hand negative plate is connected to Q1 base, a maximum negative
voltage (-V) is applied to Q1 base that keeps Q1 firmly off. C2 begins discharging (reverse
charging) via the high-value base resistor R3, so that the voltage of its left-hand plate (and at
the base of Q1) is rising from below ground (-V) toward +V. Simultaneously, C1 that is fully
discharged and even slightly charged to 0.6 V (in the previous State 1) quickly charges via
the low-value collector resistor R1 and Q2 forward-biased base-emitter junction (because R1
is less than R3, C1 charges faster than C2). Thus C1 restores its charge and prepares for the
next State 1 when it will act again as a time-setting capacitor...and so on... (the next
explanations are a mirror copy of the second part of Step 1.

Frequency divider

An astable multivibrator can be synchronized to an external chain of pulses. A single pair of

active devices can be used to divide a reference by a large ratio, however, the stability of the
technique is poor owing to the variability of the power supply and the circuit elements; a
division ratio of 10, for example, is easy to obtain but not dependable. Chains of bistable flip-
flops provide more predictable division, at the cost of more active elements.

Protective components

While not fundamental to circuit operation, diodes connected in series with the base or
emitter of the transistors are required to prevent the base-emitter junction being driven into
reverse breakdown when the supply voltage is in excess of the Veb breakdown voltage,
typically around 5-10 volts for general purpose silicon transistors. In the monostable
configuration, only one of the transistors requires protection.

An Astable Multivibrator is an oscillator circuit that continuously produces rectangular wave

without the aid of external triggering. So Astable Multivibrator is also known as Free
Running Multivibrator. I have already posted about Astable Multivibrator using Transistors.
Astable Multivibrator using 555 Timer is very simple, easy to design, very stable and low
cost. It can be used for timing from microseconds to hours. Due to these reasons 555 has a
large number of applications and it is a popular IC among electronics hobbyists.
OBSERVE DATA :
1. tON = 0.69 (R1 + R2) C
=0.69(1.2k+1.7k)0.01μf
tON =0.2ms
2.tOFF = 0.69 R2C
=0.69x1.7k0.01μf
tOFF =0.17ms
T= tON+ tOFF
=0.37ms
% Dutycycle = ton/ ton+toff x100
=37%
Design of astable multivibrator to produce 1 KHz output waveform with adjustable
duty cycle of 10% to 90%
The circuit is as shown in Fig. 2
During the charging period, the diode ‘D’ is forward biased, RB is bypassed
Hence ton = 0.69 R1C.
During the discharge period, the discharging transistor is shorted (ON) and the diode
‘D’ is reverse biased.
Hence tOFF = 0.69R2 C
Output frequency f= 1 KHz is assumed.

REMARKS :- characteristics of IC 555 timer connected as Astable Multi vibrator have

successfully studied.


Study of characteristics of IC 555 timer connected as Monostable Multi
vibrator.

OBJECTIVE : Study of characteristics of IC 555 timer connected as Monostable Multi

vibrator.

THEORY:
Multivibrators and CMOS Oscillators can be easily constructed from discrete
components to produce relaxation oscillators for generating basic square wave output
waveforms. But there are also dedicated IC’s especially designed to accurately produce the
required output waveform with the addition of just a few extra timing components. One such
device that has been around since the early days of IC’s and has itself become something of
an industry “standard” is the 555 Timer Oscillator which is more commonly called the “555
Timer”.The 555 timer which gets its name from the three 5kΩ resistors it uses to generate the
two comparators reference voltage, is a very cheap, popular and useful precision timing
device that can act as either a simple timer to generate single pulses or long time delays, or as
a relaxation oscillator producing stabilized waveforms of varying duty cycles from 50 to
100%.The 555 timer chip is extremely robust and stable 8-pin device that can be operated
either as a very accurate Monostable, Bistable or Astable Multivibrator to produce a variety
of applications such as one-shot or delay timers, pulse generation, LED and lamp flashers,
alarms and tone generation, logic clocks, frequency division, power supplies and converters
etc, in fact any circuit that requires some form of time control as the list is endless.The single
555 Timerchip in its basic form is a Bipolar 8-pin mini Dual-in-line Package (DIP) device
consisting of some 25 transistors, 2 diodes and about 16 resistors arranged to form two
comparators, a flip-flop and a high current output stage as shown below. As well as the 555
Timer there is also available the NE556 Timer Oscillator which combines TWO individual
555’s within a single 14-pin DIP package and low power CMOS versions of the single 555
timer such as the 7555 and LMC555 which use MOSFET transistors instead. A simplified
“block diagram” representing the internal circuitry of the 555 timer is given below with a
brief explanation of each of its connecting pins to help provide a clearer understanding of
how it works.

555 Timer Block Diagram

• Pin
1. – Ground, The ground pin connects the 555 timer to the negative (0v) supply rail.
• Pin
2. – Trigger, The negative input to comparator No 1. A negative pulse on this pin “sets” the
internal Flip-flop when the voltage drops below 1/3Vcc causing the output to switch
from a “LOW” to a “HIGH” state.
• Pin
3. – Output, The output pin can drive any TTL circuit and is capable of sourcing or sinking
up to 200mA of current at an output voltage equal to approximately Vcc – 1.5V so
small speakers, LEDs or motors can be connected directly to the output.
• Pin
4. – Reset, This pin is used to “reset” the internal Flip-flop controlling the state of the
output, pin 3. This is an active-low input and is generally connected to a logic “1” level
when not used to prevent any unwanted resetting of the output.
• Pin
5. – Control Voltage, This pin controls the timing of the 555 by overriding the 2/3Vcc level
of the voltage divider network. By applying a voltage to this pin the width of the output
signal can be varied independently of the RC timing network. When not used it is
connected to ground via a 10nF capacitor to eliminate any noise.
• Pin
6. – Threshold, The positive input to comparator No 2. This pin is used to reset the Flip-
flop when the voltage applied to it exceeds 2/3Vcc causing the output to switch from
“HIGH” to “LOW” state. This pin connects directly to the RC timing circuit.
• Pin
7. – Discharge, The discharge pin is connected directly to the Collector of an internal NPN
transistor which is used to “discharge” the timing capacitor to ground when the output
at pin 3 switches “LOW”.
• Pin
8. – Supply +Vcc, This is the power supply pin and for general purpose TTL 555 timers is
between 4.5V and 15V.

The 555 Timers name comes from the fact that there are three 5kΩ resistors connected
together internally producing a voltage divider network between the supply voltage at pin 8
and ground at pin 1. The voltage across this series resistive network holds the negative
inverting input of comparator two at 2/3Vcc and the positive non-inverting input to
comparator one at 1/3Vcc.The two comparators produce an output voltage dependant upon
the voltage difference at their inputs which is determined by the charging and discharging
action of the externally connected RC network. The outputs from both comparators are
connected to the two inputs of the flip-flop which in turn produces either a “HIGH” or
“LOW” level output at Q based on the states of its inputs. The output from the flip-flop is
used to control a high current output switching stage to drive the connected load producing
either a “HIGH” or “LOW” voltage level at the output pin.The most common use of the 555
timer oscillator is as a simple astable oscillator by connecting two resistors and a capacitor
across its terminals to generate a fixed pulse train with a time period determined by the time
constant of the RC network. But the 555 timer oscillator chip can also be connected in a
variety of different ways to produce Monostable or Bistable multivibrators as well as the
more common Astable Multivibrator.
555 Timer and Its Applications

This 555 timer circuit will remain in either state indefinitely and is therefore bistable. Then
the Bistable 555 timer is stable in both states, “HIGH” and “LOW”. The threshold input (pin
6) is connected to ground to ensure that it cannot reset the bistable circuit as it would in a
normal timing application.

555 Timer Output

The output (pin 3) of the standard 555 timer or the 556 timer, has the ability to either “Sink”
or “Source” a load current of up to a maximum of 200mA, which is sufficient to directly
drive output transducers such as relays, filament lamps, LED’s motors, or speakers etc, with
the aid of series resistors or diode protection.This ability of the 555 timer to both “Sink”
(absorb) and “Source” (supply) current means that the output device can be connected
between the output terminal of the 555 timer and the supply to sink the load current or
between the output terminal and ground to source the load current. For example.

Sinking and Sourcing the 555 Timer Output

In the first circuit above, the LED is connected between the positive supply rail ( +Vcc ) and
the output pin 3. This means that the current will “Sink” (absorb) or flow into the 555 timer
output terminal and the LED will be “ON” when the output is “LOW”.The second circuit
above shows that the LED is connected between the output pin 3 and ground ( 0v ). This
means that the current will “Source” (supply) or flow out of the 555 timers output terminal
and the LED will be “ON” when the output is “HIGH”.The ability of the 555 timer to both
sink and source its output load current means that both LED’s can be connected to the output
terminal at the same time but only one will be switched “ON” depending whether the output
state is “HIGH” or “LOW”. The circuit to the left shows an example of this. the two LED’s
will be alternatively switched “ON” and “OFF” depending upon the output. Resistor, R is
used to limit the LED current to below 20mA.It was said earlier that the maximum output
current to either sink or source the load current via pin 3 is about 200mA and this value is
more than enough to drive or switch other logic IC’s, LED’s or small lamps etc. But what if
we wanted to switch or control higher power devices such as motors, electromagnets, relays
or loudspeakers. Then we would need to use a Transistor to amplify the 555 timers output in
order to provide a sufficiently high enough current to drive the load.

555 Timer Transistor Driver

The transistor in the two examples above, can be replaced with a Power MOSFET device or
Darlington transistor if the load current is high. When using an inductive load such as a
motor, relay or electromagnet, it is advisable to connect a freewheel (or flywheel) diode
directly across the load terminals to absorb any back emf voltages generated by the inductive
device when it changes state.Thus far we have look at using the 555 Timer to generate
monostable and bistable output pulses. In the next tutorial about Waveform Generation we
will look at connecting the 555 in an astable multivibrator configuration. When used in the
astable mode both the frequency and duty cycle of the output waveform can be accurately
controlled to produce a very versatile waveform generator.
 In the monostable multivibrator, the one resistive-capacitive network is replaced
by a resistive network (just a resistor). The circuit can be thought as a 1/2 astable
multivibrator. Q2 collector voltage is the output of the circuit (in contrast to the astable
circuit, it has a perfect square waveform since the output is not loaded by the
capacitor).When triggered by an input pulse, a monostable multivibrator will switch to its
unstable position for a period of time, and then return to its stable state. The time period
monostable multivibrator remains in unstable state is given by t = ln(2)R2C1. If repeated
application of the input pulse maintains the circuit in the unstable state, it is called a
retriggerable monostable. If further trigger pulses do not affect the period, the circuit is a
non-retriggerable multivibrator.For the circuit, in the stable state Q1 is turned off and Q2 is
turned on. It is triggered by zero or negative input signal applied to Q2 base (with the same
success it can be triggered by applying a positive input signal through a resistor to Q1 base).
As a result, the circuit goes in State 1 described above. After elapsing the time, it returns to
its stable initial state.

Multivibrators and CMOS Oscillators can be easily constructed from discrete

components to produce relaxation oscillators for generating basic square wave output
waveforms. But there are also dedicated IC’s especially designed to accurately produce the
required output waveform with the addition of just a few extra timing components. One such
device that has been around since the early days of IC’s and has itself become something of
an industry “standard” is the 555 Timer Oscillator which is more commonly called the “555
Timer”.The 555 timer which gets its name from the three 5kΩ resistors it uses to generate
the two comparators reference voltage, is a very cheap, popular and useful precision timing
device that can act as either a simple timer to generate single pulses or long time delays, or as
a relaxation oscillator producing stabilized waveforms of varying duty cycles from 50 to
100%.The 555 timer chip is extremely robust and stable 8-pin device that can be operated
either as a very accurate Monostable, Bistable or Astable Multivibrator to produce a variety
of applications such as one-shot or delay timers, pulse generation, LED and lamp flashers,
alarms and tone generation, logic clocks, frequency division, power supplies and converters
etc, in fact any circuit that requires some form of time control as the list is endless.chip in its
basic form is a Bipolar 8-pin mini Dual-in-line Package (DIP) device consisting of some 25
transistors, 2 diodes and about 16 resistors arranged to form two comparators, a flip-flop and
a high current output stage as shown below. As well as the 555 Timer there is also available
the NE556 Timer Oscillator which combines TWO individual 555’s within a single 14-pin
DIP package and low power CMOS versions of the single 555 timer such as the 7555 and
LMC555 which use MOSFET transistors instead.A simplified “block diagram” representing
the internal circuitry of the 555 timer is given below with a brief explanation of each of its
connecting pins to help provide a clearer understanding of how it works.The operation and
output of the 555 timer monostable is exactly the same as that for the transistorised one we
look at previously in the Monostable Multivibrators tutorial. The difference this time is that
the two transistors have been replaced by the 555 timer device. Consider the 555 timer
monostable circuit below.

When a negative ( 0V ) pulse is applied to the trigger input (pin 2) of the Monostable
configured 555 Timer oscillator, the internal comparator, (comparator No1) detects this input
and “sets” the state of the flip-flop, changing the output from a “LOW” state to a “HIGH”
state. This action in turn turns “OFF” the discharge transistor connected to pin 7, thereby
removing the short circuit across the external timing capacitor, C1.This action allows the
timing capacitor to start to charge up through resistor, R1 until the voltage across the
capacitor reaches the threshold (pin 6) voltage of 2/3Vcc set up by the internal voltage
divider network. At this point the comparators output goes “HIGH” and “resets” the flip-flop
back to its original state which in turn turns “ON” the transistor and discharges the capacitor
to ground through pin 7. This causes the output to change its state back to the original stable
“LOW” value awaiting another trigger pulse to start the timing process over again. Then as
before, the Monostable Multivibrator has only “ONE” stable state.The Monostable 555
Timer circuit triggers on a negative-going pulse applied to pin 2 and this trigger pulse must
be much shorter than the output pulse width allowing time for the timing capacitor to charge
and then discharge fully. Once triggered, the 555 Monostable will remain in this “HIGH”
unstable output state until the time period set up by the R1 x C1 network has elapsed. The
amount of time that the output voltage remains “HIGH” or at a logic “1” level, is given by the
following time constant equation.
Where, t is in seconds, R is in Ω’s and C in Farads.

555 Timer Example No1

A Monostable 555 Timer is required to produce a time delay within a circuit. If a 10uF
timing capacitor is used, calculate the value of the resistor required to produce a minimum
output time delay of 500ms.500ms is the same as saying 0.5s so by rearranging the formula
above, we get the calculated value for the resistor, R as:

The calculated value for the timing resistor required to produce the required time constant of
500ms is therefore, 45.5KΩ’s. However, the resistor value of 45.5KΩ’s does not exist as a
standard value resistor, so we would need to select the nearest preferred value resistor of
47kΩ’s which is available in all the standard ranges of tolerance from the E12 (10%) to the
E96 (1%), giving us a new recalculated time delay of 517ms.If this time difference of 17ms
(500 – 517ms) is unacceptable instead of one single timing resistor, two different value
resistor could be connected together in series to adjust the pulse width to the exact desired
value, or a different timing capacitor value chosen.We now know that the time delay or
output pulse width of a monostable 555 timer is determined by the time constant of the
connected RC network. If long time delays are required in the 10’s of seconds, it is not
always advisable to use high value timing capacitors as they can be physically large,
expensive and have large value tolerances, e.g, ±20%.One alternative solution is to use a
small value timing capacitor and a much larger value resistor up to about 20MΩ’s to produce
the require time delay. Also by using one smaller value timing capacitor and different resistor
values connected to it through a multi-position rotary switch, we can produce a Monostable
555 timer oscillator circuit that can produce different pulse widths at each switch rotation
such as the switchable Monostable 555 timer circuit shown below.

A Switchable 555 Timer

 We can manually calculate the values of R and C for the individual components required as
we did in the example above. However, the choice of components needed to obtain the
desired time delay requires us to calculate with either kilohm’s, megaohm’s, microfarad’s or
picafarad’s and it is very easy to end up with a time delay that is out by a factor of ten or even
a hundred.We can make our life a little easier by using a type of chart called a “Nomograph”
that will help us to find the monostable multivibrators expected frequency output for different
combinations or values of both the R and C. For example,

Monostable Nomograph

So by selecting suitable values of C and R in the ranges of 0.001uF to 100uF and 1kΩ to
10MΩ’s respectively, we can read the expected output frequency directly from the
nomograph graph thereby eliminating any error in the calculations. In practice the value of
the timing resistor for a monostable 555 timer should not be less than 1kΩ or greater than
20MΩ.
REMARKS: characteristics of IC 555 timer connected as Monostable Multi vibrator have
successfully studied.

EXPERIMENT NAME- Study of characteristics curves of F.E.T & B.J.T

Study of characteristics of FET

OBJECTIVE :To study the characteristics curves of FET.

 The field-effect transistor (FET) is a transistor that uses an electric field to
control the shape and hence the conductivity of a channel of one type of charge carrier in a
semiconductor material. FETs are also known as unipolar transistors as they involve single-
carrier-type operation. The concept of the FET predates the bipolar junction transistor (BJT)
which involves two types of carriers (electrons and holes), though it was not physically
implemented until after BJTs due to the limitations of semiconductor materials and the
relative ease of manufacturing BJTs compared to FETs at the time.
The FET has several forms. The different classes of FETs are classified by a high input
impedance. The field-effect transistor was first patented by Julius Edgar Lilienfeld in 1926
and by Oskar Heil in 1934, but practical semiconducting devices (the JFET) were developed
only much later after the transistor effect was observed and explained by the team of William
Shockley at Bell Labs in 1947, immediately after the 20-year patent period eventually
expired. The MOSFET, which largely superseded the JFET and had a more profound effect
on electronic development, was invented by Dawon Kahng and Martin Atalla in 1960.

FETs can be majority-charge-carrier devices, in which the current is carried predominantly

by majority carriers, or minority-charge-carrier devices, in which the current is mainly due to
a flow of minority carriers.The device consists of an active channel through which charge
carriers, electrons or holes, flow from the source to the drain. Source and drain terminal
conductors are connected to the semiconductor through ohmic contacts. The conductivity of
the channel is a function of the potential applied across the gate and source terminals.

The FET's three terminals are:

 Source (S), through which the carriers enter the channel. Conventionally, current
entering the channel at S is designated by IS.

 Drain (D), through which the carriers leave the channel. Conventionally, current
entering the channel at D is designated by ID. Drain-to-source voltage is VDS.

 Gate (G), the terminal that modulates the channel conductivity. By applying voltage
to G, one can control ID.

All FETs have source, drain, and gate terminals that correspond roughly to the emitter,
collector, and base of BJTs. Most FETs have a fourth terminal called the body, base, bulk, or
substrate. This fourth terminal serves to bias the transistor into operation; it is rare to make
non-trivial use of the body terminal in circuit designs, but its presence is important when
setting up the physical layout of an integrated circuit. The size of the gate, length L in the
diagram, is the distance between source and drain. The width is the extension of the
transistor, in the direction perpendicular to the cross section in the diagram (i.e., into/out of
the screen). Typically the width is much larger than the length of the gate. A gate length of
1 µm limits the upper frequency to about 5 GHz, 0.2 µm to about 30 GHz.
The names of the terminals refer to their functions. The gate terminal may be thought of as
controlling the opening and closing of a physical gate. This gate permits electrons to flow
through or blocks their passage by creating or eliminating a channel between the source and
drain. Electron-flow from the source terminal towards the drain terminal is influenced by an
applied voltage. The body simply refers to the bulk of the semiconductor in which the gate,
source and drain lie. Usually the body terminal is connected to the highest or lowest voltage
within the circuit, depending on the type of the FET. The body terminal and the source
terminal are sometimes connected together since the source is often connected to the highest
or lowest voltage within the circuit, although there are several uses of FETs which do not
have such a configuration, such as transmission gates and cascade circuits.

The FET controls the flow of electrons (or electron holes) from the source to drain by
affecting the size and shape of a "conductive channel" created and influenced by voltage (or
lack of voltage) applied across the gate and source terminals. (For simplicity, this discussion
assumes that the body and source are connected.) This conductive channel is the "stream"
through which electrons flow from source to drain.

n-channel

In an n-channel depletion-mode device, a negative gate-to-source voltage causes a depletion

region to expand in width and encroach on the channel from the sides, narrowing the channel.
If the active region expands to completely close the channel, the resistance of the channel
from source to drain becomes large, and the FET is effectively turned off like a switch. This
is called pinch-off, and the voltage at which it occurs is called the pinch-off voltage.
Conversely, a positive gate-to-source voltage increases the channel size and allows electrons
to flow easily.

In an n-channel enhancement-mode device, a conductive channel does not exist naturally

within the transistor, and a positive gate-to-source voltage is necessary to create one. The
positive voltage attracts free-floating electrons within the body towards the gate, forming a
conductive channel. But first, enough electrons must be attracted near the gate to counter the
dopant ions added to the body of the FET; this forms a region with no mobile carriers called a
depletion region, and the voltage at which this occurs is referred to as the threshold voltage of
the FET. Further gate-to-source voltage increase will attract even more electrons towards the
gate which are able to create a conductive channel from source to drain; this process is called
inversion.

p-channel

In a p-channel depletion-mode device, a positive voltage from gate to body creates a

depletion layer by forcing the positively charged holes away from the
gate-insulator/semiconductor interface, leaving exposed a carrier-free region of immobile,
negatively charged acceptor ions.
Operation

For either enhancement- or depletion-mode devices, at drain-to-source voltages much less

than gate-to-source voltages, changing the gate voltage will alter the channel resistance, and
drain current will be proportional to drain voltage (referenced to source voltage). In this mode
the FET operates like a variable resistor and the FET is said to be operating in a linear mode
or ohmic mode. If drain-to-source voltage is increased, this creates a significant asymmetrical
change in the shape of the channel due to a gradient of voltage potential from source to drain.
The shape of the inversion region becomes "pinched-off" near the drain end of the channel. If
drain-to-source voltage is increased further, the pinch-off point of the channel begins to move
away from the drain towards the source. The FET is said to be in saturation mode; although
some authors refer to it as active mode, for a better analogy with bipolar transistor operating
regions. The saturation mode, or the region between ohmic and saturation, is used when
amplification is needed. The in-between region is sometimes considered to be part of the
ohmic or linear region, even where drain current is not approximately linear with drain
voltage.Even though the conductive channel formed by gate-to-source voltage no longer
connects source to drain during saturation mode, carriers are not blocked from flowing.
Considering again an n-channel enhancement-mode device, a depletion region exists in the p-
type body, surrounding the conductive channel and drain and source regions. The electrons
which comprise the channel are free to move out of the channel through the depletion region
if attracted to the drain by drain-to-source voltage. The depletion region is free of carriers and
has a resistance similar to silicon. Any increase of the drain-to-source voltage will increase
the distance from drain to the pinch-off point, increasing the resistance of the depletion
region in proportion to the drain-to-source voltage applied. This proportional change causes
the drain-to-source current to remain relatively fixed, independent of changes to the drain-to-
source voltage, quite unlike its ohmic behavior in the linear mode of operation. Thus, in
saturation mode, the FET behaves as a constant-current source rather than as a resistor, and
can effectively be used as a voltage amplifier. In this case, the gate-to-source voltage
determines the level of constant current through the channel.

Advantages of FET

The main advantage of the FET is its high input resistance, on the order of 100 MΩ or more.
Thus, it is a voltage-controlled device, and shows a high degree of isolation between input
and output. It is a unipolar device, depending only on majority current flow. Because base
current noise will increase with shaping time, a FET typically produces less noise than a
bipolar junction transistor (BJT), and is thus found in noise sensitive electronics such as
tuners and low-noise amplifiers for VHF and satellite receivers. It is relatively immune to
radiation. It exhibits no offset voltage at zero drain current and hence makes an excellent
signal chopper. It typically has better thermal stability than a BJT.

Disadvantages of FET

It has a relatively low gain-bandwidth product compared to a BJT. The MOSFET has a
drawback of being very susceptible to overload voltages, thus requiring special handling
during installation. The fragile insulating layer of the MOSFET between the gate and channel
makes it vulnerable to electrostatic damage or changes to threshold voltage during handling.
This is not usually a problem after the device has been installed in a properly designed
circuit.FETs often have a very low 'on' resistance and have a high 'off' resistance. However
the intermediate resistances are significant, and so FETs can dissipate large amounts of power
while switching. Thus efficiency can put a premium on switching quickly, but this can cause
transients that can excite stray inductances and generate significant voltages that can couple
to the gate and cause unintentional switching. FET circuits can therefore require very careful
layout and can involve trades between switching speed and power dissipation. There is also a
trade-off between voltage rating and 'on' resistance, so high voltage FETs have a relatively
high 'on' resistance and hence conduction losses.

Uses of FET

The most commonly used FET is the MOSFET. The CMOS (complementary metal oxide
semiconductor) process technology is the basis for modern digital integrated circuits. This
process technology uses an arrangement where the (usually "enhancement-mode") p-channel
MOSFET and n-channel MOSFET are connected in series such that when one is ON, the
other is OFF.

In FETs, electrons can flow in either direction through the channel when operated in the
linear mode. The naming convention of drain terminal and source terminal is somewhat
arbitrary, as the devices are typically (but not always) built symmetrically from source to
drain. This makes FETs suitable for switching analog signals between paths (multiplexing).
With this concept, one can construct a solid-state mixing board, for example.A common use
of the FET is as an amplifier. For example, due to its large input resistance and low output
resistance, it is effective as a buffer in common-drain (source follower) configuration.
REMARKS : The input & output characteristics of F.E.T have studied successfully.

Study of the input & output characteristics of BJT for CE configuration

OBJECTIVE :To Study the input & output characteristics BJT for CE configuration.

In electronics, a common emitter amplifier is one of three basic single-stage

bipolar-junction-transistor (BJT) amplifier topologies, typically used as a voltage amplifier.
In this circuit the base terminal of the transistor serves as the input, the collector is the output,
and the emitter is common to both (for example, it may be tied to ground reference or a power
supply rail), hence its name. The analogous field-effect transistor circuit is the common
source amplifier, and the analogous tube circuit is the common cathode amplifier.

Emitter degeneration

Figure : Adding an emitter resistor decreases gain, but increases linearity and stability

Common emitter amplifiers give the amplifier an inverted output and can have a very high
gain that may vary widely from one transistor to the next. The gain is a strong function of
both temperature and bias current, and so the actual gain is somewhat unpredictable. Stability
is another problem associated with such high gain circuits due to any unintentional positive
feedback that may be present.

Other problems associated with the circuit are the low input dynamic range imposed by the
small-signal limit; there is high distortion if this limit is exceeded and the transistor ceases to
behave like its small-signal model. One common way of alleviating these issues is with the
use of negative feedback, which is usually implemented with emitter degeneration. Emitter
degeneration refers to the addition of a small resistor (or any impedance) between the emitter
and the common signal source (e.g., the ground reference or a power supply rail). This
impedance reduces the overall transconductance of the circuit by a factor of
, which makes the voltage gain

The voltage gain depends almost exclusively on the ratio of the resistors rather than
the transistor's intrinsic and unpredictable characteristics. The distortion and stability
characteristics of the circuit are thus improved at the expense of a reduction in gain.
Bandwidth

The bandwidth of the common-emitter amplifier tends to be low due to high capacitance
resulting from the Miller effect. The parasitic base-collector capacitance appears like a
larger parasitic capacitor (where is negative) from the base to ground.[1]
This large capacitor greatly decreases the bandwidth of the amplifier as it makes the time
constant of the parasitic input RC filter where is the output impedance
of the signal source connected to the ideal base.

The problem can be mitigated in several ways, including:

 Reduction of the voltage gain magnitude (e.g., by using emitter degeneration).

 Reduction of the output impedance of the signal source connected to the base (e.g.,
by using an emitter follower or some other voltage follower).
 Using a cascode configuration, which inserts a low input impedance current buffer
(e.g. a common base amplifier) between the transistor's collector and the load. This
configuration holds the transistor's collector voltage roughly constant, thus making the
base to collector gain zero and hence (ideally) removing the Miller effect.
 Using a differential amplifier topology like an emitter follower driving a grounded-
base amplifier; as long as the emitter follower is truly a common-collector amplifier,
the Miller effect is removed.

The Miller effect negatively affects the performance of the common source amplifier in the
same way (and has similar solutions).When an AC signal is applied to the transistor amplifier
it causes the base voltage VB to fluctuate in value at the AC signal. The positive half of the
applied signal will cause an increase in the value of VB this turn will increase the base
current IB and cause a corresponding increase in emitter current IE and collector current IC.
As a result, the collector emitter voltage will be reduced because of the increase voltage drop
across RL. The negative alternation of an AC signal will cause a decrease in IB this action
then causes a corresponding decrease in IE through RL. The output signal of a common-
emitter amplifier is therefore 180 degrees out of phase with the input signal.

It is also named common- emitter amplifier because the emitter of the transistor is common to
both the input circuit and output circuit. The input signal is applied across the ground and the
base circuit of the transistor. The output signal appears across ground and the collector of the
transistor. Since the emitter is connected to the ground, it is common to signals, input and
output.

The common- emitter circuit is the most widely used of junction, transistor amplifiers. As
compared with the common- base connection, it has higher input impedance and lower output
impedance. A single power supply is easily used for biasing. In addition, higher voltage and
power gains are usually obtained for common- emitter (CE) operation.

Current gain in the common emitter circuit is obtained from the base and the collector circuit
currents. Because a very small change in base current produces a large change in collector
current, the current gain (β) is always greater than unity for the common-emitter circuit, a
typical value is about 50.
 Applications

Low frequency voltage amplifier

A typical example of the use of a common-emitter amplifier is shown in below Figure .

Figure : Single-ended npn common-emitter amplifier with emitter degeneration. The AC-
coupled circuit acts as a level-shifter amplifier. Here, the base–emitter voltage drop is
assumed to be 0.65 Volts.

The input capacitor C removes any constant component of the input, and the resistors R1 and
R2 bias the transistor so that it will remain in active mode for the entire range of the input.
The output is an inverted copy of the AC-component of the input that has been amplified by
the ratio RC/RE and shifted by an amount determined by all four resistors. Because RC is often
large, the output impedance of this circuit can be prohibitively high. To alleviate this
problem, RC is kept as low as possible and the amplifier is followed by a voltage buffer like
an emitter follower.

Radio

Common-emitter amplifiers are also used in radio frequency circuits, for example to amplify
faint signals received by an antenna.[dubious – discuss] In this case it is common to replace the load
resistor with a tuned circuit. This may be done to limit the bandwidth to a narrow band
centered around the intended operating frequency. More importantly it also allows the circuit
to operate at higher frequencies as the tuned circuit can be used to resonate any inter-
electrode and stray capacitances, which normally limit the frequency response. Common
emitters are also commonly used as low-noise amplifiers.
REMARKS: The input & output characteristics of B.J.T have studied successfully.
 Study of the input & output characteristics of BJT for CB configuration

OBJECTIVE : To Study the input & output characteristics of BJT for CB configuration.

In electronics, a common base (also known as grounded-base) amplifier is one

of three basic single-stage bipolar junction transistor (BJT) amplifier topologies, typically
used as a current buffer or voltage amplifier.In this circuit the emitter terminal of the
transistor serves as the input, the collector the output, and the base is connected to ground, or
"common", hence its name. The analogous field-effect transistor circuit is the common gate
amplifier.
 Figure : 1

As current is sunk from the emitter this provides potential difference so causing the transistor
to conduct. The current conducted via the collector is proportional to the voltage across the
base-emitter junction, accounting for the bias, as with other configurations. Therefore, if no
current is sunk at the emitter the transistor does not conduct.

Applications

This arrangement is not very common in low-frequency discrete circuits, where it is usually
employed for amplifiers that require an unusually low input impedance, for example to act as
a preamplifier for moving-coil microphones. However, it is popular in integrated circuits and
in high-frequency amplifiers, for example for VHF and UHF, because its input capacitance
does not suffer from the Miller effect, which degrades the bandwidth of the common emitter
configuration, and because of the relatively high isolation between the input and output. This
high isolation means that there is little feedback from the output back to the input, leading to
high stability.This configuration is also useful as a current buffer since it has a current gain of
approximately unity (see formulas below). Often a common base is used in this manner,
preceded by a common emitter stage. The combination of these two form the cascode
configuration, which possesses several of the benefits of each configuration, such as high
input impedance and isolation.

Active loads

For voltage amplification, the range of allowed output voltage swing in this amplifier is tied
to voltage gain when a resistor load RC is employed, as in above Figure 1. That is, large
voltage gain requires large RC, and that in turn implies a large DC voltage drop across RC. For
a given supply voltage, the larger this drop, the smaller the transistor VCB and the less output
swing is allowed before saturation of the transistor occurs, with resultant distortion of the
output signal. To avoid this situation, an active load can be used, for example, a current
mirror. If this choice is made, the value of RC in the table above is replaced by the small-
signal output resistance of the active load, which is generally at least as large as the rO of the
active transistor in the above Figure 1. On the other hand, the DC voltage drop across the
active load is a fixed low value (the compliance voltage of the active load), much less than
the DC voltage drop incurred for comparable gain using a resistor RC. That is, an active load
imposes less restriction on the output voltage swing. Notice that active load or not, large AC
gain still is coupled to large AC output resistance, which leads to poor voltage division at the
output except for large loads RL >> Rout.
For use as a current buffer, gain is not affected by RC, but output resistance is. Because of the
current division at the output, it is desirable to have an output resistance for the buffer much
larger than the load RL being driven so large signal currents can be delivered to a load. If a
resistor RC is used, as in Figure 1, a large output resistance is coupled to a large RC, again
limiting the signal swing at the output. (Even though current is delivered to the load, usually a
large current signal into the load implies a large voltage swing across the load as well.) An
active load provides high AC output resistance with much less serious impact upon the
amplitude of output signal swing.

 resistances), simplifying the analysis. This approximation often is made in discrete

designs, but may be less accurate in RF circuits, and in integrated circuit designs
where active loads normally are used.

Voltage amplifier

Figure 2: Small-signal model for calculating various parameters; Thévenin voltage source as
signal.

For the case when the common base circuit is used as a voltage amplifier, the circuit is shown
in Figure 2.

The output resistance is large, at least RC || rO, the value which arises with low source
impedance (RS << rE). A large output resistance is undesirable in a voltage amplifier, as it
leads to poor voltage division at the output. Nonetheless, the voltage gain is appreciable even
for small loads: according to the table, with RS = rE the gain is Av = gm RL / 2. For larger source
impedances, the gain is determined by the resistor ratio RL / RS, and not by the transistor
properties, which can be an advantage where insensitivity to temperature or transistor
variations is important.

An alternative to the use of the hybrid-pi model for these calculations is a general technique
based upon two-port networks. For example, in an application like this one where voltage is
the output, a g-equivalent two-port could be selected for simplicity, as it uses a voltage
amplifier in the output port.

For RS values in the vicinity of rE the amplifier is transitional between voltage amplifier and
current buffer. For RS >> rE the driver representation as a Thévenin source should be replaced
by representation with a Norton source. The common base circuit stops behaving like a
voltage amplifier and behaves like a current follower, as discussed next.

Current follower
Figure 3: Common base circuit with Norton driver; RC is omitted because an active load is
assumed with infinite small-signal output resistance

Figure 3 shows the common base amplifier used as a current follower. The circuit signal is
provided by an AC Norton source (current IS, Norton resistance RS) at the input, and the
circuit has a resistor load RL at the output.As mentioned earlier, this amplifier is bilateral as a
consequence of the output resistance rO, which connects the output to the input. In this case
the output resistance is large even in the worst case (it is at least rO || RC and can become (β +
1) rO || RC for large RS). Large output resistance is a desirable attribute of a current source
because favorable current division sends most of the current to the load. The current gain is
very nearly unity as long as RS >> rE.An alternative analysis technique is based upon two-port
networks. For example, in an application like this one where current is the output, an h-
equivalent two-port is selected because it uses a current amplifier in the output port.
REMARKS: CB Configuration have successfully studied
Study of the input & output characteristics of BJT for CC configuration

 OBJECTIVE: To Study the input & output characteristics of BJT for CC

configuration
 In electronics, a common collector amplifier (also known as an emitter follower)
is one of three basic single-stage bipolar junction transistor (BJT) amplifier topologies,
typically used as a voltage buffer.
In this circuit the base terminal of the transistor serves as the input, the emitter is the output,
and the collector is common to both (for example, it may be tied to ground reference or a
power supply rail), hence its name. The analogous field-effect transistor circuit is the
common drain amplifier.

Figure 1: Basic NPN common collector circuit

The circuit can be explained by viewing the transistor as being under the control of negative
feedback. From this viewpoint, a common collector stage (Fig. 1) is an amplifier with full
series negative feedback. In this configuration (Fig. 2 with β = 1), the entire output voltage
VOUT is placed contrary and in series with the input voltage VIN. Thus the two voltages are
subtracted according to KVL (the subtractor from the function block diagram is implemented
just by the input loop) and their difference Vdiff = VIN - VOUT is applied to the base-emitter
junction. The transistor continuously monitors Vdiff and adjusts its emitter voltage almost
equal (less VBEO) to the input voltage by passing the according collector current through the
emitter resistor RE. As a result, the output voltage follows the input voltage variations from
VBEO up to V+; hence the name, emitter follower.

Intuitively, this behavior can be also understood by realizing that the base-emitter voltage in
the bipolar transistor is very insensitive to bias changes, so any change in base voltage is
transmitted (to good approximation) directly to the emitter. It depends slightly on various
disturbances (transistor tolerances, temperature variations, load resistance, collector resistor if
it is added, etc.) since the transistor reacts to these disturbances and restores the equilibrium.
It never saturates even if the input voltage reaches the positive rail.

Applications
Figure : NPN voltage follower with current source biasing suitable for integrated circuits

The low output impedance allows a source with a large output impedance to drive a small
load impedance; it functions as a voltage buffer. In other words, the circuit has current gain
(which depends largely on the hFE of the transistor) instead of voltage gain. A small change to
the input current results in much larger change in the output current supplied to the output
load.One aspect of buffer action is transformation of impedances. For example, the Thévenin
resistance of a combination of a voltage follower driven by a voltage source with high
Thévenin resistance is reduced to only the output resistance of the voltage follower (a small
resistance). That resistance reduction makes the combination a more ideal voltage source.
Conversely, a voltage follower inserted between a small load resistance and a driving stage
presents a large load to the driving stage—an advantage in coupling a voltage signal to a
small load.This configuration is commonly used in the output stages of class-B and class-AB
amplifiers. The base circuit is modified to operate the transistor in class-B or AB mode. In
class-A mode, sometimes an active current source is used instead of RE (above Fig.) to
improve linearity and/or efficiency.
REMARKS:

CC configurations of BJT have studied successfully.

EXPERIMENT NO:-3

Study of class A, C Power Amplifiers

OBJECTIVE : To study the class A,C Power amplifier.

THEORY : A power amplifier usually constitutes the last stage of a multistage

amplifier system and serves to supply sizable power to the load. The efficiency of a power
amplifier is the ratio of the ac output power to the power delivered by the supply source. The
efficiency increases from Class A to Class C via Class AB and Class B amplifiers. The
operations of classes AB, B and C are nonlinear and so generate harmonics of the signal
frequency at the output current.Since a power amplifier delivers a large output power, a
power transistor operates at higher collector currents and voltages than a transistor serving as
a voltage amplifier.A power amplifier handles a large signal and the excursion of the
operating point may go beyond the linear region of the amplifier active device
characteristics.A graphical method using the load line id therefore employed in the analysis
of a power amplifer.
An amplifier, electronic amplifier or (informally) amp is an electronic device
that increases the power of a signal.It does this by taking energy from a power supply and
controlling the output to match the input signal shape but with a larger amplitude. In this
sense, an amplifier modulates the output of the power supply to make the output signal
stronger than the input signal. An amplifier is effectively the opposite of an attenuator: while
an amplifier provides gain, an attenuator provides loss.The four basic types of electronic
amplifiers are voltage amplifiers, current amplifiers, transconductance amplifiers, and
transresistance amplifiers. A further distinction is whether the output is a linear or nonlinear
representation of the input. Amplifiers can also be categorized by their physical placement in
the signal chain.

Amplifier quality is characterized by a list of specifications that includes:

 Gain, the ratio between the magnitude of output and input signals
 Bandwidth, the width of the useful frequency range
 Efficiency, the ratio between the power of the output and total power consumption
 Linearity, the degree of proportionality between input and output
 Noise, a measure of undesired noise mixed into the output
 Output dynamic range, the ratio of the largest and the smallest useful output levels
 Slew rate, the maximum rate of change of the output
 Rise time, settling time, ringing and overshoot that characterize the step response
 Stability, the ability to avoid self-oscillation

Amplifiers are described according to their input and output properties.[2] They exhibit the
property of gain, or multiplication factor that relates the magnitude of the output signal to the
input signal. The gain may be specified as the ratio of output voltage to input voltage (voltage
gain), output power to input power (power gain), or some combination of current, voltage,
and power. In many cases, with input and output in the same unit, gain is unitless (though
often expressed in decibels (dB)).

The four basic types of amplifiers are as follows:

1. Voltage amplifier – This is the most common type of amplifier. An input voltage is
amplified to a larger output voltage. The amplifier's input impedance is high and the
output impedance is low.
2. Current amplifier – This amplifier changes an input current to a larger output current.
The amplifier's input impedance is low and the output impedance is high.
3. Transconductance amplifier – This amplifier responds to a changing input voltage by
delivering a related changing output current.
4. Transresistance amplifier – This amplifier responds to a changing input current by
delivering a related changing output voltage. Other names for the device are
transimpedance amplifier and current-to-voltage converter.

In practice, amplifier power gain depends on the source and load impedances, as well as the
inherent voltage and current gain. A radio frequency (RF) amplifier design typically
optimizes impedances for power transfer, while audio and instrumentation amplifier designs
normally optimize input and output impedance for least loading and highest signal integrity.
An amplifier that is said to have a gain of 20 dB might have a voltage gain of ten times and
an available power gain of much more than 20 dB (power ratio of 100)—yet actually deliver
a much lower power gain if, for example, the input is from a 600 ohm microphone and the
output connects to a 47 kilohm input socket for a power amplifier.In most cases, an amplifier
is linear. That is, it provides constant gain for any normal input level and output signal. If the
gain is not linear, e.g., clipping of the signal, the output signal distorts. There are, however,
cases where variable gain is useful. Certain signal processing applications use exponential
gain amplifiers. Many different electronic amplifier types exist that are specific to areas such
as: radio and television transmitters and receivers, high-fidelity ("hi-fi") stereo equipment,
microcomputers and other digital equipment, and guitar and other instrument amplifiers.
Essential components include active devices, such as vacuum tubes or transistors. A brief
introduction to the many types of electronic amplifiers follows.

Power amplifier

The term power amplifier is a relative term with respect to the amount of power delivered to
the load and/or provided by the power supply circuit. In general the power amplifier is the
last 'amplifier' or actual circuit in a signal chain (the output stage) and is the amplifier stage
that requires attention to power efficiency. Efficiency considerations lead to the various
classes of power amplifier based on the biasing of the output transistors or tubes: see power
amplifier classes.

Power amplifiers by application

 Audio power amplifiers: Speakers allows client to use both sides to maximize
volume, but each side receives half of what it could potentially supply.
 RF power amplifier—typical in transmitter final stages (see also: Linear amplifier)
 Servo motor controllers amplify a control voltage where linearity is not important
 Piezoelectric audio amplifier—includes a DC-to-DC converter to generate the high
voltage output required to drive piezoelectric speakers[3]

Power amplifier circuits

Power amplifier circuits include the following types:

 Vacuum tube/valve, hybrid or transistor power amplifiers

 Push-pull output or single-ended output stages

Vacuum-tube (valve) amplifiers

According to Symons, while semiconductor amplifiers have largely displaced valve

amplifiers for low power applications, valve amplifiers are much more cost effective in high
power applications such as "radar, countermeasures equipment, or communications
equipment" (p. 56). Many microwave amplifiers are specially designed valves, such as the
klystron, gyrotron, traveling wave tube, and crossed-field amplifier, and these microwave
valves provide much greater single-device power output at microwave frequencies than solid-
state devices (p. 59).

Valves/tube amplifiers also have following uses in other areas, such as

 electric guitar amplification

 in Russian military aircraft, for their electromagnetic pulse (EMP) tolerance
  niche audio for their sound qualities (recording, and audiophile equipment)

Transistor amplifiers

The essential role of this active element is to magnify an input signal to yield a significantly
larger output signal. The amount of magnification (the "forward gain") is determined by the
external circuit design as well as the active device.Many common active devices in transistor
amplifiers are bipolar junction transistors (BJTs) and metal oxide semiconductor field-effect
transistors (MOSFETs).Applications are numerous, some common examples are audio
amplifiers in a home stereo or PA system, RF high power generation for semiconductor
equipment, to RF and Microwave applications such as radio transmitters.Transistor-based
amplifier can be realized using various configurations: for example with a bipolar junction
transistor we can realize common base, common collector or common emitter amplifier;
using a MOSFET we can realize common gate, common source or common drain amplifier.
Each configuration has different characteristic (gain, impedance...).

Operational amplifiers (op-amps)

An operational amplifier is an amplifier circuit with very high open loop gain and differential
inputs that employs external feedback to control its transfer function, or gain. Though the
term today commonly applies to integrated circuits, the original operational amplifier design
used valves, and later designs used discrete transistor circuits.

Fully differential amplifiers

A fully differential amplifier is a solid state integrated circuit amplifier that uses external
feedback to control its transfer function or gain. It is similar to the operational amplifier, but
also has differential output pins. These are usually constructed using BJTs or FETs.

Video amplifiers

These deal with video signals and have varying bandwidths depending on whether the video
signal is for SDTV, EDTV, HDTV 720p or 1080i/p etc.. The specification of the bandwidth
itself depends on what kind of filter is used—and at which point (-1 dB or -3 dB for example)
the bandwidth is measured. Certain requirements for step response and overshoot are
necessary for an acceptable TV image.

Oscilloscope vertical amplifiers

These deal with video signals that drive an oscilloscope display tube, and can have
bandwidths of about 500 MHz. The specifications on step response, rise time, overshoot, and
aberrations can make designing these amplifiers difficult. One of the pioneers in high
bandwidth vertical amplifiers was the Tektronix company.

Distributed amplifiers

These use transmission lines to temporally split the signal and amplify each portion
separately to achieve higher bandwidth than possible from a single amplifier. The outputs of
each stage are combined in the output transmission line. This type of amplifier was
commonly used on oscilloscopes as the final vertical amplifier. The transmission lines were
often housed inside the display tube glass envelope.

Switched mode amplifiers

These nonlinear amplifiers have much higher efficiencies than linear amps, and are used
where the power saving justifies the extra complexity.

Negative resistance devices

Negative resistances can be used as amplifiers, such as the tunnel diode amplifier.

Microwave amplifiers

Travelling wave tube amplifiers

Traveling wave tube amplifiers (TWTAs) are used for high power amplification at low
microwave frequencies. They typically can amplify across a broad spectrum of frequencies;
however, they are usually not as tunable as klystrons.

Klystrons

Klystrons are specialized linear-beam vacuum-devices, designed to provide high power,

widely tunable amplification of millimetre and sub-millimetre waves. Klystrons are designed
for large scale operations and despite having a narrower bandwidth than TWTAs, they have
the advantage of coherently amplifying a reference signal so its output may be precisely
controlled in amplitude, frequency and phase.

Musical instrument amplifiers

An audio power amplifier is usually used to amplify signals such as music or speech. In the
mid 1960s, amplifiers began to gain popularity because of its relatively low price ($50) and
guitars being the most popular instruments as well. Several factors are especially important in
the selection of musical instrument amplifiers (such as guitar amplifiers) and other audio
amplifiers (although the whole of the sound system – components such as microphones to
loudspeakers – affect these parameters):

 Frequency response – not just the frequency range but the requirement that the signal
level varies so little across the audible frequency range that the human ear notices no
variation. A typical specification for audio amplifiers may be 20 Hz to 20 kHz +/-
0.5 dB.
 Power output – the power level obtainable with little distortion, to obtain a
sufficiently loud sound pressure level from the loudspeakers.
 Low distortion – all amplifiers and transducers distort to some extent. They cannot be
perfectly linear, but aim to pass signals without affecting the harmonic content of the
sound more than the human ear can tolerate. That tolerance of distortion, and indeed
the possibility that some "warmth" or second harmonic distortion (Tube sound)
improves the "musicality" of the sound, are subjects of great debate.
Before coming onto the music scene, amplifiers were heavily used in cinema. In the premiere
of Noah's Ark in 1929, the movie's director (Michael Kurtiz) used the amplifier for a festival
following the movie's premiere.

Power amplifier classes

Power amplifier circuits (output stages) are classified as A, B, AB and C for analog designs,
and class D and E for switching designs based on the proportion of each input cycle
(conduction angle), during which an amplifying device is passing current. The image of the
conduction angle is derived from amplifying a sinusoidal signal. If the device is always on,
the conducting angle is 360°. If it is on for only half of each cycle, the angle is 180°. The
angle of flow is closely related to the amplifier power efficiency. The various classes are
introduced below, followed by a more detailed discussion under their individual headings
further down.In the illustrations below, a bipolar junction transistor is shown as the
amplifying device. However the same attributes are found with MOSFETs or vacuum tubes.

Conduction angle classes

Class A
100% of the input signal is used (conduction angle Θ = 360°). The active element
remains conducting[10] all of the time.
Class B
50% of the input signal is used (Θ = 180°); the active element carries current half of
each cycle, and is turned off for the other half.
Class AB
Class AB is intermediate between class A and B, the two active elements conduct
more than half of the time
Class C
Less than 50% of the input signal is used (conduction angle Θ < 180°).

A "Class D" amplifier uses some form of pulse-width modulation to control the output
devices; the conduction angle of each device is no longer related directly to the input signal
but instead varies in pulse width. These are sometimes called "digital" amplifiers because the
output device is switched fully on or off, and not carrying current proportional to the signal
amplitude.

Additional classes
There are several other amplifier classes, although they are mainly variations of the
previous classes. For example, class-G and class-H amplifiers are marked by variation
of the supply rails (in discrete steps or in a continuous fashion, respectively) following
the input signal. Wasted heat on the output devices can be reduced as excess voltage
is kept to a minimum. The amplifier that is fed with these rails itself can be of any
class. These kinds of amplifiers are more complex, and are mainly used for
specialized applications, such as very high-power units. Also, class-E and class-F
amplifiers are commonly described in literature for radio-frequency applications
where efficiency of the traditional classes is important, yet several aspects deviate
substantially from their ideal values. These classes use harmonic tuning of their
output networks to achieve higher efficiency and can be considered a subset of class C
due to their conduction-angle characteristics.

CLASS A :
 Class-A amplifier

Amplifying devices operating in class A conduct over the entire range of the input cycle. A
class-A amplifier is distinguished by the output stage devices being biased for class A
operation. Subclass A2 is sometimes used to refer to vacuum-tube class-A stages that drive
the grid slightly positive on signal peaks for slightly more power than normal class A (A1;
where the grid is always negative). This, however, incurs higher signal distortion.

Advantages of class-A amplifiers

 Class-A designs are simpler than other classes; for example class -AB and -B designs
require two connected devices in the circuit (push–pull output), each to handle one
half of the waveform; class A can use a single device (single-ended).
 The amplifying element is biased so the device is always conducting, the quiescent
(small-signal) collector current (for transistors; drain current for FETs or anode/plate
current for vacuum tubes) is close to the most linear portion of its transconductance
curve.
 Because the device is never 'off' there is no "turn on" time, no problems with charge
storage, and generally better high frequency performance and feedback loop stability
(and usually fewer high-order harmonics).
 The point at which the device comes closest to being 'off' is not at 'zero signal', so the
problems of crossover distortion associated with class-AB and -B designs is avoided.
 Best for low signal levels of radio receivers due to low distortion.

Disadvantage of class-A amplifiers

 Class-A amplifiers are inefficient. A theoretical efficiency of 50% is obtainable with
transformer output coupling and only 25% with capacitive coupling, unless deliberate
use of nonlinearities is made (such as in square-law output stages).
 In a power amplifier, this not only wastes power and limits operation with batteries,
but increases operating costs and requires higher-rated output devices. Inefficiency
comes from the standing current that must be roughly half the maximum output
current, and a large part of the power supply voltage is present across the output
device at low signal levels.
 If high output power is needed from a class-A circuit, the power supply and
accompanying heat becomes significant. For every watt delivered to the load, the
amplifier itself, at best, uses an extra watt. For high power amplifiers this means very
large and expensive power supplies and heat sinks.

Class-A power amplifier designs have largely been superseded by more efficient designs,
though they remain popular with some hobbyists, mostly for their simplicity. There is a
market for expensive high fidelity class-A amps considered a "cult item" amongst
audiophiles mainly for their absence of crossover distortion and reduced odd-harmonic and
high-order harmonic distortion.
Single-ended and triode class-A amplifiers

Some hobbyists who prefer class-A amplifiers also prefer the use of thermionic valve (or
"tube") designs instead of transistors, for several reasons:

 Single-ended output stages have an asymmetrical transfer function, meaning that

even-order harmonics in the created distortion tend not cancel out (as they do in push–
pull output stages). For tubes, or FETs, most distortion is second-order harmonics,
from the square law transfer characteristic, which to some produces a "warmer" and
more pleasant sound.[13][14]
 For those who prefer low distortion figures, the use of tubes with class A (generating
little odd-harmonic distortion, as mentioned above) together with symmetrical circuits
(such as push–pull output stages, or balanced low-level stages) results in the
cancellation of most of the even distortion harmonics, hence the removal of most of
the distortion.
 Historically, valve amplifiers often used a class-A power amplifier simply because
valves are large and expensive; many class-A designs use only a single device.

Transistors are much cheaper, and so more elaborate designs that give greater efficiency but
use more parts are still cost-effective. A classic application for a pair of class-A devices is the
long-tailed pair, which is exceptionally linear, and forms the basis of many more complex
circuits, including many audio amplifiers and almost all op-amps.Class-A amplifiers are often
used in output stages of high quality op-amps (although the accuracy of the bias in low cost
op-amps such as the 741 may result in class A or class AB or class B, varying from device to
device or with temperature). They are sometimes used as medium-power, low-efficiency, and
high-cost audio power amplifiers. The power consumption is unrelated to the output power.
At idle (no input), the power consumption is essentially the same as at high output volume.
The result is low efficiency and high heat dissipation.

Common emitter amplifiers are the most commonly used type of amplifier as they have a
large voltage gain. They are designed to produce a large output voltage swing from a
relatively small input signal voltage of only a few milivolts and are used mainly as “small
signal amplifiers” .However, sometimes an amplifier is required to drive large resistive loads
such as a loudspeaker or to drive a motor in a robot and for these types of applications where
high switching currents are needed Power Amplifiers are required. The main function of the
Power Amplifier which are also known as a “large signal amplifier” is to deliver power,
which is the product of voltage and current to the load. Basically a power amplifier is also a
voltage amplifier the difference being that the load resistance connected to the output is
relatively low, for example a loudspeaker of 4 or 8Ωs resulting in high currents flowing
through the collector of the transistor.

Because of these high load currents the output transistor(s) used for power amplifier output
stages such as the 2N3055 need to have higher voltage and power ratings than the general
ones used for small signal amplifiers such as the BC107.Since we are interested in delivering
maximum AC power to the load, while consuming the minimum DC power possible from the
supply we are mostly concerned with the “conversion efficiency” of the amplifier.However,
one of the main disadvantage of power amplifiers and especially the Class A amplifier is that
their overall conversion efficiency is very low as large currents mean that a considerable
amount of power is lost in the form of heat. Percentage efficiency in amplifiers is defined as
the r.m.s. output power dissipated in the load divided by the total DC power taken from the
supply source as shown below.

CIRCUIT DIAGRAMS :

APPARATUS REQUIRED :
1. Power Supply
2. NPN Transistor
3. Transformer
4. Resistors
5. Capacitors
PROCEDURE :
WAVEFORMS :
 FIGURE : CLASS A, C & PUSH PULL AMPLIFIER

CLASS C :
Class-C amplifiers conduct less than 50% of the input signal and the distortion at the output is
high, but high efficiencies (up to 90%) are possible. The usual application for class-C
amplifiers is in RF transmitters operating at a single fixed carrier frequency, where the
distortion is controlled by a tuned load on the amplifier. The input signal is used to switch the
active device causing pulses of current to flow through a tuned circuit forming part of the
load.The class-C amplifier has two modes of operation: tuned and untuned. The diagram
shows a waveform from a simple class-C circuit without the tuned load. This is called
untuned operation, and the analysis of the waveforms shows the massive distortion that
appears in the signal. When the proper load (e.g., an inductive-capacitive filter plus a load
resistor) is used, two things happen. The first is that the output's bias level is clamped with
the average output voltage equal to the supply voltage. This is why tuned operation is
sometimes called a clamper. This restores the waveform to its proper shape, despite the
amplifier having only a one-polarity supply. This is directly related to the second
phenomenon: the waveform on the center frequency becomes less distorted. The residual
distortion is dependent upon the bandwidth of the tuned load, with the center frequency
seeing very little distortion, but greater attenuation the farther from the tuned frequency that
the signal gets.

The tuned circuit resonates at one frequency, the fixed carrier frequency, and so the unwanted
frequencies are suppressed, and the wanted full signal (sine wave) is extracted by the tuned
load. The signal bandwidth of the amplifier is limited by the Q-factor of the tuned circuit but
this is not a serious limitation. Any residual harmonics can be removed using a further
filter.In practical class-C amplifiers a tuned load is invariably used. In one common
arrangement the resistor shown in the circuit above is replaced with a parallel-tuned circuit
consisting of an inductor and capacitor in parallel, whose components are chosen to resonate
the frequency of the input signal. Power can be coupled to a load by transformer action with a
secondary coil wound on the inductor. The average voltage at the drain is then equal to the
supply voltage, and the signal voltage appearing across the tuned circuit varies from near zero
to near twice the supply voltage during the rf cycle. The input circuit is biased so that the
active element (e.g. transistor) conducts for only a fraction of the RF cycle, usually one third
(120 degrees) or less. The active element conducts only while the drain voltage is passing
through its minimum. By this means, power dissipation in the active device is minimised, and
efficiency increased. Ideally, the active element would pass only an instantaneous current
pulse while the voltage across it is zero: it then dissipates no power and 100% efficiency is
achieved. However practical devices have a limit to the peak current they can pass, and the
pulse must therefore be widened, to around 120 degrees, to obtain a reasonable amount of
power, and the efficiency is then 60-70%.

Class-C amplifier

CLASS AB[PUSH PULL] :

Class-AB push–pull amplifier

Class AB is widely considered a good compromise for amplifiers, since much of the time the
music signal is quiet enough that the signal stays in the "class A" region, where it is amplified
with good fidelity, and by definition if passing out of this region, is large enough that the
distortion products typical of class B are relatively small. The crossover distortion can be
reduced further by using negative feedback.In class-AB operation, each device operates the
same way as in class B over half the waveform, but also conducts a small amount on the
other half. As a result, the region where both devices simultaneously are nearly off (the "dead
zone") is reduced. The result is that when the waveforms from the two devices are combined,
the crossover is greatly minimised or eliminated altogether. The exact choice of quiescent
current (the standing current through both devices when there is no signal) makes a large
difference to the level of distortion (and to the risk of thermal runaway, that may damage the
devices). Often, bias voltage applied to set this quiescent current must be adjusted with the
temperature of the output transistors. (For example, in the circuit at the beginning of the
article, the diodes would be mounted physically close to the output transistors, and specified
to have a matched temperature coefficient.) Another approach (often used with thermally
tracking bias voltages) is to include small value resistors in series with the emitters.

Class AB sacrifices some efficiency over class B in favor of linearity, thus is less efficient
(below 78.5% for full-amplitude sinewaves in transistor amplifiers, typically; much less is
common in class-AB vacuum-tube amplifiers). It is typically much more efficient than class
A.Sometimes a numeral is added for vacuum-tube stages. If grid current is not permitted to
flow, the class is AB1. If grid current is allowed to flow (adding more distortion, but giving
slightly higher output power) the class is AB2.

As its name suggests, the Class AB Amplifier is a combination of the “Class A” and the
“Class B” type amplifiers we have looked at above. The AB classification of amplifier is
currently one of the most common used types of audio power amplifier design. The class AB
amplifier is a variation of a class B amplifier as described above, except that both devices are
allowed to conduct at the same time around the waveforms crossover point eliminating the
crossover distortion problems of the previous class B amplifier.The two transistors have a
very small bias voltage, typically at 5 to 10% of the quiescent current to bias the transistors
just above its cut-off point. Then the conducting device, either bipolar of FET, will be “ON”
for more than one half cycle, but much less than one full cycle of the input signal. Therefore,
in a class AB amplifier design each of the push-pull transistors is conducting for slightly
more than the half cycle of conduction in class B, but much less than the full cycle of
conduction of class A.In other words, the conduction angle of a class AB amplifier is
somewhere between 180o and 360o depending upon the chosen bias point. The advantage of
this small bias voltage, provided by series diodes or resistors, is that the crossover distortion
created by the class B amplifier characteristics is overcome, without the inefficiencies of the
class A amplifier design. So the class AB amplifier is a good compromise between class A
and class B in terms of efficiency and linearity, with conversion efficiencies reaching about
50% to 60%.

REMARKS : Class A,C & other power Amplifiers have studied successfully.
 EXPERIMENT NAME:- Realization of PLL using VCO of PLL using
VCO

OBJECTIVE: To design a PLL using VCO & to measure the lock frequency.

THEORY:
The phase-locked loop, or PLL, is one of the most useful blocks in modern electronic circuits.
It is used in many different applications, ranging from communications (FM modulation,
demodulation, frequency synthesis, signal correlation), control systems (motor control,
tracking controls, etc), as well as applications such as pulse recovery and frequency
multiplication.
A PLL is a closed-loop system whose purpose is to lock an oscillator onto a provided input
frequency (sometimes called the reference frequency.) By "closed-loop," we mean that there
is feedback from output to input. In a PLL, negative feedback is used, which makes it self-
correcting. Figure 1 shows the block diagram of a typical PLL.

Figure 1: Phase Locked Loop Block Diagram

A PLL has a special oscillator, a VCO. We know that a VCO changes its output frequency
based on input voltage (as well as Rt and Ct choices). The primary objective of PLL
operation is to get the VCO frequency to be exactly equal to that of the reference frequency.
When this happens, the loop is said to be "in lock."
This is achieved by feeding both the VCO output and the reference frequency into a phase
detector. The phase detector compares the phase of the two waves and outputs a pulsating DC
waveform with a duty cycle proportional to the phase difference (error) between the two
signals. Why compare phase and not frequency?
The answer is that if we compare frequency, then there will always be a small frequency error
in our result. However, if we compare phase, the frequency error is reduced to zero whenever
the phase difference is a constant.
This is easier to visualize if you think about synchronizing the speed of two cars. Two cars do
not have to be in exactly the same position (phase) on the highway to have the same speed.
One can be following the other at a fixed distance (fixed phase difference). As long as they
aren't speeding up or slowing down relative to each other, their speeds (frequencies) will be
exactly the same.

PLL Operating States

A PLL has three operating states. These are the free-running, capture, and locked conditions.
In the free-running state, there is no reference input frequency being provided to the PLL.
Design constants within the system determine what frequency the VCO will run at. Normally,
two of these are the values of Rt and Ct, the VCO timing components.
In the capture state, which is usually short-lived, the PLL has just been given a reference
frequency, and it is in the process of trying to "lock" onto it. The PLL cannot lock onto all
frequencies; only a certain range of frequencies, within the capture range can be locked onto,
if the PLL is initially in the free-running state. The free-running frequency is usually in the
middle of the capture range. The width of the capture range is determined by PLL design; the
loop low-pass filter is important in determining this.
The last PLL state is the desired state: Locked! In this state, the PLL has successfully passed
through the capture phase, and it has its VCO steadily "locked" onto the input reference
frequency. The PLL cannot remain locked for all frequencies, and if the input reference
frequency moves outside the lock range (which is usually larger than the capture range); the
PLL will drop out of lock.
Figure 2 illustrates the relationship between free-running frequency, capture range, and lock
range:

Figure 2: PLL Operating Regions

CIRCUIT DIAGRAM:

Figure 3: PLL Evaluation Circuit using the LM-565

APPARATUS USED:

1. Frequency Modulation and Demodulation Trainer

2. Function Generator
3. Oscilloscope
4. Connecting Wires

PROCEDURE:
In this experiment, you will observe the operation of the PLL subsystem. You'll learn to
recognize the three PLL states in actual circuits, and you will also gain some insight into how
circuit values affect PLL operation.
To get accurate frequency readings, it is strongly suggested that you use a frequency counter.
Some of the frequency readings will be fairly close in value. If you have the audio monitor
available, connect its input to the VCO OUTPUT of the PLL circuit so that you can hear the
PLL going in and out of lock.
1. Construct the circuit of Figure 3 using a 10 mF electrolytic for C5. (C5 is the capacitor for
the loop low-pass filter.)
2. Apply power to the circuit, but don't apply a reference signal yet. We want to set the free-
running frequency of the VCO. Adjust R1 until the output frequency of the VCO on pin 4 is 1
KHz.
3. Apply the reference frequency to the reference input of the circuit.
4. Connect scope channel #1 to the reference input of the circuit, and scope channel #2 to the
VCO output. Connect the frequency counter to the reference input, so that the frequency of
the reference is displayed. (Be sure to trigger off channel #1, the reference input.)
5. Set the function generator to 600 Hz, 1 Vpp sine. Observe the two scope traces and
describe what you see below.
6. Slowly increase the frequency of the generator until the PLL just locks. (The two traces
appear stable on the scope). A phase shift will be present between the VCO and reference
frequency; this is OK. This frequency is the bottom of the capture range, FC(lower), as
shown in Figure 2. Record it below.
7. Lets find the top of the lock range. Slowly increase the frequency until the PLL again
drops out of lock. This frequency is the top of the lock range, FL(upper). Record it below.
8. The PLL is now out of lock, and the reference frequency is above the top of the capture
range. Slowly decrease the reference until the PLL locks again; this is FC(upper). Finally,
decrease the reference frequency until the PLL drops out of lock again; this is FL(lower).
Record these values.
9. Let's observe the output from the low-pass filter, to see what happens when the input
frequency changes. We know it is supposed to be smooth DC, so we'll need to use the DC
setting of the scope to see the DC component. We also know that no filter is perfect, so some
AC ripple will be present on top of the DC. Set the reference frequency to 1 KHz, and record
the low-pass filter output on pin 7 of the IC
10. Increase the input frequency (but keep it within the lock range). What happens to the filter
DC output? (You may want to measure pin 7 with a DC multimeter to get more precise
voltage readings).
11. The capture range depends on the low-pass filter of the PLL. Let's see how. Replace C5
with each value in the table below, and measure the width of the capture and lock ranges for
each case.

REMARKS: PLL have successfully studied

EXPERIMENT NAME- Construction of a simple Function Generator using
IC
Construction of a simple function generator using I

OBJECTIVE: To design a Function Generator which generates Sine, Square and Triangular
waveforms using IC741 and to verify it‟s various output waveforms.

THEORY:
Function generator using IC741 is a circuit which generates Sine wave,
Square wave and Triangular wave. This circuit is a combination of Wien Bridge oscillator,
Zero crossing detector (Comparator with zero reference voltage) and Integrator. The Wien
Bridge oscillator generates Sine wave which is fed to the input of Zero crossing detector. This
detector gives the square wave output which is connected to the input of the Integrator which
in turn produces the Triangular wave output.
The frequency of oscillations of the Sine wave output of Wien Bridge oscillator is given by
fo = 1/2πRC
The frequency of oscillations of Square and Triangular wave outputs will also be the same
frequency as that of the Sine wave output. For theory of individual circuits i.e. Wien Bridge
oscillator, Zero Crossing Detector and Integrator, please refer to the THEORY section of
respective experiments mentioned earlier in this manual.
Function generator is a signal generator that produces various specific waveforms for test
purposes over a wide range of frequencies. In laboratory type function generator generally
one of the function (sine, triangle, etc.) is generated using dedicated chips or standard circuits
and converts it in to required signal.

Sine wave oscillator (wein-bridge oscillator):

This is a basic wein bridge oscillator using op-amp. Diodes (4148) across feedback resistor
are used to maintain constant output voltage. A 47 K dual potentiometer is used vary the
frequency for limited range 2 K 10 turn trim pot helps to adjust the gain at high resolution
capacitor 0.1 F Couples the signal to the next section.

Zero crossing detector (sine square converter):

Fig 1.2 shows the zero crossing detectors using 741 op-amp. In this circuit 741 is connected
to work as a comparator. Non-inverting input is connected to the voltage divider network.
Sine wave is connected to the Inverting input of the op-amp. Voltage at Non-inverting
terminals sets the reference level. When the input sine amplitude exceeds the voltage at Non-
inverting terminal output switches to either positive or negative saturation, ultimately the
output of the zero-crossing detector is a square wave.

Integrator (square to triangle converter):

Figure shows integrator-using op-amp. Square wave from the zero crossing detector is fed to
the integrator using op-amp. RC time constant of the integrator has been chosen in such a
way it is a small value compared to time period of the incoming square wave. As you knew
the operation of integrator, the output of the integrator is a triangle wave we feed square wave
input.
DESIGN for Wien Bridge Oscillator:

1. Choose a desired frequency of oscillation, say fo =500 Hz.

2. Choose a value for capacitor C (0.1 μF) and then calculate the value of R by using the
equation for fo (fo = 1/2πRC).
3. Choose a value for R1 (10 KΩ) and calculate the value of Rf from the gain equation (Av =
1+Rf/R1 = 3). (Note: In practical, the value of Rf may need to be varied to be more than the
calculated value.)

CIRCUIT DIAGRAM:

Sine Wave Generator (Wien Bridge Oscillator):

Square Wave Generator (Zero Crossing Detector):

Triangular Wave Generator (Integrator):

APPARATUS USED:

1. Bread Board,
2. CRO Probes,
3. 741 Op-amp,
4. Resistors,
5. Capacitors.

PROCEDURE:

Sine wave Generator:

1. Connect the components/equipment as shown in the circuit diagram.

2. Switch ON the power supply.
3. Connect output to the CRO.
4. Adjust the potentiometer to get an undistorted waveform.
5. Note down the amplitude and the time period, T of the sine wave and calculate the
frequency of oscillation, fo = 1 / T.
6. Verify the practical frequency of oscillation calculated in the preceding step with the
theoretical value, fo =1/2πRC.
7. Plot the waveform.
Square wave Generator:

1. Switch OFF the power supply.

2. Connect the components/equipment as shown in the circuit diagram.
3. Switch ON the power supply.
4. Connect the input to the channel-1 of CRO and output to the channel-2 of CRO.
5. Observe the square wave output at channel-2 and note down the amplitude and time
period, T of the wave form.
6. Verify that the frequency of oscillation of both the input and the output waves is same.
Also verify that both the input and the output waves are in same phase.
7. Plot the output waveform in accordance with the input waveform.

Triangular wave Generator:

1. Switch OFF the power supply.

2. Connect the components/equipment as shown in the circuit diagram.
3. Switch ON the power supply.
4. Connect the input to the channel-1 of CRO and output to the channel-2 of CRO.
5. Observe the triangular wave output at channel-2 and note down the amplitude and time
period, T of the wave form.
6. Verify that the frequency of oscillation of both the input and the output waves is same.
Also verify that the output wave is inverted i.e. 180o phase shift from the input wave.
7. Plot the output waveform in accordance with the input waveform.

OBSERVE DATA :

THEORETICAL Frequency of Oscillation

fo =1/2πRC =
PRACTICAL Frequency of Oscillation
fo = 1/T =

GRAPHS:
REMARKS: Design of a Function Generator which generates Sine, Square and Triangular
waveforms using IC741 and it‟s various output waveforms have verified
successfully.
EXPERIMENT NAME-STUDY OF DAC

OBJECTIVE:

1. To construct a 4-bit R – 2 R ladder type D/A converter.

2. Plot the transfer characteristics, that is, binary input vs output voltage and
3. calculate the resolution and linearity of the converter from the graph.

THEORY:
Most of the real world physical quantities such as voltage current temperature
pressureare available in analog form. It is very difficult to process the signal in analog form,
hence ADC and DAC are used. The DAC is to convert digital signal into analog and
hence the functioning of DAC is exactly opposite to that of ADC. The DAC is usually
operated at the same frequency as the ADC. The output of the DAC is commonly
staircase. This staircase like digital output is passed through a smoothing filter to reduce
the effect of quantization noise. There are three types of DAC techniques (i) Weighted
resistor DAC (ii) R-2R ladder. (iii) Inverted R-2R ladder. Wide range of resistors is
required in binary weighted resistor type DAC. This can be avoided by using R-2R ladder
type DAC where only two values of resistors are required it is well suited for integrated
circuit realization.
A digital to analog converter (DAC) converts a digital signal to an analog voltage or current
output.

 Many types of DACs available.

 Usually switches, resistors, and op-amps used to implement conversion

 Two Types:

 Binary Weighted Resistor

 R-2R Ladder
Binary Weighted Resistor:

 Utilizes a summing op-amp circuit

 Weighted resistors are used to distinguish each bit from the most significant to the
least significant

 Transistors are used to switch between Vref and ground (bit high or low)

 Assume Ideal Op-amp

 No current into op-amp

 Virtual ground at inverting input

 Vout= -IRf
Voltages V1 through Vn are either Vref if corresponding bit is high or ground if corresponding
bit is low
V1 is most significant bit
Vn is least significant bit

MSB

LSB

If Rf=R/2,

For example, a 4-Bit converter yields

Where b3 corresponds to Bit-3, b2 to Bit-2, etc.

 Advantages

 Simple Construction/Analysis

 Fast Conversion

 Disadvantages

 Requires large range of resistors (2000:1 for 12-bit DAC) with necessary high
precision for low resistors
  Requires low switch resistances in transistors

 Can be expensive. Therefore, usually limited to 8-bit resolution.

R-2R Ladder:

Each bit corresponds to a switch:

If the bit is high, the corresponding switch is connected to the inverting input of the op-amp.
If the bit is low, the corresponding switch is connected to ground.
Specifications of DACs:
• Resolution: Smallest analog increment corresponding to 1 LSB change.

An N-bit resolution can resolve 2N distinct analog levels.

Common DAC has a 8-16 bit resolution -

• Speed: Rate of conversion of a single digital input to its analog equivalent.

Conversion rate depends on clock speed of input signal, settling time of converter.
When the input changes rapidly, the DAC conversion speed must be high.

• Linearity: The difference between the desired analog output and the actual output over
the full range of expected values . Ideally, a DAC should produce a linear relationship
between the digital input and analog output
 • Settling Time: Time required for the output signal to settle within +/- ½ LSB of its
final value after a given change in input scale.

Limited by slew rate of output amplifier.

Ideally, an instantaneous change in analog voltage would occur when a new binary
word enters into DAC .

• Reference Voltages : Used to determine how each digital input will be assigned to
each voltage division.

Types:Non-multiplier DAC: Vref is fixed, Multiplier DAC: Vref provided by external

source.

• Errors : Types of Errors Associated with DACs –Gain,Offset,Full

Scale,Resolution,Non-Linearity,Non-Monotonic,Settling Time and Overshoot.

CIRCUIT DIAGRAM:-

Or
APPARATUS USED:

1. OPAMP 741 - 1pc

2. RESISTOR - 10KOhm - 4pcs
3. RESISTOR - 22KOhm – 6pcs
4. SEMICNDUCTOR
5. TRAINER KIT - 1pc

PROCEDURE:

1. Set up the circuit shown in Fig.

2. With all inputs (d0 to d3) shorted to ground, adjust the 20 kΩ pot until the output is
0V. This will nullify any offset voltage at the input of the op-amp.

3 .Measure the output voltage for all binary input states (0000 to 1111) and plot a
Graph of binary inputs vs output voltage.

4. .Measure the size of each step and hence calculate resolution

5. Calculate linearity.
CALCULATIONS:

VO = Vref [D3/R3+D2/R2+D1/R1+D0/R0]
For data bit 0001
Vo=0.9v
And for 0010
Vo=1.87v
Resolution (in volts) = VFS / (2n –1) = 1 LSB increment.
=14/8-1=2

GRAPH:

RESULT:-

The obtained output voltage of DAC =__________V

The 4 bit DAC is constructed Vo is calculated for different data bits and Vo is verified
practically both values are found to be equal.
REMARKS: Different sections of DAC have studied successfully

Experiment Name : Characteristics of Zener Diode as voltage regulator & calculate

load regulation.

AIM: To observe and draw the regulator characteristics of a zener diode at supply and load
side.
COMPONENTS:
PROCEDURE:
SUPPLY SIDE:
1. Connections are made as per the circuit diagram.
2. The Regulated power supply voltage is increased in steps.
3. For different input voltages (Vi) corresponding output voltages (Vo) are observed and
then noted in the tabular form.
4. A graph is plotted between input voltage (Vi) and the output voltage (Vo).
LOAD SIDE:
1. Connection are made as per the circuit diagram
2. The load is placed in full load condition and the output voltage (Vo), load current (IL)
are measured.
3. The above step is repeated by decreasing the value of the load in steps.
4. All the readings are tabulated and a graph is plotted between load current (IL) and
theoutput voltage (Vo).
OBSERVATIONS:-
SUPPLY SIDE:-

LOAD SIDE:-

MODEL GRAPH:
 SUPPLY SIDE:

LOAD SIDE:

12-0-12
1N4007
1
-p
+
C
A 0K
ut
Vrms

RESULT: Regulator characteristics of zener diode are obtained and graphs are plotted for
load and supply side.