[Lecture Seven] [PSK & QAM]

Lecture Seven
Phase Shift Keying (PSK) & Quadrature Amplitude
Modulation (QAM)

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1. Phase Shift Keying (PSK)

In PSK, the phase of the carrier represents a binary 1 or 0. In BPSK, two phases are used
to represent 1 and 0. Mathematically, a PSK signal is represented by:

VPSK(t) = A sin (2ðfC t+ñ1) for binary 0

= A sin (2ðfC t+ñ2) for binary 1

One simple method is to makeñ1=180 and ñ2=0.

The phase of a constant amplitude carrier signal moves between zero and 180 degrees.
On an I and Q diagram, the I state has two different values. There are two possible
locations in the state diagram, so a binary one or zero can be sent. The symbol rate is
one bit per symbol.

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Figure: Phase Shift Keying (PSK)& Quadrature Phase Shift Keying (QPSK)

A more common type of phase modulation is Quadrature Phase Shift Keying (QPSK). It
is used extensively in applications including CDMA (Code Division Multiple Access)
cellular service, wireless local loop, Iridium (a voice/data satellite system) and DVB-S
(Digital Video Broadcasting 4 Satellite). Quadrature means that the signal shifts
between phase states which are separated by 90 degrees. The signal shifts in increments
of 90 degrees from 45 to 135, 345, or 3135 degrees. These points are chosen as they can
be easily implemented using an I/Q modulator. Only two I values and two Q values are

needed and this gives two bits per symbol. There are four states because 22=4.

1.1 BPSK Modulator:

The following figure shows the schematic diagram of a balanced ring modulator. For the
balanced modulator to operate properly, the digital input voltage must be greater than the
peak carrier voltage. This ensures that the digital input controls the on/off state of the
diodes. If the binary input is a logic 1 (positive voltage), diodes D1 and D2 are forward
biased and <on,= while diodes D3 and D4 are reverse biased and across transformer T2 in
phase with the carrier voltage across T1. Consequently, the output signal is in phase with
the reference oscillator.

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If the binary input is a logic 0 (negative voltage), diodes D1 and D2 are reverse biased
and <off,= while diodes D3 and D4 are forward biased and <on= (Figure c). As a result,
the carrier voltage is developed across transformer T2 180°out of phase with the carrier
voltage across T1. Consequently, the output signal is 180° out of phase with the reference
oscillator.

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D1&D2 ON
0
0
D3&D4 OFF

0 D1&D2 OFF 180

D3&D4 ON

Truth table for the BPSK transmitter:

Binary Input Output Phase Output Signal
0 180 sin (Ct + ð)= -sin Ct
1 0 sin (Ct + 0)= sin Ct

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Phasor Diagram:

coswCt (+90)

-sinwCt (180) sinwCt (0)

Logic 0 Logic 1

-coswCt (-90)

Constellation Diagram:

Bandwidth of a BPSK Signal:

BW = (fc+fm)- (fc-fm) =2 fm = Data Rate=fb

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Example (1):
For a BPSK modulator with a carrier frequency of 70 MHz and an input bit rate of
10Mbps, determine the maximum and minimum upper and lower side frequencies draw
the output spectrum, determine the minimum Nyquist bandwidth, and calculated the
baud.

Solution:
Using the PSK modulator in the previous figure, the output is:
Sin C t Sin m t =0.5 Sin(C- m) t -0.5 Sin(C+ m) t
= 0.5sin 2ð( 70-5)Mt - 0.5sin 2ð( 70+5)Mt
=0.5 sin 2ð 65106t – 0.5 sin 2ð 75106t

Maximum upper side frequency (USF)= 75 MHz

Minimum lower side frequency (LSF) = 65 MHz
Output spectrum = 75-65 = 10 MHz
Baud rate = bit rate = 10 Mbps

65MHz 70MHz 75MHz

BW=10MHz

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1.2 BPSK Demodulator:

For a BPSK signal of binary 819 (+sin wC t) then the output of the balanced modulator is:
1
(+sin wC t)(sin wC t) = sin2 wC t = (1- cos 2wC t)
2
1
And after filtering the output is: which corresponds to logic 819.
2
It can be seen that the output of the balanced modulator contains a positive DC voltage
(V) and a cosine wave at twice the carrier frequency (2wC). The LPF has a cutoff
frequency much lower than 2wC and thus blocks the second harmonic of the carrier and
passes only the positive dc component. A positive dc voltage represents a demodulated
logic 1.

For a BPSK input signal of 3sinwCt (logic 0), the output of the balanced modulator is
1
Output = - (sinwCt) (sinwCt) = -sin2wCt = - (1- cos wC t)
2
1
And after filtering the output is: - volt (DC) which corresponds to logic 809.
2

1
The output of the balanced modulator contains a negative dc voltage (- V) and a cosine
2
wave at twice the carrier frequency (2wC). Again, the LPF blocks the second harmonic of
the carrier and passes only the negative DC component. A negative DC voltage
represents a demodulated logic 0

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2. Quadrature Amplitude Modulation (QAM)

Another member of the digital modulation family is Quadrature Amplitude Modulation
(QAM). It combines features of PSK and ASK, uses both I and Q components, and is
bandwidth very efficient. QAM is used in applications including microwave digital radio,
DVB-C (Digital Video Broadcasting4Cable), and modems.

3. Signal Constellation Diagram (State Diagram)

It is also called a signal state-space diagram. Constellation Diagram is used to represents
possible symbols that may be selected by a given modulation scheme as points in 2-D
plane. A constellation Diagram helps in defining the amplitude and phase of a signal
element, when we are using two carriers (one in-phase and one quadrature). The diagram
has two axes. The horizontal x-axes is related to the in-phase carrier; the vertical Y axis is
related to the quadrature carrier. The signal element is represented as a dot. For each
point in the diagram 4 pieces of information can be concluded:

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1. The Peak amplitude of the in-phase component, which is the projection of the
point on the x-axis.
2. The Peak amplitude of the quadrature component which is the projection of the
point on the Y-axis.
3. The peak amplitude of the signal element, which is the length of the vector that
connects the point to the origin.
4. The phase of the signal element, which is the angle the line makes with the X-
axis.

4. M-ary Modulation Schemes

In general, multi-level (M-ary) digital communication is used to design a communication
system that is more bandwidth efficient. With M-ary signaling, digital inputs with more
than two modulation levels are allowed on the transmitter9s input. The data is transmitted

in the form of symbols, each symbol is represented by k bits, so there are M = 2k

different signal levels in M-ary modulation. There are many different M-ary modulation
techniques, some of these techniques modulate one carrier parameter, like: Amplitude, or
Phase, or Frequency. It is used to increase the bandwidth efficiency but requires higher
transmission power to keep the same bit error rate (BER).

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4.1 Quaternary Phase Shift Keying (QPSK)

It is also called Quadrate Phase Shift Keying or 4-ary PSK. This type takes the bits in
pairs and therefore it uses 4 output phase shift angles.

4.1.1 QPSK Transmitter:

I: In-phase Channel Q: Quadphase Channel

The input sequence is applied to the input of a serial to parallel converter. The in-phase
bit is multiplied by a carrier (sin wCt) and the Quadphase bit is multiplied by a carrier
(cos wCt). Then the final output is the sum of the outputs of the balanced modulator.

4.1.2 Truth Table

To construct the truth table, For a binary data input of Q=0 and I=0, the two inputs to the
I balanced modulator are 31 and sinwct, and the two inputs to the Q balanced modulator
are 31 and coswct. Consequently, the outputs are

I balanced modulator = (-1) (sinwCt) = -1sinwCt

Q Balanced modulator = (-1) (coswCt) = -1coswCt

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And the output of the linear summer is

-1coswCt 31sinwCt = 1.414sin (wCt - 135o)

For the remaining digit codes (01, 10, and 11), the procedure is the same.

I Q QPSK output Waveform

0 0 - sin Ct – cos Ct Sin(Ct-135)

0 1 - sin Ct + cos Ct Sin(Ct+135)

1 0 + sin Ct – cos Ct Sin(Ct-45)

1 1 + sin Ct + cos Ct Sin(Ct+45)

4.1.3 Bandwidth Considerations of QPSK:

ÿĀ ÿĀ ÿĀ ýÿ�㖕ÿ �㖓ÿ�㖕þ
BW = (fc+ )- (fc- ) =2 =
�㗒 �㗒 �㗒 �㗐

4.1.4 Phasor (vector) Diagram:

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4.1.5 QPSK Constellation Diagram:

4.1.6 QPSK Receiver

I Product LPF
Detector

Input Power

QPSK Splitter
signal Carrier sinCt Binary
BPF I Q I Q
Recovery output

+90

Product
Q LPF
Detector

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If we apply a signal (-sinCt + cosCt) to the input of the QPSK demodulator, then,

I = (-sinCt + cosCt) ( sinCt)

= (-sinCt) ( sinCt) + ( cosCt) ( sinCt) = -sin2Ct+ ( cosCt) ( sinCt)
1 1 1
=- (1- cos2Ct) + sin(C+C)t + sin(C-C)t
2 2 2
1 1 1 1
=- + cos2Ct + sin2Ct + sin0
2 2 2 2
1
After filtering =- V (logic 0)
2

Q = (-sinCt + cosCt) (cosCt)

1 1 1
= cos2Ct+ (-sinCt) (cosCt) = (1+ cos2Ct) - sin(C+C)t - sin(C-C)t
2 2 2
1 1 1 1
= + cos2Ct - sin2Ct - sin0
2 2 2 2
1
After filtering = V (logic 1)
2

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