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287 views47 pages

Chapter 4 Slides

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Afwan Ariffin
Copyright
© © All Rights Reserved
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Chapter 4:

Structure of Discrete Time Systems


 REPRESENTATION OF LCCDE
 BASIC NETWORK STRUCTURES FOR FIR SYSTEMS
 Direct Form
 Cascade Form
 BASIC NETWORK STRUCTURES FOR IIR SYSTEMS
 Direct Form
 Cascade Form
 Parallel Form
 FINITE WORD LENGTH EFFECTS

1
Introduction
 Once the specifications of the digital filter are given, a suitable
impulse response/transfer function is obtained using one of the
many approximation methods (e.g., window method).
 Then the next step is to find a suitable filter structure to realize
the impulse response/transfer function.
 Realization can be done efficiently in the z-domain by
converting a given transfer function, H(z), into a suitable filter
structure.
 Block diagrams are often used to depict filter structures and
they show the computational procedure for implementing the
digital filter.

2
 The filter structures differ quite significantly with respect to
complexity, number of elements, and other properties.
 The choice of filter structures depends largely on
 Whether it is FIR or IIR
 The implementation complexity: This refers to the number
of arithmetic operations (multiplications and additions)
required to compute system output, and the memory
requirements required to store the system parameters, past
inputs, past outputs, and any intermediate computed values.
 Sensitivity to coefficient quantization errors: In digital
systems, the parameters of the system must be represented in
finite length, i.e. finite precision. The output of the digital
system must be round-off or truncated to fit within the limited
precision constraints of the hardware used. This limited
precision will degrade the performance if the system is not
designed properly.
3
Representation of LCCDE
 For the LCCDE of the form:
p q
 ak y[n − k ] =  bk x[n − k ]
k =0 k =0

 Applying the z-transform to both sides of the above equation and


using the linearity property and time-shifting property,
p q
 k Y (z ) =
a z −k
 k X ( z)
b z −k

k =0 k =0

 Therefore we have Or in factored form


q q

Y (z )
k
b z −k
∏ (1 − β k z −1
)
k =0 k =1
H ( z) = = p
H ( z) = C p
X ( z)
k
a z −k
∏ (1 − α k z −1
) 4
k =0 k =1
Example 1
Find the LCCDE describing the following LTI system:

1+
=
1 3
1− 1+
2 4

 To find the LCCDE, we express H(z) as the ratio of


polynomials
1 + 2 z −1 + z −2 Y ( z)
H (z ) = =
1 3
1 + z −1 − z − 2 X ( z )
4 8
 Thus the LCCDE is
1 3
y[n] + y[n − 1] − y[n − 2] = x[n] + 2 x[n − 1] + x[n − 2]
4 8
5
Block Diagram Representation
 For implementation purposes, the LCCDEs are usually
represented by structures consisting of an interconnection of
multipliers, adders, and delay elements.

Multiplier Adder

x(n) k kx(n) x(n) +


y(n)=x(n)+w(n)

w(n)
Unit Delay

x(n) x(n-1)
zZ-1
-1

6
Example 2

Consider the first order difference equation:


y ( n ) = a1 y ( n − 1) + b0 x ( n )
b0
The corresponding system function is H ( z ) =
1 − a1z −1
The system can be represented using the block diagram below:
b0
x(n) + y(n)

Z-1

a1

7
Example 3

Find the system function for the following block diagram:


b
x[n] b y[n]
Writing the equation:
z-1
-a 1
y[n ] = bx[n ] − a1 y[n − 1] + a2 y[n − 2] y[n-1]

y[n ] + a1 y[n − 1] − a2 y[n − 2] = bx[n ] z-1


a2
y[n-2]
Then, the corresponding system function:

b
H ( z) =
1 + a1z −1 − a2 z − 2
8
Canonic and Non-Canonic Structures
• A digital filter is canonic if the number of delays in the block
diagram representation is equal to the order of the difference
equation.
• Otherwise it is referred as non-canonic structure.
p0
x[n] + + y[n]

z-1 z-1
p1 -d1

First order LTI digital filter

y[n] = − d1 y[ n − 1] + p0 x[ n] + p1 x[n − 1]

• The above structure is a non-canonic realization since it employs


two delays to realize the first order difference equation.
9
Equivalent Structures
• Two digital filters are equivalent if they have the same transfer
function. Given a filter realization, an equivalent structure can be
determined via the transpose operation :
(1) Reverse all paths.
(2) Replace pick-off nodes by adders, and vice versa, and
(3) Interchange the input and output nodes.
x[n-1] x[n-2] x[n-3] x[n-4]
x[n] z-1 z-1 z-1 z-1

h[0] h[1] h[2] h[3] h[4] transpose


+ + + + y[n]

z-1 + z-1 + z-1 + z-1 + y[n]

h[4] h[3] h[2] h[1] h[0]

x[n]
10
Basic Network Structures for FIR Systems
Direct Form

 A causal FIR filter of order N is characterized by transfer function


N
H (z ) =  h [k ]z −k

k =0

 In the time domain


N N
y[n] =  bk x[n − k ] y[n ] =  h[k ]x[n − k ]
k =0 k =0

 Since FIR filters can be designed to provide exact linear phase over
the whole frequency range and are always BIBO stable, they are
often preferred in many applications. However the complexity is
higher (more computations).
11
 An FIR filter of order N is characterized by N +1 coefficients
(number of taps = N+1) and in general, requires N +1 multipliers
and N two-input adders.
 Structures in which the multiplier coefficients are the coefficients
of the transfer function are called direct form structures.
N
y[n ] =  h[k ]x[n − k ]
k =0

x[n-1] x[n-2] x[n-3] x[n-4] Direct form


x[n] z-1 z-1 z-1 z-1 implementation
of FIR filter of
h[0] h[1] h[2] h[3] h[4] order N = 4.

+ + + + y[n]

• This filter is called tapped delay line.


12
Cascade Form
The cascade form for FIR systems is obtained by factoring the
polynomial system function into first order or second order
subsections, such that:
M MS
H ( z) =  h[ n ] z −n
= ∏ 0k 1k
( b + b z −1
+ b2k z −2
)
n =0 k =1
where M s = ( M + 1) / 2 is the smallest integer contained in (M+1)/2.
x(n) b01 b02 b0Ms y(n)
+ + +
Z-1 Z-1 Z-1
b11 b12 b1Ms
+ + +
Z-1 Z-1 Z-1
b21 b22 b2Ms

Cascade form realization of an FIR filter.


13
Example 4

Obtain the cascade form realization of the following 4th order


transfer function. Implement the 4th order FIR filter as a
cascade of 2nd order systems.

H(z) = 1 + z-1 + z-2 + 0.375z-3 + 0.125z-4

H(z) = (1+0.5z-1 + 0.5z-2) (1+0.5z-1 + 0.25z-2)

x(n) b101 1b
02 y[n] b0Ms y(n)
+ + +
Z-1 Z-1 Z-1
b0.5
11 b0.5
12 b1Ms
Cascade form realization of
+ + an FIR filter. +
Z-1 Z-1 0.25 Z-1
b0.5
21 b22 b2Ms
14
Basic Network Structures for IIR Systems
 An infinite impulse response system (IIR) can be represented by
several equivalent network structures.
 Structures with less multiplication (less computation time) and
delay branches (less memory required) are usually preferable.
 In the realization of IIR filters, three structures commonly used
are the direct forms, cascade and parallel forms.
 The direct form is simply a straightforward representation of
the IIR transfer function.
 In cascade form, the transfer function of the IIR filter is
factored and expressed as the product of second order sections.
 In the parallel form, H(z) is expanded, using partial fractions as
a sum of second order sections.

15
Direct Form I
 IIR filter structures in which the multiplier coefficients are
precisely the coefficients of the transfer function are called
direct form structures.
 Consider a third order IIR filter with transfer function

P (z ) p0 + p1z −1 + p2 z −2 + p3 z −3
H (z ) = =
D (z ) 1 + d1z −1 + d 2 z − 2 + d 3 z − 3

which we can implement as a cascade of two filter sections where


W (z )
H1 (z ) = = P (z ) = p0 + p1z −1 + p2 z − 2 + p3 z − 3
X (z )
Y (z ) 1 1
H 2 (z ) = = =
W (z ) D (z ) 1 + d1z −1 + d 2 z − 2 + d 3 z − 3
16
W(z)
X(z) Y(z)
H1(z) H2(z)

 From the filter section H1(z):


W (z )
H1 ( z ) = = P( z ) = p0 + p1 z −1 + p2 z − 2 + p3 z −3
X (z )
we have w[n ] = p0 x[n ] + p1 x[n − 1] + p2 x[n − 2] + p3 x[n − 3]
 It can be realized as an FIR filter in Figure (a) below.
p0
x[n] + w[n]

z-1 p1
(a) +
z-1 p2
+
z-1
p3
17
• We next consider the realization of H2(z)
Y (z ) 1 1
H 2 (z ) = = =
W ( z ) D( z ) 1 + d1 z −1 + d 2 z − 2 + d 3 z −3
whose time-domain representation is given by:
y[n] = w[n] − d1 y[n − 1] − d 2 y[n − 2] − d 3 y[n − 3]
resulting in the realization in Figure (b) below:

w[n] + y[n]

-d1 z-1
+ y[n-1]
(b) z-1
-d2
+ y[n-2]
z-1
-d3
y[n-3]
18
p0
x[n] + + y[n]

z-1 p1 -d1 z-1


+ + y[n-1]

z-1 p2 -d2 z-1


+ + y[n-2]
z-1 z-1
p3 -d3
y[n-3]

Direct form I

• Note that the overall realization is non-canonic since it employs six


delays to implement a 3rd order transfer function.

19
IIR Direct Form II

x[n] + + y[n]
p0

-d1 z-1 z-1 p1


+ 1 1’ +
-d2 z-1 z-1 p2
+ 2 2’ +
z-1 z-1
-d3 p3
3 3’

H2(z)
H1(z)

Common delays can be shared!


20
x[n] + + y[n]
p0

-d1 z-1 p1
+ +
Direct Form II
-d2 z-1 p2
+ + (canonic) : obtained
by sharing the delays
z-1
-d3 p3

 It is seen that in the Direct Form I structure, (p+q) memory


elements are required to store past history of the non-recursive
and recursive sections, but only p (assuming p > q or
whichever is larger) memory elements are actually required in
Direct Form II.
21
Example 5

Determine and sketch the direct Form I and II realizations for


the third order transfer function

0.28 z 2 + 0.319 z + 0.04


H ( z) =
0.5 z 3 + 0.3 z 2 + 0.17 z − 0.2

Compare the number of delays, multipliers and adders for these


realizations.

22
0.56 z −1 + 0.638 z −2 + 0.08 z −3
H ( z) =
1 + 0.6 z −1 + 0.34 z − 2 − 0.4 z −3

x[n] + y[n]

z-1 0.56 -0.6 z-1


+ + y[n-1] Direct Form I
z-1 0.638 -0.34 z-1
+ + y[n-2] Delays: 6
z-1 z-1 Multipliers: 6
0.08 0.4
y[n-3]
Adders: 5

23
0.56 z −1 + 0.638 z −2 + 0.08 z −3
H ( z) =
1 + 0.6 z −1 + 0.34 z − 2 − 0.4 z −3

x[n] + y[n]

-0.6 z-1 0.56


+ + Direct Form II

-0.34 z-1 0.638


+ + Delays: 3
Multipliers: 6
z-1
0.4 0.08 Adders: 5

24
Cascade Structures
 A problem of the direct form realization is that it is very
sensitive to finite wordlength effects when the filter order is
high, for example p > 3.
 Thus in practice, a higher order H(z) is normally broken down
into smaller sections, typically second and/or first order blocks,
which are then connected up in cascade or in parallel.
 Take H(z) = P(z)/D(z) for example :

P1 (z )P2 (z )P3 (z )
H (z ) =
D1 (z )D2 (z )D3 (z )

 Obviously, various different cascade realizations of H(z) can be


obtained by different pole-zero polynomial pairings.

25
P1(z) P2(z) P3(z) P1(z) P2(z) P3(z)
D1(z) D2(z) D3(z) D2(z) D3(z) D1(z)

P1(z) P2(z) P3(z) P1(z) P2(z) P3(z)


D3(z) D1(z) D2(z) D2(z) D1(z) D3(z)

P1(z) P2(z) P3(z) P1(z) P2(z) P3(z)


D1(z) D3(z) D2(z) D3(z) D2(z) D1(z)

P1(z) P2(z) P3(z) P1(z) P3(z) P2(z)


D1(z) D2(z) D3(z) D1(z) D3(z) D2(z)

P2(z) P1(z) P3(z) P2(z) P3(z) P1(z)


D2(z) D1(z) D3(z) D2(z) D3(z) D1(z)

P3(z) P1(z) P2(z) P3(z) P2(z) P1(z)

D3(z) D1(z) D2(z) D3(z) D2(z) D1(z)

26
 There are all together 36 cascade realizations for the factored
form indicated by the above equation based on pole-zero pairing
and ordering.
 In practice, due to finite word length effects, each realization
behaves differently from the others.
 We can implement a cascade structure with a minimum number
of multiplications and a minimum number of delay elements if
we use the direct form II (canonic) for each second order section.
In this case, H(z) is expressed as

M  b0 k + b1k z −1 + b2 k z −2 
H (z ) = ∏  
 −1 −2 
k =1  1 + a1k z + a 2 k z 

 In the above, for a first order factor, a2k = b2k = 0.


27
Note that it is possible to scale the numerator so that b0k = 1 by
taking out a constant multiplier. Whether this is worth doing so
depends on whether it can lead to a reduction in the number of
multipliers.

M  b0 k + b1k z −1 + b2 k z −2 
H ( z ) = p0 ∏  
 −1 −2 
k =1  1 + a1k z + a 2 k z 

p0
+ + + +

-1 -1
Z Z

-a11 b11 -a1M b1M


+ + + +

-a21 b21 -a2M b2M


-1 -1
Z Z

28
 A possible realization of a third order transfer function

 1 + b11z −1  1 + b12 z −1 + b22 z −2 


H (z ) = p0  
−1  −1

−2 
 1 + a11 z  1 + a12 z + a 22 z 
is shown below.

p0
x[n] + + + + y[n]

z-1 z-1
-a11 b11
+ -a12 b12
+
z-1
-a22 b22

29
Parallel Structures
 An IIR filter can be realized in parallel form

where H1(z) to Hk(z) are chosen as first or second order section

y(n)

30
 An IIR filter can be realized in parallel form by making use of
partial-fraction expansion of the transfer function.

 γ + γ z −1 
H (z ) = γ 0 +   0 k
−1
1k 
−2 
k  1 + α 1k z + α 2k z 
γ0
x[n] γ 01 y[n]
γ 01 + +
H (z ) = γ 0 + -α11 z-1
1 + α11 z −1 γ 02
−1 + +
γ 02 + γ 12 z -α12 γ 12
+ −1 −2 + z-1
1 + α12 z + α 22 z
-α22
z-1
31
Example 6

Given transfer function

0.44 z 2 + 0.362 z + 0.02 0.44 z −1 + 0.362 z − 2 + 0.02 z −3


H (z ) = 3 =
z + 0.4 z + 0.18 z − 0.2 1 + 0.4 z −1 + 0.18 z − 2 − 0.2 z −3
2

obtain the direct form II, cascade form and parallel form
realizations. Compare the number of delays, multipliers and adders
for these realizations.

32
Direct Form II
0.44 z −1 + 0.362 z −2 + 0.02 z −3
H (z ) =
1 + 0.4 z −1 + 0.18 z − 2 − 0.2 z −3 Delays: 3
Multipliers: 6
x[n]
+ Adders: 5

-0.4 z-1 0.44

y[n]
+ +

-0.18 z-1 0.362

+ +

0.2 z-1 0.02

33
Cascade
 z −1  0.44 + 0.362 z −1 + 0.02 z 
−2

H ( z ) =   
−1  −1 −2 
 1 − 0. 4 z  1 + 0. 8 z + 0. 5 z  Delays: 3
Multipliers: 6
Adders: 5
0.44
x[n] y[n]

0.4 -0.8 0.362

-0.5 0.02

34
For parallel form
- 0.1
)
− 0.2 z − 3 + 0.18 z − 2 + 0.4 z −1 + 1 0.02 z − 3 + 0.362 z − 2 + 0.44 z −1
- (0.02 z − 3 − 0.018 z − 2 − 0.04 z −1 − 0.1
0.38 z − 2 + 0.48 z −1 + 0.1

0.44z−1 + 0.362z−2 + 0.02z−3


H (z ) =
1 + 0.4z−1 + 0.18z−2 − 0.2z−3
0.1 + 0.48z−1 + 0.38z−2
= −0.1 +
1 + 0.4z−1 + 0.18z−2 − 0.2z−3
A B + Cz−1
= −0.1 + −1
+
1 − 0.4z 1 + 0.8z−1 + 0.5z−2
35
A B + Cz−1
H (z) = −0.1 + −1
+
1 − 0.4z 1 + 0.8z−1 + 0.5z−2
0.1 + 0.48z−1 + 0.38z−2
A= = 0.6
1 + 0.8z−1 + 0.5z−2 z =0.4

Comparison of coefficients:

0.6(1 + 0.8z −1 + 0.5z −2 ) + B(1 − 0.4 z −1 ) + Cz −1(1 − 0.4 z −1 )


= 0.1 + 0.48z −1 + 0.38z − 2

z0: 0.6 + B = 0.1 B = -0.5


z-2: 0.3 – 0.4C = 0.38 C = -0.2

36
0.6 − 0.5 − 0.2 z −1
H (z ) = −0.1 + −1
+
1 − 0.4 z 1 + 0.8 z −1 + 0.5 z − 2

Parallel

Delays: 3
Multipliers: 7
Adders: 6

37
Finite Word Length Effects
 DSP algorithms are frequently simulated using computer
software that uses floating point numbers with very high
precision, e.g., 64 bits.
 However, most DSP processors can only store data using finite
word length, e.g., 16 bits.
 In practice, numbers (signals, coefficients) can be represented
only to a finite precision and arithmetic operations are subject to
errors.
 Quantization is used to approximate a large set of discrete values
with a smaller set of discrete values.
 These contribute to finite word length effects
- quantization of filter coefficients
- quantization and overflow in arithmetic operations

38
Quantization of Filter Coefficients

 The filter coefficients are quantized to accommodate the finite


word length of the DSP processor.

 This will affect the filter performance


- the frequency response may change
- The locations of the zeros and poles may change
- For IIR systems, the filter will become unstable if at least one
pole falls outside the unit circle

39
Example 7

Given transfer function


1
H (z ) =
(1 − 0.25z −1 )(1 − 0.55z −1 + 0.07 z − 2 )

find the poles.


How will the direct form I, direct form II, cascade form and
parallel form affect the pole values, assuming that all filter
coefficients are quantized to 2 decimal places?
Note: In DSP systems, quantization is done in binary and not decimal
representations. This example uses decimal representation only to
illustrate the concept because it is more easily understood in this form.

40
Poles: 0.2, 0.25, 0.35
For direct form I and direct form II,

1
H (z ) =
1 − 0.8z −1 + 0.2075z − 2 − 0.0175z −3

After quantization,

1
H (z ) =
1 − 0.8z −1 + 0.21z − 2 − 0.02 z −3

Poles: 0.2 ± 0.1j, 0.4


All three pole locations are changed.

41
Cascade form

1 1 No changes to
H (z ) = −1
× −1 −2
(1 − 0.25z ) (1 − 0.55z + 0.07 z ) poles

1 1
H (z ) = −1
× −1 −2
(1 − 0.2 z ) (1 − 0.6 z + 0.0875z ) Two poles
will change
quantize to 0.09

1 1
H (z ) = × No changes to
(1 − 0.35z ) (1 − 0.45z −1 + 0.05z − 2 )
−1
poles
No changes to the original pole locations provided the poles at 0.25
and 0.35 are kept separate. 42
Parallel form

A B + Cz −1
H (z ) = + No changes to
(1 − 0.25z −1 ) (1 − 0.55z −1 + 0.07 z − 2 ) poles

A B + Cz −1
H (z ) = +
(1 − 0.2 z ) (1 − 0.6 z −1 + 0.0875z − 2 ) Two poles
−1
will change
quantize to 0.09

A B + Cz −1
H (z ) = −1
+ −1 −2
No changes to
(1 − 0.35z ) (1 − 0.45z + 0.05z ) poles
No changes to the original pole locations provided the poles at 0.25
and 0.35 are kept separate. 43
Quantization and Overflow in Arithmetic Operations

 Arithmetic operations such as additions and multiplications can


cause overflow due to insufficient number of bits to store the
computation result.

 Addition: When two n-bit numbers are added, the result could
possibly have (n+1) bits.

 Multiplication: When two n-bit numbers are multiplied, the


result could possibly have 2n bits.

44
Example 8

Supp exam 2019-20

45
(i)

46
(ii)

(iii)

47

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