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07 Listoffigures

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yahyaebrahim.no3
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7 views3 pages

07 Listoffigures

Uploaded by

yahyaebrahim.no3
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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LIST OF FIGURES

FIGURE NO. TITLE PAGE NO.

1.1 Block Diagram of filter 1


1.2 Basic block diagram of analog to digital filter
Converter 2
1.3 Block Diagram of Digital Filter 11
1.4 FPGA Architecture 13
1.5 Direct Form FIR Filter 16
1.6 Quartus II Design Flow 20
3.1 Five point MA filter in discrete time 62
3.2 Basic Integrator 64
3.3 Basic Comb Integrator 65
3.4 CIC Decimation Filter 65
3.5 CIC Interpolator Filter 66
3.6 First order IIR filter 73
3.7 Response of an IIR filter using MATLAB 74
3.8 Functional verification result of an IIR filter
using VHDL. 74
3.9 Timing verification result of an IIR filter
using VHDL 74
3.10 First order IIR filter using Look
Ahead arithmetic 76
3.11 Direct Form-I second–order IIR filter 79
3.12 IIR filter implementation using VHDL 80
FIGURE NO. TITLE PAGE NO.

3.13 An 8-tapMA FIR filter using CIC 81


3.14 VHDL code for an 8-tap MA FIR using CIC
and look-ahead 83
3.15 Timing verification of an 8-tap MA FIR filter
using VHDL 84
3.16 Functional verification of an 8-tap MA FIR filter
using VHDL 84
3.17 Functional verification result of a 64-tap moving
average filter using VHDL 84
3.18 Timing verification result of a 64-tap moving
average filter using VHDL. 85
4.1 Direct form I filter 89
4.2 Direct Form II filter 90
4.3 Transposed direct form –I implementation
of a second order IIR filter 91
4.4 Transposed-Direct-Form-II implementation of a
second-order IIR digital filter 91
4.4 Systolic Structures 95
4.6 Systolic form of FIR filter 96
4.7 MATLAB Script of direct, transposed and
Systolic structures 97
4.8 IIR filter implementation of Goertzel algorithm 99
4.9 General module of DTMF detection 101
4.10 DFT computation using Goertzel algorithm 104
4.11 Filter using Direct Method 106
4.12 Filters using Sub filters method 106
FIGURE NO. TITLE PAGE NO.

5.1 Utilization of logic elements for the IIR and


Fast IIR filters 110
5.2 Performance results for IIR and fast IIR filters 110
5.3 Power Dissipation results for the IIR and fast
IIR filters 111
5.4 Utilization of logic elements for the MA FIR
and Fast MA FIR filter 113
5.5 Performance results for the MA FIR and Fast
MA FIR Filter 113
5.6 Power dissipation results for the MA FIR
and fast MA FIR filters 114
5.7 Filtered output using direct, transposed
and systolic Architecture 115
5.8 The difference in output among all the structures 115
5.9 Computational time needed for the low pass filters 116
5.10 Computational time needed for band-pass filters 116
5.11 Top View model of Goertzel filter 117
5.12 Goertzel filter using DSP bulder blocks 118
5.13 SIMULINK model to VHDL code conversion
using signal Complier 118
5.14 FPGA resources utilization report 119
5.15 Noisy input data 120
5.16 Filtered output usng direct and subfilters
approaches 120
5.17 Computational time needed for low pass filters 121
5.18 Computational time needed for band stop filters 121

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