Computer Architecture Revision Questions

Week 1: Introduction to Computer Architecture

Multiple Choice Questions (MCQs)

1. What is the main function of the CPU?

• a) Store data

• b) Process data

• c) Input data

• d) Output data

2. Which of the following is not a type of computer?

• a) Mainframe

• b) Supercomputer

• c) Microcontroller

• d) Microwave

3. The first generation of computers used:

• a) Transistors

• b) Vacuum tubes

• c) Microprocessors

• d) Integrated circuits

4. Which component is known as the brain of the computer?

• a) RAM

• b) CPU

• c) Hard drive

• d) Motherboard
5. What does RAM stand for?

• a) Random Access Memory

• b) Read Access Memory

• c) Readily Available Memory

• d) Randomly Available Memory

6. Which generation of computers used integrated circuits?

• a) First

• b) Second

• c) Third

• d) Fourth

7. Which part of the computer is responsible for arithmetic and logic operations?

• a) ALU

• b) CU

• c) RAM

• d) ROM

8. The main memory of a computer is also known as:

• a) Secondary storage

• b) Auxiliary storage

• c) Primary storage

• d) External storage

9. What is the full form of CPU?

• a) Central Process Unit

• b) Central Processing Unit

 • c) Control Processing Unit

• d) Central Processed Unit

10. What is the purpose of the control unit in a CPU?

• a) To perform calculations

• b) To store data

• c) To direct the operation of the processor

• d) To manage input/output operations

One Answer Questions

1. What is the primary function of the ALU?

2. Define computer architecture.

3. Name two types of computer memory.

4. What is the significance of the motherboard in a computer?

5. Describe the evolution of the computer from the first generation to the fourth
generation.

6. What does ROM stand for?

7. Explain the role of the control unit in the CPU.

8. What is the difference between RAM and ROM?

9. List the primary components of a computer system.

10. What is the main function of the CPU?

Structural Questions

1. Describe the basic organization of a computer system.

2. Explain the differences between first, second, third, and fourth generation
computers.
 3. Illustrate the function of the ALU and control unit within the CPU.

4. Discuss the evolution of computer memory from primary to secondary storage.

5. Outline the key components and their functions in a modern computer

architecture.

Problem Solving Questions

1. Given a brief history of computer architecture, identify and analyze the main
technological advancements that led to the development of modern computers.

2. Explain how the introduction of integrated circuits transformed computer

architecture and performance.

Week 2: Data Representation and Digital Logic

Multiple Choice Questions (MCQs)

1. What is the binary equivalent of the decimal number 10?

• a) 1010

• b) 1001

• c) 1100

• d) 1011

2. Which of the following is a valid hexadecimal number?

• a) 1G

• b) 1A

• c) 1H

• d) 1P

3. What is the decimal equivalent of the binary number 1011?

• a) 9
 • b) 10

• c) 11

• d) 12

4. Boolean algebra is used to:

• a) Perform arithmetic operations

• b) Perform logical operations

• c) Store data

• d) Manage memory

5. Which logic gate outputs true only when both inputs are true?

• a) OR

• b) AND

• c) NOT

• d) XOR

6. What is the binary representation of the hexadecimal number F?

• a) 1111

• b) 1010

• c) 1100

• d) 1001

7. Which of the following is an octal number?

• a) 89

• b) 77

• c) 1A

• d) 1G
 8. What is the hexadecimal equivalent of the binary number 1101?

• a) B

• b) C

• c) D

• d) E

9. In Boolean algebra, the complement of A is represented as:

• a) A'

• b) A+

• c) A*

• d) A/

10. Which gate is known as the universal gate?

• a) AND

• b) OR

• c) NAND

• d) XOR

One Answer Questions

1. What is the base of the binary number system?

2. Define hexadecimal number system.

3. What is the primary use of Boolean algebra in computer science?

4. Name the basic logic gates.

5. Convert the binary number 1101 to decimal.

6. What is the binary representation of the decimal number 5?

7. Explain the function of the NOT gate.

 8. Convert the decimal number 15 to binary.

9. What is the hexadecimal representation of the binary number 1010?

10. How is the OR gate symbolized in Boolean algebra?

Structural Questions

1. Explain the differences between binary, octal, decimal, and hexadecimal number
systems.

2. Describe the process of converting a binary number to its decimal equivalent.

3. Illustrate the truth tables for AND, OR, and NOT gates.

4. Discuss the applications of Boolean algebra in digital logic design.

5. Outline the steps involved in converting a hexadecimal number to binary.

Problem Solving Questions

1. Given a series of binary numbers, convert them to their equivalent decimal, octal,
and hexadecimal representations and explain the process.

2. Design a simple digital circuit using basic logic gates to perform a specific logical
function and explain how it works.

Week 3: Processor Organization and Architecture

Multiple Choice Questions (MCQs)

1. What does the instruction cycle include?

• a) Fetch and Execute

• b) Fetch, Decode, Execute

• c) Fetch, Execute, Writeback

• d) Fetch, Decode, Execute, Writeback

2. The CPU consists of:

 • a) ALU and CU

• b) RAM and ROM

• c) Hard drive and Motherboard

• d) ALU and Memory

3. The data path in a CPU refers to:

• a) The path taken by data to reach the CPU

• b) The path data takes within the CPU

• c) The external data bus

• d) The control unit

4. The control unit is responsible for:

• a) Performing arithmetic operations

• b) Directing operations within the CPU

• c) Storing data

• d) Managing input/output devices

5. What is the primary function of the ALU?

• a) Store data

• b) Execute instructions

• c) Perform arithmetic and logic operations

• d) Control the sequence of operations

6. Which register holds the address of the next instruction to be executed?

• a) MAR

• b) PC

• c) IR
 • d) MDR

7. The term "data path" is associated with:

• a) Memory management

• b) Instruction execution

• c) Data transfer within the CPU

• d) Control unit operations

8. The sequence of operations performed by the CPU to execute an instruction is

called:

• a) Execution cycle

• b) Machine cycle

• c) Instruction cycle

• d) Fetch cycle

9. The ALU stands for:

• a) Arithmetic Logic Unit

• b) Application Logic Unit

• c) Arithmetic Long Unit

• d) Application Long Unit

10. The component that decodes the instruction in the CPU is:

• a) ALU

• b) CU

• c) MAR

• d) MDR

One Answer Questions

 1. What is the role of the instruction register (IR)?

2. Define the program counter (PC).

3. What are the main components of a CPU?

4. Explain the term "instruction cycle."

5. What does the memory address register (MAR) do?

6. Describe the function of the ALU.

7. What is the purpose of the control unit (CU)?

8. What does the memory data register (MDR) hold?

9. Define "data path" in the context of a CPU.

10. What is the first step in the instruction cycle?

Structural Questions

1. Describe the components and functions of the data path in a CPU.

2. Explain the stages of the instruction cycle in detail.

3. Illustrate how the control unit manages the execution of instructions.

4. Discuss the role and importance of registers in the CPU.

5. Outline the differences between the ALU and CU in terms of functionality.

Problem Solving Questions

1. Given a set of instructions, simulate the instruction cycle and describe the role of
each CPU component at each stage.

2. Design a simplified CPU architecture, including the data path, control unit, and
main registers, and explain how it would execute a basic instruction.

Week 4: Instruction Set Architecture (ISA)

Multiple Choice Questions (MCQs)

1. Which of the following is not an addressing mode?

• a) Immediate

• b) Direct

• c) Indirect

• d) Fast

2. An instruction set is:

• a) A set of instructions

• b) A set of registers

• c) A set of memory locations

• d) A set of addressing modes

3. What is the main advantage of RISC architecture?

• a) Complex instructions

• b) Simple instructions

• c) More instructions

• d) Fewer registers

4. The term "opcode" refers to:

• a) Operand code

• b) Operation code

• c) Address code

• d) Data code

5. Which addressing mode uses the value directly specified in the instruction?

• a) Direct

• b) Indirect
 • c) Immediate

• d) Register

6. In assembly language, the MOV instruction is used to:

• a) Perform arithmetic operations

• b) Transfer data

• c) Control flow

• d) Manage memory

7. What does the term "ISA" stand for?

• a) Instruction Set Architecture

• b) Immediate Set Architecture

• c) Instruction Storage Architecture

• d) Indirect Storage Architecture

8. An instruction format includes:

• a) Opcode and operand

• b) Address and data

• c) Data and register

• d) Address and opcode

9. Which of the following is an example of an arithmetic instruction?

• a) ADD

• b) MOV

• c) JMP

• d) CMP

10. In a load/store architecture, which instructions access memory?

 • a) Only load instructions

• b) Only store instructions

• c) Both load and store instructions

• d) Neither load nor store instructions

One Answer Questions

1. Define opcode.

2. What is the purpose of addressing modes?

3. Name two types of instruction set architectures.

4. Explain the term "immediate addressing mode."

5. What is the main difference between RISC and CISC architectures?

6. Define the term "instruction format."

7. What is an operand in the context of an instruction?

8. Explain the function of the JMP instruction.

9. What does a load instruction do?

10. Name one advantage of RISC architecture.

Structural Questions

1. Describe the components of an instruction format and their functions.

2. Explain the different types of addressing modes with examples.

3. Illustrate the differences between RISC and CISC architectures.

4. Discuss the role of the opcode in an instruction.

5. Outline the process of instruction execution from fetch to writeback.

Problem Solving Questions

 1. Given a set of instructions in assembly language, identify the addressing modes
used and explain their purpose.

2. Design a simple instruction set architecture for a hypothetical processor,

including instruction formats, addressing modes, and a sample set of
instructions.

Week 5: Arithmetic and Logic Unit (ALU)

Multiple Choice Questions (MCQs)

1. The ALU performs:

• a) Arithmetic operations only

• b) Logic operations only

• c) Both arithmetic and logic operations

• d) Memory operations

2. Which operation is not performed by the ALU?

• a) Addition

• b) Subtraction

• c) Multiplication

• d) Data storage

3. The result of an ALU operation is stored in the:

• a) Memory

• b) Register

• c) ALU itself

• d) Control unit

4. The carry bit is used in which type of operation?

 • a) Logic operations

• b) Arithmetic operations

• c) Data transfer operations

• d) Control operations

5. Which of the following is a logic operation?

• a) AND

• b) ADD

• c) SUB

• d) MUL

6. What does ALU stand for?

• a) Arithmetic Long Unit

• b) Arithmetic Logic Unit

• c) Arithmetic Large Unit

• d) Arithmetic Linked Unit

7. The ALU is a part of which component in the CPU?

• a) Control unit

• b) Memory

• c) Data path

• d) Register file

8. The function of the status register is to:

• a) Store instructions

• b) Indicate the status of the ALU operations

• c) Control data flow

 • d) Manage memory

9. Which of the following is not a function of the ALU?

• a) Shift operations

• b) Logical NOT

• c) Program execution

• d) Addition and subtraction

10. The ALU operates on:

• a) Instructions

• b) Data

• c) Addresses

• d) Flags

One Answer Questions

1. What is the primary function of the ALU?

2. Define carry bit.

3. Name two arithmetic operations performed by the ALU.

4. What is a logic gate?

5. Explain the term "status register."

6. What does the ALU output after an operation?

7. Define the term "arithmetic operation."

8. What is a shift operation in the context of the ALU?

9. Describe the function of a control unit in relation to the ALU.

10. What is the role of flags in the ALU?

Structural Questions
 1. Describe the design and function of the ALU within a CPU.

2. Explain the difference between arithmetic and logic operations performed by the
ALU.

3. Illustrate how the ALU performs an addition operation using binary numbers.

4. Discuss the significance of the status register and its role in the ALU.

5. Outline the steps involved in an ALU operation, from input to output.

Problem Solving Questions

1. Given a set of binary numbers, simulate the addition and subtraction operations
performed by the ALU and explain each step.

2. Design a basic ALU that can perform addition, subtraction, and basic logic
operations (AND, OR, NOT), and describe how it handles carry and overflow.

Week 6: Memory Hierarchy and Cache

Multiple Choice Questions (MCQs)

1. Which type of memory is the fastest?

• a) RAM

• b) ROM

• c) Cache

• d) Hard drive

2. The main purpose of cache memory is to:

• a) Store large amounts of data

• b) Increase processing speed

• c) Store frequently accessed data

• d) Backup data
3. What is the memory hierarchy from fastest to slowest?

• a) Cache, RAM, Hard drive

• b) RAM, Cache, Hard drive

• c) Hard drive, RAM, Cache

• d) Cache, Hard drive, RAM

4. Which cache mapping technique uses a fixed position in cache for each block of
memory?

• a) Direct mapping

• b) Associative mapping

• c) Set-associative mapping

• d) Random mapping

5. The hit ratio in cache memory refers to:

• a) The number of times data is not found in cache

• b) The number of times data is found in cache

• c) The time taken to access cache

• d) The size of the cache

6. What does LRU stand for in the context of cache memory?

• a) Least Recently Used

• b) Least Recently Updated

• c) Last Recently Used

• d) Last Recently Updated

7. Which of the following is volatile memory?

• a) RAM
 • b) ROM

• c) Hard drive

• d) DVD

8. What is the main advantage of using a memory hierarchy?

• a) Reduced cost

• b) Increased speed and efficiency

• c) Simplified design

• d) Increased storage capacity

9. In a two-level cache system, Level 1 (L1) cache is typically:

• a) Larger and slower than Level 2 (L2) cache

• b) Smaller and faster than Level 2 (L2) cache

• c) Same size as Level 2 (L2) cache

• d) Larger and faster than Level 2 (L2) cache

10. Which type of memory is used for permanent storage?

• a) RAM

• b) Cache

• c) ROM

• d) Register

One Answer Questions

1. Define cache memory.

2. What is a memory hierarchy?

3. Explain the term "hit ratio" in cache memory.

4. Name one type of cache mapping technique.

 5. What does LRU stand for?

6. Describe the purpose of RAM.

7. What is the primary function of ROM?

8. Explain the difference between volatile and non-volatile memory.

9. What is direct mapping in cache memory?

10. Define the term "memory access time."

Structural Questions

1. Describe the different levels of memory hierarchy and their characteristics.

2. Explain how cache memory improves system performance.

3. Illustrate the working of direct, associative, and set-associative cache mapping

techniques.

4. Discuss the concept of hit ratio and its impact on cache performance.

5. Outline the differences between volatile and non-volatile memory with examples.

Problem Solving Questions

1. Given a set of memory addresses, demonstrate how they are mapped in a direct-
mapped cache and calculate the hit ratio.

2. Design a two-level cache system, including specifications for L1 and L2 caches,

and explain how data is managed between them.

Week 7: Pipelining

Multiple Choice Questions (MCQs)

1. What is pipelining in the context of CPU architecture?

• a) A method for cooling the CPU

• b) A technique to increase CPU speed by overlapping stages of instruction

execution
 • c) A method for data storage

• d) A method for data retrieval

2. Which of the following is a type of pipeline hazard?

• a) Data hazard

• b) Control hazard

• c) Structural hazard

• d) All of the above

3. The main purpose of pipelining is to:

• a) Increase memory capacity

• b) Improve instruction throughput

• c) Decrease power consumption

• d) Simplify CPU design

4. In a 5-stage pipeline, the stages typically include:

• a) Fetch, Decode, Execute, Memory, Writeback

• b) Fetch, Decode, Execute, Write, Read

• c) Decode, Fetch, Execute, Memory, Writeback

• d) Fetch, Execute, Memory, Decode, Writeback

5. What is a data hazard in pipelining?

• a) When the CPU runs out of data

• b) When instructions depend on the result of previous instructions

• c) When there are too many instructions

• d) When data is corrupted

6. A pipeline stall occurs when:

 • a) The pipeline is full

• b) There is a hazard that prevents the next instruction from executing in

the following clock cycle

• c) The CPU overheats

• d) Instructions are executed out of order

7. Control hazards are also known as:

• a) Data conflicts

• b) Branch hazards

• c) Memory hazards

• d) Instruction hazards

8. Which technique can be used to resolve data hazards?

• a) Pipelining

• b) Branch prediction

• c) Forwarding

• d) Caching

9. In pipelining, the term "latency" refers to:

• a) The delay between instruction fetch and execution

• b) The total time taken to complete one instruction

• c) The number of instructions in the pipeline

• d) The number of stages in the pipeline

10. What is meant by "instruction throughput" in pipelining?

• a) The number of instructions processed per second

• b) The time taken to fetch an instruction

 • c) The size of the instruction set

• d) The number of pipeline stages

One Answer Questions

1. Define pipelining.

2. What is a pipeline hazard?

3. Name the five typical stages of a pipeline.

4. Explain the term "pipeline stall."

5. What is a data hazard?

6. Describe the function of the fetch stage in a pipeline.

7. What is control hazard?

8. Define the term "instruction throughput."

9. What is forwarding in the context of pipelining?

10. Explain the significance of branch prediction.

Structural Questions

1. Describe the stages of a 5-stage instruction pipeline and their functions.

2. Explain the different types of pipeline hazards and provide examples.

3. Illustrate how a data hazard can occur in a pipeline and how it can be resolved.

4. Discuss the concept of branch prediction and its role in minimizing control
hazards.

5. Outline the impact of pipeline stalls on CPU performance and how they can be
mitigated.

Problem Solving Questions

 1. Given a sequence of instructions, identify any pipeline hazards and describe the
methods to resolve them.

2. Design a simple pipeline architecture for a hypothetical processor, including the

stages and techniques for handling hazards.

Week 8: Input/Output Systems

Multiple Choice Questions (MCQs)

1. Which of the following is an I/O technique?

• a) Polling

• b) Interrupt-driven I/O

• c) Direct Memory Access (DMA)

• d) All of the above

2. The main purpose of an interrupt is to:

• a) Slow down the CPU

• b) Allow the CPU to respond to asynchronous events

• c) Increase memory usage

• d) Control data flow

3. DMA stands for:

• a) Direct Memory Access

• b) Direct Micro Access

• c) Direct Machine Access

• d) Direct Memory Allocation

4. Which device is typically used for input?

• a) Keyboard
 • b) Monitor

• c) Printer

• d) Speaker

5. An I/O processor is designed to:

• a) Execute user programs

• b) Manage data transfer between I/O devices and memory

• c) Perform arithmetic operations

• d) Store data permanently

6. Polling is a technique where:

• a) The CPU continuously checks the status of an I/O device

• b) An I/O device interrupts the CPU

• c) Data is transferred directly between memory and an I/O device

• d) The CPU accesses data sequentially

7. The term "throughput" in I/O systems refers to:

• a) The speed of the CPU

• b) The amount of data processed per unit of time

• c) The size of the data

• d) The type of data

8. Which type of I/O operation allows the CPU to execute other instructions while
waiting for I/O operations to complete?

• a) Synchronous I/O

• b) Asynchronous I/O

• c) Direct I/O
 • d) Indirect I/O

9. What is the main advantage of using DMA?

• a) Reduces CPU load

• b) Increases data transfer speed

• c) Simplifies I/O operations

• d) All of the above

10. An interrupt service routine (ISR) is:

• a) A program that handles an interrupt

• b) A technique for data transfer

• c) A method for memory management

• d) A type of I/O device

One Answer Questions

1. Define Direct Memory Access (DMA).

2. What is an interrupt?

3. Name two types of I/O techniques.

4. Explain the term "polling" in I/O systems.

5. What is the role of an I/O processor?

6. Describe the purpose of an interrupt service routine (ISR).

7. What is asynchronous I/O?

8. Define the term "throughput" in the context of I/O systems.

9. What is the main function of a keyboard?

10. Explain the significance of DMA in I/O operations.

Structural Questions
 1. Describe the different I/O techniques and their advantages and disadvantages.

2. Explain the process of interrupt handling in a CPU.

3. Illustrate how DMA works and its impact on CPU performance.

4. Discuss the role of an I/O processor in managing data transfer.

5. Outline the differences between polling and interrupt-driven I/O.

Problem Solving Questions

1. Design an I/O subsystem for a hypothetical computer, including the use of

interrupts and DMA, and explain how it would handle data transfer efficiently.

2. Given a scenario with multiple I/O devices, propose a method to optimize data
transfer and minimize CPU load, considering different I/O techniques.

Week 9: Parallelism and Multicore Architectures

Multiple Choice Questions (MCQs)

1. What does SIMD stand for?

• a) Single Instruction, Multiple Data

• b) Single Instruction, Multiple Devices

• c) Simple Instruction, Multiple Data

• d) Simple Instruction, Multiple Devices

2. MIMD refers to:

• a) Multiple Instructions, Multiple Data

• b) Multiple Instructions, Multiple Devices

• c) Multiple Instructions, Memory Data

• d) Multiple Instructions, Memory Devices

3. A multicore processor is:

 • a) A processor with multiple cores on a single chip

• b) A processor with a single core

• c) A processor with multiple memory units

• d) A processor with a single memory unit

4. The main advantage of parallel processing is:

• a) Increased power consumption

• b) Improved performance and speed

• c) Increased cost

• d) Simplified programming

5. Which type of parallelism involves dividing a task into smaller subtasks that are
processed simultaneously?

• a) Data parallelism

• b) Task parallelism

• c) Memory parallelism

• d) Instruction parallelism

6. In a multicore processor, each core typically has:

• a) Its own ALU

• b) Shared memory

• c) Its own control unit

• d) All of the above

7. Parallelism at the instruction level is known as:

• a) ILP (Instruction Level Parallelism)

• b) TLP (Thread Level Parallelism)

 • c) DLP (Data Level Parallelism)

• d) MLP (Memory Level Parallelism)

8. The term "speedup" in parallel processing refers to:

• a) The increase in clock speed

• b) The reduction in power consumption

• c) The performance gain from using multiple processors

• d) The increase in memory capacity

9. Which of the following is a challenge in parallel processing?

• a) Data synchronization

• b) Increased heat generation

• c) Complex programming

• d) All of the above

10. Amdahl's Law is used to:

• a) Calculate the theoretical maximum speedup in parallel processing

• b) Measure memory bandwidth

• c) Determine power consumption

• d) Analyze data storage requirements

One Answer Questions

1. Define SIMD.

2. What is MIMD?

3. Explain the term "multicore processor."

4. What is the main benefit of parallel processing?

5. Describe data parallelism.

 6. What does ILP stand for?

7. Define "speedup" in the context of parallel processing.

8. What is task parallelism?

9. Explain the significance of Amdahl's Law.

10. What is a challenge in implementing parallel processing?

Structural Questions

1. Describe the differences between SIMD and MIMD architectures.

2. Explain the advantages and disadvantages of multicore processors.

3. Illustrate how data parallelism and task parallelism are implemented in parallel
processing.

4. Discuss the impact of Amdahl's Law on parallel processing performance.

5. Outline the challenges and solutions in parallel processing.

Problem Solving Questions

1. Given a computational task, design a parallel processing approach using both

data parallelism and task parallelism, and evaluate its potential performance
improvement.

2. Analyze a multicore processor architecture, detailing how the cores interact,

share resources, and manage parallel tasks, and propose optimizations for better
performance.

Week 10: Advanced Topics in Computer Architecture

Multiple Choice Questions (MCQs)

1. What does RISC stand for?

• a) Reduced Instruction Set Computing

• b) Rapid Instruction Set Computing

 • c) Reliable Instruction Set Computing

• d) Random Instruction Set Computing

2. CISC stands for:

• a) Complex Instruction Set Computing

• b) Compact Instruction Set Computing

• c) Comprehensive Instruction Set Computing

• d) Central Instruction Set Computing

3. VLIW refers to:

• a) Very Long Instruction Word

• b) Variable Length Instruction Word

• c) Very Large Instruction Word

• d) Variable Large Instruction Word

4. The main advantage of RISC architecture is:

• a) Simplicity and speed

• b) Complexity and versatility

• c) High power consumption

• d) Large instruction set

5. GPUs are primarily used for:

• a) General-purpose computing

• b) Graphics processing

• c) Memory management

• d) Data storage

6. Quantum computing relies on:

 • a) Classical bits

• b) Qubits

• c) Analog signals

• d) Digital signals

7. Which architecture uses long instruction words to exploit parallelism?

• a) RISC

• b) CISC

• c) VLIW

• d) SIMD

8. The main difference between RISC and CISC is:

• a) The number of instructions

• b) The complexity of instructions

• c) The power consumption

• d) The type of memory used

9. A key feature of quantum computers is:

• a) Their use of traditional transistors

• b) Their ability to perform computations using quantum superposition

• c) Their reliance on binary data

• d) Their use of classical logic gates

10. Which type of computing architecture is expected to solve problems that are
currently unsolvable by classical computers?

• a) RISC

• b) CISC
 • c) VLIW

• d) Quantum computing

One Answer Questions

1. Define RISC.

2. What is CISC?

3. Explain the term "VLIW."

4. What is the primary use of GPUs?

5. Describe the concept of a qubit.

6. What is the main advantage of RISC architecture?

7. Define quantum superposition.

8. Explain the difference between RISC and CISC architectures.

9. What is the role of VLIW in parallel processing?

10. What makes quantum computing different from classical computing?

Structural Questions

1. Describe the key differences between RISC and CISC architectures.

2. Explain the concept of VLIW and how it exploits parallelism.

3. Illustrate the structure and function of a GPU.

4. Discuss the principles of quantum computing and its potential impact on future
technologies.

5. Outline the advantages and disadvantages of emerging computing architectures

such as quantum computing and VLIW.

Problem Solving Questions

 1. Compare a RISC and CISC processor design for a given computational task,
evaluating their performance, complexity, and power consumption.

2. Design a simple quantum algorithm to solve a specific problem, explaining how it

leverages quantum principles such as superposition and entanglement.

Week 11: Performance Measurement and Evaluation

Multiple Choice Questions (MCQs)

1. What is the main purpose of benchmarking?

• a) To measure memory usage

• b) To evaluate processor performance

• c) To increase clock speed

• d) To reduce power consumption

2. Amdahl's Law is used to:

• a) Measure the speed of a single processor

• b) Calculate the theoretical maximum speedup of a task using multiple

processors

• c) Determine the power consumption of a processor

• d) Analyze the storage capacity of a system

3. Which of the following is a performance metric?

• a) Clock speed

• b) Instruction throughput

• c) Latency

• d) All of the above

4. The term "latency" refers to:

 • a) The number of instructions executed per second

• b) The delay between the start and completion of an operation

• c) The speed of the processor

• d) The amount of data processed

5. What is "throughput" in the context of processor performance?

• a) The total number of instructions executed per unit of time

• b) The delay between instructions

• c) The power consumption of the processor

• d) The size of the processor

6. A benchmark suite is:

• a) A collection of programs used to evaluate system performance

• b) A type of processor

• c) A memory management technique

• d) A software development tool

7. The primary goal of performance evaluation is to:

• a) Increase the cost of the processor

• b) Improve system efficiency

• c) Reduce the size of the processor

• d) Simplify system design

8. Which factor can affect the performance of a processor?

• a) Cache size

• b) Clock speed

• c) Instruction set
 • d) All of the above

9. In Amdahl's Law, the term "serial fraction" refers to:

• a) The portion of a task that cannot be parallelized

• b) The portion of a task that can be parallelized

• c) The total execution time of a task

• d) The speedup gained from parallelization

10. Which performance metric is used to measure the efficiency of parallel

processing?

• a) Speedup

• b) Latency

• c) Clock speed

• d) Cache hit ratio

One Answer Questions

1. Define benchmarking.

2. What is Amdahl's Law?

3. Explain the term "latency."

4. What is instruction throughput?

5. Describe the purpose of a benchmark suite.

6. Define "serial fraction" in Amdahl's Law.

7. What is the significance of clock speed in processor performance?

8. Explain the term "speedup" in parallel processing.

9. What factors can affect the performance of a processor?

10. Describe the role of performance evaluation in system design.

Structural Questions

1. Describe the key performance metrics used to evaluate processor performance.

2. Explain the principles of Amdahl's Law and its implications for parallel
processing.

3. Illustrate the process of benchmarking and how it helps in performance

evaluation.

4. Discuss the factors that influence processor performance and how they can be
optimized.

5. Outline the steps involved in performing a performance analysis of a processor.

Problem Solving Questions

1. Given a processor and a set of benchmark programs, perform a detailed

performance analysis, including measurements of latency, throughput, and
speedup, and interpret the results.

2. Using Amdahl's Law, analyze the potential performance improvement for a task
with different levels of parallelization, and propose strategies to maximize
efficiency.

Week 12: Review and Final Project

Multiple Choice Questions (MCQs)

1. Which of the following is a key component of CPU architecture?

• a) ALU

• b) Control unit

• c) Registers

• d) All of the above

2. What is the primary function of cache memory?

• a) To store data permanently

 • b) To improve data access speed

• c) To execute instructions

• d) To control data flow

3. Pipelining is used to:

• a) Increase CPU clock speed

• b) Overlap stages of instruction execution

• c) Increase memory capacity

• d) Reduce power consumption

4. An interrupt allows the CPU to:

• a) Execute instructions in parallel

• b) Respond to asynchronous events

• c) Increase clock speed

• d) Access data sequentially

5. SIMD stands for:

• a) Single Instruction, Multiple Data

• b) Single Instruction, Multiple Devices

• c) Simple Instruction, Multiple Data

• d) Simple Instruction, Multiple Devices

6. Amdahl's Law is used to:

• a) Measure memory bandwidth

• b) Calculate theoretical maximum speedup in parallel processing

• c) Determine power consumption

• d) Analyze data storage requirements

 7. The term "throughput" refers to:

• a) The delay between the start and completion of an operation

• b) The total number of instructions executed per unit of time

• c) The speed of the processor

• d) The amount of data processed

8. RISC architecture is characterized by:

• a) Simple instructions and high speed

• b) Complex instructions and versatility

• c) High power consumption

• d) Large instruction set

9. The function of the control unit in the CPU is to:

• a) Perform arithmetic operations

• b) Direct operations within the CPU

• c) Store data

• d) Manage memory

10. Quantum computing relies on:

• a) Classical bits

• b) Qubits

• c) Analog signals

• d) Digital signals

One Answer Questions

1. Define CPU architecture.

2. What is the purpose of cache memory?

 3. Explain the term "pipelining."

4. What is an interrupt?

5. Describe SIMD.

6. What is Amdahl's Law?

7. Define throughput.

8. What are the characteristics of RISC architecture?

9. Explain the role of the control unit in the CPU.

10. What is quantum computing?

Structural Questions

1. Describe the key components of CPU architecture and their functions.

2. Explain how cache memory improves system performance.

3. Illustrate the stages of pipelining and their functions.

4. Discuss the concept of SIMD and its application in parallel processing.

5. Outline the principles of Amdahl's Law and its implications for parallel processing.

Problem Solving Questions

1. Design a simple processor architecture based on the concepts learned in the

course, including the ALU, control unit, registers, and cache memory, and explain
its operation.

2. Perform a detailed performance analysis of the designed processor architecture,

including measurements of latency, throughput, and speedup, and interpret the
results.