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Test 2024

Eee 2132

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0% found this document useful (0 votes)
15 views5 pages

Test 2024

Eee 2132

Uploaded by

George kombelwa
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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THE UNIVERSITY OF ZAMBIA

SCHOOL OF ENGINEERING
DEPARTMENT OF ELECTRICAL AND ELECTRONIC ENGINEERING
MID TERM TESTS
2023/24 ACADEMIC YEAR

EEE 3131: DIGITAL ELECTRONICS

Time Allowed: Two hours. Total Marks: 100

Instructions
1. The test paper has 4 questions.
2. All questions carry 25 marks each.
3. Answer all four questions.

DO NOT TURN OVER UNTIL YOU ARE INSTRUCTED


Question 1
1.1 Using three bits, show the binary counting sequence from 000 to 111. [2 Marks]
1.2 What is the maximum number that we can count up to using 10 bits? [1 Mark]
1.3 Convert the following binary numbers to their equivalent decimal values.
a. 110012 [1 Mark]
b. 1001.10012 [2 Marks]
1.4 Convert these hex values to decimal.
a. ABCD [2 Mark]
b. 37FD [2 Mark]
1.5 How many bits are required to represent the decimal numbers in the range from 0 to 999
using:
a. Straight binary code? [1 Mark]
b. Using BCD code? [1 Mark]
1.6 How many bits are contained in eight bytes? [1 Mark]
1.7 The number of bits required to represent an eight-digit decimal number in BCD is:
[1 Mark]
1.8 A microcomputer has memory locations from 0000 to 0FFF. Each memory location
stores 1 byte. In decimal,
a. How many bytes can the microcomputer store in its memory? [2 Marks]
b. How many kilobytes is this? [2 Marks]
1.9 Evaluate the following in binary.
a. 1010 + 1011 [1 Mark]
b. 0.1011 + 0.1111 [1 Mark]
c. 1011 x 1011 [2 Marks]
1.10 Draw the output waveform for the OR gate of Figure 1.1. [3 Marks]

Figure 1.1
Question 2
2.1 Write the Boolean expression for output x in Figure 2.1. Determine the value of x for all
possible input conditions by listing the values in a truth table. [3 +3 = 6 Marks]

Fig 2.1
2.2 Simplify the following expressions using theorems:
a.  M  N   M  P  N  P  [3 Marks]

b. ABC  ABC  BCD [3 Marks]


2.3 Show by drawing a logic circuit how x  ABC can be implemented with one two-input
NOR and one two-input NAND gate. [3 Marks]
2.4 For the following expression, construct the corresponding logic circuit, using AND, OR
and NOT logic gates.
a. x  AB  C  D  [3 Marks]
2.5 When troubleshooting a NOR gate like the 7402, with the logic pulser applied to one
input, should the other input be held HIGH or LOW? Why? [2 + 2 = 4 Marks]
2.6 Use Boolean algebra to convert the function f ( x , y , z )   3, 4, 5 to its equivalent
product-of-sum canonical form. [3 Marks]

Question 3
3.1 Write the complete VHDL code to implement a two input AND gate. [4 Marks]
3.2 Write the complete VHDL code that will produce the following output function:
a. Z  A  B  C [5 Marks]
3.3 Consider the circuit of Fig 3.1:
a. Write the Boolean expression represented by the circuit. [4 Marks]
b. Use Boolean algebra to minimize the expression obtained in question 3.3a
[3 Marks]
3.4 Consider Figures; Fig 3.2a and Fig 3.2b. Redraw the K-maps and by showing the
groupings clearly obtain the minimum Boolean expressions. [3+3 = 6 Marks]
Fig 3.1

Fig 3.2 a Fig 3.2b

3.5 Write the Boolean expression represented by the following VHDL code architecture.
[3 Marks]

architecture april of test24 is


signal mid1, mid2: std_logic;
begin
mid1 <= A and B;
mid2 <= C and D;
W <= mid1 or mid2 or C;
end april;
Question 4
4.1 Reduce the following function using K-map and realize the circuit using NAND gates
only: f ( A,B ,C )  ABC  ABC  ABC  ABC [3+3 = 6 Marks]
4.2 Consider a four variable function given as f ( A,B ,C ,D )   0, 2, 3, 4, 5, 7, 9, 13, 15 .
a. Draw a K-map representation of the function. [4 Marks]
b. Obtain the minimized function from the K-map [2 Marks]
4.3 Define the following terms in line with digital logic families:
a. Propagation delay [2 Marks]
b. Fan-out [2 Marks]
c. Noise margin [2 Marks]
4.4 Name the logic family that has the lowest power consumption. [1 Mark]
4.5 Two different logic circuits have the characteristics shown in Table 4.1.
a. Which circuit has the highest LOW-state noise margin? [1 Mark]
b. Which circuit has the highest HIGH-state noise margin? [1 Mark]
c. Which circuit has the lowest average propagation delay? [2 Marks]
d. Which circuit draws the most supply current? [2 Marks]
Table 4.1

End of Test

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