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Boolean Function

Boolean_Function

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SANJIB BEJ
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0% found this document useful (0 votes)
74 views

Boolean Function

Boolean_Function

Uploaded by

SANJIB BEJ
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Boolean Functions

 Boolean algebra is an algebra that deals with binary variables and logic operations. A Boolean
function described by an algebraic expression consists of bina ry variables, the constants 0 and 1, and
the logic operation symbols.
 For a given value of the binary variables, the function can be equal to either 1 or 0.

Example, consider the Boolean functionF1 = x + y’z


The function F1 is equal to 1 if x is equal to 1 or if both y’ and z are equal to 1. F1 is equalto 0 otherwise.
The complement operation dictates that when y’ = 1, y = 0. Therefore,F1 = 1 if x = 1 or if y = 0 and z = 1.
A Boolean function expresses the logical relationshipbetween binary variables and is evaluated by
determining the binary value ofthe expression for all possible values of the variables. The gate
implementation of F1 is shown below.

Example: Consensus Law: (function 4)

Complement of a function:

The complement of a function F is obtained from an interchange of 0’s for 1’sand 1’s for 0’s in the value
of F.
Example:
1.

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2. Find the comple ment of the functions F1 = x’yz’ + x’y’z and F2 = x(y’z’ + yz).
By applying DeMorgan’s theorems as many times as necessary, the complements areobtained as
follows:

3. Find the comple ment of the functions F1 = x’yz’ + x’y’z and F2 = x(y’z’ + yz) by taking their
duals and comple menting each literals.
Solution:

****************************************************
Canonical and Standard forms:
Explain canonical SOP & POS form with suitable example.

 Binary logic values obtained by the logical functions and logic variables are in binary form. An
arbitrary logic function can beexpressed in the following forms.
(i) Sum of the Products (SOP)
(ii) Product of the Sums (POS)
 Boolean functions expressed as a sum of minterms or product of maxterms are said to be in
canonical form.

Product te rm:
The AND function is referred to as a product. The variable in a product term can appear either in
complementary or uncomplimentary form. Example: ABC’
Sum te rm:
The OR function is referred to as a Sum. The variable in a sum term can appear either in
complementary or uncomplimentary form. Example: A+B+C’
Sum of Product (SOP):
The logical sum of two or more logical product terms is called sum of product expression. It is
basically an OR operation of AND operated variables. Example: Y=AB+BC+CA
Product of Sum (POS):
The logical product of two or more logical sum terms is called product of sum expression. It is
basically an AND operation of OR operated variables. Example: Y=(A+B).(B+C).(C+A)

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Minterm:
A product term containing all the K variables of the function in either complementary or
uncomplimentary form is called Minterm or standard product.

Maxterm:
A sum term containing all the K variables of the function in either complementary or
uncomplimentary form is called Maxterm or standard sum.

Canonical SOP Expression:


The minterms whosesum defines the Boolean function are those which give the 1’s of the
function in a truth table.
Procedure for obtaining Canonical SOP expression:
 Examine each term in a given logic function. Retain if it is a minterm, continue to examine the
next term in the same manner.
 Check for the variables that are missing in each product which is not minterm. Multiply the
product by (X+X’), for each variable X that is missing.
 Multiply all the products and omit the redundant terms.
Example:
Express the Boolean function F = A + B’C as a sum of minterms. (May -10)(Nov – 2018)
Solution:
The function hasthree variables: A, B, and C.
The first term A is missing two variables; therefore,
A = A(B + B’) = AB + AB’
This function is still missing one variable, so
A = AB(C + C’) + AB’(C + C’)
= ABC + ABC’ + AB’C + AB’C’
The second term B’C is missing one variable; hence,
B’C = B’C(A + A’) = AB’C + A’B’C

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Combining all terms, we have
F = A + B’C =ABC + ABC’ + AB’C + AB’C’ + A’B’C
But AB’C appears twice, and according to theorem 1 (x + x = x), it is possible toremove one of
those occurrences. Rearranging the minterms in ascending order, wefinally obtain
F = A’B’C + AB’C’+ AB’C + ABC’ + ABC= m1 + m4 + m5 + m6 + m7
F(A, B, C) = ∑(1, 4, 5, 6, 7)

Example:Obtain the canonical sum of product form of the following function. (May 2014)

Canonical POS Expression:


The Maxterms whose product defines the Boolean function are those which give the 1’s of the
function in a truth table.
Procedure for obtaining Canonical POS expression:
 Examine each term in a given logic function. Retain if it is a maxterm, continue to e xamine the
next term in the same manner.
 Check for the variables that are missing in each sum which is not maxterm. Add (X.X’), for each
variable X that is missing.
 Expand the expression using distributive property eliminate the redundant terms.
Example:

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Example:
Obtain the canonical product of the sum form of the following function.
F (A, B, C) = (A + B′) (B + C) (A + C′) (Dec 2012)
Solution:

*********************************

Karnaugh Map (K-map):

 Using Boolean algebra to simplify Boolean expressions can be difficult. The Karnaugh map provides
a simple and straight- forward method of minimizing Boolean expressions which represent
combinational logic circuits.
 A Karnaugh map is a pictorial method of grouping together expressions with common factors and
then eliminating unwanted variables.
 A Karnaugh map is a two-dimensional truth-table. Note that the squares are numbered so that the
binary representations for the numbers of two adjacent squares differ in exactly one position.

Rules for Grouping together adjacent cells containing 1's:


n
 Groups must contain 1, 2, 4, 8, 16 (2 ) cells.
 Groups must contain only 1 (and X if don't care is allowed).
 Groups may be horizontal or vertical, but not diagonal.
 Groups should be as large as possible.
 Each cell containing a 1 must be in at least one group.
 Groups may overlap.
 Groups may wrap around the table. The leftmost cell in a row may be grouped with the rightmost
cell and the top cell in a column may be grouped with the bottom cell.
 There should be as few groups as possible.

Obtaining Product Terms

 If A is a variable that has value 0 in all of the squares in the grouping, then the complemented
form A is in the product term.
 If A is a variable that has value 1 in all of the squares in the grouping, then the true form A is in
the product term.

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 If A is a variable that has value 0 for some squares in the grouping and value 1 for others, then it
is not in the product term

The Format of K-Maps:

K-Maps of 2 Variables:

K-Maps of 3 Variables:
 Simplify the boolean function F (x, y, z) =

 Simplify the boolean function F (x, y, z) =

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K-Maps of 4 Variables:

 Simplify the boolean function F(w,x,y, z) =

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Note:

Karnaugh Maps - Rules of Simplification

The Karnaugh map uses the following rules for the simplification of expressions by grouping
together adjacent cells containing ones

 Groups may not include any cell containing a zero

 Groups may be horizontal or ve rtical, but not diagonal.

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 Groups must contain 1, 2, 4, 8, or in general 2 n cells. That is if n = 1, a group will contain
two 1's since 21 = 2. If n = 2, a group will contain four 1's since 2 2 = 4.

 Each group should be as large as possible.

 Each cell containing a one must be in at least one group.

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 Groups may overlap.

 There should be as few groups as possible, as long as this does not contradict any of the
previous rules.

Summmary:

1. No zeros allowed.
2. No diagonals.
3. Only power of 2 numbers of cells in each group.
4. Groups should be as large as possible.
5. Everyone must be in at least one group.
6. Overlapping allowed.
7. Wrap around allowed.
8. Fewest numbers of groups possible.

Don’t care combination:

In certain digital systems, some input combinations never occur during the process of normal
operation because those input conditions are guaranteed never to occur. Such input combinations are
don’t care conditions.

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Completely specified functions:

If a function is completely specified, it assumes the value 1 for some input combinations and the
value 0 for others.

Incompletely specified functions:

There are functions which assume the value 1 for some combinations and 0 for some other and
either 0 or 1 for the remaining combinations. Such a functions are called incompletely specified .

Prime Implicants:

A primeimplicant is a product term obtained by combining the maximum possible number


ofadjacent squares in the map. If a minterm in a square is covered by only one primeimplicant, that prime
implicant is said to be essential.

**************************************

Quine-McCluskey (or) Tabulation Method

Minimization of Logic functions:


Steps:

 A set of all prime implicants of the function must be obtained.

 From the set of prime implicants, a set of essential implicants must be determined by
preparing a prime implicant chart.

 The minterm which are not covered by the essential implicants are taken into
consideration and a minimum cover is obtained from the remaining prime implicants.

Example: (Nov-06,07,10,May- 10,08)

Simplify the boolean function F(A,B,C,D)= ∑m (1,3,6,7,8,9,10,12,14,15) + ∑d (11,13) using Quine


McClusky method. (Apr 2017)

Step:1

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Step:2

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Step:3

Step:4

*************************************************

Logic gates

Explain about different types of logic gates. (OR) What are Universal gates? Construct any four basic
gates using only NOR gates and using only NAND gates. (May 2011)[NOV – 2019]

 A logic gate is an idealized or physical device implementing a Boolean function; that is, it performs a
logical operation on one or more logical inputs, and produces a single logical output.

Positive and Negative Logic


 The binary variables two states, i.e. the logic ‘0’ state or the logic ‘1’ state. These logic states in
digital systems such as computers.
 These are represented by two different voltage levels or two different current levels.
 If the more positive of the two voltage or current levels represents a logic ‘1’ and the less posit ive of
the two levels represents a logic ‘0’, then the logic system is referred to as a positive logic system.
 If the more positive of the two voltage or current levels represents a logic ‘0’ and the less positive of
the two levels represents a logic ‘1’, then the logic system is referred to as a negative logic system.

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Truth Table
A truth table lists all possible combinations of input binary variables and the corresponding
outputs ofa logic system.

Universal Gates
 The OR, AND and NOT gates are the three basic logic gates as they together can be used to
construct the logic circuit for any given Boolean expression.
 The NOR and NAND gates have the property that they individually can be used to hardware-
implement a logic circuit corresponding to any given Boolean expression.
 That is, it is possible to use either only NAND gates or only NOR gates to implement any
Boolean expression. This is so because a combination of NAND gates or a combination of NOR
gates can be used to perform functions of any of the basic logic gates. It is for this reason that
NAND and NOR gates are universal gates.

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NAND gatesandNOR gatesarecalleduniversalgates or universalbuildingblocks, as any
type of gates or logic functio ns can be implemented by these gates. Figures
Symbo lshowshow variouslogic functionscan be realizedby NAND gatesandFigures
Symbo lshow therealizationofvariouslogic gatesby NOR gates.

NOT functio n:F =A′AND functio n: F =AB

 Implementation of basic gates using NAND gate:


(conve rt AND gate to NAND gate)

 Implementation of basic gates using NOR gate:


(conve rt OR gate to NOR gate)

NAND–NOR implementations:

Implementation of basic gates using NAND gate:


Inverter (NOT gate):

AND gate:

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OR gate:

Implementation of basic gates using NOR gate:


Inverter (NOT gate):

AND gate:

OR gate:

NAND–NOR implementations:

 Digital circuits are frequently constructed with NAND o r NOR gates rather than with AND and
OR gates.
 NAND and NOR gates are easier to fabricate with electronic components and are the basic gates
used in all IC digital logic families.
 Because of the prominence of NAND and NOR gates in the design of digital c ircuits, rules and
procedures have been developed for the conversion from Boolean functions given in terms of
AND, OR, and NOT into equivalent NAND and NOR logic diagrams .

Only NAND/NOR gate circuit:


 A convenient way to implement a Boolean function with NAND/NOR gates is to obtain the
simplified Boolean function in terms of Boolean operators and then convert the function to
NAND/NOR logic.
 The conversion of an algebraic expression from AND, OR, and complement to NAND /NOR can
be done by simple circuit manipulation techniques that change AND–OR diagrams to
NAND/NOR diagrams.

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NAND Imple mentation Procedure:
 Draw the AOI logic of given Boolean expression.
 Add bubble on input of OR gate & output of AND gate.
 Add an Inverter on each line that received bubbles.
 Eliminate double inversions
 Replace all by NAND gates
Example:
1. Implement F = AB + CD using only NAND gate.

2. Implement the following Boolean function with NAND gates:F (x, y, z) = (1, 2, 3, 4, 5, 7) (Apr
2018)

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3. Implement the function F = (AB’ + A’B)(C + D’) using only NAND gate.

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NOR Imple mentation Procedure:
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 Draw the AOI logic of given Boolean expression.
 Add bubble on input of AND gate & output of OR gate.
 Add an Inverter on each line that received bubbles.
 Eliminate double inversions
 Replace all by NOR gates
Example:
1. Implement F = (A + B)(C + D)E using only NOR gate. (Apr 2018)

2. Implement F = (AB’ + A’B)(C + D’) using only NOR gate.

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