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Computer Organization and Architecture Lab 5

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Computer Organization and Architecture Lab 5

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Aabhusan Aryal
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Computer organization and Architecture– Lab Sheet- 5

IOE, Pulchowk

Lab Sheet-5

DIVISION OF TWO UNSIGNED INTEGER BINARY NUMBERS

Objective:
To implement non-restoring division algorithm in digital computer.

In the non-restoring algorithm, B is not added if the difference is negative but instead, the
negative difference is shifted left and then B is added. Here B is subtracted if the previous
value of QLSB was 1, but B is added if the previous value of QLSB was 0 and no restoring of
partial remainder is required. The first time the dividend is shifted, B must be subtracted.
Also, if the last bit of the quotient is 0, the partial remainder must be restored to obtain the
correct final remainder.
Consider two binary numbers A and B. A is the dividend, B the divisor and Q = A / B the
quotient. We assume that Α>Β and B!=0. The flow chart of the algorithm used, is given in
figure 5.1.
Let us take examples:

1)
Dividend (Register - A) = 12 Equivalent binary representation is 1100 and
divisor (Register - B) = 4 Equivalent binary representation is 0100.
Subtraction may be achieved by adding 2’s complement of B as we have done in lab 3 and
here it is 1100. Double length dividend is stored in registers AQ.
A Q

Initially 0000 1100


0100
Shift 0001 100 count = 0
Subtract 1100
Set LSB 1101 1000

Shift 1011 000


Add 0100 count = 1
Set LSB 1111 0000
Shift 1110 000
Add 0100 count = 2
Set LSB 0010 0001
Shift 0100 001
Subtract 1100 count = 3
0000 0011

Remainder Quotient

Prof. Dr.Subarna Shakya


Computer organization and Architecture– Lab Sheet- 5
IOE, Pulchowk

2)
Dividend (Register - A) = 8 Equivalent binary representation is 1000 and
divisor (Register - B) = 3 Equivalent binary representation is 00011.
Subtraction may be achieved by adding 2’s complement of B as we have done in lab 3 and
here it is 11101. Dividend is stored in registers AQ.

A Q

Initially 00000 1000


00011
Shift 00001 000 count = 0
Subtract 11101
Set LSB 11110 0000

Shift 11100 000


Add 00011 count = 1
Set LSB 11111 0000
Shift 11110 000
Add 00011 count = 2
Set LSB 00001 0001
Shift 00010 001
Subtract 11101 count = 3
Set LSB 11111 0010

11111 Quotient
Add 00011
00010 Restore remainder

Remainder

Prof. Dr.Subarna Shakya


Computer organization and Architecture– Lab Sheet- 5
IOE, Pulchowk

Let the number of bits stored in register Q is n Registers AQ is now shifted to the left with
zero insertion into QLSB. Initialize the counter to zero value. And divisor is subtracted by
adding 2’s complement value. If AMSB =1, set QLSB with value 0 and then increment the
counter value by 1. The partial remainder is shifted to the left and then B is added to the
partial remainder. . If AMSB =0, set QLSB with value 1 and then increment the counter value by
1. Process is repeated until count = n-1 i.e. all quotient bits are formed. If the last bit of the
quotient is 0, the partial remainder must be restored to obtain the correct final remainder.
Finally result, Quotient is in Q and the final remainder is in A, is obtained.

The flow chart for non-restoring division is shown below.

START

Q dividend
Count 0

B divisor
A 0

Left Shift A,Q

A A-B

Yes
A(MSB) = 1
Left Shift A,Q
No
Q(0) 1
Q(0) 0
Q(0) 0 A A+B
A A-B

No
Count = n-1? Count Count +1 Quotient in Q
Yes Remainder in A

Yes A A+B
A(MSB) = 1 END

No

Figure 5.1

Prof. Dr.Subarna Shakya

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