ST33TPHF20SPI

Flash-based TPM 2.0 device with an SPI interface

Data brief

Security features
 Active shield and environmental sensors
 Monitoring of environmental parameters
(power)
 Hardware and software protection against fault
TSSOP28 VFQFPN32 injection
 FIPS compliant RNG built on an SP800-90A
Features compliant SHA256 DRBG and an AIS-31 Class
PTG2 compliant true random number
TPM features generator (TRNG)

 Flash based Trusted Platform Module (TPM)  Cryptographic algorithms:

– RSA key generation (1024 or 2048 bits)
 For TPM 2.0, compliant with Trusted
Computing Group (TCG) Trusted Platform – RSA signature and encryption
Module (TPM) Library specifications 2.0, – HMAC SHA-1 & SHA-256
Level 0, Revision 116 and TCG PC Client – AES-128-192-256
Specific TPM Platform Specifications 0.43 and – ECC 224 & 256 bits
errata – ECDH 224 & 256 bits
 TPM firmware code can be upgraded thanks to – ECDAA
a persistent Application Flash Loader to
support new standard evolutions Product compliance
 CC certification according to TPM 2.0 PP at  Compliant with Microsoft® Windows 8.1 and
EAL4+ Windows 10
 SPI support at up to 33 MHz  Compliant with Intel® TXT for TPM 2.0
 Compliant with TCG test suite for TPM 2.0
Hardware features
 ARM® SecurCore® SC300™ 32-bit RISC core
 Highly reliable Flash memory technology
 Extended temperature ranges: -40 °C to
105 °C
 ESD protection up to 4 kV (HBM)
 1.8 V or 3.3 V supply voltage range
 28-lead thin shrink small outline and 32-lead
very thin fine pitch quad flat pack ECOPACK®
packages

March 2016 DocID029068 Rev 2 1/18

For further information contact your local STMicroelectronics sales office. www.st.com
Contents ST33TPHF20SPI

Contents

1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Security certifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Hardware features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Pin and signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 28-pin thin shrink small outline package information . . . . . . . . . . . . . . . . . 6
3.2 32-lead very thin fine pitch quad flat pack no-lead (VFQFPN)
package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 Delivery packing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5 Package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

6 Support and information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2/18 DocID029068 Rev 2

ST33TPHF20SPI Description

1 Description

The ST33TPHF20SPI is a cost-effective and high performance trusted platform module

(TPM) targeting PC, server platforms and embedded systems.
The product implements the functions defined by the Trusted Computing Group
(www.trustedcomputinggroup.org) in the TCG Trusted Platform Module Library
Specifications version 2.0 Level 0 Revision 116 ([TPM 2.0 P1 r116], [TPM 2.0 P2 r116],
[TPM 2.0 P3 r116], [TPM 2.0 P4 r116]) and errata version 1.3 [TPM 2.0 rev116 Err 1.3].It is
also based on the TCG PC Client specific TPM Platform specifications rev0.43 [PTP 2.0
r0.43] and [Errata sheet]. [TPM 20 PP] specifies the protection profile.
The product also supports the ability to upgrade the TPM firmware thanks to a persistent
application Flash loader to support new standard evolutions.

1.1 Security certifications

This product is CC certified according to TPM 2.0 PP at EAL4+. It also targets FIPS 140-2
certification.

1.2 Hardware features

The ST33TPHF20SPI is based on a smartcard-class secure MCU that incorporates the
most recent generation of ARM® processors for embedded secure systems. Its SecurCore®
SC300™ 32-bit RISC core is built on the Cortex® M3 core with additional security features
to help to protect against advanced forms of attacks.
The ST33TPHF20SPI offers a fast slave serial peripheral interface (SPI) supported by an
embedded hardware communication engine compliant with TCG PC Client TPM Profile 0.43
[PTP 2.0 r0.43].
The product features hardware accelerators for advanced cryptographic functions. The AES
peripheral provides a secure AES (Advanced Encryption Standard) algorithm
implementation, while the NESCRYPT crypto-processor efficiently supports the public key
algorithms.
The ST33TPHF20SPI operates in the -25 to +85 °C commercial temperature range or the
-40 °C to 105 °C extended temperature range with a supply and I/O voltage of 1.8 V or
3.3 V.

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and device status are available at: www.st.com.
ECOPACK® is an ST trademark.

DocID029068 Rev 2 3/18

5
Pin and signal descriptions ST33TPHF20SPI

2 Pin and signal descriptions

Figure 1 and Figure 2 give the pinouts of the two packages in which the devices are
delivered. Table 1 describes the associated signals.

Figure 1. TSSOP28 pinout

1L&   1L&
1L&   1L&
1L&   0,62
*1'   1L&
1L&   936
1&   026,
1&   63,B&6
76623
1L&   63,B&/.
1L&   63,B3,54
1L&   1L&
1L&   1L&
1L&   1L&
1L&   63,B567
1L&   1L&

069

Figure 2. VQFN32 pinout

1L&
1L&
1L&
1L&
1L&
1L&
1L&
1L&

       
1L&   0,62
*1'   1L&
1L&   936
94)1
1L&   026,
1L& 
1L&   63,B&6
1&   63,B&/.
1&   63,B3,54
1L&   63,B567
       
1L&
1L&
1L&
1L&
1L&
1L&
1L&
1L&

069

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ST33TPHF20SPI Pin and signal descriptions

Table 1. Pin descriptions

Signal Type Description

Power supply. This pin must be connected to 1.8 V or 3.3 V DC power

VPS Input
rail supplied by the motherboard.
GND Input GND has to be connected to the main motherboard ground.
SPI_RST Input SPI Reset used to re-initialize the device
MISO Output SPI Master Input, Slave Output (output from slave)
MOSI Input SPI Master Output, Slave Input (output from master)
SPI_CLK Input SPI Serial Clock (output from master)
SPI_CS Input SPI Slave Select (active low; output from master)
SPI_PIRQ Output SPI IRQ used by TPM to generate an interrupt
Not internally connected: not connected to the die. May be left
NiC -
unconnected but no impact on TPM if connected.
Not Connected: connected to the die but not usable. May be left
NC -
unconnected. Internal pull down.

Note: The VQFN32 package has an central pad (PIN33) on the bottom, which is not connected to
the die. This pin does not impact the TPM, be it connected or not.

DocID029068 Rev 2 5/18

5
Package information ST33TPHF20SPI

3 Package information

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.

3.1 28-pin thin shrink small outline package information

Dimensional features of the TSSOP28 package: Body width 4.4 mm. Pitch 0.65 mm.
Unless otherwise specified, general tolerance is ± 0.1 mm.

Figure 3. 28-lead thin shrink small outline package outline

'

 

F
( (

  N

$
/
$ $
DDD /
E H <0B0(

1. Drawing is not to scale.

Table 2. 28-lead thin shrink small outline package mechanical data

millimeters inches(1)
Symbol
Min. Typ. Max. Min. Typ. Max.
A - - 1.20 - - 0.047
A1 0.05 - 0.15 0.002 - 0.006
A2 0.80 1.00 1.05 0.031 0.040 0.041
b 0.19 - 0.30 0.007 - 0.012
c 0.09 - 0.20 0.004 - 0.008
D 9.60 9.70 9.80 0.378 0.382 0.386
E 6.20 6.40 6.60 0.244 0.252 0.260
E1 4.30 4.40 4.50 0.170 0.173 0.177
e - 0.65 - - 0.026 -
L 0.45 0.60 0.75 0.018 0.024 0.0230
L1 - 1.00 - - 0.040 -

6/18 DocID029068 Rev 2

ST33TPHF20SPI Package information

Table 2. 28-lead thin shrink small outline package mechanical data (continued)
millimeters inches(1)
Symbol
Min. Typ. Max. Min. Typ. Max.
k 0° - 8° 0° - 8°
aaa - - 0.10 - - 0.004
1. Values in inches are converted from mm and rounded to 4 decimal digits.

Figure 4. 28-lead thin shrink small outline package footprint








 




 9-?&0

1. All dimensions are in millimeters.

DocID029068 Rev 2 7/18

17
Package information ST33TPHF20SPI

3.2 32-lead very thin fine pitch quad flat pack no-lead (VFQFPN)
package information
Figure 5. VFQFPN32 5x5 mm 0.5 mm pitch package outline
6HDWLQJSODQH
&
GGG &
$

$ $

'

H
 

 

( E (



/

3LQ,'
5  '
/
%RWWRPYLHZ B0(

1. Drawing is not to scale.

Table 3. VFQFPN32 5x5 mm package mechanical data

millimeters inches (1)
Symbol
Min. Typ. Max. Min. Typ. Max.

A 0.800 0.900 1.000 0.0315 0.0354 0.0394

A1 0.000 0.020 0.050 0.0000 0.0008 0.0020
A3 - 0.200 - - 0.0079 -
b 0.180 0.250 0.300 0.0071 0.0098 0.0118
D 4.850 5.000 5.150 0.1909 0.1969 0.2028
D2 3.500 3.600 3.700 0.1378 0.1417 0.1457

8/18 DocID029068 Rev 2

ST33TPHF20SPI Package information

Table 3. VFQFPN32 5x5 mm package mechanical data (continued)

millimeters inches (1)
Symbol
Min. Typ. Max. Min. Typ. Max.

E 4.850 5.000 5.150 0.1909 0.1969 0.2028

E2 3.500 3.600 3.700 0.1378 0.1417 0.1457
e - 0.500 - - 0.0197 -
L 0.300 0.400 0.500 0.0118 0.0157 0.0197
ddd - - 0.050 - - 0.0020
1. Values in inches are converted from mm and rounded to 4 decimal digits.

Figure 6. VFQFPN32 5x5 mm 0.5 mm pitch package footprint





 

 










  

 


$OOGLPHQVLRQVDUHLQPLOOLPHWHUV
!I

DocID029068 Rev 2 9/18

17
Delivery packing ST33TPHF20SPI

4 Delivery packing

Surface-mount packages can be supplied with Tape and Reel packing. The reels have a 13"
typical diameter.
Reels are in plastic, either anti-static or conductive, with a black conductive cavity tape. The
cover tape is transparent anti-static or conductive.
The devices are positioned in the cavities with the identifying pin (normally Pin “1”) on the
same side as the sprocket holes in the tape.
The STMicroelectronics Tape & Reel specifications are compliant to the EIA 481-A standard
specification.

Table 4. Packages on tape and reel

Package Description Tape width Tape pitch Reel diameter Quantity per reel

Thin shrink small

TSSOP 28 16 mm 8 mm 13 in. 2500
outline package
Very thin fine pitch
VFQFPN 32 quad flat pack no- 12 mm 8 mm 13 in. 3000
lead package

Figure 7. Reel diagram

7

$ 1

' &

*
$,'

10/18 DocID029068 Rev 2

ST33TPHF20SPI Delivery packing

Table 5. Reel dimensions

Tape
Reel size A Max. B Min. C D Min. G Max. N Min. T Max. Unit
width

16 16.4 +2/–0 22.4

13” 330 1.5 13 ±0.2 20.2 100 mm
12 12.6 18.4

Figure 8. Embossed carrier tape for VFQFPN 5 × 5 mm

3
3
< (
7
'

'

)
:
%

<
. 3 $

6HFWLRQ<<
8VHUGLUHFWLRQRIIHHG $,9

1. Drawing is not to scale.

Figure 9. Chip orientation in the embossed carrier tape for VFQFPN 5 × 5 mm

8VHUGLUHFWLRQRIIHHG
069

Table 6. Carrier tape dimensions for VFQFPN 5 × 5 mm

D1 T
Package A0 B0 K0 P P2 D P0 E F W Unit
Min. Max.
5.25 5.25 1.1 8 2 1.55 4 1.75 5.5 12 0.3
FPN 5x5 1.5 mm
±0.1 ±0.1 ±0.1 ±0.1 ±0.1 ±0.05 ±0.1 ±0.1 ±0.1 ±0.3 ±0.05

DocID029068 Rev 2 11/18

17
Delivery packing ST33TPHF20SPI

Figure 10. Embossed carrier tape for TSSOP28 4.4 mm body width

. 3R
7 3
'
7RS (
&RYHU
7DSH
$R
)
:

%R % %R

.R 3 '

8VHUGLUHFWLRQRIIHHG $,9

1. Drawing is not to scale.

Figure 11. Chip orientation in the embossed carrier tape for TSSOP28 4.4 mm body
width

7\SLFDO

8VHUGLUHFWLRQRIIHHG
069

Table 7. Carrier tape constant dimensions for TSSOP 4.4 mm body width
Tape size Ao, Bo, Ko(1) D E Po T Max. Unit

16 mm See note. 1.5 +0.1 / -0 1.75 ±0.1 4 ±0.1 0.4 mm

1. Ao, Bo, Ko, are determined by components sizes. The clearance between the component and the cavity must be within
0.05 mm (Min.) to 0.90 mm (Max.)

12/18 DocID029068 Rev 2

ST33TPHF20SPI Package marking information

5 Package marking information

Figure 12 and Figure 13 illustrate the typical markings of the TSSOP28 and the VQFN32
device packages, respectively.

Figure 12. TSSOP28 device package marking area

$0DUNLQJDUHD±GLJLWV
$ %$VVHPEO\SODQW
&%(VHTXHQFH
''LIIXVLRQSODQW
% & ' ( ) ($VVHPEO\\HDU
)$VVHPEO\ZHHN
*(FRSDFNOHYHO
+ +67ORJR
D * ,
,0DUNLQJDUHDGLJLWVXQXVHG
D'RW
06Y9

Figure 13. VQFN32 device package marking area

$0DUNLQJDUHD±GLJLWV

$ %$VVHPEO\SODQW

&%(VHTXHQFH

''LIIXVLRQSODQW
% & '
(&RXQWU\RIRULJLQ

)$VVHPEO\\HDU
( ) *
*$VVHPEO\ZHHN

+(FRSDFN
,
+ - ,67ORJR

-0DUNLQJDUHDGLJLWVXQXVHG
.
.'RW
06Y9

For both packages, the 8-digit ‘A’ marking area is equal to “P68XYZZZ” with:
 X = Hardware product
 Y = Hardware revision
 ZZZ = Firmware revision

DocID029068 Rev 2 13/18

17
Support and information ST33TPHF20SPI

6 Support and information

Additional information regarding ST TPM devices can be obtained from the website
www.st.com.
For any specific support information you can contact STMicroelectronics through the
following e-mail: [email protected].

14/18 DocID029068 Rev 2

ST33TPHF20SPI Terms and abbreviations

Appendix A Terms and abbreviations

Table 8. List of abbreviations

Term Meaning

AES Advanced Encryption Standard

CA Certificate authority
CC Common Criteria
DAM Dictionary attack mitigation mechanism
Data byte Byte from the TPM command or answer or register value.
DES Data Encryption Standard
EC Elliptic Curve
EK Endorsement Key
FIPS Federal Information Processing Standard
GPIO General Purpose I/O
HMAC Keyed-Hashing for Message Authentication
HSM Hardware security module
NIST National Institute of Standards and Technology
NV Non-volatile (memory)
OEM Original Equipment Manufacturer
OIAP Object-Independent Authorization Protocol
OSAP Object Specific Authorization Protocol
PCR Platform Configuration Register
RSA Rivest Shamir Adelman
RTM Root of Trust for Measurement
RTR Root of Trust for Reporting
SHA Secure Hash Algorithm
SPI Serial Peripheral Interface
SRK Storage Root Key
TCG Trusted Computed Group
TIS TPM interface specification
TPM Trusted Platform Module
TPME TPM Manufacturer
Transaction bytes All bytes from a TPM command or TPM answer.
TSS TPM Software Stack

DocID029068 Rev 2 15/18

17
Referenced documents ST33TPHF20SPI

Appendix B Referenced documents

The following materials are to be used in conjunction with or are referenced by this
document.
[TPM 2.0 P1 r116] TPM Library, Part 1, Architecture, Family 2.0, rev 1.16,
TCG
[TPM 2.0 P2 r116] TPM Library, Part 2, Structures, Family 2.0, rev 1.16, TCG
[TPM 2.0 P3 r116] TPM Library, Part 3, Commands, Family 2.0, rev 1.16, TCG
[TPM 2.0 P4 r116] TPM Library, Part 4, Supporting routines, Family 2.0, rev
1.16, TCG
[TPM 2.0 rev116 Err 1.3] Errata version 1.3 June 16, 2015 for TCG TPM library
version 2.0 revision 1.16 October 2014.
[PTP 2.0 r0.43] TCG PC Client Specific Platform TPM Specification (PTP) -
Version 2.0 Revision 0.43
[PKCS#1] PKCS#1: v2.1 RSA Cryptography Standard, RSA
Laboratories
[AN2639] Application note, Soldering recommendations and package
information for Lead-free ECOPACK® microcontrollers,
STMicroelectronics
[Errata sheet] PC_Client_Specific_Platform_TPM_Profile_for_TPM_2_0_
errata_v1p0.pdf
[TCG EK Cre Profile TPM 2.0] TCG EK credential profile for TPM Family 2.0 Level 0.
Specification Version 2.0 Revision 14, November 4, 2014,
TCG.
[TPM 20 PP] Protection Profile PC Client Specific TPM, Family 2.0 Level
0 (1.0), December 2014, TCG.

16/18 DocID029068 Rev 2

ST33TPHF20SPI Revision history

Revision history

Table 9. Document revision history

Date Revision Changes

04-Mar-2016 1 Initial release.

Updated TPM features related to certification and updated
Section 1.1: Security certifications.
Updated references in Section 1: Description.
15-Mar-2016 2
Added Figure 9: Chip orientation in the embossed carrier tape for
VFQFPN 5 × 5 mm and Figure 11: Chip orientation in the embossed
carrier tape for TSSOP28 4.4 mm body width.

DocID029068 Rev 2 17/18

17
 ST33TPHF20SPI

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© 2016 STMicroelectronics – All rights reserved

18/18 DocID029068 Rev 2