LAB MANUAL

FOR
MICROPROCESSOR &
MICROCONTROLLER LAB

V SEMESTER ECE

DEPARTMENT OF ELECTRONICS AND COMMUNICATION

ENGINEERING

SRI MANAKULA VINAYAGAR ENGINEERING COLLEGE

MADAGADIPET, PUDUCHERRY- 605107.

Prepared By
Mrs. R. Kurinjimalar, AP/ECE
Mrs. G. Sivajanane, AP/ECE
Ms. S. Anbarasi, AP/ECE
1
EC P51 - MICROPROCESSOR AND MICROCONTROLLER LABORATORY

Experiments based on 8085 Microprocessor

 8 bit and 16 bit Arithmetic Operations

 Array operations
 Bit Manipulation operations
 Code conversions
 Subroutines
 Digital Clock simulation
 Block operations

Experiments based on 8051/PIC microcontroller

 LCD interface
 ADC /DAC interface
 Stepper motor interface
 Serial communication (kit-to-kit and/or pc-to-kit)
 Watch dog timer
 Real-time clock
 Printer interfacing
 Water level indicator
 Traffic light controller
 Elevator simulation
 Pulse width modulation
 Interfacing of relay switches

2
 MICROPROCESSOR & MICROCONTROLLER LAB

V SEMESTER ECE

LIST OF EXPERIMENTS

SL.NO NAME OF THE EXPERIMENT

CYCLE I

1
STUDY OF MICROPROCESSOR KIT 8085

2 PROGRAM FOR 8 BIT ARITHMETIC OPERATIONS WITH 8085

MICROPROCESSOR

3 PROGRAM FOR 16 BIT ARITHMETIC OPERATIONS WITH 8085

MICROPROCESSOR
4
PROGRAM FOR BLOCK OPERATIONS WITH 8085 MICROPROCESSOR
5
PROGRAM FOR CODE CONVERSIONS WITH 8085 MICROPROCESSOR
6
PROGRAM FOR ARRAY OPERATIONS WITH 8085 MICROPROCESSOR
7
STUDY OF MICROCONTROLLER KIT 8051 & PROGRAMMING 8051

CYCLE II
8
PROGRAM FOR ADC INTERFACE USING 8051 MICROCONTROLLER
9
PROGRAM FOR DAC INTERFACE USING 8051 MICROCONTROLLER

10 PROGRAM FOR STEPPER MOTOR INTERFACE WITH 8051

MICROCONTROLLER

11 PROGRAM FOR KEYBOARD/ DISPLAY INTERFACE WITH 8051

MICROCONTROLLER
12
PROGRAM FOR SERIAL COMMUNICATION WITH 8051 MICROCONTROLLER

3
 EXPT.NO 1- STUDY OF MICROPROCESSOR KIT 8085
AIM:
To Study the microprocessor kit 8085

APPARATUS REQUIRED:
1. Microcontroller kit with Power chord
2.Manual
THEORY:
A microprocessor - also known as a CPU or central processing unit - is a
complete computation engine that is fabricated on a single chip.

Fig.1. Architecture of Microprocessor

The first microprocessor was the Intel 4004, introduced in 1971. The 4004
was not very powerful - all it could do was add and subtract, and it could only do that 4
bits at a time. But it was amazing that everything was on one chip. Prior to the 4004,
engineers built computers either from collections of chips or from discrete components

4
(Transistors and such). The 4004 powered one of the first portable electronic
calculators. The architecture of microprocessor is shown in the above fig.

Control Unit
Generates signals within uP to carry out the instruction, which has been
decoded. In reality causes certain connections between blocks of the uP to be opened or
closed, so that data goes where it is required, and so that ALU operations occur.

Arithmetic Logic Unit

The ALU performs the actual numerical and logic operation such as ‘add’,
‘subtract’, ‘AND’, ‘OR’, etc. Uses data from memory and from Accumulator to
perform arithmetic. Always stores result of operation in Accumulator.

Registers
The 8085/8080A-programming model includes six registers, one accumulator,
and one flag register, as shown in Figure. In addition, it has two 16-bit registers: the
stack pointer and the program counter. They are described briefly as follows. The
8085/8080A has six general-purpose registers to store 8-bit data; these are identified as
B,C,D,E,H, and L as shown in the figure. They can be combined as register pairs - BC,
DE, and HL - to perform some 16-bit operations. The programmer can use these
registers to store or copy data into the registers by using data copy instructions.

Accumulator
The accumulator is an 8-bit register that is a part of arithmetic/logic unit
(ALU). This register is used to store 8-bit data and to perform arithmetic and logical
operations. The result of an operation is stored in the accumulator. The accumulator is
also identified as register A.

Flags
The ALU includes five flip-flops, which are set or reset after an operation
according to data conditions of the result in the accumulator and other registers. They
are called Zero(Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags;
they are listed in the Table and their bit positions in the flag register are shown in the

5
Figure below. The most commonly used flags are Zero, Carry, and Sign. The
microprocessor uses these flags to test data conditions.

Program Counter (PC)

This 16-bit register deals with sequencing the execution of instructions. This
register is a memory pointer. Memory locations have 16-bit addresses, and that is why
this is a 16-bit register.

Stack Pointer (SP)

The stack pointer is also a 16-bit register used as a memory pointer. It points to
a memory location in R/W memory, called the stack. The beginning of the stack is
defined by loading 16-bit address in the stack pointer. The stack concept is explained in
the chapter "Stack and Subroutines."

Instruction Register/Decoder
Temporary store for the current instruction of a program. Latest instruction sent
here from memory prior to execution. Decoder then takes instruction and ‘decodes’ or
interprets the instruction. Decoded instruction then passed to next stage.

Memory Address Register

Holds address, received from PC, of next program instruction. Feeds the
address bus with addresses of location of the program under execution.

Control Generator
Generates signals within uP to carry out the instruction which has been
decoded. In reality causes certain connections between blocks of the uP to be opened or
closed, so that data goes where it is required, and so that ALU operations occur.

Register Selector
This block controls the use of the register stack in the example. Just a logic
circuit which switches between different registers in the set will receive instructions
from Control Unit.

6
General Purpose Registers
Microprocessor requires extra registers for versatility. Can be used to store
additional data during a program. More complex processors may have a variety of
differently named registers.

Introduction to Microprocessor Trainer kit:

HEX Keypad:
LOAD RES 0 8 H
SAVE SET 1 9 L
CODE INC 2 A
STEP DEC 3 B
VI SPH 4 C
RUN SPL 5 D
EXEC PCH 6 E
REG PCL 7 F

LOAD:
This command is opposite to save command. The contents of audio cassette
block is loaded (retrieved back) in the system RAM from a given DS (file name).

SAVE:
This command is used to save the contents of specified block on to a audio
cassette for permanent storage.

CODE:
When this command key is pressed the address field remains blank, Data field
shows a dot indicating that it expects a code. User is provided with a table of codes,
indicating the meaning and prerequisites of each code. User loads the appropriate code
and executes it by pressing EXEC. The monitor branches to the appropriate sub-
routines pointed by the code.

7
STEP:
Mere running a program with RUN is done whenever the program
development is complete i.e. to runa final working program. During the program
development stage some sort of aid to execute the part of program at a time and then
test its success is required.
The STEP command helps you to do the above.
There are two ways of stepping the program.

SINGLE STEPPING:
To execute single instruction at a time, using STEP command. The STEP
command requires a start address, break address and the no.of times the br should
occur.

BREAK POINT:
Set a software breakpoint RST1. This software breakpoint can be done using
the RUN command. It requires RST1 (CFH) to be inserted to a location where you
want to break. The disadvantage of this method is that you have to insert and remove
'CF' and you have to operate in the RAM area only.

EXEC:
Pressing EXEC will place the data field contents into the named register and
terminate the command.

REG:
This command allows you to display and optionally modify the contents of
8085 CPU registers. The various registers are A, B, C, D, E, F, I, H, L, SPH, SPL,
PCH, PCL. (H – higher byte, L – lower byte)

RES:
On RES, the display shows MP – 85 as a sign on message, indicating that the
monitor is ready to accept a command. Pressing any non-command key generates “Err”
message. After “-Err” user can immediately give a valid command.

8
Fig.2.Micro-85 Basic functional block diagram

9
SET:
You can use this command to SET the address of a required memory location.
A dot in the address field of display indicated that the entry will be displayed in the
address field.

INC:
Pressing INC, first time will shift the dot to the data field of display. Data field
will show the contents of the memory location pointed by the address set. You can
modify or retain the data field to any value.

DEC:
DEC acts as similar to INC, except the address field is decremented, pointing to
previous memory locations.

SPH: Stack pointer Register (Higher byte)

SPL: Stack pointer Register (Lower byte)

PCH: Program Counter Register (Higher byte)

PCL: Program Counter Register (Lower byte)

0 – F: Hex Keypad

H,L: Registers H & L

Peripheral Interfacing Devices:

1. IC – 8251 (Programmable Synchronous and asynchronous serial data transmiter)

2. IC – 8253 (Programmable interval Timer /Counter)

3. IC – 8255 (Programmable Parallel IO Device)

4. IC – 8279 (Keyboard Display Interface)

Memory Devices:
1. IC – 6264 (RAM)
2. IC – 2764 (EPROM)

10
Memory Address Space:
ROM : 0000 – 1FFF
RAM : 2000 – 3FFF

Memory Address Space Used by Firmware Program: 2000 – 20FF

User RAM Area -4100-5FFF

Students should not use this address range for their program or do not modify the

content of these locations Memory is expandable to 64K Bytes by interfacing

appropriate RAM IC in the empty sockets.

Onboard Interfaces:

The kit has following onboard Interfaces:

− Parallel I/O using 8255

− Serial I/O using 8251/8253

− Keyboard/Display using 8279

− ADC/DAC using 8255 / Latch -373

Study of Interrupts:

The Kit uses following interrupts

− RST 7.5 –

− RST 5.5 - 8279

− NMI - Counter 0 output

− RST 6.5 - Used to implement Single Step

− INTR - Used to implement Single Step

MEMORY CONFIGURATION:

This section explains the memory mapping facilities available on Micro-85.

The memory configuration is given in the following figure from which a clear idea

about the memory allocation can be had.

EPROM EXPANSION FFFF

11
 C000 BFFF

USER RAM EXPANSION

6000 5FFF
USER RAM AREA
4100 40FF
MONITOR PROGRAM
AREA
4000
3FFF
EPROM EXANSION
2000
1FFF
MONITOR EPROM
AREA
0000

RESULT:

Thus the microprocessor kit 8085 hardware & software details were studied.

EXPT.NO 2- PROGRAM FOR 8 BIT ARITHMETIC OPERATIONS WITH

8085 MICROPROCESSOR

12
AIM:

To write a program to do 8 bit arithmetic operation such as

i) 8 bit addition ii) 8 bit subtraction iii) 8 bit Multiplication
iv) 8 bit division

APPARATUS REQUIRED:

1. Microprocessor kit
2. Power chord
8- BIT ADDITION
ALGORITHM:

1. Start the Process.

2. Initialize the memory location for getting augend and addend.
3. Initialize one register to store carry.
4. Get augend to accumulator and increment the memory pointer to get addend in
memory.
5. Add augend & addend in memory.
6. Check for carry. If carry is not present go to step 8.
7. Else Increment the Register assigned for carry storage.
8. Store sum (accumulator content) and carry in the specific memory location.
9. Stop the process.

PROGRAM:

13
 MEMORY
LABEL MNEMONIC OPCODE COMMENTS
ADDRESS
21 Load address of the data in HL
4100 LXI H, 4200
register pair for initializing the
00 memory location to get augend
4101
and addend.

42
4102

4103 MVI B, 00 06 Initialize B register to store

4104 00 carry
7E Move the content of the
4105 MOV A,M memory(augend)to accumulator

4106 INX H 23 Increment the memory pointer

86 Add the content of the memory
(addend)to the content present in
4107 ADD M
the accumulator

4108 JNC XXX D2 If no carry, go to xxx label

4109 0C specified location,
410A 41
410B INR B 04 Increment the register for carry
410C XXX INX H 23 Increment the memory pointer
77 Store the content of the
410D MOV M,A
accumulator (Sum)to memory
410E INX H 23 Increment the memory pointer
70 Store the content of the B
410F MOV M,B
register (Carry)to memory
4110 HLT 76 End the program

8- BIT SUBTRACTION
ALGORITHM:

14
 1. Start the Process.
2. Initialize the memory location for getting minuend and subtrahend.
3. Initialize one register to store barrow.
4. Get minuend to accumulator and increment the memory pointer to get
subtrahend in memory.
5. Subtract subtrahend from minuend in memory.
6. Check for barrow. If barrow is not present go to 8 step.
7. Else Increment the Register assigned for carry storage.
8. Store difference (accumulator content) and barrow in the specific memory
location.
9. Stop the process.

PROGRAM:

MEMORY
LABEL MNEMONIC OPCODE COMMENTS
ADDRESS
4100 LXI H, 4200 21 Load address of the data in
4101 00 HL register pair for
initializing the memory
4102 42 location to get minuend and
subtrahend
4103 MVI B, 00 06 Initialize B register to store
borrow
4104 00
4105 MOV A,M 7E Move the content of the
memory to accumulator
4106 INX H 23 Increment the memory pointer
4107 SUB M 96 Subtract subtrahend from
minuend in memory
4108 JNC XXX D2 If no borrow, Go to xxx ,
4109 0C
410A 41
410B INR B 04 Increment the borrow register
410C XXX INX H 23 Increment the memory pointer
410D MOV M,A 77 Store the content of the
accumulator(Diff) to memory
410E INX H 23 Increment the memory pointer
410F MOV M,B 70 Move the content of the B
register (borrow )to memory
4110 HLT 76 End the program
8-BIT MULTIPLICATION
ALGORITHM:
1. Start the process.

15
 2. Initialize the memory location for getting the multiplier and multiplicand and
transfer to 2 registers.
3. Clear the accumulator.
4. Initialize a register to store carry.
5. Add the accumulator content with the multiplier.
6. Check for carry. If carry is not present go to step 8.
7. Otherwise increment the register assigned for carry.
8. Decrement the multiplicand value.
9. Check for zero. If zero is not present go to step 5.
10. Else Store the (accumulator content) product & carry content in the specified
memory location.
11. Stop the process.

PROGRAM:
MEMORY
LABEL MNEMONIC OPCODE COMMENTS
ADDRESS
4100 LXI H, 4200 21 Load address of the data in
4101 00 HL register pair for
4102 42 initializing the memory
location to get multiplier&
multiplicant
4103 MOV B, M 46 Move the content(multiplier)
of the memory to B register
4104 INX H 23 Increment the memory pointer
4105 MOV C,M 4E Move the content
(multiplicant) of the memory
to C register
4106 XRA A AF Clear accumulator .
MVI E,00 1E Initialize E register to store
4107 00 carry.

4108 Loop2 ADD B 80 Add the content of B register

to the content of accumulator
4109 JNC Loop1 D2 If no carry, Go to loop1

16
 410A 0E
410B 41
410C INR E 1C Increment E register
410D Loop1 DCR C 0D Decrement C register
410E JNZ Loop2 C2 If the result is not zero, Go to
410F 09 loop2
4110 41
4111 INX H 23 Increment the memory pointer
4112 MOV M, A 77 Store the content of the
accumulator(lower order byte)
to memory
4113 INX H 23 Increment the memory pointer
4114 MOV M, E 73 Store the content of the E
register (higher order byte) to
memory
4115 HLT 76 End the program

8-BIT DIVISION

ALGORITHM:

1. Start the process.

2. Initialize one register for quotient storage and initialize memory for getting
divisor and dividend
3. Get the divisor in a register.
4. Get the dividend in the accumulator.
5. Subtract the divisor from the accumulator.
6. Check for carry. If carry is present go to step 8
7. Otherwise increment the register assigned for quotient storage & go to step 5.
8. Add divisor with the accumulator value for reminder.
9. Store the quotient & reminder in the specified memory location.
10. Stop the process.

PROGRAM:

17
MEMORY
LABEL MNEMONIC OPCODE COMMENTS
ADDRESS

4100 MVI C, 00 0E Initialize C register for

4101 00 quotient storage
4102 LXI H, 4200 21 Load address of first number
4103 00 in HL register pair for
4104 initializing memory for
42
getting divisor and dividend
4105 MOV B, M Move the content(divisor) of
46
the memory to B register
4106 INX H 23 Increment the memory pointer
4107 MOV A, M Move the content (dividend)
7E
of the memory to C register
4108 Loop2 SUB B Subtract the content of B
register from content of
90
accumulator.(Dividend)

4109 JC Loop1 DA
If carry produced, Go to loop1
410A 10
410B 41
410C INR C Increment C register for
0C
Quotient
410D JMP Loop2 C3
Go to loop2
410E 08
410F 41
4110 Loop1 ADD B Add the content of B register
from content of accumulator
80
for Reminder.

4111 INX H 23 Increment the memory pointer

4112 MOV M, C 71 Store the content of the C
register (quotient) to memory
4113 INX H 23 Increment the memory pointer
4114 MOV M,A 77 Store the content of the
accumulator(reminder) to
memory
4115 HLT 76 End the program

OBSERVATION - 8 BIT ADDITION

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 INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
4200 02 FF 4202 04 FE
4201 02 FF 4203 00 01

OBSERVATION - 8 BIT SUBTRACTION

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
4200 10 05 4202 0B F5
4201 05 10 4203 00 01

OBSERVATION - 8 BIT MULTIPLICATION

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
4200 1A FF 4202 4E 01
4201 03 FF 4203 00 FE

OBSERVATION - 8 BIT DIVISION

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
4200 1A 1A 4202 03 03
4201 4E 4F 4203 00 01

RESULT:

Thus programs for 8 bit arithmetic operations were written, executed

successfully and outputs were verified.

VIVA QUESTIONS
19
1. What is Microprocessor?
2. Specify The Applications OF Microprocessor.
3. What are basic elements present in a Microprocessor?
4. Classify the instruction set of 8085.
5. What is the function ALE & ALU?

EXPT.NO 3- PROGRAM FOR 16 BIT ARITHMETIC OPERATIONS WITH

8085 MICROPROCESSOR

20
AIM:
To write a program to do 16 bit arithmetic operation such as
i) 16 bit addition ii) 16 bit subtraction iii) 16 bit Multiplication
iv) 16 bit division

APPARATUS REQUIRED:

1. Microprocessor kit
2. Power chord

16- BIT ADDITION

ALGORITHM:

1. Start the process.

2. Initialize a register for carry storage.
3. Get the LSB & MSB of addend in another register pair.
4. Get the LSB and MSB of addend in another register pair.
5. Add the agent and addend.
6. Check for carry. If carry is not present go to step 8.
7. If carry is present increment the register assigned for carry storage.
8. Store the sum and carry content in the specified memory location.
9. Stop the process

PROGRAM:

MEMORY
LABEL MNEMONIC OPCODE COMMENTS
ADDRESS
4100 MVI B,00 06 Initialize B register to store
21
 00 carry
4102 LHLD 4200 2A Load the lower byte of addend
00 from memory location 4200
42 to L register and higher byte
from 4201 to H register.
4105 XCHG EB Exchange the contents of HL
with DE
4106 LHLD 4202 2A Load the lower byte of augend
4107 02 from memory location 4202
4108 42 to L register and higher byte
from 4203 to H register.
4109 DAD D 19 Add the contents of HL with
DE
410A JNC L1 D2 If no carry, Go to L1
0E
41
410D INR B 04 If carry is set, increment B
register
410E L1 SHLD 4204 22 Store the lower byte of the
04 sum in the memory location
42 4204 and store the higher byte
in 4205
4111 MOV A,B 78 Move the carry to
accumulator
4112 STA 4206 32 Store the carry in memory
06 location 4206
42
4115 HLT 76 End the program

16 BIT SUBTRACTION.
1. Start the process.
2. Get the LSB and MSB of minuend in two registers.
3. Initialize a register for borrow storage.
4. Get the LSB and MSB of subtrahend in two registers.
22
 5. Subtract the LSB of subtrahend from LSB of minuend & store LSB difference.
6. Subtract the MSB of subtrahend from MSB of minuend along borrow.
7. Check for carry. If carry is not present go to step 9
8. Else increment the register assigned for borrow storage.
9. Store the difference and borrow content in the specified memory location.
10. Stop the process.

PROGRAM:

ADDRESS LABEL MNEMONICS OPCODE COMMENTS

4500 LXI D ,0000 11 Initialize B register to store
4501 00 borrow
4502 00
4503 LHLD 4300 2A L Load the lower byte of
4504 00 minuend from memory
4505 43 location 4300 to L register
and higher byte from 4301
to H register.
4506 MOV C , L 4D Move the lower byte to C
register
4507 MOV B, H 44 Move the higher byte to B
register
4508 LHLD 4302 2A Load the lower byte of
4509 02 subtrahend from memory
450A 43 location 4302 to L register
and higher byte from 4303
to H register.
450B MOV A , C 79 Move the lower byte of
minuend to Accumulator
450C SUB L 95 Subtract the lower byte of
the subtrahend from
Accumulator content
450D MOV L , A 6F Move the result to L
register.
450E MOV A , B 78 Move the higher byte of
minuend to Accumulator
450F SBB H 9C Subtract the higher byte of
the subtrahend with
borrow from Accumulator
content
4510 MOV H , A 67 Move the result to H
register.
4511 JNC SUB D2 If no carry, Go to SUB
4512 15
23
4513 45
4514 INX D 13 If carry exists (borrow),
increment DE register pair.
4515 SUB SHLD 4304 22 Store the lower byte of the
4516 04 difference in the memory
4517 43 location 4304 and store the
higher byte in 4305
4518 XCHG EB Exchange the borrow to
HL register pair
4519 SHLD 4306 22 Store the borrow in
451A 06 memory location 4306&
451B 43 4307
451C HLT 76 End the program

16 BIT MULTIPLICATION
1. Start the process.
2. Initialize a register pair for carry storage.
3. Get the multiplicand and multiplier from memory in register pairs.
4. Move the multiplicand to stack pointer.
5. Clean the HL Register pair.
6. Add the HL content with the multiplicand.
7. Check for carry. If carry is not present go to step 9.
8. Increment the register pair assigned for carry storage.
9. Decrement the multiplier check for zero.
10. If non Zero is not present go to step 6
11. Else Store the product and carry in specified memory location.
12. Stop the process.

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

4500 LXI B , 0000 01 Make BC as 0000 for carry
4501 00 storage

4502 00
4530 LHLD 4300 2A Get the Multiplier data in HL
4504 00
4505 42

24
4506 XCHG EB Exchange HL and DE
4507 LHLD 4302 2A Get the Multiplicand in HL
4508 02
4509 43
450A SPHL F9 Transfer it to stack pointer
450B LXI H , 0000 21 Make HL as 0000
450C 00
450D 00
450E MUL DAD SP 39 Add Multiplicand &
Multiplier
450F JNC CAR D2 Go to CAR if no carry
4510 13
4511 45
4512 INX B 03 Increment BC by one
4513 CAR DCX D 1B Decrement DE by one
4514 MOV A , E 7B Transfer E content to A
4515 ORA D B2 OR the A content with D
4516 JNZ MUL C2 Go to MUL if result is zero
4517 0E
4518 45
4519 SHLD 4304 22 Store the product in memory
451A 04
451B 43
451C MOV L , C 69 Move C to L
451D MOV H , B 60 Move B to H
451E SHLD 4306 22 Store carry in memory
451F 06
4520 43
4521 HLT 76 Stop the program
PROGRAM:

16 BIT DIVISION
1. Start the process.
2. Initialize a register pair for quotient storage.
3. Get the LSB and MSB of dividend in 2 registers.
4. Get the LSB and MSB of divisor in 2 registers.
25
 5. Subtract the LSB of divisor from dividend & transfer partial different in a
register.
6. Subtract the MSB of divisor from MSB dividend with carry.
7. Check for carry. If carry is present go to step 9.
8. Else increment the register assigned for quotient & go to step5.
9. Add the carry with divisor to get the reminder.
10. Store the quotient and reminder in the specified memory location.
11. Stop the process.

PROGRAM:

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

4500 LXI D , 0000 00 Initialize quotient (DE)as
4501 00 0000
4502 00
4530 LHLD 4300 2A Load the divisor in HL
4504 00
4505 43
4506 MOV C , L 4D Move L to C
4507 MOV B , H 44 Move H to B
4508 LHLD 4302 2A Load the dividend in HL
4509 02
450A 43
450B REP MOV A , L 7D Move L to A
450C SUB C 91 Subtract C from A
450D MOV L , A 6F Move A to L
450E MOV A , H 7C Move H to A
450F SBB B 98 Subtract with borrow B
from A
4510 MOV H , A 67 Move A to H
4511 JC REM DA Go to REM is carry arises
4512 18
4513 45
4514 INX D 13 Increment DE by one
4515 JMP REP C3 Go to to REP
4516 0B

26
4517 45
4518 REM DAD B 09 Add BC with HL

4519 SHLD 4304 22 Store (Reminder)HL in

451A 04 memory
451B 43
451C XCHG EB Exchange DE with HL
451D SHLD 4306 22 Store(Quotient) HL in
451E 06 memory
451F 43
4520 HLT 76 Stop the program

OBSERVATION - 16 BIT ADDITION

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
4200 DE FF 4204 EF FE
4201 DE FF 4205 EF FF
4202 11 FF 4206 00 01
4203 11 FF 4207 00 00

27
OBSERVATION - 16 BIT SUBTRACTION

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
4200 1A 31 4204 79 20
4201 A1 84 4205 80 E1
4202 A1 51 4206 00 01
4203 12 65 4207 00 00

OBSERVATION - 16 BIT MULTIPLICATION

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
4200 02 4204 02
4201 03 4205 23
4202 01 4206 30
4203 10 4207 00

OBSERVATION - 16 BIT DIVISION

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
4200 2A 2A 4204 00 02
4201 11 11 4205 00 00
4202 A8 AA 4206 04 04
4203 44 44 4207 00 00

RESULT:

Thus programs for 16 bit arithmetic operations were written, executed

successfully and output were verified.

VIVA QUESTIONS

1. Explain the difference between a JMP instruction and CALL instruction.

2. What is the difference between the shift and rotate instructions?
3. What is meant by interrupt?
4. What are the interrupts available in 8085?
5. What are operations performed on data in 8085
28
 EXPT.NO 4 - PROGRAM FOR BLOCK OPERATIONS WITH 8085
MICROPROCESSOR

AIM:
To write a program to do Block operation such as i) Forward Block Transfer ii)
Reserve Block Transfer

29
APPARATUS REQUIRED:
1. Microprocessor kit
2. Power chord

FORWARD BLOCK TRANSFER

ALGORITHM:
1. Start the Process.
2. Initialize memory to get data (say source memory).
3. Initialize memory to store the data (say destination memory).
4. Get the block size in any register through accumulator from memory(say count)
5. Get data from source memory to accumulator and store it in destination
memory.
6. Increment source & Destination memory pointer and decrement the block
size(count)
7. Check for zero. If zero in not there go to step5.
8. Stop the process.

PROGRAM:

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

4500 LXI H , 4200 21 Initialize HL register pair
4501 00 with source address
4502 42
4503 LXI D , 4301 11 Initialize DE register pair
4504 01 with destination address
4505 43
4506 MOV C , M 4E Move the count data from
memory location as pointed
by HL rp to C register
4507 xxx INX H 23 Increment source address
4508 MOV A , M 7E Move the data from memory
location as pointed by HL rp
to A register
4509 STAX D 12 Store the data from reg A to
destination whose address is
pointed by DE rp
450A INX D 13 Increment destination address
450B DCR C 0D Decrement the counter

30
450C JNZ xxx D2 If counter is zero, terminate
450D 07 the program. Else repeat the
450E 45 program for next data.
450F HLT 76 Terminate the program

REVERSE BLOCK TRANSFER

ALGORITHM:

1. Start the process.

2. Initialize memory to get data(say source memory)
3. Initialize memory to get data(say destination memory)
4. Get the block size in any register through accumulator from memory(say count)
5. Get data in accumulator from source memory and store it in destination
memory.
6. Increment the count & destination memory.
7. Check for zero. If zero is not there, go to step5.
8. Stop the process.

PROGRAM:

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

4100 LXI H , 4200 21 Initialize HL register pair with
4101 00 source address
4102 42
4103 LXI D , 4301 11 Initialize DE register pair with
4104 01 destination address
4105 43
4106 MOV C , M 4E Move the count data from
memory location as pointed by
HL rp to C register

4107 MOV E , M 5E Move the data from memory

location as pointed by HL rp to
C register
4108 XXX INX H 23 Increment source address
4109 MOV A , M 7E Move the data from memory
location as pointed by HL rp to
A register
410A STAX D 12 Store the data from reg A to
destination whose address is
31
 pointed by DE rp
410B DCX D 1B Decrement destination address
410C DCR C 0D Decrement the counter
410D JNZ XXX C2 If counter is zero, terminate the
410E 08 program. Else repeat the
410F 41 program for next data.
4110 HLT 76 Terminate the program

OBSERVATION - BLOCK TRANSFER

FORWARD TRANSFER REVERSE TRANSFER

INPUT OUTPUT INPUT OUTPUT
ADDRESS DATA ADDRESS DATA ADDRESS DATA ADDRESS DATA
4200 04 4200 04
4201 01 4301 01 4201 01 4301 04
4202 02 4302 02 4202 02 4302 03
4203 03 4303 03 4203 03 4303 02
4204 04 4304 04 4204 04 4304 01

32
RESULT:

Thus programs for block operations were written, executed successfully and
outputs were verified.

VIVA QUESTIONS

1. How many machine cycles does 8085 have, mention them.

2. Mention the categories of instruction and give two examples for each category.
3. What is the use of addressing modes, mention the different types?
4. Define stack and explain stack related instructions.
5. Define Flags of 8085.

33
 EXPT.NO 5- PROGRAM FOR CODE CONVERSIONS WITH 8085
MICROPROCESSOR

AIM:
To write a program to do Block operation such as
i) HEXA DECIMAL to ASCII
ii) ASCII to HEXA DECIMAL
iii) BINARY TO BCD CODE CONVERSION
iv) BCD TO BINARY CODE CONVERSION

APPARATUS REQUIRED:
1. Microprocessor kit
2. Power Chord

HEXA DECIMAL to ASCII

34
ALGORITHM:

1. Start the process.

2. Get the Hexa decimal number in one register.
3. Convert this packed number into unpacked numbers in 2 registers.
4. Compare these two un-Packed numbers with the 0A.
5. If it has carry add 30 with the unpacked number.
6. If not add 37 with the unpacked number.
7. Store the added value (ASCII) in the specified memory location.
8. Stop the process.

PROGRAM:

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

4100 LDA 4200 3A Load the Accumulator with
4101 00 the value present in 4200
4102 42
4103 MOV B , A 47 Move the content of
Accumulator to B register
4104 ANI 0F E6 AND the content of
4105 0F Accumulator with 0F
4106 CPI 0A FE Compare the content of
4107 0A Accumulator with 0A
4108 JC LOOP1 DA If carry is set, Go to LOOP1
4109 0D
410A 41
410B ADI 07 C6 Add 07 to the content of
410C 07 Accumulator
410D LOOP1 ADI 30 C6 Add 30 to the content of
410E 30 Accumulator
410F STA 4201 32 Store the content of
4110 01 accumulator in 4201
4111 42
4112 MOV A , B 78 Move the content of B
register to Accumulator
4113 ANI F0 E6 AND the content of
4114 F0 Accumulator with F0
4115 MVI D , 04 16 Move 04 to D register
4116 04
4117 LOOP2 RRC 0F Rotate the accumulator
content right.
4118 DCR D 15 Decrement D register by
one.
4119 JNZ LOOP2 C2 If no Zero, Go to to LOOP2
411A 17
411B 41
411C CPI 0A FE Compare the content of
35
411D 0A Accumulator with 0A
411E JC LOOP3 DA If carry is set, Go to LOOP3
411F 23
4120 41
4121 ADI 07 C6 Add 07 to the content of
4122 07 Accumulator
4123 LOOP3 ADI 30 C6 Add 30 to the content of
4124 30 Accumulator
4125 STA 4202 32 Store the content of
4126 02 accumulator in 4201
4127 42
4128 HLT 76 Stop the program

ASCII to HEXA DECIMAL

ALGORITHM:

1. Start the process.

2. Get the ASCII code number in the accumulator through memory.
3. Subtract 30 from the ASCII code number.
4. If the different is less than 0A go to step 6
5. If not, subtract 07 from first difference value.
6. Store the difference in the specified memory location.
7. Stop the process.

PROGRAM:

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

4100 LDA 4200 3A Load the Accumulator with
4101 00 the value present in 4200
4102 42
4103 SUI 30 D6 Subtract 30 from the
4104 30 Accumulator content
4105 CPI 0A FE Compare the content of
4106 0A Accumulator with 0A
4107 JC Loop1 DA If carry is set, Go to LOOP1
4108 0C
4109 41
410A SUI 07 D6 Subtract 07 from the

36
410B 07 Accumulator content
410C Loop1 STA 4201 32 Store the content of
410D 01 accumulator in 4201
410E 42
410F HLT 76 Stop the program

BINARY TO BCD CODE CONVERSION

ALGORITHM:

1. Start the process.

2. Get the binary number in the form of Hexa decimal in accumulator from
memory
3. Initialize any two registers to 00.
4. Compare the number with 64. If it is less than 64 go to step step6.
5. Subtract 64 from the accumulator content. If it has no carry increment the
register assigned for quotient (1) and go to step4.
6. Compare the number with 0A. if it is less than 0A go to step8.
7. If not subtract 0A from number which is in accumulator & increment the
register assigned for quotient (2) and go to step6.
8. Store the number in one register (Reminder).
9. Left shift quotient(2) to 4 times and add with reminder.
10. Store the result (quotient)&added value in the specified location.
11. Stop the process.

PROGRAM:

ADDRESS LABEL MNEMONICS OPCODE COMMENTS

4100 LDA 4200 3A Load the Accumulator with the
4101 00 value present in 4200
4102 42
4103 MVI C,00 0E Initialize C register as 00
4104 00
4105 MVI D,00 16 Initialize D register as 00
4106 00
4107 XYZ CPI 64 FE Compare the content of
4108 64 Accumulator with 64
4109 JC XXX DA If carry is set, Go to XXX
410A 12
410B 41
410C SUI 64 D6 Subtract 64 from the
410D 64 Accumulator content

37
410E INR C 0C Increment C register by one.
410F JMP XYZ C3 Go to XYZ
4110 07
4111 41
4112 XXX CPI 0A FE Compare the content of
4113 0A Accumulator with 0A
4114 JC XYY DA If carry is set, Go to XYY
4115 1D
4116 41
4117 SUI 0A D6 Subtract 0A from the
4118 0A Accumulator content
4119 INR D 14 Increment D register by one.
411A JMP XXX C3 Go to XXX
411B 12
411C 41
411D XYY MOV E,A 5F Move the content of
Accumulator to C register.
411E MOV A,D 7A Move the content of D register
to Accumulator.
411F RLC 07 Rotate the Accumulator
content left
4120 RLC 07 Rotate the Accumulator
content left
4121 RLC 07 Rotate the Accumulator
content left
4122 RLC 07 Rotate the Accumulator
content left
4123 ADD E 83 Add the content of C register
with Accumulator
4124 STA 4201 32 Store the content of
4125 01 Accumulator in 4201
4126 42
4127 MOV A,C 79 Move the content of E register
to Accumulator.
4128 STA 4202 32 Store the content of
4129 02 Accumulator in 4202
412A 42
412B HLT 76 Stop the program

38
BCD TO BINARY CODE CONVERSION

ALGORITHM:

1. Start the process.

2. Get the BCD number in the accumulator through memory.
3. Convert this backed number (BCD) in to un backed number. By AND with 0F
to get un backed LSB, AND with F0 to get un backed MSB.
4. Multiply the un backed MSB with 0A.
5. Add the un backed LSB with the multiplied un backed MSB to get the binary
correspondent BCD.
6. Store the Binary code correspondent BCD in the specified memory location.
7. Stop the process.

PROGRAM:

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

4100 LDA 4200 3A Load the Accumulator with
4101 00 the value present in 4200
4102 42
4103 MOV B,A 47 Move the content of
Accumulator to B register.
4104 ANI 0F E6 AND the content of
4105 0F accumulator with 0F
4106 MOV C,A 4F Move the content of
Accumulator to C register.
4107 MOV A,B 78 Move the content of B register
to Accumulator.
4108 ANI F0 E6 AND the content of
4109 F0 accumulator with 0F
410A RLC 07 Rotate the Accumulator
content right
410B RLC 07 Rotate the Accumulator
content right
410C RLC 07 Rotate the Accumulator
content right
410D RLC 07 Rotate the Accumulator
39
 content right
410E MOV D,A 57 Move the content of
Accumulator to D register.
410F XRA A AF XOR the content of
Accumulator with itself
4110 Loop1 ADI 0A C6 Add the content of
4111 0A Accumulator with 0A
4112 DCR D 15 Decrement D register by one
4113 JNZ Loop1 C2 If no zero, Go to to Loop1
4114 10
4115 41
4116 ADD C 81 Add the content of
Accumulator with C register
4117 STA 4201 32 Store the Accumulator content
4118 01 in 4400
4119 42
411A HLT 76 Stop the program

OBSERVATION - CODE CONVERSION

HEXA DECIMAL to ASCII ASCII to HEXA DECIMAL

INPUT OUTPUT INPUT OUTPUT

ADDRESS DATA ADDRESS DATA ADDRESS DATA ADDRESS DATA
4200 A3 4201 33 4200 41 4201 0A
4202 41

OBSERVATION - BINARY TO BCD CODE CONVERSION

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
4200 6F 0A 4201 11 10
4202 01 00

OBSERVATION - BCD TO BINARY CODE CONVERSION

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
4200 96 10 4201 60 0A

40
RESULT:

Thus programs for code conversions were written, executed successfully and
outputs were verified.

VIVA QUESTIONS

1. What is the need for code conversions?

2. What is assembler?
3. How does the microprocessor differentiate between data and instruction?
4. Compare CALL and PUSH instructions
5. What is Subroutine?

41
 EXPT.NO 6- PROGRAM FOR ARRAY OPERATIONS WITH 8085
MICROPROCESSOR

AIM:
To write a program to do Array operation such as
i) Find The Largest Element In An Array
ii) ii) Find the Smallest Element in an Array
iii) iii) Search An Element In An Array

APPARATUS REQUIRED:
1. Microprocessor kit
2. Power Chord

LARGEST ELEMENT IN AN ARRAY

ALGORITHM:

1. Start the process.

2. Initialize memory for getting array of element(data)

42
 3. Get the block size in any register through accumulator from memory.

4. Initialize accumulator to zero.

5. Compare accumulator content with array element.

6. Check for carry. If there is carry, copy the memory content (Largest number) to

accumulator.

7. Increment the memory pointer & Decrement the count.

8. Check for zero. If zero is not there means go to step5.

9. Store accumulator content (largest no) in the specified memory location.

10. Stop the process.

PROGRAM:

ADDRESS LABEL MNEMONICS OP CODE COMMENTS

4300 LXI H 4200 21 Load address of first number
4301 00 in HL register pair for
4302 42 initializing the memory
location for getting elements
of an array.
4303 MOV B , M 46 Move the content of the
memory to B register to store
array size
4304 MVI A , 00 3E Initialize accumulator to 00.
4305 00
4306 XXX INX H 23 Increment the memory pointer
4307 CMP M BE Compare the content of the
memory to the content present
in the accumulator
4308 JNC YYY D2 If no carry, Go to YYY.
4309 0C
430A 43

43
430B MOV A , M 7E Move the content of the
memory to A register
430C YYY DCR B 05 Decrement the B register
430D JNZ XXX C2 f the result is not zero, Go to
430E 06 loop2
430F 43
4310 STA 4500 32 Store accumulator content
4311 00 (largest no) in the memory
4312 45 location 4500
4313 HLT 76 Stop the program

SMALLEST ELEMENT IN AN ARRAY

ALGORITHM:
1. Start the process.
2. Initialize memory for getting array of element(data)
3. Get the block size in any register through accumulator from memory.
4. Initialize accumulator to FF.
5. Compare accumulator content with array element.
6. Check for carry. If there is no carry, copy the memory content (smallest
number) to accumulator.
7. Increment the memory pointer & Decrement the count.
8. Check for zero. If there is no zero go to step5.
9. Store accumulator content (smallest t no) in the specified memory location.
10. Stop the process.

PROGRAM:
ADDRESS LABEL MNEMONICS OPCODE COMMENTS
4400 LXI H , 4200 21 Load address of first number
4401 00 in HL register pair for
4402 42 initializing the memory
location for getting elements
of an array.
4403 MOV B , M 46 Move the content of the
memory to B register to store
array size
4404 MVI A , FF 3E Initialize accumulator to FF.
4405 FF

44
4406 XYZ INX H 23 Increment the memory pointer
4407 CMP M BE Compare the content of the
memory to the content present
in the accumulator
4408 JC CCC DA If carry produced, Go to CCC,
4409 0C
440A 44
440B MOV A , M 7E Move the content of the
memory to A register
440C CCC DCR B 05 Decrement the B register
440D JNZ XYZ C2 f the result is not zero, Go to
440E 06 XYZ
440F 44
4410 STA 4500 32 Store accumulator content
4411 00 (largest no) in the memory
4412 45 location 4201
4413 HLT 76 Stop the program
SEARCH AN ELEMENT IN AN ARRAY
ALGORITHM:
1. Start the process.
2. Initialize memory for getting array of element.
3. Get the block size in any register from memory.
4. Get the element to be searched in Accumulator.
5. Compare this element with the array element.
6. Check for zero if zero is there go to step 10.
7. If not increment memory pointer & Decrement the block size.
8. Check for zero. If there is no zero go to step5.
9. If there is no element means, print FF to indicate no element & go to step11.
10. Store the location of the searched element.’
11. Stop the process.

PROGRAM:
ADDRESS LABEL MNEMONICS OPCODE COMMENTS
4400 LXI H , 4200 21 Load address of first number
4401 00 in HL register pair for
4402 42 initializing the memory
location for getting elements
of an array.
4403 MOV B , M 46 Move the content of the
memory to B register to store
array size
4404 MVI A , FF 3E Initialize accumulator to FF.
4405 FF (Element to be searched)

45
4406 INX H 23 Increment the memory pointer
4407 XYZ CMP M BE Compare the content of the
memory to the content present
in the accumulator
4408 JZ CCC CA
If carry produced, Go to CCC,
4409 18
440A 44
440B INX H 23 Increment the memory pointer
440C DCR B 05 Decrement the B register
440D JNZ XYZ C2
If the result is not zero, Go to
440E 07
XYZ
440F 44
4410 MVI A, FF 3E Move the immediate value FF
4411 FF in accumulator
4412 STA 4500 32 Store accumulator content in
4413 00 the memory location 4400
4414 45
4415 JMP HLT C3
4416 1B Go to HLT
4417 44
4418 CCC SHLD 4500 22
Store the HL pair value in
4419 00
4400
441A 45
441B HLT HLT 76 Stop the program

OBSERVATION - LARGEST NUMBER

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
4200 03 03 4500 0A FF
4201 05 AA
4202 0A CC
4203 09 FF

OBSERVATION - SMALLEST NUMBER

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
4200 03 04 4500 05 02
4201 05 AA
4202 0A CC
4203 09 FF
02
46
OBSERVATION - SEARCH AN ELEMENT IN AN ARRAY

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
4200 03 04 4500 03 FF
4201 05 AA 4501 42
4202 0A CC
4203 FF DD
02

RESULT:

Thus programs for array operation were written, executed successfully and
outputs were verified.

VIVA QUESTIONS

1. What is meant by Array?

2. What is the use of bi-directional buffers?
3. Explain the different instruction formats with examples
4. Explain LDA, STA and DAA instructions
5. Explain DCX & DCR instructions

47
 EXPT.NO 7- STUDY OF MICROCONTROLLER KIT 8051 &
PROGRAMMING 8051
AIM:

To write a program to do 8 bit arithmetic operation to 8051 Microcontroller such

as i) 8 bit addition ii) 8 bit subtraction
iii) 8 bit Multiplication iv) 8 bit division

APPARATUS REQUIRED:

1. Microcontroller kit
2. Power Chord

MICROCONTROLLER 8051 ARCHITECTURE

Microcontroller (MC) may be called computer on chip since it has basic
features of microprocessor with internal ROM, RAM, Parallel and serial ports within
single chip. Or we can say microprocessor with memory and ports is called as
microcontroller. This is widely used in washing machines, vcd player, microwave
oven, robotics or in industries.

It is 8-bit microcontroller, means MC 8051 can Read, Write and Process 8 bit
data. This is mostly used microcontroller in the robotics, home appliances like mp3
player, washing machines, electronic iron and industries. Mostly used blocks in the
architecture of 8051 are as follows:

ALU — Arithmetic Logical Unit

This unit is used for the arithmetic calculations.
48
A-Accumulator
This register is used for arithmetic operations. This is also bit addressable and 8 bit
register.

B-Register
This register is used in only two instructions MUL AB and DIV AB. This is also bit
addressable and 8 bit register.

PC-Program Counter
• Points to the address of next instruction to be executed from ROM
• It is 16 bit register means the 8051 can access program address from 0000H to
FFFFH. A total of 64KB of code. 16 bit register means.
Initial value 0 0 0 0 0000 0000 0 0 0 0 (0000H)
Final value 1111 1111 1111 1 1 1 1 (F F F FH)

• Initially PC has 0000H

• ORG instruction is used to initialize the PC ORG 0000H means PC initialize by
0000H
• PC is incremented after each instruction. ROM

8051 Flag Bits and PSW Register

→ Used to indicate the Arithmetic condition of ACC.
→ Flag register in 8051 is called as program status word (PSW). This special function
register PSW is also bit addressable and 8 bit wide means each bit can be set or reset
independently.

49
There are four flags in 8051
• P → Parity flag → PSW 0.0
1 – odd number of 1 in ACC
0 – even number of 1 in ACC
• OV(PSW 0.2) → overflow flag → this is used to detect error in signed
arithmetic operation. This is similar to carry flag but difference is only that carry flag is
used for unsigned operation.

• RS1(PSW0.4) RS0(PSW0.3) Register Bank Select

0 0 Bank 0
0 1 Bank 1
1 0 Bank 2
1 1 Bank 3
for selecting Bank 1, we use following commands

SETB PSW0.3 (means RS0=1)

CLR PSW0.4 (means RS1=0)
Initially by default always Bank 0 is selected.

• F0 → user definable bit

• AC → Auxiliary carry flag → when carry is generated from D3 to D4, it is set to 1, it

is used in BCD arithmetic.

Since carry is generated from D3 to D4, so AC is set.

•CY → carry flag → Affected after 8 bit addition and subtraction. It is used to detect
error in unsigned arithmetic opr. We can also use it as single bit storage.
SETB C → for cy = 1
CLR C → for cy = 0

Structure of RAM or 8051 Register Bank and Stack

→ 128 byte RAM is available in 8051
→ 128 byte = 27

50
Address range of RAM is 00H to 7FH.
→ In MC8051, 128 byte visible or user accessible RAM is available which is shown in
figure. Extra 128B RAM which is not user accessible. 80H to FFH used for storage of
SFR (special function register)

Four Register Banks

→ There are four register banks, in each register bank there are eight 8 bit register
available from R0 to R7
→ By default Bank 0 is selected.
For Bank 0, R0 has address 00H
R1 has address 01H
................
................
R7 has address 07H
For Bank 1, R0 has address 08H
R1 has address 09H
................
................
R7 has address 0FH
For selecting banks we use RS0 and RS1 bit of PSW.
→ R0 to R7 registers are byte addressable means.

Stack in 8051
→ RAM locations from 08H to 1FH can be used as stack. Stack is used to store the
data temporarily.

51
 Stack is last in first out (LIFO)
→ Stack pointer (SP)
• 8bit register
• It indicates current RAM address available for stack or it points the top of stack.
• Initially by default at 07H because first location of stack is 08H.
• After each PUSH instruction the SP is incremented by one while in MC after PUSH
instruction SP is decremented.
• After each POP instruction the SP is decremented.

ROM Memory Map in 8051

→ 4KB, 8KB, 16KB, 32KB, 64KB on chip ROM is available.
→ Max ROM space is 64 KB because 16 bit address line is available in 8051.
→ Starting address for ROM is 0000H (because PC which points the ROM is 16 bit
wide).
DPTR Data Pointer in 8051
16 bit register, it is divided into two parts DPH a
DPH for Higher order 8 bits, DPL for lower orde
DPTR, DPH, DPL these all are SFRs in 8051.

PIN DIAGRAM OF 8051:

52
•VCC → 5V supply
• VSS → GND
• XTAL2/XTALI are for oscillator input
• Port 0 – 32 to 39 – AD0/AD7 and P0.0 to P0.7
• Port 1 – 1 to 8 – P1.0 to P1.7
• Port 2 – 21 to 28 – P2.0 to P2.7 and A 8 to A15
• Port 3 – 10 to 17 – P3.0 to P3.7

• P 3.0 – RXD – Serial data input – SBUF

• P 3.1 – TXD – Serial data output – SBUF
• P 3.2 – INT0 – External interrupt 0 – TCON 0.1
• P 3.3 – INT1 – External interrupt 1 – TCON 0.3
• P 3.4 – T0 – External timer 0 input – TMOD
Input Output Ports
• There are four input output ports available P0, P1, P2, P3.

Special Function Register

 RAM scratch pad, there is extra 128 byte RAM which is used to store the SFRs

53
  Following figure shows special function bit address, all access to the fourI/O
ports CPU register, interrupt control register, timer/counter, UART,power
control are performed through registers between 80H and FFH.

Byte Addressable SFR with byte address

SP – Stack printer – 81H
DPTR – Data pointer 2 bytes
DPL – Low byte – 82H
DPH – High byte – 83H
TMOD – Timer mode control – 89H
TH0 – Timer 0 Higher order bytes – 8CH
TL0 – Timer 0 Low order bytes – 8AH
TH1 – Timer 1 High bytes = 80H
TL1 – Timer 1 Low order byte = 86H
SBUF – Serial data buffer = 99H
PCON – Power control – 87H.

8 BIT ADDITION

ALGORITHM:

1. Start the process

2. Initialize the memory location for input and output and one register to store
carry
3. Get augent to the accumulator and increment the memory pointer
4. Get adent in any of the register
54
5. Add addent with augent in the memory
6. Check for carry if carry is not present go to step 7
7. Increment the register assigned for carry storage
8. Store the carry and sum in specific memory location
9. Stop the process

ADDRESS LABEL MNEMONICS COMMENTS

8100 MOV DPTR,#8200 Move the input location to
8101 DPTR

8102
8103 MOV Ro,#00 Initialize R0 as 00 for carry
8104 storage
8105 MOVX A,@DPTR Move the content pointed by
DPTR to Accumulator
8106 MOV R1,A Move the Accumulator
content to R1
8107 INC DPTR Increment DPTR by one.
8108 MOVX A,@DPTR Move the content pointed by
DPTR to Accumulator
8109 ADD A,R1 Add R1 content with
Accumulator
810A JNC 810D Goto 810D if there is no
810B carry

810C INC R0 Increment R0 by one

810D INC DPTR Increment DPTR by one.
810E MOVX @DPTR,A Store the accumulator value
to the memory location
pointed by DPTR

810F INC DPTR Increment DPTR by one.

8110 MOV A,R0 Move the R1 content to
Accumulator
8111 MOVX @DPTR,A Store the accumulator value
to the memory location
pointed by DPTR

8112 HERE SJMP 8112 End the program

55
PROGRAM:

8 BIT SUBTRACTION
ALGORITHM:
1. Start the process
2. Initialize the memory location for input and output and one register to store
carry
3. Get minuend to the accumulator and increment the memory pointer
4. Get subtrahend in any of the register
5. Subtract minuend with subtrahend in the memory
6. Check for carry if carry is not present go to step 7
7. Increment the register assigned for borrow storage
8. Store the difference and borrow in specific memory location
9. Stop the process
PROGRAM:

56
ADDRESS LABEL MNEMONICS COMMENTS
8100 MOV DPTR,#8200 Move the data input location to
8101 DPTR
8102
8103 MOV Ro,#00 Initialize R0 as 00
8104
8105 MOVX A,@DPTR Move the content pointed by
DPTR to Accumulator
8106 MOV R1,A Move the Accumulator content
to R1
8107 INC DPTR Increment DPTR by one.
8108 MOVX A,@DPTR Move the content pointed by
DPTR to Accumulator
8109 CLR C Clear Carry bit
810A SUBB A,R1 Subtract R1 content from
810B Accumulator
810C JNC 810E Go to XX label specified
location when there is no carry
810D INC R0 Increment R0 by one
810E XX INC DPTR Increment DPTR by one.
810F MOVX @DPTR,A Move the accumulator value to
the memory location pointed by
DPTR
8110 INC DPTR Increment DPTR by one.
8111 MOV A,R0 Move the R0 content to
Accumulator
8112 MOVX @DPTR,A Move the accumulator value to
the memory location pointed by
DPTR
8113 SJMP 8113 End the program

57
8 BIT MULTIPLICATION

ALGORITHM:
1. Start the process
2. Initialize the memory location for input and output
3. Get multiplicand in any of the register
4. Get multiplicand to the accumulator and increment the memory pointer
5. Multiply multiplier with multiplicand
6. Store the product in specific memory location
7. Transfer the carry to the accumulator from the specified register
8. Store the carry in specific memory location
9. Stop the process

PROGRAM:

ADDRESS LABEL MNEMONICS COMMENTS

8100 MOV DPTR,#8200 Move the data input location
8101 to DPTR

8102

8103 MOVX A,@DPTR Move the content pointed by

DPTR to Accumulator
8104 INC DPTR Increment DPTR by one.
8105 MOV B,A Move the contents of
Accumulator to Register B
8106

8107 MOVX A,@DPTR Move the content pointed by

DPTR to Accumulator
8108 MUL AB Multiply the content of
Accumulator and B register
8109 INC DPTR Increment DPTR by one.
810A MOVX @DPTR,A Store the accumulator value
to the memory location
pointed by DPTR
810B MOV A,B Move the contents of
Register B to Accumulator
810C
810D INC DPTR Increment DPTR by one.
810E MOVX @DPTR,A Store the accumulator value
to the memory location
pointed by DPTR
810F HERE SJMP HERE End the program

8 BIT DIVISION

58
ALGORITHM:

1. Start the process

2. Initialize the memory location for input and output
3. Get divisor in any of the register
4. Get the dividend to the accumulator and increment the memory pointer
5. Divide dividend by divisor
6. Store the quotient in specific memory location
7. Transfer the remainder to the accumulator from the specified register
8. Store the remainder in specific memory location
9. Stop the process

PROGRAM:

ADDRESS LABEL MNEMONICS COMMENTS

8100 MOV Move the data input location to
8101 DPTR,#8200 DPTR
8102
8103 MOVX Move the content pointed by
A,@DPTR DPTR to Accumulator
8104 INC DPTR Increment DPTR by one.
8105 MOV B,A Move the contents of
8106 Accumulator to Register B
8107 MOVX Move the content pointed by
A,@DPTR DPTR to Accumulator
8108 DIV AB Divide the content of
Accumulator and B register
8109 INC DPTR Increment DPTR by one.
810A MOVX Store the accumulator value to
@DPTR,A the memory location pointed by
DPTR
810B MOV A,B Move the contents of Register
810C B to Accumulator
810D INC DPTR Increment DPTR by one.
810E MOVX Store the accumulator value to
@DPTR,A the memory location pointed by
DPTR
810F HERE SJMP HERE End the program

59
OBSERVATION - 8 BIT ADDITION

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
8200 02 FF 8202 04 FE
8201 02 FF 8203 00 01

OBSERVATION - 8 BIT SUBTRACTION

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
8200 10 05 8202 0B F5
8201 05 10 8203 00 01

OBSERVATION - 8 BIT MULTIPLICATION

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
8200 03 FF 8202 4E 01
8201 1A FF 8203 00 FE

OBSERVATION - 8 BIT DIVISION

INPUT OUTPUT
ADDRESS DATA 1 DATA 2 ADDRESS DATA 1 DATA 2
8200 1A 1A 8202 03 03
8201 4E 4F 8203 00 01

RESULT:

Thus programs for 8 bit arithmetic operations were written, executed

successfully and outputs were verified.

60
VIVA QUESTIONS

1. What is Microcontroller? How it is differ from Microprocessor?

2. Give the applications and features of Microcontroller.
3. What is meant by stack? How stacks are accessed in 8051?
4. What is the frequency of the crystal connected to 8051?
5. How many I/O ports are there in 8051?

61
 EXPT.NO 8- PROGRAM FOR ADC INTERFACE WITH 8051
MICROCONTROLLER
AIM:
To Study the Analog to Digital Convertor Interface Using 8051

APPARATUS REQUIRED:
1. Microcontroller kit
2. ADC Interface

WORKING PRINCIPLE:
There are numerous ways in which an analog signal can be converted to digital
form. The Analog to Digital convertors can be classified into two general groups based
on the conversion technique.

One technique involves comparing a given analog signal with the internally
generated equivalent signal. This group includes successive approximation, counter,
and flash-type converters. The second technique involves changing an analog signal
into time or frequency and comparing these new parameters against known values.
Thus group includes integrator converters and Voltage to Frequency converters. The
trade-off between the two techniques is based on accuracy Vs speed. The successive
approximation and the flash type are faster but generally less accurate than the
integrating and the Voltage to Frequency converters. Furthermore, the flash type is
expensive and difficult to design for high accuracy.

The most commonly used A/D converters are successive approximation and
integrating type A/D converters. The successive approximation A/D converters are
used in applications such as data loggers and instrumentation, where conversion speed
is important. On the other hand, integrating type converters are used in applications
such as digital meters, panel meters and monitoring systems, where the conversion
accuracy is critical.

SUCCESSIVE APPROXIMATION A/D CONVERTERS:

62
 Figure shows the block diagram of a successive approximation A/D converter.
The major elements of this converter are a D/A converter, the successive
approximation (SAR) and the comparator. Here the output of D/A converter is
compared with the measured voltage. The digital input to the DAC is generated using
successive approximation method. When the DAC output matches the analog signal,
the input to the DAC is the equivalent digital signal.

First bit D3 is turned ON and the output of the DAC is compared with an
analog signal. If the comparator changes state, indicating that the output generated by
D3 is larger than the analog signal, bit D3 is turned OFF in the SAR and bit D2 is
turned ON. The process continues until the input reaches bit D0.

The successive approximation conversion process can be accomplished through

either the software or hardware approach. In the software approach, an A/D converter
is designed using a D/A converter, and the microprocessor plays the role of the counter
and the SAR. For the hardware approach, complete ADCs are now available as
integrated circuits.

63
FUNCTIONAL DESCRIPTION FOR ADC 0809:
ADC 0809 is a monolithic CMOS device, with an 8-bit analog to digital
converter, 8 channel multiplexer and microprocessor compatible control logic.
The main features of ADC 0809 are,
1) 8 bit resolution
2) 100 µS conversion time
3) 8 channel multiplexer with latched control logic
4) No need for external zero or full scale adjustments
5) Low power consumption 15 mW
6) Latched tristate output

The device contains an 8 channel single ended analog signal multiplexer. A particular
input channel is selected by using the address decoding. Following table shows the
input states for the address lines to select any channel. The address is latched into the
decoder of the chip on low to high transition of the address latch enable (ALE). The
64
A/D converter’s successive approximation register is reset on the positive edge of the
start of conversion pulse. The conversion is begun on the falling edge of the SOC
pulse. End of conversion will go low between 0 and 8 clock pulses after the rising edge
of start of conversion.
ADDRESS LINE
Select Analog Channel
ADD C ADD B ADD A
IN0 0 0 0
IN1 0 0 1
IN2 0 1 0
IN3 0 1 1
IN4 1 0 0
IN5 1 0 1
IN6 1 1 0
IN7 1 0 1

I/O DECODING:
A 3 TO 8 decoded 74LS138 is employed to generate I/O decoding logic. Pin1,
Pin2 and Pin3 of 74LS138 is connected to Address lines A3, A4, and A5 respectively.
IOR and IOW signals are NANDed together and the NAND gate output is connected to
Pin6 of 74LS138. Similarly the Address lines A6 and A7 are NANDed and the NANd
gate output lied to Pin5 of the 3 to 8 decoder. Pin4 is grounded.
The buffer 74LS244 which transfers the converted data outputs to data bus is
selected when
A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 0 0 X X X
= C0 (Hex)
The I/O address for the latch 74LS174 which latches the data bus to ADD A,
ADD B, ADD C and ALE 2 is
A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 0 1 X X X
= C8 (Hex)

Table: Data to be outputted to port address C8 for channels 0 to 15.

65
 DATA (HEX)
EOC
Channel CH NO CH NO CH NO
Sl.No Address
Number ALE LOW ALE LOW ALE LOW
(Hex)
OE HIGH OE HIGH OE HIGH
1 CH0 D8 10 18 10
2 CH1 D8 11 19 11
3 CH2 D8 12 1A 12
4 CH3 D8 13 1B 13
5 CH4 D8 14 1C 14
6 CH5 D8 15 1D 15
7 CH6 D8 16 1E 16
8 CH7 E0 17 1F 17
9 CH8 E0 00 20 00
10 CH9 E0 01 21 01
11 CH10 E0 02 22 02
12 CH11 E0 03 23 03
13 CH12 E0 04 24 04
14 CH13 E0 05 25 05
15 CH14 E0 06 26 06
16 CH15 E0 07 27 07

The start of conversion pulse can be given by means of software also. The flip
flop 74LS74 which transfers the D0 line status to the SOC pin of AAADC 0809 is
selected when

A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 1 0 X X X
= D0 (Hex)

The EOC output of ADC1 and ADC2 is transferred to D0 line by means of two
tri-state buffers. The EOC1 is selected when
A7 A6 A5 A4 A3 A2 A1 A0
1 1 1 0 0 X X X

66
= D8 (Hex)

The EOC2 is selected when

A7 A6 A5 A4 A3 A2 A1 A0
1 1 1 0 0 X X X
= E0 (Hex)

GO TOER DETAILS:
J2: (soc Go toer selection for ch0-ch7)

Place this Go toer according to your requirement.

J3: (soc Go toer selection for ch8-ch15)

Place this Go toer according to your requirement.

J1: (Combined End of Conversion to CPU interrupt)

67
Place this Go toer according to your requirement.

J5: (provision to connect the on board trimpot to any of the below mentioned channels)

Place this Go toer in A position so as to connect the trimpot to channel 0.

J6: (Provision to connect the on board trimpot to any of the below mentioned channels)

ANALOG TO DIGITAL CONVERTER WITH HARDWARE SOC

ALGORITHM1:
1. Start the process

68
 2. Transfer the control word to the control register to select channel 0 with ALE
low, 0E high.
3. Transfer the control word to the control register to select channel 0 with ALE
high, 0E high.
4. Stop the process.

PROGRAM 1:

ADDRESS LABEL MNEMONICS COMMENTS

Move the port address
8100 MOV DPTR,#FFC8
to DPTR
8103 MOV A,#10 Move the value 10 to
Accumulator
8105 MOVX @DPTR,A Move the accumulator
value to DPTR
8106 MOV A,#18 Move the value 18 to ADC
Accumulator WITH
8108 MOVX @DPTR,A Move the accumulator
value to DPTR
8109 HERE SJMP HERE Short Go to here
SOFTWARE SOC AND STORAGE OF DIGITAL DATA AT PARTICULAR
LOCATION
ALGORITHM 2:
1. Start the process.
2. Transfer the control word to control register to select channel 0 with ALE low,
0E high.
3. Transfer the control word to the control register to select channel 0 with ALE
high, 0E high.
4. Check for EOC(End of Conversion)
5. If EOC is decreasing low repeat the checking otherwise go to step 5.
6. Else get the converted data from the port and store it in the specified memory
location.
7. Stop the process.

PROGRAM 2:

69
ADDRESS LABEL MNEMONICS COMMENTS
8100 MOV DPTR,#FFC8 Move the port address
to DPTR
8103 MOV A,#10 Move the value 10 to
Accumulator
8105 MOVX @DPTR,A Move the accumulator
value to DPTR
8106 MOV A,#18 Move the value 18 to
Accumulator
8108 MOVX @DPTR,A Move the accumulator
value to DPTR
8109 MOV DPTR,#FFD0 Move the port address
to DPTR
810C MOV A,#01 Move the value 01 to
Accumulator
810E MOVX @DPTR,A Move the accumulator
value to DPTR
810F MOV A,#00 Move the value 00 to
Accumulator
8111 MOVX @DPTR,A Move the accumulator
value to DPTR
8112 MOV DPTR,#FFD8 Move the port address
to DPTR
8115 WAIT MOVX A,@DPTR Move the value
indicated by the address
present in DPTR to
Accumulator
8116 JNB E0,WAIT If no bit at E0, Go to to
WAIT
8119 MOV DPTR,#FFC0 Move the port address
to DPTR
811C MOVX A,@DPTR Move the value
indicated by the address
present in DPTR to
Accumulator
8110 MOV DPTR,#8150 Move the memory
location to DPTR
8120 MOVX @DPTR,A Move the accumulator
value to DPTR
8121 HERE SJMP HERE Short Go to here.

PROCEDURE:
i) Connect the microcontroller kit with ADC interface board using 50 core
connector (VXT BUS).
70
 ii) Vary the analog input using pot in ADC board.
iii) Execute the program
iv) Check the output in leads with proper Go toer position
v) Also check the output in the memory location.

RESULT:

Thus the Analog to Digital Convertor Interface Using 8051was studied

EXPT.NO 9- PROGRAM FOR DAC INTERFACE WITH 8051

MICROCONTROLLER
71
AIM:
To Study the Digital to Analog Convertor Interface Using 8051.

APPARATUS REQUIRED:
1. Microcontroller kit
2. Power chord
3. DAC Interface
4. CRO with Probe

WORKING PRINCIPLE
D/A CONVERTERS:
Digital to Analog converters can be classified as current output, voltage output
and multiplying type. The current output DAC provides current as the output signal.
The voltage output DAC internally converts the current signal into the voltage signal.
The voltage output DAC is slower than the current output DAC because of the delay in
converting the current signal into the voltage signal. The multiplying DAC is similar to
the other 2 types except its output represents the product of input signal and the
reference source and the product is linear over a broad range.

Typical applications of DACs include digital voltmeters, peak detectors, panel

meters, programmable gain and attenuation and stepping motor drive.
Following figure shows a simple 3 bit D/A converter. It has a 3 digital input
lines (D2, D1 and D0) and one output line for the analog signal. The 3 input signals can
assume combinations from 000 to 111. If the input ranges from 0 to 1V it can be
divided into 8 equal parts (1/8V) and each successive input is 1/8V higher than the
previous combination. Thus if the full scale analog voltage is 1V, the smaller unit
(LSB) or 001 is equivalent to 1/8 of 1V. The 100 (MSB) represents half of the full
scale value. For the maximum input signal 111, the output signal is equal to the value
of the full-scale input signal minus the value of the 1 LSB. So for a fullscale voltage
1V, it will be 7/8V in the above example.

72
 Fig. 9.1
SUCCESSIVE APPROXIMATION TECHNIQUE:
Successive approximation process can be shed through either software or
hardware approach. In software approach, an A/D converter is designed using A/D
converter and the microprocessor plays the role of the comparator and the SAR. Block
diagram for successive approximation ADC is shown in Fig 9.2.

Fig. 9.2
The basic microprocessor board, VBMB-002, incorporates two 8-bit Digital to
Analog converters, DAC 0800.
DAC 0800 is a monolithic, high speed, current output Digital to Analog
converter. Its unique features are:
 Typical settling time of 100 Nanoseconds.
 Complementary current outputs.

73
  Differential output voltages of 20V peak to peak with simple resistor loads.
 2-quadrant wide range multiplying capability.
The DAC interface section comprises of
 I/O decoding
 D/A conversion circuit
I/O DECODING:
The IC’s 74LS138 and 74LS00 form the address decoding logic in this
interface board. The address lines A3, A4 and A5 are tied to pin1, pin2 and pin3 of
74LS138 respectively. The address lines A6 and A7 are NANDed together and the
NAND gate output is connected to pin5 of 74LS138. Similarly IOW and IOR signals
are NANDed and the NAND gate output is connected to pin6 of 74LS138. Pin4 is
grounded.

Thus with

A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 0 0 X x X

= C0 (Hex)
DAC1 is selected, and with

A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 0 1 X X X

= C8 (Hex)
DAC2 is selected.

D/A CONVERSION CIRCUIT:

The design comprises of the latch 74LS273, DAC0800 and the current to
voltage converting circuitry using OP AMP 741. DAC0800 is configured for bipolar
output operation.
IC 74LS273 latches the 8-bit data on the data bus. The data latched by 74LS273
is input to DAC 0800. The DAC 0800 converts the 8-bit input and gives equivalent
complementary current outputs.
Current to voltage conversion circuit is designed using OPAMP 741. This
circuit converts the current output of DAC 0800 into equivalent analog voltage.
74
Complementary current outputs Iout and Iout are connected to inverting and non-
inverting inputs of OPAMP 741. In order to have the output voltage variation from -5V
to +5V, a 2.2K feed back resistor has been selected.

The DAC outputs are available at the 5 pin connector (P2). DAC 1 and DAC 2
outputs are terminated at pin 5 and pin4 respectively. Pin1 is connected to the ground.
A/D CONVERSION CIRCUIT:
It is possible to construct an ADC using DAC, if a register (SAR) or a counter
is available. The software based A/D converter microprocessor can act as a counter or
successive approximation register. To illustrate this, we have provided a comparator
LM-311 in our card VBMB-002. The output of DAC channel 1 is given to one of the
inputs of the comparator. An analog voltage can be given between -5 to +5V to be
converted to digital forms the other input. Fig 9.3 illustrates the arrangement.

Fig. 9.3
The comparator’s output goes high when DAC 1 and the analog voltage are
approximately equal. To check the output of the comparator, we have provided one
tristate buffer (U10) the output of which is connected to D0 line. The 74125 address is
decoded as follows.

A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 1 0 0 0 0

= D0 (Hex)

ALGORITHM:
75
 SQUARE WAVE GENERATION
1. Start the process.
2. Transfer the low output equivalent hex data to DAC address through
accumulator.
3. Call delay subroutine to maintain the low state.
4. Transfer the high output voltage equivalent hex data to DAC port address
through accumulator.
5. Call delay subroutine to maintain the high level.
6. Else go to step2
7. Stop the process.

SUB ROUTINE
1. Start the subroutine.
2. Transfer outer loop count to any of the register.
3. Transfer inner loop delay count to any other register
4. Decrement the inner loop count.
5. Check for zero. If zero does not occur go to step4.
6. Decrement the outer loop count.
7. Check for zero. If zero does not occur, go to step3.
8. Return to main program.

SAW TOOTH WAVE GENERATION

1. Start the process.
2. Transfer the low output equivalent hex data to accumulator.
3. Transfer the accumulator content to ADC Port’
4. Increment the output voltage equivalent hex data in accumulator.
5. Check for non-zero of it is non-zero go to step3.
6. Else go to step2
7. Stop the process.

TO GENERATE SQUARE WAVE AT THE DAC2 OUTPUT:

76
ADDRESS LABEL MNEMONICS COMMENTS
8100 MOV DPTR,#FFC8 Move the port address
8101 to DPTR
8102
8103 START MOV A,#00 Move the value 10 to
Accumulator
8104
8105 MOVX @DPTR,A Move the accumulator
value to the memory
location pointed by
DPTR
8106 LCALL DELAY Long call DELAY
8107
8108
8109 MOV A,#FF Move the value FF to
Accumulator
810B MOVX @DPTR,A Move the accumulator
value to the memory
location pointed by
DPTR
810C LCALL DELAY Long call DELAY
810F LJMP START Long Go to to START
8112 DELAY MOV R1,#05 Move 05 to Register R1
8114 LOOP MOV R2,#FF Move FF to Register R2
8115
8116 HERE DJNZ R2,HERE Decrement R2. If no
zero, Go to to HERE.
8118 DJNZ R1,LOOP Decrement R1. If no
zero, Go to to LOOP.
811A RET Return

TO CREATE A SAW TOOTH WAVE AT THE OUTPUT OF DAC1:

77
ADDRESS LABEL MNEMONICS COMMENTS
8100 MOV Move the port
DPTR,#FFC0 address to DPTR
8101
8102
8103 MOV A,00 Move the value 00
8104 to Accumulator
8105 LOOP MOVX Move the
@DPTR,A accumulator value
to the memory
location pointed by
DPTR
8106 INC A Increment
Accumulator by one
8107 SJMP LOOP Short Go to to
LOOP

SQUARE WAVE

SAW TOOTH WAVE

TRIANGULAR WAVE

78
ADDRESS LABEL MNEMONICS COMMENTS
8100 MOV DPTR,#FFC0 Move the port address
to DPTR
8101
8102
8103 START MOV A,#00 Move the value 00 to
Accumulator
8104
8105 LOOP1 MOVX @DPTR,A Move the accumulator
value to the memory
location pointed by
DPTR
8106 INC A Increment
Accumulator by one
8107 JNZ LOOP1 If zero flag not set, Go
to to LOOP1
8108
8109 MOV A,#FF Move the value FF to
Accumulator
810A
810B LOOP2 MOVX @DPTR,A Move the accumulator
value to the memory
location pointed by
DPTR
810C DEC A Decrement
Accumulator by one
810D JNZ LOOP 2 If zero flag not set, Go
to to LOOP2
810E
811F LJMP START Long Go to to start

TO GENERATE TRIANGULAR WAVEFORM AT DAC2 OUTPUT:

79
PROCEDURE:

i) Connect the microcontroller kit with DAC interface board using 50 core
connector (VXT bus).

80
 ii) Connect CRO channel 1 to DAC 1 or DAC 2 in DAC board.
iii) Execute the program
iv) Check the output in CRO for the required output.
v) Note the amplitude & time period for the waveform

RESULT:

Thus the Digital to Analog Convertor Interface Using 8051was studied

EXPT.NO 10- PROGRAM FOR STEPPER MOTOR INTERFACE WITH 8051

MICROCONTROLLER
AIM:
To Study the Stepper Motor Interface Using 8051

81
APPARATUS REQUIRED:
1. Microcontroller kit
2. Stepper Motor Interface

STEPPER MOTOR:
A motor in which the rotor is able to assume only discrete stationary angular
position is a stepper motor. The rotary motion occurs in a stepwise manner from one
equilibrium position to the next.
Stepper motor control is a very popular application of microprocessor in control
area. They are widely used in a variety of applications such as computer peripherals
and in the areas of process control machine tools, medicine, numerically controlled
machines and Robotics.

CONSTRUCTIONAL FEATURES:
A stepper motor could be either of the reluctance type or of the permanent
magnet type (PM). A PM stepper motor consists of multiphased stator and two part
permanent magnet rotor. The VR stepper motor has unmagnetised rotor. PM stepper
motor is the most commonly used type. The basic two phase stepper motor consists of
two pairs of stator poles. Each of the four poles has its own winding. The excitation of
any one winding generates a north pole (N), a south pole (S) gets induced at the
diametrically opposite side.

STEPPER MOTOR CROSS-SECTIONAL VIEW

TYPICAL STEPPER MOTOR ROTOR

82
 As shown in the figure the four pole structure is continuous with the stator
frame and the magnetic field passes through the cylindrical stator annular ring. The
rotor magnetic system has two end faces. The left face is permanently magnetized as
South Pole and the right face as North Pole. The South Pole structure and the North
Pole structure possess similar pole faces. The North Pole structure is twisted with
respect to the South Pole structure so that South Pole comes precisely between two
north poles. The North Pole structure is offset with respect to the South Pole structure
by one pole pitch. The cross sectional view is shown in fig. In an arrangement where
there are four stator poles and three pairs o rotor poles, there exits 12 possible stable
positions in which a south pole of the rotor can lock with a north pole of the stator.
From this it can be noted that the step size is

[360o/(Ns*Nr)]

Where
Ns is the no. of stator poles.
Nr is the no. of pairs of rotor poles.

Generally step size of the stepper motor depends upon NR. These stable
positions can be attained by simply energizing the winding on any one of the stator
poles with a DC. There are three different schemes available for stepping a stepper
motor. These are:
a) Wave scheme

b) 2-phase scheme and

c) Half stepping or mixed scheme.

2-PHASE SCHEME:

83
 In this scheme, any two adjacent stator windings are energized. There are two
magnetic fields active in quadrature and none of the rotor pole faces can be in direct
alignment with the stator poles. A partial but symmetric alignment of the rotor poles is
of course possible.
Typical equilibrium conditions of the rotor when the windings on two
successive stator poles are excited are illustrated in the following fig. In step (a), A1
and B1 are energize. The pole-face S1 tries to align itself with the axis of A1(N) and
the pole face S2 with B1(N). The north pole N3 of the rotor finds itself in the neutral
zone between A1(N) and B1(N). S1 and S2 of the rotor, position themselves
symmetrically with respect to the two stator north pole.

Next, when B1 and A2 are energized, S2 tends to align with B1(N) and S3 with
A2(N). Of course, again under equilibrium conditions, only partial alignment is
possible and N1 finds itself in the neutral region, midway between B1(N) and A2(N)
[step (b)]. In step (c), A2 and B2 are on. S3 and S1 tend to align with A2(N) and
B2(N), respectively, with N2 in the neutral zone. Step (d) illustrates the case with A1
and B2 are on.

Fig. Step (a) Fig. Step (b)

84
 Fig. Step (c) Fig. Step (d)

The step angle is 30o as in the wave scheme. However, the rotor is offset by 15 o
in the two-phase scheme with respect to the wave scheme. A total of 12 steps are
required to move the rotor by 360o (mechanical). Two-phase drives produce more
torque than the wave drives.
The switching sequence for the 2-phase scheme is given in the following table.

Clockwise Anti-clockwise
Step A2 A2 B1 B2 Step A2 A2 B1 B2
1 1 0 0 1 1 1 0 1 0
2 0 1 0 1 2 0 1 1 0
3 0 1 1 0 3 0 1 0 1
4 1 0 1 0 4 1 0 0 1
Table: Phase switching scheme

HALF STEPPING SCHEME:

The wave scheme as well as the 2-phase scheme gives steps of size 30 o for the
stepper motor under consideration. However, there is an offset of 15 o between these
two schemes. By interleaving these two schemes, the step sixe can be reduced to 15 o,
thereby improving the accuracy of the stepper motor. The half stepping scheme is a
mixture of the wave scheme and the 2-phase scheme.
The switching sequence is:
1. A1 (ON)
2. A1 and B1 (ON)
3. B1 (ON)
4. B1 AND A2 (ON)
5. A2 (ON)
6. A2 and B2 (ON)
7. B2 (ON)
8. B2 and A1 (ON)
9. A1 (ON), etc.

85
 Eight steps are required to move the shaft by 120 o and 24 steps for one
complete revolution. By reversing the switching sequence, we can reverse the direction
of rotation. One major disadvantage of the half stepping scheme is torque fluctuations.
This is because the aligning torque for the wave scheme is different from that for the 2-
phase scheme.

ADDRESS DECODING:
The 74138 chip (U2) generates the address decoding logic to generate the
device select pulses, CS1 and CS2 for selecting the ICs 74175 (U3 & U5). The 74175
(U3 & U5) latches the data bus to the stepper motor driving circuitry. Address lines A7
& A6 from VXT Bus is NANDed and the o/p is connected to 138 enable signal.
Similarly IOW & IOR signals are NANDed and the NAND gate o/p is connected to
Pin6 of 74138, Pin4 is grounded.

74175 at U3 is selected with the address

A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 0 0 X x X

= C0 (Hex)

74175 at U4 is selected with the address

A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 0 1 X x X

= C8 (Hex)

ALGORITHM:
TO RUN THE STEPPER MOTOR FOR DIFFERENT SPEED
1. Start the process
2. Initialize the memory for storing the data used to energize the poles
3. Initialize the count
4. Transfer the memory content to accumulator and deliver it to the specified port
address
5. Provide delay to energize poles and make rotation
6. Increment the memory pointer
7. Decrement the count
8. Check for non zero if it is non zero go to step 4
9. Else go to step 2
10. Terminate the process

TO RUN THE STEPPER MOTOR FOR A PARTICULAR ANGLE WITHIN

360’
1. Start the process
86
 2. Initialize the count for storing the data used to energize poles
3. Initialize the memory for storing the data used to energize the poles
4. Initialize the count
5. Transfer the memory content to accumulator and deliver it to the specified port
address
6. Decrement the angle count
7. Check for zero if it is zero go to step 13
8. Else Provide delay to energize poles and make rotation
9. Increment the memory pointer
10. Decrement the count
11. Check for non zero if it is non zero go to step 5
12. Else go to step 3
13. Terminate the process

TO RUN THE STEPPER MOTOR FOR DIFFERENT SPEED

87
ADDRESS LABEL MNEMONICS COMMENTS

8100 START MOV DPTR,#8500H Move the immediate value 8500 to

data pointer
8101
8102
8103 MOV R0, #04 Move the immediate value 04 to R0
8104 register

8105 JO MOVX A,@DPTR Move DPTR value to Accumulator

8106 PUSH DPH Push the higher order byte

8107
8108 PUSH DPL Push the lower order byte
8109
810A MOV DPTR, #FFC0H Move the immediate value FFC0 to
810B data pointer
810C
810D MOV R2,#22H Move the immediate value 22 to R2
810E register

810F DLY 2 MOV R1, #22H Move the immediate value 22 to R1

8110 register

8111 DLY 1 MOV R3,#FFH Move the immediate value FF to

8112 R3register

8113 DLY 0 DJNZ R3,DLY 0 Decrement R3 ,if it is not zero Call

delay DLY0
8115 DJNZ R1,DLY 1 Decrement R1 ,if it is not zero Call
delay DLY1
8116
8117 DJNZ R2,DLY 2 Decrement R2 ,if it is not zero Call
delay DLY2
8118
8119 MOVX @DPTR, A Move A to DPTR location
811A POP DPL Pop out the lower order byte
811B
811C POP DPH Pop out the higher order byte

811D
811E INC DPTR Increment the data pointer
811F DJNZ R0,JO Decrement R0 , if no zero, Go to JO
8120
8121 SJMP START Go to START
8122
8123 END End the program
8500 TABLE 09,05,06,0A Data
PROGRAM TO RUN A STEPPER MOTOR FOR REQUIRED ANGLE
88
WITHIN 360 DEGREE WHICH IS EQUIVALENT TO 256 STEPS
ADDRESS LABEL MNEMONICS COMMENTS
8100 MOV R4,#05 Move the immediate
8113 value 05 to R4register
8101
8114 LOOK DB 09H,05H,06H,0AH Loading the lookup
8102 UP START MOV DPTR,#LOOK valuesMove look up table
tableUP
8103 value to data pointer
8115
8104
8116
8105 MOV R0,#04 Move the immediate
8117 value 04 to R0 register
8106 Move the immediate
8118 CALL MOV R2,#03
8107
8119 JO MOVX A,@DPTRvalue 03 to R2 register
Move DPTR value to
Accumulator

811A DLY 2 MOV R1,#FFH Move the immediate

8108 PUSH DPH value FF to Push the higher order
R1register
811B byte
8109
811C DLY 1 MOV R3,#FFH Move the immediate
810A PUSH DPL value FF to Push the lower order
R3register
811D byte
810B
811E
810C DLY DJNZ R3,DLY Call delay DLY
MOV DPTR,#FFOOH Move the immediate

811F
810D value FF00 to data

8120 DJNZ R1,DLY1 pointer

Call delay DLY 1
810E
8121
810F MOVX @DPTR,A Move A to DPTR
8122 DJNZ R2,DLY2 location
Call delay DLY 2
8110 DJNZ R4,CALL Decrement R4 , if no
8123
8111 zero, Go to CALL
8124 POP DPL Pop the lower order byte
8112 HLT SJMP HLT Short Go to onto HLT
8125
8126 POP DPH Pop the higher order
byte
8127
8128 INC DPTR Increment the data
pointer
8129 DJNZ R0,J0 Decrement R0 , if no
zero, Go to JO
812A
812B SJMP START Go to START

812C
812D END End the program

89
PROCEDURE:
i) Connect the microcontroller kit with stepper motor interface board using
50 core connector (VXT bus). & connect the motor to the interface
board
ii) Execute the program
iii) Check the motor for various speed (or) particular angle of rotation.

90
RESULT:

Thus the stepper motor Interface Using 8051was studied

EXPT.NO 11- PROGRAM FOR KEYBOARD/ DISPLAY INTERFACE WITH

8051 MICROCONTROLLER
AIM:
To Study the Keyboard / Display Interface Using 8085

APPARATUS REQUIRED:
1. Microcontroller kit
2. Power Chord
3. Keyboard/ Display Interface

91
DISPLAY MODE SETUP:
The command word for keyboard and display mode is,

0 0 0 D D K K K

DD-DISPLAY MODE:
00 – 8 8 bit Character display – Left Entry
01 – 16 8 bit Character display – Left Entry
10 – 8 8 bit Character display – Right Entry
11 – 8 8 bit Character display – Right Entry

KKK – KEYBOARD MODE:

000 – Encoded Scan Keyboard – 2 key lockout
001 – Decoded Scan Keyboard – 2 key lockout
010 – Encoded Scan Keyboard – 2 key roll-over
011 – Decoded Scan Keyboard – 2 key roll-over
100 – Encoded Scan Sensor Matrix
101 – Decoded Scan Sensor Matrix
110 – Strobed input, Encoded Display scan
111 – Strobed input, Decoded Display scan

Table below shows the correspondence between the data bus and output port
bits of 8279. Also, the segment relationship with these is given:

Data bus D7 D6 D5 D4 D3 D2 D1 D0
8279 Output A3 A2 A1 A0 B3 B2 B1 B0
Segments d c b a dp g f e

D0 bit of the byte sent to the display RAM corresponds to B0 and D7 of the
byte sent to the display RAM corresponds A3. In order to light up a segment the
corresponding bit of data written into the display RAM should be a “0”.
I/O DECODING:
IC’s 74LS00 (U1) and 74LS138 (U2) form the address decoding logic to
generate the chip select signal for 8279. Address lines A6 and A7 are NANDed and the
NAND gate output is connected to pin 5 of 74LS138 (U2). Similarlly, the IOW and
IOR are NANDed and the NAND gate output is connected to Pin6 of 74LS138. The
92
inputs A, B and C of 74LS138 are connected to address lines A3, A4 and A5
respectively.
The 8279 is selected when,

A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 0 0 X x X

= C0 (Hex)

Since the address line A1 is connected to A0 of 8279, when

A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 0 0 X 1 X

= C2 (Hex)

Control/status register is selected when

A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 0 0 X 0 X

= C0 (Hex)

WRITE DISPLAY RAM:

The write display RAM command word format is,

1 0 0 AI A A A A

This command is written with A0 (pin 21 of 8279) = 1. All subsequent writes with
A0=0 will be to the Display RAM.
AI – Auto Increment Flag. If AI-1, the row address selected will be
incremented after each following read or write to the Display RAM.
AAAA – Selects one of the 16 rows of the Display RAM.

CLEAR DISPLAY:
The command word format for clear display is,

1 1 0 CD CD CD CF CA

CD CD CD – The lower two CD bits specify the blanking code to be sent to the
segments to turn them off while the 8279 is switching from one digit to next.
93
ALGORITHM:
DISPLAY A CHARACTER
1. Transfer the control word to control register the mode and display set and
specify the character with left entry and display it.
2. Transfer the control word to control word to control register to clear the
Display
3. Transfer the control word to control register for auto increment set and with
RAM Address.
4. Transfer the data for the character to accumulater to display it
5. Transfer the data to data register to blank the rest of the display..
6. Terminate the process.

ROLLING DISPLAY
1. Initialize the memory for storing the data to to be rolled.
2. Initialize the count register
3. Transfer the control word to control register the mode and display set and
specify the character with left entry and display it.

4. Transfer the control word to control word to control register to clear the
Display
5. Transfer the control word to control register for auto increment set and with
RAM Address.
6. Transfer the all the Data one by one to data register for display .
7. Repeat step 6 for rolling the display.

94
ADDRESS LABEL MNEMONICS COMMENTS
8100 MOV R0,#05 Move 05 to Register R0
8102 MOV DPTR,#FFC2 Move the port address
to DPTR
8104 MOV A,#02 Move the value 02 to
Accumulator
8107 MOVX @DPTR,A Move the accumulator
value to the memory
location pointed by
DPTR
8109 MOV A,#CC Move the control word
CC to Accumulator
810A MOVX @DPTR,A Move the accumulator
value to the memory
location pointed by
DPTR
810C MOV A,#90 Move the control word
90 to Accumulator
810D MOVX @DPTR,A Move the accumulator
value to the memory
location pointed by
DPTR
810F MOV A,#88 Move the data 88 to
Accumulator
8110 MOV DPTR,#FFC0 Move the port address
FFC0 to DPTR
8112 MOVX @DPTR,A Move the accumulator
value to the memory
location pointed by
DPTR DISPLAY
8115 MOV A,#FF Move the data FF to A
Accumulator
8116 MOV DPTR,#FFC0 Move the port address
FFC0 to DPTR
8118 LOOP1 MOVX @DPTR,A Move the accumulator
value to the memory
location pointed by
DPTR
811B D JNZ R0,LOOP1 Decrement R0. If no
zero, Go to LOOP1
811C SJMP 811C Short Go to to 811C
CHARACTER

95
ROLLING DISPLAY

96
4100 START MOV R1,# 44 Move higher byte of the memory
location to Register R1
4103 MOV R0,# 00 Move lower byte of the memory
location to Register R1
4105 MOV DPTR, #FFC2 Move the port address to DPTR
4107 MOV A,# 10 Move the value 10 to Accumulator
4109 MOVX @DPTR,A Move the accumulator value to the
memory location pointed by DPTR
410A MOV A,#CC Move the control word CC to
Accumulator
410C MOVX @DPTR,A Move the accumulator value to the
memory location pointed by DPTR
410D MOV A,#90 Move the control word 90 to
Accumulator
410F MOVX @DPTR,A Move the accumulator value to the
memory location pointed by DPTR
4110 LOOP MOV DPL,R0 Move the value of R0 to DPL
4112 MOV DPH,R1 Move the value of R1 to DPH
4114 MOVX A, @DPTR Move the content pointed by DPTR
to Accumulator
4115 MOV DPTR, #FFC0 Move the port address to DPTR
4118 MOVX @DPTR,A Move the accumulator value to the
memory location pointed by DPTR
4119 LCALL DELAY Long call DELAY
411C D JNZ R0,LOOP Decrement R0 by one. If no zero,
Go to LOOP.
411E INC R0 Increment R0 by one.
411F CJNE R0,#0F,LOOP If the content of R0 and 0F are not
equal, Go to LOOP
4122 LJMP START Go to START

4400 FF FF FF FF
4404 FF FF FF FF
4408 98 68 7C C8
440C FF 1C 29 FF

4500 DELAY MOV R4,# FF Move FF to Register R4

4502 LOOP2 MOV R5,# FF Move FF to Register R5
4504 LOOP1 NOP No Operation
4505 DJNZ R5, LOOP1 Decrement R5. If no zero, Go to
LOOP1
4507 DJNZ R4, LOOP2 Decrement R4. If no zero, Go to
LOOP2
4509 RET Return

97
PROCEDURE:
i) Connect the microcontroller kit with keyboard & display interface board
using 50 core connector (VXT bus).
ii) Execute the program
iii) Check the seven segment display for a character (or ) rolling display

RESULT:

Thus the keyboard and display using 8051was studied.

EXPT.NO 12- PROGRAM FOR SERIAL COMMUNICATION

98
 INTERFACE WITH 8051 MICROCONTROLLER
AIM:
To Study the Serial Communication Interface Using 8051

APPARATUS REQUIRED:
1. Microcontroller kit
2. Serial communication Interface board
TIMER INTERFACE:

PROGRAMMABLE INTERVAL TIMER – IC 8253

The timer section contains only the chip 8253. The main features of the timer
Intel 8253 are as follows:
1) Three independent 16-bit counter
2) Input clock from DC to 2 MHz
3) Programmable counter modes
4) Count binary or BCD
The control signals with which the 8253 interfaces with the CPU are CS, RD,
WR, A1 and A2. The basic operations performed by 8253 are determined by these
control signals and are illustrated in the table given below.

CS RD WR A1 A0 FUNCTION
0 1 0 0 0 Load Counter 0
0 1 0 0 1 Load Counter 1
0 1 0 1 0 Load Counter 2
0 1 0 1 1 Write Control word
0 0 1 0 0 Read Counter 0
0 0 1 0 1 Read Counter 1
0 0 1 1 0 Read Counter 2
0 0 1 1 1 No-operation 3-state
1 X X X X Disabled 3-state
0 1 1 X X No-operation 3-state

RS232C INTERFACE:
PROGRAMMABLE COMMUNICATION INTERFACE – IC 8251:

99
 The RS232C interface of VBMB-004 comprises of the universal
synchronous/asynchronous receiver/transmitter 8251 (USART), RS232C driver (MC
1488) and RS232C receiver (MC 1489).

The 8251A is used here as a peripheral device for serial communication and is
programmed by the CPU to operate using virtually any serial data transmission
technique. The USART accepts data characters from the CPU in parallel format and
then converts them into a continuous serial data stream for transmission.
Simultaneously, it can receive serial data streams and convert them into parallel data
characters for the CPU. The CPU can read the status of the USART at any time. These
include data transmission errors and control signals.
The main features of 8251A are,
1) Both synchronous and Asynchronous operation,
2) False start Bit Detection,
3) Automatic Break Detect and Handling,
4) Clock rate – 1, 16 or 64 time Baud rate,
5) Error Detection – Parity, Overrun and Framing Errors,
6) Break Character Generation.
The control pins with which the 8251A communicates with the CPU are the
RESET, CLK, WR, RD, CS, C/D, D0-D7. The table below shows basic operations
performed by 8251, as determined by the control signals.

C/D RD WR CS FUNCTION
0 0 1 0 8251A DATA=> DATA BUS
0 1 0 0 DATA BUS => 8251A DATA
1 0 1 0 STATUS => DATA BUS
1 1 0 0 DATA BUS => CONTROL
X 1 1 0 DATA BUS => 3 STATE
X X X 1 DATA BUS => 3 STATE

RS232C STANDARD DEFINITION:

The RS232C is a standard developed by the EIA for data transmission in a
serial fashion between the transmitter and receiver. The RS232C standard operates at a

100
voltage level different from TTL levels, -12V corresponds to logic high and +12V
corresponds to logic low.
Obviously, 8251 is not directly compatible with these signal levels. Standard
method to interface RS232C and TTL levels is with MC1489 quad TTL-to- RS232C
drivers and MC1489 quad RS232C-to-TTL receivers. Of the 25 handshake signals
provided by the RS232C standard, lets discuss RTS, CTS, RxD and TxD signals.
When connected with another system for serial communication, these signals
will connect with the CTS, RTS, TxD and Rxd signals of that system respectively.

1) CTS: Clear to Send – Enables 8251A to transmit serial data, if TxEnable bit in
the command byte is set to one.
2) RTS: Request to Send – When low, indicates that 8251A can receive serial
data. It can be made low by setting the RTS bit in the command byte.
3) TxD: Transmit serial data.
4) RxD: Receive serial data.

I/O DECODING:
I/O decoding logic is generated by a 3 to 8 decoder 74LS138 and NAND gates
74LS00. As usual, the address lines, A3, A4 and A5 are connected to Pin1, Pin2 and
Pin3 of 74LS138. Address lines A6 and A7 are NANDed and the NAND gate output is
connected to Pin6 of 74LS138. Similarly IOW and IOR are NANDed together and the
NAND gate output is connected to Pin5. Pin4 is grounded.
Thus 8251 is selected with address,
A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 0 0 X X X
Since the address line A1 is connected to control/data input of 8251, the control
register of 8251 is selected when,
A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 0 0 0 1 X
= C2 (Hex)

And the data register is selected with the address,

101
A7 A6 A5 A4 A3 A2 A1 A0
1 1 0 0 0 0 0 X
= C0 (Hex)

The two address lines A1 and A2 are connected to the Pin A0 (Pin 19) and A1
(Pin 20) of 8253 respectively. Thus the I/O address for control register, Channel 0,
Channel 1 and Channel 2 are:
A7 A6 A5 A4 A3 A2 A1 A0 HEX
CONTROL REG 1 1 0 0 1 1 1 0 CE
CHANNEL 0 1 1 0 0 1 0 0 0 C8
CHANNEL 1 1 1 0 0 1 0 1 0 CA
CHANNEL 2 1 1 0 0 1 1 0 0 CC

CONTROL WORD FORMAT:

The control word format of 8253 is as given below:

ALGORITHM:
TRANSMITTER:
102
 1. Start the process
2. Transfer the control word to control register of 8253 to select channel 0, mode 3
with binary count
3. Transfer LSB count to counter 0
4. Transfer MSB count to counter 0
5. Transfer control word to control register of 8251 to set the bandrate of the
processor bandrate with 8 bit character length with no parity, one bit stop bit.
6. Transfer the command instruction to 8251 control register.
7. Check the transmitter empty and transmitter ready state. If transmitter is ready
and transmitter empty is enable then transfer data to data register.
8. Stop the process.

RECEIVER:
1. Start the process
2. Transfer the control word to control register of 8253 to select channel 0, mode 3
with binary count
3. Transfer LSB count to counter 0
4. Transfer MSB count to counter 0
5. Transfer control word to control register of 8251 to set the bandrate of the
processor bandrate with 8 bit character length with no parity, one bit stop bit.
6. Transfer the command instruction to 8251 control register.
7. Check the receiver empty and receiver ready state. If receiver is ready and
receiver empty is enable then get the data from buffer to accumulator and store
it.
8. Stop the process.

103
TO CHECK TRANSMISSION AND RECEPTION OF CHARACTER
ADDRESS LABEL MNEMONICS COMMENTS
8100 MOV A,#36 Initialize control word format for 8253

8101
8102 MOV Initialize the control register for 8253
DPTR,#FFCE
8103
8104
8105 MOVX @DPTR,A Move Accumulator value to DPTR
location
8106 MOV A,#12 Set the higher order timer value
8107
8108 MOV DPTR,#FFC8 Initialize the control word for channel 0
8109
810A
810B MOVX @DPTR,A Move A to DPTR location
810C MOV A,#00 Set the lower order timer value
810D
810E MOVX @DPTR,A Move A to DPTR location
810F MOV A,#4E Initialize the mode instruction format
8110
8111 MOV DPTR,#FFC2 Initialize the control register address for
8251
8112

8113
8114 MOVX @DPTR,A Move A to DPTR location
8115 MOV A,#37 Initialize the command instruction
8116 format

8117 MOVX @DPTR,A Move A to DPTR location

8118 MOV A,#41 Move the immediate data to be
8119 transmitted (41) to Accumulator

811A MOV DPTR,#FFC0 Initialize the data register address for

811B 8251
811C
811D MOVX @DPTR,A Move A to DPTR location
811E MOVX A,@DPTR Move DPTR content to accumulator
811F MOV DPTR,#4200 Initialize the memory location to view
8120 the transmitted data
8121
8122 MOVX @DPTR,A Move A to DPTR location
8123 HERE SJMP HERE Stop the program

104
TO CHECK KIT TO KIT DATA (TRANSMITTER)

ADDRESS LABEL MNEMONICS COMMENTS

8100 MOV A,#36 Initialize control word format
8101 for 8253

8102 MOV Initialize the control register for

DPTR,#FFCE 8253
8103
8104
8105 MOVX @DPTR,A Move Accumulator value to
DPTR location
8106 MOV A,#12 Set the higher order timer value
8107
8108 MOV DPTR,#FFC8 Initialize the control word for
8109 channel 0
810A
810B MOVX @DPTR,A Move A to DPTR location
810C MOV A,#00 Set the lower order timer value
810D
810E MOVX @DPTR,A Move A to DPTR location
810F MOV A,#4E Initialize the mode instruction
8110 format

8111 MOV DPTR,#FFC2 Initialize the control register

address for 8251
8112
8113
8114 MOVX @DPTR,A Move A to DPTR location
8115 MOV A,#37 Initialize the command
8116 instruction format

8117 MOVX @DPTR,A Move A to DPTR location

8118 MOV A,#41 Move the immediate data to be
8119 transmitted (41) to Accumulator

811A MOVX @DPTR,A Move A to DPTR location

811B HERE SJMP HERE Stop the program

TO CHECK KIT TO KIT DATA (RECIEVER)

ADDRESS LABEL MNEMONICS COMMENTS
105
8100 MOV TMOD,#20 Initialize Timer mode
control register
8101
8102
8103 MOV TH1,#FD Initialize Timer 1 higher
order
8104
8105
8106 MOV TL1,#00 Initialize Timer 1 lower
order
8107
8108
8109 MOV TCON,#40 Initialize Timer control
register
810A
810B
810C MOV SCON,#58 Initialize serial
communication control
810D register
810E

810F MOV SBUF,#54 Get the data in serial buffer

8110
8111
8112 REPT JNB SCON.0 REPT Check whether the byte is
received
8113
8114
8115 CLR SCON.0 Clear SCON.0 to receive
next register
8116
8117 MOV A,SBUF Store the data in
8118 accumulator
8119 MOV DPTR,#4200 Set the pointer
811A
811B
8118 MOVX @DPTR,A Store the data
8119 HERE SJMP HERE Stop the program

106
PROCEDURE:
i) Connect the microcontroller kit with serial communication interface
board using 50 core connector (VXT bus).
ii) Check the Go toer position.
iii) Execute the receiver program and then the transmitter program
iv) Check the output at the receiver memory location.

RESULT:

Thus the serial communication interface using 8051 was studied.

107