A block diagram is a visual representation of a system that uses

simple, labeled blocks that represent single or multiple items,

entities or concepts, connected by lines to show relationships
between them.

Digital
Computers
A Digital computer can be considered as a digital system that performs various
computational tasks.

The first electronic digital computer was developed in the late 1940s and was used
primarily for numerical computations.

By convention, the digital computers use the binary number system, which has two
digits: 0 and 1. A binary digit is called a bit.

A computer system is subdivided into two functional entities: Hardware and

Software.

The hardware consists of all the electronic components and electromechanical

devices that comprise the physical entity of the device.

The software of the computer consists of the instructions and data that the computer
manipulates to perform various data-processing tasks.
 o The Central Processing Unit (CPU) contains an arithmetic and logic unit for
manipulating data, a number of registers for storing data, and a control circuit
for fetching and executing instructions.
o The memory unit of a digital computer contains storage for instructions and
data.
o The Random Access Memory (RAM) for real-time processing of the data.
o The Input-Output devices for generating inputs from the user and displaying
the final results to the user.
o The Input-Output devices connected to the computer include the keyboard,
mouse, terminals, magnetic disk drives, and other communication devices.

Hardware
Computer hardware consists of interconnected electronic devices that we can use to control
computer’s operation, input and output. Examples of hardware are CPU, keyboard, mouse,
hard disk, etc.
Hardware Components
Computer hardware is a collection of several components working together. Some parts are
essential and others are added advantages. Computer hardware is made up of CPU and
peripherals as shown in image below.

Software
A set of instructions that drives computer to do stipulated tasks is called a program. Software
instructions are programmed in a computer language, translated into machine language, and
executed by computer. Software can be categorized into two types −

 System software
 Application software
System Software
System software operates directly on hardware devices of computer. It provides a platform to
run an application. It provides and supports user functionality. Examples of system software
include operating systems such as Windows, Linux, Unix, etc.
Application Software
An application software is designed for benefit of users to perform one or more tasks.
Examples of application software include Microsoft Word, Excel, PowerPoint, Oracle, etc.

Differences between Software and Hardware are

Sr.No. Software Hardware

1 It is a collection of programs to It includes physical components of computer

bring computer hardware system system.
into operation.

2 It includes numbers, alphabets, It consists of electronic components like ICs,

alphanumeric symbols, identifiers, diodes, registers, crystals, boards, insulators,
keywords, etc. etc.

3 Software products evolve by Hardware design is based on architectural

adding new features to existing decisions to make it work over a range of
programs to support hardware. environmental conditions and time.
RAM (Random Access Memory) is the internal memory of the CPU for storing data,
program, and program result. It is a read/write memory which stores data until the machine is
working. As soon as the machine is switched off, data is erased.

Access time in RAM is independent of the address, that is, each storage location inside the
memory is as easy to reach as other locations and takes the same amount of time. Data in the
RAM can be accessed randomly but it is very expensive.
RAM is volatile, i.e. data stored in it is lost when we switch off the computer or if there is a
power failure. Hence, a backup Uninterruptible Power System (UPS) is often used with
computers. RAM is small, both in terms of its physical size and in the amount of data it can
hold.
RAM is of two types −

 Static RAM (SRAM)

 Dynamic RAM (DRAM)
Static RAM (SRAM)
The word static indicates that the memory retains its contents as long as power is being
supplied. However, data is lost when the power gets down due to volatile nature. SRAM
chips use a matrix of 6-transistors and no capacitors. Transistors do not require power to
prevent leakage, so SRAM need not be refreshed on a regular basis.
There is extra space in the matrix, hence SRAM uses more chips than DRAM for the same
amount of storage space, making the manufacturing costs higher. SRAM is thus used as
cache memory and has very fast access.
Characteristic of Static RAM
 Long life
 No need to refresh
 Faster
 Used as cache memory
 Large size
 Expensive
 High power consumption
Dynamic RAM (DRAM)
DRAM, unlike SRAM, must be continually refreshed in order to maintain the data. This is
done by placing the memory on a refresh circuit that rewrites the data several hundred times
per second. DRAM is used for most system memory as it is cheap and small. All DRAMs are
made up of memory cells, which are composed of one capacitor and one transistor.
Characteristics of Dynamic RAM
 Short data lifetime
 Needs to be refreshed continuously
 Slower as compared to SRAM
 Used as RAM
 Smaller in size
 Less expensive
 Less power consumption

ROM stands for Read Only Memory. The memory from which we can only read but cannot
write on it. This type of memory is non-volatile. The information is stored permanently in
such memories during manufacture. A ROM stores such instructions that are required to start
a computer. This operation is referred to as bootstrap. ROM chips are not only used in the
computer but also in other electronic items like washing machine and microwave oven.

PROM (Programmable Read Only Memory)

PROM is read-only memory that can be modified only once by a user. The user buys a blank
PROM and enters the desired contents using a PROM program. Inside the PROM chip, there
are small fuses which are burnt open during programming. It can be programmed only once
and is not erasable.

EPROM (Erasable and Programmable Read Only

Memory)
EPROM can be erased by exposing it to ultra-violet light for a duration of up to 40 minutes.
Usually, an EPROM eraser achieves this function. During programming, an electrical charge
is trapped in an insulated gate region. The charge is retained for more than 10 years because
the charge has no leakage path. For erasing this charge, ultra-violet light is passed through a
quartz crystal window (lid). This exposure to ultra-violet light dissipates the charge. During
normal use, the quartz lid is sealed with a sticker.
EEPROM (Electrically Erasable and Programmable
Read Only Memory)
EEPROM is programmed and erased electrically. It can be erased and reprogrammed about
ten thousand times. Both erasing and programming take about 4 to 10 ms (millisecond). In
EEPROM, any location can be selectively erased and programmed. EEPROMs can be erased
one byte at a time, rather than erasing the entire chip. Hence, the process of reprogramming is
flexible but slow.

Advantages of ROM
The advantages of ROM are as follows −

 Non-volatile in nature
 Cannot be accidentally changed
 Cheaper than RAMs
 Easy to test
 More reliable than RAMs
 Static and do not require refreshing
 Contents are always known and can be verified
Magnetic memories :
In a computer system, several types of secondary storage devices like HDD, CD, DVD, etc.
are used to store permanent data and information. These devices can be categorized into two
types namely – magnetic memory and optical memory.
A magnetic memory like HDD consists of circular disks made up of non-magnetic materials
and coated with a thin layer of magnetic material in which data is stored. On the other hand,
optical disks are made up of plastic and consist of layers of photo-sensitive materials in
which the data is stored using optical effects. A major advantage of the magnetic disk and
optical disk is that they are inexpensive storage devices.

What is memory hierarchy?

The Computer memory hierarchy looks like a pyramid structure which is used to describe
the differences among memory types. It separates the computer storage based on hierarchy.
Level 0: CPU registers
Level 1: Cache memory
Level 2: Main memory or primary memory
Level 3: Magnetic disks or secondary memory
Level 4: Optical disks or magnetic types or tertiary Memory
In Memory Hierarchy the cost of memory, capacity is inversely proportional to speed. Here
the devices are arranged in a manner Fast to slow, that is form register to Tertiary memory.
Let us discuss each level in detail:
Level-0 − Registers
The registers are present inside the CPU. As they are present inside the CPU, they have least
access time. Registers are most expensive and smallest in size generally in kilobytes. They
are implemented by using Flip-Flops.
Level-1 − Cache
Cache memory is used to store the segments of a program that are frequently accessed by the
processor. It is expensive and smaller in size generally in Megabytes and is implemented by
using static RAM.
Level-2 − Primary or Main Memory
It directly communicates with the CPU and with auxiliary memory devices through an I/O
processor. Main memory is less expensive than cache memory and larger in size generally in
Gigabytes. This memory is implemented by using dynamic RAM.
Level-3 − Secondary storage
Secondary storage devices like Magnetic Disk are present at level 3. They are used as
backup storage. They are cheaper than main memory and larger in size generally in a few
TB.
Level-4 − Tertiary storage
Tertiary storage devices like magnetic tape are present at level 4. They are used to store
removable files and are the cheapest and largest in size (1-20 TB).

How associative memory works?

Given below is a series of steps that depicts working of associative memory in computer
architecture:
 Data is stored at the very first empty location found in memory.
 In associative memory when data is stored at a particular location then no address is stored
along with it.
 When the stored data need to be searched then only the key (i.e. data or part of data) is
provided.
  A sequential search is performed in the memory using the specified key to find out the
matching key from the memory.
 If the data content is found then it is set for the next reading by the memory.

Associative memory organization

The associative memory hardware structure consists of:

 memory array,
 logic for m words with n bits per word, and
 several registers like input resgister, mask register, select register and output register.
The block diagram showing organization of associative memory is shown below:

Functions of the registers used in associative memory is given below:

 Input Register (I) hold the data that is to be written into the associative memory. It is also
used to hold the data that is to be searched for. At a particular time it can hold a data
containing one word of length (say n).
 Mask Register (M) is used to provide a mask for choosing a key or particular field in the
input register's word. Since input register can hold a data of one word of length n so the
maximum length of mask register can be n.
 Select Register (S) contains m bits, one for each memory words. When input data in I
register is compared to key in m register and match is found then that particular bit is set in
select register.
 Output Register (Y) contains the matched data word that is retrieved from associative
memory.

Advantages of associative memory

Advantages of associative memory is given below:

 Associative memory searching process is fast.
 Associative memory is suitable for parallel searches.
Disadvantages of associative memory

Disadvantages of associative memory is given below:

 Associative memory is expensive than RAM

Next Page
A computer can address more memory than the amount physically installed on the system.
This extra memory is actually called virtual memory and it is a section of a hard disk that's
set up to emulate the computer's RAM.
The main visible advantage of this scheme is that programs can be larger than physical
memory. Virtual memory serves two purposes. First, it allows us to extend the use of physical
memory by using disk. Second, it allows us to have memory protection, because each virtual
address is translated to a physical address.
Following are the situations, when entire program is not required to be loaded fully in main
memory.
 User written error handling routines are used only when an error occurred in
the data or computation.
 Certain options and features of a program may be used rarely.
 Many tables are assigned a fixed amount of address space even though only a
small amount of the table is actually used.
 The ability to execute a program that is only partially in memory would
counter many benefits.
 Less number of I/O would be needed to load or swap each user program into
memory.
 A program would no longer be constrained by the amount of physical memory
that is available.
 Each user program could take less physical memory, more programs could be
run the same time, with a corresponding increase in CPU utilization and
throughput.
Modern microprocessors intended for general-purpose use, a memory management unit, or
MMU, is built into the hardware. The MMU's job is to translate virtual addresses into
physical addresses. A basic example is given below −
Virtual memory is commonly implemented by demand paging. It can also be implemented in
a segmentation system. Demand segmentation can also be used to provide virtual memory.

Demand Paging
A demand paging system is quite similar to a paging system with swapping where processes
reside in secondary memory and pages are loaded only on demand, not in advance. When a
context switch occurs, the operating system does not copy any of the old program’s pages out
to the disk or any of the new program’s pages into the main memory Instead, it just begins
executing the new program after loading the first page and fetches that program’s pages as
they are referenced.
While executing a program, if the program references a page which is not available in the
main memory because it was swapped out a little ago, the processor treats this invalid
memory reference as a page fault and transfers control from the program to the operating
system to demand the page back into the memory.
Advantages
Following are the advantages of Demand Paging −

 Large virtual memory.

 More efficient use of memory.
 There is no limit on degree of multiprogramming.
Disadvantages
 Number of tables and the amount of processor overhead for handling page
interrupts are greater than in the case of the simple paged management
techniques.

Cache Memory
Cache memory is a high-speed memory, which is small in size but faster than the
main memory (RAM). The CPU can access it more quickly than the primary memory.
So, it is used to synchronize with high-speed CPU and to improve its performance.
Cache memory can only be accessed by CPU. It can be a reserved part of the main
memory or a storage device outside the CPU. It holds the data and programs which
are frequently used by the CPU. So, it makes sure that the data is instantly available
for CPU whenever the CPU needs this data. In other words, if the CPU finds the
required data or instructions in the cache memory, it doesn't need to access the
primary memory (RAM). Thus, by acting as a buffer between RAM and CPU, it speeds
up the system performance.

What are the types of

Instruction word formats, Addressing mode.:
Addressing Modes?
Computer ArchitectureComputerScienceNetwork

The operands of the instructions can be located either in the main memory or in the CPU
registers. If the operand is placed in the main memory, then the instruction provides the
location address in the operand field. Many methods are followed to specify the operand
address. The different methods/modes for specifying the operand address in the instructions
are known as addressing modes.

Types of Addressing Modes

There are various types of Addressing Modes which are as follows −
Implied Mode − In this mode, the operands are specified implicitly in the definition of the
instruction. For example, the instruction "complement accumulator" is an implied-mode
instruction because the operand in the accumulator register is implied in the definition of the
instruction. All register reference instructions that use an accumulator are implied-mode
instructions.
Instruction format with mode field

Opcode Mode Address

Immediate Mode − In this mode, the operand is specified in the instruction itself. In other
words, an immediate-mode instruction has an operand field instead of an address field. The
operand field includes the actual operand to be used in conjunction with the operation
determined in the instruction. Immediate-mode instructions are beneficial for initializing
registers to a constant value.
Register Mode − In this mode, the operands are in registers that reside within the CPU. The
specific register is selected from a register field in the instruction. A k-bit field can determine
any one of the 2k registers.
Register Indirect Mode − In this mode, the instruction defines a register in the CPU whose
contents provide the address of the operand in memory. In other words, the selected register
includes the address of the operand rather than the operand itself.
A reference to the register is then equivalent to specifying a memory address. The advantage
of a register indirect mode instruction is that the address field of the instruction uses fewer
bits to select a register than would have been required to specify a memory address directly.
Autoincrement or Autodecrement Mode &minuend; This is similar to the register indirect
mode except that the register is incremented or decremented after (or before) its value is used
to access memory. When the address stored in the register defines a table of data in memory,
it is necessary to increment or decrement the register after every access to the table. This can
be obtained by using the increment or decrement instruction.
Direct Address Mode − In this mode, the effective address is equal to the address part of the
instruction. The operand resides in memory and its address is given directly by the address
field of the instruction. In a branch-type instruction, the address field specifies the actual
branch address.
Indirect Address Mode − In this mode, the address field of the instruction gives the address
where the effective address is stored in memory. Control fetches the instruction from
memory and uses its address part to access memory again to read the effective address.
Indexed Addressing Mode − In this mode, the content of an index register is added to the
address part of the instruction to obtain the effective address. The index register is a special
CPU register that contains an index value. The address field of the instruction defines the
beginning address of a data array in memory.

Computer Organization | Hardwired v/s Micro-programmed Control

Unit
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Discuss

Introduction :
In computer architecture, the control unit is responsible for directing the flow of data
and instructions within the CPU. There are two main approaches to implementing a
control unit: hardwired and micro-programmed.
A hardwired control unit is a control unit that uses a fixed set of logic gates and
circuits to execute instructions. The control signals for each instruction are hardwired
into the control unit, so the control unit has a dedicated circuit for each possible
instruction. Hardwired control units are simple and fast, but they can be inflexible and
difficult to modify.
On the other hand, a micro-programmed control unit is a control unit that uses a
microcode to execute instructions. The microcode is a set of instructions that can be
modified or updated, allowing for greater flexibility and ease of modification. The
control signals for each instruction are generated by a microprogram that is stored in
memory, rather than being hardwired into the control unit.
Micro-programmed control units are slower than hardwired control units because they
require an extra step of decoding the microcode to generate control signals, but they
are more flexible and easier to modify. They are commonly used in modern CPUs
because they allow for easier implementation of complex instruction sets and better
support for instruction set extensions.
To execute an instruction, the control unit of the CPU must generate the required
control signal in the proper sequence. There are two approaches used for generating
the control signals in proper sequence as Hardwired Control unit and the Micro-
programmed control unit.
Hardwired Control Unit: The control hardware can be viewed as a state machine
that changes from one state to another in every clock cycle, depending on the contents
of the instruction register, the condition codes, and the external inputs. The outputs of
the state machine are the control signals. The sequence of the operation carried out by
this machine is determined by the wiring of the logic elements and hence named
“hardwired”.
 Fixed logic circuits that correspond directly to the Boolean expressions are
used to generate the control signals.
 Hardwired control is faster than micro-programmed control.
 A controller that uses this approach can operate at high speed.
 RISC architecture is based on the hardwired control unit
Micro-programmed Control Unit –
 The control signals associated with operations are stored in special memory
units inaccessible by the programmer as Control Words.
 Control signals are generated by a program that is similar to machine
language programs.
 The micro-programmed control unit is slower in speed because of the time
it takes to fetch microinstructions from the control memory.
Some Important Terms
1. Control Word: A control word is a word whose individual bits represent
various control signals.
2. Micro-routine: A sequence of control words corresponding to the control
sequence of a machine instruction constitutes the micro-routine for that
instruction.
3. Micro-instruction: Individual control words in this micro-routine are
referred to as microinstructions.
4. Micro-program: A sequence of micro-instructions is called a micro-
program, which is stored in a ROM or RAM called a Control Memory
(CM).
5. Control Store: the micro-routines for all instructions in the instruction set
of a computer are stored in a special memory called the Control Store.
RISC and CISC are two different types of computer architectures that are used to design the
microprocessors that are found in computers. The fundamental difference between RISC and
CISC is that RISC (Reduced Instruction Set Computer) includes simple instructions and
takes one cycle, while the CISC (Complex Instruction Set Computer) includes complex
instructions and takes multiple cycles.
Read this tutorial to find out more about RISC and CISC and how these two architectures are
different from each other.
let us know about the concepts of RISC and CISC

What is RISC?
In the RISC architecture, the instruction set of the computer system is simplified to reduce
the execution time. RISC architecture has a small set of instructions that generally includes
register-to-register operations.
The RISC architecture uses comparatively a simple instruction format that is easy to decode.
The instruction length can be fixed and aligned to word boundaries. RISC processors can
execute only one instruction per clock cycle.
The following are some important characteristics of a RISC Processor −
 A RISC processor has a few instructions.
 RISC processor has a few addressing modes.
  In the RISC processor, all operations are performed within the registers of the
CPU.
 RISC processor can be of fixed-length.
 RISC can be hardwired rather than micro-programmed control.
 RISC is used for single-cycle instruction execution.
 RISC processor has easily decodable instruction format.
RISC architectures are characterized by a small, simple instruction set and a highly efficient
execution pipeline. This allows RISC processors to execute instructions quickly, but it also
means that they can only perform a limited number of tasks.

What is CISC?
The CISC architecture comprises a complex instruction set. A CISC processor has a
variable-length instruction format. In this processor architecture, the instructions that require
register operands can take only two bytes.
In a CISC processor architecture, the instructions which require two memory addresses can
take five bytes to comprise the complete instruction code. Therefore, in a CISC processor,
the execution of instructions may take a varying number of clock cycles. The CISC
processor also provides direct manipulation of operands that are stored in the memory.
The primary objective of the CISC processor architecture is to support a single machine
instruction for each statement that is written in a high-level programming language.
The following are the important characteristics of a CISC processor architecture −
 CISC can have variable-length instruction formats.
 It supports a set of a large number of instructions, typically from 100 to 250
instructions.
 It has a large variety of addressing modes, typically from 5 to 20 different
modes.
 CISC has some instructions which perform specialized tasks and are used
infrequently.
CISC architectures have a large, complex instruction set and a less efficient execution
pipeline. This allows CISC processors to perform a wider range of tasks, but they are not as
fast as RISC processors when executing instructions.

Pipelining in Computer Architecture

6th September 2019 by Neha T 7 Comments

Pipelining organizes the execution of the multiple instructions simultaneously.

Pipelining improves the throughput of the system. In pipelining the instruction is
divided into the subtasks. Each subtask performs the dedicated task.

The instruction is divided into 5 subtasks: instruction fetch, instruction

decode, operand fetch, instruction execution and operand store. The instruction
fetch subtask will only perform the instruction fetching operation, instruction
decode subtask will only be decoding the fetched instruction and so on the other
subtasks will do.
In this section, we will discuss the types of pipelining, pipelining hazards, its
advantage. So let us start.

Content: Pipelining in Computer Architecture

1. Introduction
2. Types of Pipelining
3. Pipelining Hazards
4. Advantages
5. Key Takeaways

Introduction
Have you ever visited an industrial plant and see the assembly lines over there?
How a product passes through the assembly line and while passing it is worked on,
at different phases simultaneously. For example, take a car manufacturing plant.
At the first stage, the automobile chassis is prepared, in the next stage workers add
body to the chassis, further, the engine is installed, then painting work is done and
so on.

The group of workers after working on the chassis of the first car don’t sit idle.
They start working on the chassis of the next car. And the next group take the
chassis of the car and add body to it. The same thing is repeated at every stage,
after finishing the work on the current car body they take on next car body which is
the output of the previous stage.

Here, though the first car is completed in several hours or days, due to the
assembly line arrangement it becomes possible to have a new car at the end of an
assembly line in every clock cycle.

Similarly, the concept of pipelining works. The output of the first pipeline
becomes the input for the next pipeline. It is like a set of data processing unit
connected in series to utilize processor up to its maximum.

An instruction in a process is divided into 5 subtasks likely,

1. In the first subtask, the instruction is fetched.

2. The fetched instruction is decoded in the second stage.
3. In the third stage, the operands of the instruction are fetched.
4. In the fourth, arithmetic and logical operation are performed on the operands
to execute the instruction.
 5. In the fifth stage, the result is stored in memory.

Now, understanding the division of the instruction into subtasks. Let us

understand, how the n number of instructions in a process, are pipelined.

Look at the figure below the 5 instructions are pipelined. The first instruction gets
completed in 5 clock cycle. After the completion of first instruction, in every new
clock cycle, a new instruction completes its execution.

Observe that when the Instruction fetch operation of the first instruction is
completed in the next clock cycle the instruction fetch of second instruction gets
started. This way the hardware never sits idle it is always busy in performing some
or other operation. But, no two instructions can execute their same stage at
the same clock cycle.

Types of Pipelining
In 1977 Handler and Ramamoorthy classified pipeline processors depending on
their functionality.

1. Arithmetic Pipelining

It is designed to perform high-speed floating-point addition, multiplication and

division. Here, the multiple arithmetic logic units are built in the system to perform
the parallel arithmetic computation in various data format. Examples of the
arithmetic pipelined processor are Star-100, TI-ASC, Cray-1, Cyber-205.
2. Instruction Pipelining

Here, the number of instruction are pipelined and the execution of current
instruction is overlapped by the execution of the subsequent instruction. It is also
called instruction lookahead.

3. Processor Pipelining

Here, the processors are pipelined to process the same data stream. The data
stream is processed by the first processor and the result is stored in the memory
block. The result in the memory block is accessed by the second processor. The
second processor reprocesses the result obtained by the first processor and the
passes the refined result to the third processor and so on.

4. Unifunction Vs. Multifunction Pipelining

The pipeline performing the precise function every time is unifunctional pipeline.
On the other hand, the pipeline performing multiple functions at a different time or
multiple functions at the same time is multifunction pipeline.

5. Static vs Dynamic Pipelining

The static pipeline performs a fixed-function each time. The static pipeline is
unifunctional. The static pipeline executes the same type of instructions
continuously. Frequent change in the type of instruction may vary the performance
of the pipelining.

Dynamic pipeline performs several functions simultaneously. It is a multifunction

pipelining.

6. Scalar vs Vector Pipelining

Scalar pipelining processes the instructions with scalar operands. The vector
pipeline processes the instruction with vector operands.

Pipelining Hazards
Whenever a pipeline has to stall due to some reason it is called pipeline hazards.
Below we have discussed four pipelining hazards.

1. Data Dependency

Consider the following two instructions and their pipeline execution:

In the figure above, you can see that result of the Add instruction is stored in the
register R2 and we know that the final result is stored at the end of the execution of
the instruction which will happen at the clock cycle t4.

But the Sub instruction need the value of the register R2 at the cycle t3. So the Sub
instruction has to stall two clock cycles. If it doesn’t stall it will generate an
incorrect result. Thus depending of one instruction on other instruction for data
is data dependency.

2. Memory Delay

When an instruction or data is required, it is first searched in the cache memory if

not found then it is a cache miss. The data is further searched in the memory which
may take ten or more cycles. So, for that number of cycle the pipeline has to stall
and this is a memory delay hazard. The cache miss, also results in the delay of all
the subsequent instructions.

3. Branch Delay

Suppose the four instructions are pipelined I1, I2, I3, I4 in a sequence. The instruction
I1 is a branch instruction and its target instruction is Ik. Now, processing starts and
instruction I1 is fetched, decoded and the target address is computed at the 4th stage
in cycle t3.

But till then the instructions I2, I3, I4 are fetched in cycle 1, 2 & 3 before the target
branch address is computed. As I1 is found to be a branch instruction, the
instructions I2, I3, I4 has to be discarded because the instruction Ik has to be
processed next to I1. So, this delay of three cycles 1, 2, 3 is a branch delay.
Prefetching the target branch address will reduce the branch delay. Like if the
target branch is identified at the decode stage then the branch delay will reduce to 1
clock cycle.

4. Resource Limitation

If the two instructions request for accessing the same resource in the same clock
cycle, then one of the instruction has to stall and let the other instruction to use the
resource. This stalling is due to resource limitation. However, it can be prevented
by adding more hardware.
Advantages
1. Pipelining improves the throughput of the system.
2. In every clock cycle, a new instruction finishes its execution.
3. Allow multiple instructions to be executed concurrently.

Computer Architecture | Flynn’s taxonomy

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Discuss

Parallel computing is a computing where the jobs are broken into discrete parts that
can be executed concurrently. Each part is further broken down to a series of
instructions. Instructions from each part execute simultaneously on different CPUs.
Parallel systems deal with the simultaneous use of multiple computer resources that
can include a single computer with multiple processors, a number of computers
connected by a network to form a parallel processing cluster or a combination of both.
Parallel systems are more difficult to program than computers with a single processor
because the architecture of parallel computers varies accordingly and the processes of
multiple CPUs must be coordinated and synchronized. The crux of parallel processing
are CPUs. Based on the number of instruction and data streams that can be
processed simultaneously, computing
Flynn’s taxonomy is a classification scheme for computer architectures proposed by
Michael Flynn in 1966. The taxonomy is based on the number of instruction streams
and data streams that can be processed simultaneously by a computer architecture.
There are four categories in Flynn’s taxonomy:
1. Single Instruction Single Data (SISD): In an SISD architecture, there is a
single processor that executes a single instruction stream and operates on a
single data stream. This is the simplest type of computer architecture and is
used in most traditional computers.
2. Single Instruction Multiple Data (SIMD): In a SIMD architecture, there is a
single processor that executes the same instruction on multiple data streams
in parallel. This type of architecture is used in applications such as image
and signal processing.
3. Multiple Instruction Single Data (MISD): In a MISD architecture, multiple
processors execute different instructions on the same data stream. This type
of architecture is not commonly used in practice, as it is difficult to find
applications that can be decomposed into independent instruction streams.
4. Multiple Instruction Multiple Data (MIMD): In a MIMD architecture,
multiple processors execute different instructions on different data streams.
This type of architecture is used in distributed computing, parallel
processing, and other high-performance computing applications.
Flynn’s taxonomy is a useful tool for understanding different types of computer
architectures and their strengths and weaknesses. The taxonomy highlights the
importance of parallelism in modern computing, and shows how different types of
parallelism can be exploited to improve performance.
 systems are classified into four major
categories:

Flynn’s classification –
1. Single-instruction, single-data (SISD) systems – An SISD computing
system is a uniprocessor machine which is capable of executing a single
instruction, operating on a single data stream. In SISD, machine instructions
are processed in a sequential manner and computers adopting this model are
popularly called sequential computers. Most conventional computers have
SISD architecture. All the instructions and data to be processed have to be
stored in primary

memory. The speed

 of the processing element in the SISD model is limited(dependent) by the
rate at which the computer can transfer information internally. Dominant
representative SISD systems are IBM PC, workstations.
2. Single-instruction, multiple-data (SIMD) systems – An SIMD system is a
multiprocessor machine capable of executing the same instruction on all the
CPUs but operating on different data streams. Machines based on an SIMD
model are well suited to scientific computing since they involve lots of
vector and matrix operations. So that the information can be passed to all
the processing elements (PEs) organized data elements of vectors can be
divided into multiple sets(N-sets for N PE systems) and each PE can
process one data

set. Domin
ant representative SIMD systems is Cray’s vector processing machine.
3. Multiple-instruction, single-data (MISD) systems – An MISD computing
system is a multiprocessor machine capable of executing different
instructions on different PEs but all of them operating on the same
dataset

. E
 xample Z = sin(x)+cos(x)+tan(x) The system performs different operations
on the same data set. Machines built using the MISD model are not useful
in most of the application, a few machines are built, but none of them are
available commercially.
4. Multiple-instruction, multiple-data (MIMD) systems – An MIMD
system is a multiprocessor machine which is capable of executing multiple
instructions on multiple data sets. Each PE in the MIMD model has separate
instruction and data streams; therefore machines built using this model are
capable to any kind of application. Unlike SIMD and MISD machines, PEs
in MIMD machines work
asynchronously.

MIMD machines are broadly categorized into shared-memory

MIMD and distributed-memory MIMD based on the way PEs are
coupled to the main memory. In the shared memory MIMD model (tightly
coupled multiprocessor systems), all the PEs are connected to a single
global memory and they all have access to it. The communication between
PEs in this model takes place through the shared memory, modification of
the data stored in the global memory by one PE is visible to all other PEs.
Dominant representative shared memory MIMD systems are Silicon
Graphics machines and Sun/IBM’s SMP (Symmetric Multi-Processing).
In Distributed memory MIMD machines (loosely coupled multiprocessor
systems) all PEs have a local memory. The communication between PEs in
this model takes place through the interconnection network (the inter
process communication channel, or IPC). The network connecting PEs can
be configured to tree, mesh or in accordance with the requirement. The
shared-memory MIMD architecture is easier to program but is less tolerant
to failures and harder to extend with respect to the distributed memory
MIMD model. Failures in a shared-memory MIMD affect the entire system,
whereas this is not the case of the distributed model, in which each of the
PEs can be easily isolated. Moreover, shared memory MIMD architectures
are less likely to scale because the addition of more PEs leads to memory
 contention. This is a situation that does not happen in the case of distributed
memory, in which each PE has its own memory. As a result of practical
outcomes and user’s requirement , distributed memory MIMD architecture
is superior to the other existing models.
Flynn’s taxonomy itself does not have any inherent advantages or disadvantages. It is
simply a classification scheme for computer architectures based on the number of
instruction streams and data streams that can be processed simultaneously.

However, the different types of computer architectures that fall under

Flynn’s taxonomy have their own advantages and disadvantages. Here are
some examples:

1. SISD architecture: This is the simplest and most common type of computer
architecture. It is easy to program and debug, and can handle a wide range
of applications. However, it does not offer significant performance gains
over traditional computing systems.
2. SIMD architecture: This type of architecture is highly parallel and can offer
significant performance gains for applications that can be parallelized.
However, it requires specialized hardware and software, and is not well-
suited for applications that cannot be parallelized.
3. MISD architecture: This type of architecture is not commonly used in
practice, as it is difficult to find applications that can be decomposed into
independent instruction streams.
4. MIMD architecture: This type of architecture is highly parallel and can
offer significant performance gains for applications that can be parallelized.
It is well-suited for distributed computing, parallel processing, and other
high-performance computing applications. However, it requires specialized
hardware and software, and can be difficult to program and debug.
Overall, the advantages and disadvantages of different types of computer architectures
depend on the specific application and the level of parallelism that can be exploited.
Flynn’s taxonomy is a useful tool for understanding the different types of computer
architectures and their potential uses, but ultimately the choice of architecture depends
on the specific needs of the application.

Some additional features of Flynn’s taxonomy include:

Concurrency: Flynn’s taxonomy provides a way to classify computer architectures

based on their concurrency, which refers to the number of tasks that can be executed
simultaneously.
Performance: Different types of architectures have different performance
characteristics, and Flynn’s taxonomy provides a way to compare their performance
based on the number of concurrent instructions and data streams.
Parallelism: Flynn’s taxonomy highlights the importance of parallelism in computer
architecture and provides a framework for designing and analyzing parallel processing
systems.
Vector Processor
A vector processor is a type of processor that can process multiple data elements at
once. It is capable of performing operations on a vector of data elements in parallel.
Vector processors are particularly useful for tasks such as image and video
processing, where large amounts of data need to be processed in parallel. Vector
processors are also used in scientific computing, where they are used to accelerate
the processing of complex algorithms.

Advantages of Vector Processor

 High Performance: Vector processors can process multiple operations

simultaneously, increasing the speed of calculations.
 Highly Parallel: Vector processors are able to handle multiple operations
in parallel, allowing for faster computations.
 High Memory Bandwidth: Vector processors are able to access large
amounts of data at once, increasing the speed of computations.
 Low Power Consumption: Vector processors are much more efficient
than traditional processors, reducing the amount of power needed to
operate them.
 Reduced Software Overhead: Vector processors can reduce the amount
of software code needed to complete tasks, saving time and resources.
 Improved Accuracy: Vector processors are more accurate than scalar
processors, making them ideal for applications that require precision.
Scalar Processor
A scalar processor is a type of processor that can process one data element at a time.
Scalar processors are typically used for general-purpose computing tasks, such as
word processing and spreadsheets. Compared to vector processors, scalar processors
are less powerful and slower, but they are cheaper and more energy-efficient.

Characteristics of Scalar Processor

 Scalar processors deliver high-performance capabilities, capable of

executing multiple instructions simultaneously.
 Scalar processors execute a single instruction in one clock cycle.
 Scalar processors are relatively low-cost compared to other types of
processors.
 Scalar processors have low power consumption, making them more
efficient and cost-effective.
 Scalar processors are highly flexible and can be used to solve a variety of
problems.
 Scalar processors are relatively simple in design and are easy to program
and maintain.

Advantages of Scalar Processor

 Low Cost: Scalar processors are typically much cheaper than vector
processors, making them more accessible to many people.
  Low Power Consumption: Scalar processors are much more efficient than
vector processors, reducing the amount of power needed to operate them.
 Easier to Program: Scalar processors are simpler to program than vector
processors, making them easier to use for novice programmers.
 Flexible: Scalar processors are more flexible than vector processors,
allowing them to be used in a variety of applications.
 High Clock Speed: Scalar processors are able to process instructions at a
much faster rate than vector processors, increasing the speed of
computations.
 Good for Single-Threaded Tasks: Scalar processors are better suited for
single-threaded tasks, as they can process one operation at a time.

What is Multiprocessor?
Computer ArchitectureComputerScienceNetwork

A multiprocessor is a data processing system that can execute more than one program or
more than one arithmetic operation simultaneously. It is also known as a multiprocessing
system. Multiprocessor uses with more than one processor and is similar to
multiprogramming that allows multiple threads to be used for a single procedure.
The term ‘multiprocessor’ can also be used to describe several separate computers running
together. It is also referred to as clustering. A system is called a multiprocessor system only
if it includes two or more elements that can implement instructions independently.
A multiprocessor system employs a distributed approach. In the distributed approach, a
single processor does not perform a complete task. Instead, more than one processor is used
to do the subtasks.

Advantages of Multiprocessor
There is the following advantage of Multiprocessor which are as follows −

 It helps to improve the cost or performance ratio of the system.

 It helps to fit the needs of an application when several processors are combined.
At the same time, a multiprocessor system avoids the expenses of the unnecessary
capabilities of a centralized system. However, this system provides room for
expansion.
 It helps to divide the tasks among the modules. If failure happens, it is simple and
cheaper to identify and replace the malfunctioning processor, instead of replacing
the failing part of the complex processor.
 It helps to improve the authenticity of the system. A failure that occurs in any one
part of a multiprocessor system has a finite result on the rest of the system.
If an error occurs in one processor, a second processor may take up the responsibility of
doing the task of the processor in which the error has occurred. This helps in enhancing the
reliability of the system at the cost of some loss in efficiency.
What Is Distributed Computing?
Distributed computing is a system of software components spread
over different computers but running as a single entity. A distributed
system can be an arrangement of different configurations, such as
mainframes, computers, workstations, and minicomputers.

Distributed System
Sharing resources such as hardware, software, and data is one of the
principles of cloud computing. With different levels of openness to the
software and concurrency, it’s easier to process data simultaneously
through multiple processors. The more fault-tolerant an application is, the
more quickly it can recover from a system failure.
Organizations have turned to distributed computing systems to handle data
generation explosion and increased application performance needs. These
distributed systems help businesses scale as data volume grows. This is
especially true because the process of adding hardware to a distributed
system is simpler than upgrading and replacing an entire centralized
system made up of powerful servers.
Distributed systems consist of many nodes that work together toward a
single goal. These systems function in two general ways, and both of them
have the potential to make a huge difference in an organization.

System architecture
System-level architecture focuses on the entire system and the placement
of components of a distributed system across multiple machines. The
client-server architecture and peer-to-peer architecture are the two major
system-level architectures that hold significance today. An example would
be an ecommerce system that contains a service layer, a database, and a
web front.
i) Client-server architecture

As the name suggests, client-server architecture consists of a client and a

server. The server is where all the work processes are, while the client is
where the user interacts with the service and other resources (remote
server). The client can then request from the server, and the server will
respond accordingly. Typically, only one server handles the remote side;
however, using multiple servers ensures total safety.
 Client-server Architecture
Client-server architecture has one standard design feature: centralized
security. Data such as usernames and passwords are stored in a secure
database for any server user to have access to this information. This makes
it more stable and secure than peer-to-peer. This stability comes from
client-server architecture, where the security database can allow resource
usage in a more meaningful way. The system is much more stable and
secure, even though it isn’t as fast as a server. The disadvantages of a
distributed system are its single point of failure and not being as scalable
as a server.
ii) Peer-to-peer (P2P) architecture
A peer-to-peer network, also called a (P2P) network, works on the concept
of no central control in a distributed system. A node can either act as a
client or server at any given time once it joins the network. A node that
requests something is called a client, and one that provides something is
called a server. In general, each node is called a peer.
 Peer-to-Peer Architecture
If a new node wishes to provide services, it can do so in two ways. One
way is to register with a centralized lookup server, which will then direct
the node to the service provider. The other way is for the node to broadcast
its service request to every other node in the network, and whichever node
responds will provide the requested service.
P2P networks of today have three separate sections:
 Structured P2P: The nodes in structured P2P follow a
predefined distributed data structure.
 Unstructured P2P: The nodes in unstructured P2P randomly
select their neighbors.
  Hybrid P2P: In a hybrid P2P, some nodes have unique
functions appointed to them in an orderly manner.

Computers use a fixed number of bits to represent an integer. The

commonly-used bit-lengths for integers are 8-bit, 16-bit, 32-bit or
64-bit. Besides bit-lengths, there are two representation schemes
for integers: Unsigned Integers: can represent zero and positive
integers.

what is 1s and 2s complement arithmetic?

1’s complement of a binary number is another binary number obtained by toggling
all bits in it, i.e., transforming the 0 bit to 1 and the 1 bit to 0.In the 1’s complement
format , the positive numbers remain unchanged . The negative numbers are
obtained by taking the 1’s complement of positive counterparts.
for example +9 will be represented as 00001001 in eight-bit notation and -9 will be
represented as 11110110, which is the 1’s complement of 00001001.

For one’s complement, we simply need to flip all bits.

For 2’s complement, we first find one’s complement. We traverse the one’s
complement starting from LSB (least significant bit), and look for 0. We flip all 1’s
(change to 0) until we find a 0. Finally, we flip the found 0. For example, 2’s
complement of “01000” is “11000” (Note that we first find one’s complement of
01000 as 10111). If there are all 1’s (in one’s complement), we add an extra 1 in the
string. For example, 2’s complement of “000” is “1000” (1’s complement of “000” is
“111”).

Difference between Serial and Parallel Transmission

There are two methods used for transferring data between computers which are given
below: Serial Transmission and Parallel Transmission.
Serial Transmission:
In Serial Transmission, data-bit flows from one computer to another computer in bi-
direction. In this transmission, one bit flows at one clock pulse. In Serial
Transmission, 8 bits are transferred at a time having a start and stop bit.
 Serial Transmission

Parallel Transmission:
In Parallel Transmission, many bits are flow together simultaneously from one
computer to another computer. Parallel Transmission is faster than serial transmission
to transmit the bits. Parallel transmission is used for short distance.

Parallel Transmission

What is the time delay of carry lookahead adder?

Carry look-ahead adder has just two levels of gate delay from any input to any
output. So, the time delay is independent of the number of bits in the operand. But it
depends on the number of operands, propagation delay.
The booth algorithm is a multiplication algorithm that allows us
to multiply the two signed binary integers in 2's complement,
respectively. It is also used to speed up the performance of the
multiplication process. It is very efficient too.
Divide algorithm- Restoring and Non-Restoring.

The division algorithm is generally of two types, i.e., fast algorithm

and slow algorithm. Goldschmidt and Newton-Raphson are the
types of fast division algorithm, and STR algorithm, restoring
algorithm, non-performing algorithm, and the non-restoring
algorithm are the types of slow division algorithm.

In computing, floating-point arithmetic (FP) is arithmetic that

represents real numbers approximately, using an integer with a
fixed precision, called the significand, scaled by an integer
exponent of a fixed base.
Floating-point types
 float.
 double.
 long double.

Example −Suppose number is using 32-bit format: the 1 bit sign bit, 8 bits for signed
exponent, and 23 bits for the fractional part. The leading bit 1 is not stored (as it is always 1
for a normalized number) and is referred to as a “hidden bit”.
Then −53.5 is normalized as -53.5=(-110101.1)2=(-1.101011)x25 , which is represented as
following below,

Where 00000101 is the 8-bit binary value of exponent value +5.

Note that 8-bit exponent field is used to store integer exponents -126 ≤ n ≤ 127.

Overflow detection , status flags:

The rules for detecting overflow in a two's complement sum are simple: If the sum of two
positive numbers yields a negative result, the sum has overflowed. If the sum of two
negative numbers yields a positive result, the sum has overflowed.
The status flags allow a single arithmetic operation to produce results for three different data
types: unsigned integers, signed integers, and BCD integers.