Introduction to computer architecture
Sheet 2 – Answers
Review questions:
1.
o Datapath
o CU
2. The datapath consists of an arithmetic-logic unit and storage units (registers) that are
interconnected by a data bus that is also connected to main memory
3. Various CPU components perform sequenced operations according to signals provided by
its control unit.
4. in CPU
5.
A single accumulator to store temporary results. It is called “AC”
Memory address register, MAR, a 12-bit register that holds the memory address of
an instruction or the operand of an instruction.
Memory buffer register, MBR, a 16-bit register that holds the data after its retrieval
from, or before its placement in memory
Program counter, PC, a 12-bit register that holds the address of the next program
instruction to be executed
Instruction register, IR, which holds an instruction immediately preceding its
execution.
Input register, InREG, an 8-bit register that holds data read from an input device.
Output register, OutREG, an 8-bit register, that holds data that is ready for the
output device
6.
Point to point
I[
Buses consist of data lines, control lines, and address lines.
While the data lines convey bits from one device to another, control lines determine
the direction of data flow, and when each device can access the bus.
Address lines determine the location of the source or destination of the data.
Multi-point
Because a multipoint bus is a shared resource, access to it is controlled through protocols,
which are built into the hardware
In a master-slave configuration, where more than one device can be the bus master,
concurrent bus master requests must be arbitrated
Exercises:
if
a) The memory is byte-addressable?
1M = 220, so 2M = 2* 220= 221
There are 2M 4 Bytes (32 = 4*8-bits
byte):
21 2
2M * 32 = 2M * 4Bytes = 2 * 2 =
23
2
So, 23 bits are needed for an address
b) The memory is word-addressable?
There are 2M Word:
Double Word = 4 Bytes = 2 Words
2M * 32= 2×220= 221
So, 21 bits are needed for an address
if
a) The memory is byte-addressable?
1M = 220, so 2M = 2* 220= 221
There are 2M 4 Bytes (32 = 4*8-bits
byte):
2M * 32 = 2M * 4Bytes = 221 * 22=
223
So, 23 bits are needed for an address
b) The memory is word-addressable?
There are 2M Word:
Double Word = 4 Bytes = 2 Words
20 21
2M * 32= 2×2 = 2
So, 21 bits are needed for an address
1.
1M 2^20
2M 2^20 * 2^1=2^21
32 bit = 4 bytes= 2^2
a. 2^21 * 2^2 = 23 bit
b. word size = 32
2^21= 21 bit
2.
1M 2^20
4M 2^20 * 2^2=2^22
16 bit = 2 bytes= 2^1
a. 2^22 * 2^1 = 23 bit
b. word size = 16
2^22= 22 bit
3.
1M 2^20
8 bit = 1 bytes= 2^0
a. 2^20 * 2^0 = 20 bit
b. word size = 8
2^20= 20 bit
4.
a. 2M/256 * 16/8 = 8*2=16 chip
b. 16/8=2 chips per word
c. 256kb = 256*1024= 2^18=18 bit
d. 2M/256KB=8 banks each bank has 2 words
e. word address 2M= 2^1 * 2^20=21 bit
byte address 2^1 * 2^20 * 2^1= 22bit
f. 2M = 2^21, 256 = 2^18
256kb*8 256kb*8 Bank 0
256kb*8 256kb*8
.
256kb*8 256kb*8
256kb*8 256kb*8 .
256kb*8 256kb*8
256kb*8 256kb*8 .
256kb*8 256kb*8
Bank 7
256kb*8 256kb*8
Let memory is word addressable
Then for this memory needs 21 bit, but each chip pair (row) requires only 18 bits, so the remaining 3
bit represent the bank number (row number)
Then (14)16 equals
Bank0: 0 0000 0000 0000 0001 0100
g. (6F)16 equals
Bank7: 0 0000 0000 0000 0110 1111
5.
1. Fetch – gets the next program command from the computer’s memory
2. Decode – deciphers what the program is telling the computer to do
3. Execute – carries out the requested action
4. Store – saves the results to a Register or Memory
6.
2^20 byte = 2^23 bits
a. lowest = 0
highest= 2^23/2^3 -1 = 2^20 – 1
b. lowest = 0
highest = 2^23 / 2^4 -1 = 2^19 – 1
c. lowest =0
highest = 2^23 / 2^5 -1 = 2^18 -1
if
a) The memory is byte-addressable?
1M = 220, so 2M = 2* 220= 221
There are 2M 4 Bytes (32 = 4*8-bits
byte):
2M * 32 = 2M * 4Bytes = 221 * 22=
223
So, 23 bits are needed for an address
b) The memory is word-addressable?
There are 2M Word:
Double Word = 4 Bytes = 2 Words
2M * 32= 2×220= 221
So, 21 bits are needed for an address
if
a) The memory is byte-addressable?
20 20 21
1M = 2 , so 2M = 2* 2 = 2
There are 2M 4 Bytes (32 = 4*8-bits
byte):
2M * 32 = 2M * 4Bytes = 221 * 22=
223
So, 23 bits are needed for an address
b) The memory is word-addressable?
There are 2M Word:
Double Word = 4 Bytes = 2 Words
20 21
2M * 32= 2×2 = 2
So, 21 bits are needed for an address
if
a) The memory is byte-addressable?
20 20 21
1M = 2 , so 2M = 2* 2 = 2
There are 2M 4 Bytes (32 = 4*8-bits
byte):
2M * 32 = 2M * 4Bytes = 221 * 22=
223
So, 23 bits are needed for an address
b) The memory is word-addressable?
There are 2M Word:
Double Word = 4 Bytes = 2 Words
2M * 32= 2×220= 221
So, 21 bits are needed for an address
if
a) The memory is byte-addressable?
1M = 220, so 2M = 2* 220= 221
There are 2M 4 Bytes (32 = 4*8-bits
byte):
21 2
2M * 32 = 2M * 4Bytes = 2 * 2 =
23
2
So, 23 bits are needed for an address
b) The memory is word-addressable?
There are 2M Word:
Double Word = 4 Bytes = 2 Words
2M * 32= 2×220= 221
So, 21 bits are needed for an address
if
a) The memory is byte-addressable?
1M = 220, so 2M = 2* 220= 221
There are 2M 4 Bytes (32 = 4*8-bits
byte):
21 2
2M * 32 = 2M * 4Bytes = 2 * 2 =
23
2
So, 23 bits are needed for an address
b) The memory is word-addressable?
There are 2M Word:
Double Word = 4 Bytes = 2 Words
2M * 32= 2×220= 221
So, 21 bits are needed for an address
if
a) The memory is byte-addressable?
1M = 220, so 2M = 2* 220= 221
There are 2M 4 Bytes (32 = 4*8-bits
byte):
2M * 32 = 2M * 4Bytes = 221 * 22=
23
2
So, 23 bits are needed for an address
b) The memory is word-addressable?
There are 2M Word:
Double Word = 4 Bytes = 2 Words
2M * 32= 2×220= 221
So, 21 bits are needed for an address
if
a) The memory is byte-addressable?
1M = 220, so 2M = 2* 220= 221
There are 2M 4 Bytes (32 = 4*8-bits
byte):
2M * 32 = 2M * 4Bytes = 221 * 22=
223
So, 23 bits are needed for an address
b) The memory is word-addressable?
There are 2M Word:
Double Word = 4 Bytes = 2 Words
20 21
2M * 32= 2×2 = 2
So, 21 bits are needed for an addres
