Quanta ZN5

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5 4 3 2 1

Tonga-e (ZN5) 01

m
D
01--SCHMETICS INDEX D

02--BLOCK DIAGRAM

co
03--CLK. GEN./CK505
04--CPU(1/2) Host Bus
05--CPU(2/2) Power
06--NB(1/5) Host

a.
07--NB(2/5) VGA,DMI,PCIE
08--NB(3/5) DDR III
09--NB(4/5) Power
10--NB(5/5) VSS

si
11--SB(1/4) HOST
12--SB(2/4) PCIE, PCI, USB, DMI
13--SB(3/4) SATA, GPIO
14--SB(4/4) Power, VSS

ne
15--DDR III SO-DIMM
C
16--MXM3.0 C

17--LVDS TRANSMITTER
18--SATA HDD/ODD

do
19--MINI PCIE (WLAN/TV), IR
20--LCD PANEL, INVERTER
21--LAN PHY BOAZMAN
22--TPM, RJ45

In
23--JMB380 (Card Reader, 1394)
24--ON Board USB
25--FAN, CCD, PS2
26--SUPER IO SCH5327

i-
27--AUDIO CODEC ALC272
28--LINE OUT, CRT
29--LED/SERIAL PORT/XDP
30--CIR
is
B
31--DC-IN,+12V B

32--VRD1.1 NCP5392
33--V_1P1_CORE
kn

34--5VSB,3VSB,VCC3,VCC
35--V_3P3_CL/V_1V_1P1
36--DDR3_V-SM_V-SM-VTT
37--SCREW HOLE
Te

38--SCHEMATICS CHANGE LIST(EVT1 to EVT2)


39--SCHEMATICS CHANGE LIST(EVT2 to DVT)
w.

BOM Option Note


IV@ INSTALL FOR UMA SKU
EV@ INSTALL FOR DISCRETE GRAPHIC SKU
PROTO INSTALL FOR PROTO ONLY
NI UNINSTALL
ww

A
I INSTALL FOR ALL SKU A

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
Schematics Index
Date: Friday, March 05, 2010 Sheet 1 of 40
5 4 3 2 1
1 2 3 4 5 6 7 8

VCCP Tonga-E _ZN5 System Block Diagram 02


V_1P1_CORE Intel
V_1P1_PCIEXPRESS
V_1P1_ICH Yorkfield LP CLOCK GENERATOR
Wolfdale/Conroe

m
A
V_FSB_VTT CK505 A
CV193
E7XX0/E8XX0 Page 2

co
V_1P1_CL_MCH LGA775 Page 3,4
V_3P3_CL
FSB(800/1067/1333HZ)
LCD PANEL
800/1067 MHZ DDR III CH A/B: DDRIII-SO-DIMM
VCC3

a.
Page 14 21.5" Full HD
3VSB NB

PCI-E 2.0 16X


Eaglelake SDVO LVDS Transmitter
VCC MUX
5VSB
Q43 CH7308B
LVDS
PI3PCIE2612-A LVDS_CONNECT 1

si
+12V Page 16
1254 pin
SATA 1
SATA - HDD(3.5) Page 5,6,7,8,9
Page 17
V_SM
V_1P5_ICH SATA 2 PCI-E(0-3)
SATA - ODD
DMI MXM CONNECTOR LVDS

ne
System Power Page 17 PCI-E(7-15)
VER:3.0
PCI-E(4-6)
B
MUX Page 15 LVDS_CONNECT 2
B

PI3PCIE2612-A

do
USB 2.0 DP DP connect
Camera USB-1 PCI-Express 1X
Page 24
PCIE-2 PCIE-3 PCIE-1 PCIE-4

In
USB/wirless KB USB-4 MINI CARD-1 MINI CARD-2 LAN Card Reader
Dongle USB-10
WLAN Page 18 TV card 82567QM /JMB380 /JMB385
SB Page 18 Page 20 Page 20
Bluetooth
ICH10D
676 pin
Azalia

i-
WLAN antenna TV antenna or RJ45 Media Slot
USB*4(Rear) 1394a
USB-0,7,8,9 (F connect)
USB-0 for DEBUG
Page 23 USB-11

USB-3,5
is
C USB*2(Side) C

Page 23 SPI
Page 10,11,12,13
kn

LPC_BUS 32.768KHz

TPM EC ITE8512 FLASH


ROM
Te

Page 22
SUPER IO Page 30

SMSC SCH5327
H.P Page 25
Page 26
w.

AUDIO CODEC
ALC272
A_MIC IN Page 26
Page 26 IR
CIR
Blaster
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D Page 30 Page 30 D

INT SPK
2WX2 Page 26 PS2 PS2
FAN
Keyboard Mouse
Page 25 Page 24 Page 25
DMIC IN
Page 26
Quanta Computer Inc.
LINE OUT PROJECT : ZN5
Page 27 Size Document Number Rev
X4
System Block Diagram
Date: Friday, March 05, 2010 Sheet 2 of 40
1 2 3 4 5 6 7 8
5 4 3 2 1

Clock Generator
03
CKVDD_IO

CKVDD C116 C133 C114 C128 C113 C126 C115 C125


10U 10U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
0805 0805 0402 0402 0402 0402 0402 0402
2.2K R501 PM_STPPCI# 10V 6.3V 10V 10V 10V 10V 10V 10V
I 5% 0402 X7R X5R X7R X7R X7R X7R X7R X7R
2.2K R502 PM_STPCPU# NI I I I I I I I
I 5% 0402

U6

m
D PCLK_TPM R136 5% I 33 0402 PCLK_TPM_R 1 54 CLK_CPU_BCLK_R RP2 1 2 33X2 D
22 PCLK_TPM PCI0/CR#_A CPUT0 CLK_CPU_BCLK 4
PCLK_EC R149 5% I 33 0402 PCLK_EC_R 3 53 CLK_CPU_BCLK#_R I 5% 3 4 4P2R To CPU
29,30 PCLK_EC PCI1/CR#_B CPUC0 CLK_CPU_BCLK# 4
PCLK_DEBUG R527 5% I 33 0402 PCLK_DEBUG_R 4
CKVDD_IO 19 PCLK_DEBUG *PCI2/SR_ENABLE
PCLK_SIO R528 5% I 33 0402 PCLK_SIO_R 5 51 CLK_MCH_BCLK_R RP3 1 2 33X2
3VSB 26 PCLK_SIO **PCI3/SATA_SEL CPUT1 CLK_MCH_BCLK 6
PCICLK_PCI4 R170 5% I 33 0402 PCICLK_PCI4_R 6 50 CLK_MCH_BCLK#_R I 5% 3 4 4P2R To NB

co
PCI4/SRC5_EN CPUC1 CLK_MCH_BCLK# 6
PCLK_ICH R522 5% I 33 0402 PCLK_ICH_R 7
12 PCLK_ICH PCI_F5/ITP_EN
47 XDP_DCLKOUT_DP_R RP4 1 2 33X2
SRCT8/CPU_ITPT XDP_DCLKOUT_DP 4,29
1 3Q47_D L5 PBY160808T-601Y-N 46 XDP_DCLKOUT_DN_R I 5% 3 4 4P2R XDP_DCLKOUT_DN 4,29 To CPU
Q47 I 600 ohm 1A 0603 SEL_SRC1 SRCC8/CPU_ITPC
48
AO3413 CKVDD SEL_SRC1_25_24.576**
SOT23-3 11 PM_STPCPU# PM_STPCPU# 37 13 DREFCLK_R RP8 3 4 IV@22X2
2

CPU_STOP#/SRCC5 DOT96T/SRCT0 DREFCLK 7


20V L4 PBY160808T-601Y-N 11 PM_STPPCI# PM_STPPCI# 38 14 DREFCLK#_R I 5% 1 2 4P2R To NB
PCI_STOP#/SRCT5 DOT96C/SRCC0 DREFCLK# 7
3A I 600 ohm 1A 0603 11 CK_PWRGD R508 0 CK_PWRGD_R 56
R493 47K Q47_G I I 5% 0402 CKPWRGD/PD# DREFSSCLK_R RP9
35,36 SLP_M 17 3 4 IV@33X2 DREFSSCLK 7
I 5% 0402 SRCT1/25MHz0 DREFSSCLK#_R I 5%
18 1 2 4P2R To NB

a.
SRCC1/25MHz1/24.576MHz DREFSSCLK# 7
SMBCLK_MAIN 64
16,20,26,29 SMBCLK_MAIN SCL
C499 SMBDATA_MAIN 63 21 CLK_PCIE_SATA_R RP10 3 4 33X2
16,20,26,29 SMBDATA_MAIN SDA SRCT2/SATAT CLK_PCIE_SATA 13
1U 22 CLK_PCIE_SATA#_R I 5% 1 2 4P2R To SB
SRCC2/SATAC CLK_PCIE_SATA# 13
0603 CG_XIN 60
10V CKVDD CG_XOUT XTAL_IN MXM_PEGCLK_R RP11
59 24 3 4 EV@33X2 MXM_PEGCLK 16
X7R XTAL_OUT SRCT3/CR#_C MXM_PEGCLK#_R I 5%
CK505 25 1 2 4P2R MXM_PEGCLK# 16 To MXM
I CKVDD_IO SRCC3/CR#_D
C102 10U R146 0 C127 0.1U 10V 27 CLK_PCIE_EXP_R RP12 3 4 33X2
SRCT4 CLK_PCIE_EXP 7
I 5% 0805 I 0402 X7R 12 28 CLK_PCIE_EXP#_R I 5% 1 2 4P2R To NB
VDDIO SRCC4 CLK_PCIE_EXP# 7
0805 20

si
VDDPLL3IO CLK_PCIE_ICH_R RP5
I
26 41 1 2 33X2 CLK_PCIE_ICH 12
R148 0 C131 0.1U 10V VDDSRCIO SRCT6 CLK_PCIE_ICH#_R I 5%
36 40 3 4 4P2R CLK_PCIE_ICH# 12 To SB
CKVDD X5R I 5% 0805 I 0402 X7R VDDSRCIO SRCC6
45
C122 10U 6.3V VDDSRCIO U6_44
6.3V 49 44 T173
R107 I 0603 X5R VDDCPUIO SRCT7/CR#_F U6_43
43 T174
1K SRCC7/CR#_E
0402 VDD_CK_VDD_PLL3 16 30 CLK_PCIE_MINI_R RP13 3 4 33X2
VDDPLL3 SRCT9 CLK_PCIE_MINI 19
5% R147 0 C130 0.1U 10V VDD_CK_VDD_PCI 2 31 CLK_PCIE_MINI#_R I 5% 1 2 4P2R To WLAN
VDDPCI SRCC9 CLK_PCIE_MINI# 19
I I 5% 0805 I 0402 X7R VDD_CK_VDD_48 9
C129 0.1U 10V VDD_CK_VDD_REF VDD48 CLK_PCIE_MINI2_R RP6
61 34 3 4 33X2

ne
VDDREF SRCT10 CLK_PCIE_MINI2 19
SEL_SRC1 I 0402 X7R VDD_CK_VDD_CPU 55 35 CLK_PCIE_MINI2#_R I 5% 1 2 4P2R To TV
C VDDCPU SRCC10 CLK_PCIE_MINI2# 19 C
VDD_CK_VDD_SRC 39
R101 0 C112 0.1U 10V VDDSRC CLK_PCIE_JMB385_R RP7
33 1 2 33X2 CLK_PCIE_JMB385 23
R115 I 5% 0805 I 0402 X7R SRCT11/CR#_H CLK_PCIE_JMB385#_R I 5%
32 3 4 4P2R CLK_PCIE_JMB385# 23 To Card Reader
R100 0 C111 0.1U 10V SRCC11/CR#_G
1K
0402 I 5% 0805 I 0402 X7R 42
R109 0 C105 0.1U 10V GNDSRC R167 47K
I
52 CKVDD
I 5% 0805 I 0402 X7R GNDCPU FSA R524 33 I 5% 0402
23 10 CLKUSB_48 12
5% GNDSRC USB48/FS_A I 5% 0402 R166 33K
19
GND FSB R507 I 1K 0402 BSEL1 I 5% 0402
15 57

do
GND FS_B/TESTMODE R114 I 5% 33 0402
Pin17-18. SRC1 enabled 11
8
GND48
62 FSC R503 NI 5% IV@22 0402
CLK14SMC 26
GNDPCI REF/FS_C/TESTSEL 14M_CH7308B 17
29 R102 I 5% 33 0402
GNDSRC 14M_ICH 11
58 5%
GNDREF R104 47K CKVDD
I 5% 0402
CV193 *Internal 100K Pull High R103 33K
Strap Configuration TSSOP64
Critical
**Internal 100K Pull Low I 5% 0402

In
R518 10K PCLK_DEBUG_R CKVDD
CKVDD
NI 5% 0402
Internal 33 ohm resistor enabled
R517 10K CKVDD CKVDD
I 5% 0402
R489 R486 0402 NI
R520 10K PCLK_SIO_R R532 1K R487
CKVDD
NI 5% 0402
SATA output from PLL2 C528 27P NPO CG_XIN 1K 0402 10K 10K 5%

i-
I 0402 50V 0402 Q55_C1K R523 FSA 5% Q49_C 1K R499 FSC 0402

2
R519 10K 5% I 5% 0402 I I 5% 0402 5% CK_PWRGD_R

3
I 5% 0402 Y1 Critical I Q49 NI
14.318MHZ 30PPM Q54_C 2 Q55 Q48_C 2 MMBT3904-7-F

3
R521 10K PCICLK_PCI4 I Q54 Q48 SOT23-3
CKVDD CPUSTP#/PCISTP enabled MMBT3904-7-F
1

3
NI 5% 0402 C530 27P NPO CG_XOUT MMBT3904-7-F SOT23-3 MMBT3904-7-F 40V Q44 Q44_C 2 Q43

3
I 0402 50V BSEL0 R545 4.7K Q54_B 2 SOT23-3 40V BSEL2 R494 4.7K Q48_B 2 SOT23-3 200mA MMBT3904-7-F MMBT3904-7-F
B R529 10K I 5% 0402 40V 200mA I 5% 0402 40V I R491 10K Q44_B 2 SOT23-3 SOT23-3 B

1
11,29 ICH_VRMPWRGD
I 5% 0402 200mA I 200mA NI 5% 0402 40V 40V

1
I I 200mA 200mA
is

1
R530 10K PCLK_ICH_R NI NI
CKVDD
I 5% 0402
ITPCLK enabled
R531 10K
NI 5% 0402
kn

FREQ. SEL TABLE 4 CPU_BSEL0


R547
I 5%
0
0402
BSEL0 R548
I 5%
10K
0402
MCH_BSEL0
MCH_BSEL0 7
PCICLK_PCI4 C542 10P 50V
NI 0402 COG
R546 0
NI 5% 0402 PCLK_SIO C541 22P 50V
BSEL Frequency Select Table I 0402 COG
V_FSB_VTT R549 470
FSC FSB FSA Frequency I 5% 0402 CLKUSB_48 C155 10P 50V
NI 0402 COG
Te

0 0 0 266Mhz 14M_ICH C103 10P 50V


I 0402 COG
R504 0 BSEL1 R500 10K MCH_BSEL1
4 CPU_BSEL1 MCH_BSEL1 7
0 0 1 133Mhz I 5% 0402 I 5% 0402 PCLK_ICH C163 22P 50V
I 0402 COG
R497 0
0 1 1 166Mhz NI 5% 0402 PCLK_DEBUG C540 22P 50V
I 0402 NPO
V_FSB_VTT R498 470
w.

0 1 0 200Mhz I 5% 0402 14M_CH7308B C517 10P 50V


NI 0402 COG

A A
1 0 0 333Mhz
R490 0 BSEL2 R488 10K MCH_BSEL2
4 CPU_BSEL2 MCH_BSEL2 7
I 5% 0402 I 5% 0402
1 0 1 100Mhz
R492 0
NI 5% 0402
1 1 0 400Mhz
ww

V_FSB_VTT R496 470


I 5% 0402
1 1 1 Reserved
Quanta Computer Inc.
PROJECT : ZN5
Size Document Number Rev
X4
CLK. GEN./ CK505
Date: Friday, March 05, 2010 Sheet 3 of 40
5 4 3 2 1
5 4 3 2 1

XU1A XU1B

6 H_A#[3..16]
H_A#3
H_A#4
H_A#5
L5
P6
M5
H_A3
H_A4
H_D0
H_D1
B4
C5
A4
H_D#0
H_D#1
H_D#2
H_D#[0..15] 6

H_FERR# R560 62
13
13
13
H_SMI#
H_A20M#
H_FERR#
H_SMI#
H_A20M#
H_FERR#
H_INTR
P2
K3
R3
K1
SMI#
A20M#
FERR#/PBE#
TCK
TDI
TDO
AE1
AD1
AF1
AC1
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TCK 29
XDP_TDI 29
XDP_TDO 29
VTT_OUT_RIGHT
04
H_A5 H_D2 VTT_OUT_RIGHT 13 H_INTR LINT0 TMS XDP_TMS 29
H_A#6 L4 C6 H_D#3 I 5% 0402 H_NMI L1 AG1 XDP_TRST#
H_A6 H_D3 13 H_NMI LINT1 TRST# XDP_TRST# 29
H_A#7 M4 A5 H_D#4 H_IGNNE# N2 XDP_BPM#0 R368 I 1 5% 2 51 0402
H_A7 H_D4 13 H_IGNNE# IGNNE#
H_A#8 R4 B6 H_D#5 R399 0 XU1_M3 M3 AJ2 XDP_BPM#0 XDP_BPM#1 R393 I 1 5% 2 51 0402
H_A8 H_D5 13 H_STPCLK# STPCLK# BPM#0 XDP_BPM#0 29
H_A#9 T5 B7 H_D#6 I 5% 0402 AJ1 XDP_BPM#1 XDP_BPM#2 R375 I 1 5% 2 51 0402
H_A9 H_D6 BPM#1 XDP_BPM#1 29
H_A#10 U6 A7 H_D#7 XU1_A23 A23 AD2 XDP_BPM#2 XDP_BPM#3 R391 I 1 5% 2 51 0402
H_A10 H_D7 T17 VCCA BPM#2 XDP_BPM#2 29
H_A#11 T4 A10 H_D#8 as design guide page 113 XU1_B23 B23 AG2 XDP_BPM#3 XDP_BPM#4 R389 I 1 5% 2 51 0402
H_A11 H_D8 T128 VSSA BPM#3 XDP_BPM#3 29
H_A#12 U5 A11 H_D#9 XU1_C23 C23 AF2 XDP_BPM#4 XDP_BPM#5 R392 I 1 5% 2 51 0402
H_A12 H_D9 T120 VCCIOPLL BPM#4 XDP_BPM#4 29
H_A#13 U4 B10 H_D#10 V_1P5_ICH R450 5% 0 0402 H_VCCPLL D23 AG3 XDP_BPM#5
H_A13 H_D10 VCC_PLL BPM#5 XDP_BPM#5 29
H_A#14 V5 C11 H_D#11 I
H_A#15 H_A14 H_D11 H_D#12 H_VID0 XDP_DBRESET#
V4 D8 32 H_VID0 AM2 AC2 XDP_DBRESET# 29
H_A#16 H_A15 H_D12 H_D#13 C407 C418 H_VID1 VID_0 DBR#
W5 B12 AL5

m
D H_A16 H_D13 32 H_VID1 VID_1 VTT_OUT_LEFT D
TP_LGA775_N4 N4 C12 H_D#14 10U 0.01U 32 H_VID2 AM3 AK3 XDP_R_DCLKOUT_DP R416 I 5% PO@0 0402
T82 RSVD_0 H_D14 H_VID2 VID_2 ITPCLK_0 XDP_DCLKOUT_DP 3,29
TP_LGA775_P5 P5 D11 H_D#15 0805 0402 H_VID3 AL6 AJ3 XDP_R_DCLKOUT_DN R414 I PO@0 0402
6 H_REQ#[0..4] T93 RSVD_1 H_D15 32 H_VID3 VID_3 ITPCLK_1 XDP_DCLKOUT_DN 3,29
H_REQ#0 K4 B9 H_DSTBP0 H_VID4 AK4 5%
REQ_0 H_DSTBP0 H_DSTBP0 6 I I 32 H_VID4 VID_4

2
H_REQ#1 J5 C8 H_DSTBN0 H_VID5 AL4 G29 CPU_BSEL0
REQ_1 H_DSTBN0 H_DSTBN0 6 X5R X7R 32 H_VID5 VID_5 BSEL_0 CPU_BSEL0 3
H_REQ#2 M6 A8 H_DINV#0 H_VID6 AM5 H30 CPU_BSEL1 R397

co
REQ_2 H_DINV0 H_DINV#0 6 32 H_VID6 VID_6 BSEL_1 CPU_BSEL1 3
H_REQ#3 K6 6.3V 25V H_VID7 AM7 G30 CPU_BSEL2 51
REQ_3 32 H_VID7 VID_7 BSEL_2 CPU_BSEL2 3
H_REQ#4 J6 V_FSB_VTT R35 5% 680 0402 H_VID_SEL AN7 0402
H_ADSTB#0 REQ_4 I VID_SELECT TP_LGA775_N5
R6 N5

1
6 H_ADSTB#0 H_ADSTB_0 H_D#[16..31] 6 32 H_VID_SEL RSVD_8 T88 I
G9 H_D#16 CLK_CPU_BCLK F28 C9 BPMb#1 H_TDI_TDO_M
H_D16 3 CLK_CPU_BCLK BCLK_0 BPMb#1 5%
F8 H_D#17 CLK_CPU_BCLK# G28 E7 TP_LGA775_E7
6 H_A#[17..35] H_D17 3 CLK_CPU_BCLK# BCLK_1 RSVD_9 T96
H_A#17 AB6 F9 H_D#18 AE6 TP_LGA775_AE6
H_A17 H_D18 RSVD_10 T92
H_A#18 W6 E9 H_D#19 H_SKTOCC# AE8 D16 TP_LGA775_D16
H_A18 H_D19 11,26,27 H_SKTOCC# SKTOCC# RSVD_11 T105
H_A#19 Y6 D7 H_D#20 A20 TP_LGA775_A20
H_A19 H_D20 RSVD_12 T115
H_A#20 Y4 E10 H_D#21 XU1_AL1 AL1 E23 TP_LAG775_E23
H_A#21 AA4
H_A20 H_D21
D10 H_D#22
T2
XU1_AK1 AK1
FC25 RSVD_13 T129
Termination

a.
H_A21 H_D22 T1 FC24 V_FSB_VTT
H_A#22 AD6 F11 H_D#23 AJ7
H_A#23 H_A22 H_D23 H_D#24 VSS_1
AA5 F12 AH7 A29
H_A#24 H_A23 H_D24 H_D#25 VSS_2 VTT_1 62 R372 H_BREQ#
AB5 D13 B25 VTT_OUT_LEFT
H_A#25 H_A24 H_D25 H_D#26 VTT_2 I 5% 0402
AC5 E13 B29
H_A#26 H_A25 H_D26 H_D#27 VCC_VRM_SENSER419 NI 5% 0 0402 VCC_SENSE_R VTT_3 C456 C442 C424
AB4 G13 32 VCC_VRM_SENSE AN3 B30
H_A#27 H_A26 H_D27 H_D#28 VSS_VRM_SENSE R421 NI 5% 0 0402 VSS_SENSE_R VCC_SENSE VTT_4 62 R440 H_CPURST#
AF5 F14 32 VSS_VRM_SENSE AN4 C29 1U 10U 0.1U VTT_OUT_RIGHT
H_A#28 H_A27 H_D28 H_D#29 R418 I 5% 0 0402 VCC_PKGSENSE_R VSS_SENSE VTT_5 I 5% 0402
AF4 G14 AN5 A26 0603 0805 0402
H_A#29 H_A28 H_D29 H_D#30 R423 I 5% 0 0402 VSS_PKGSENSE_R VCC_MB_REGULATION VTT_6 Near CPU
AG6 F15 AN6 B27 I I I
H_A#30 H_A29 H_D30 H_D#31 R425 NI 5% 0 0402 TP_LGA775_AL8 VSS_MB_REGULATION VTT_7 62 R396 H_IERR#
AG4 G15 VCCP AL8 C28 VTT_OUT_RIGHT
H_A#31 H_A30 H_D31 H_DSTBP1 R34 NI 5% 0 0402 TP_LGA775_AL7 VCC_1 VTT_8 X7R X5R X7R I 5% 0402
AG5 E12 AL7 A25

si
H_A31 H_DSTBP1 H_DSTBP1 6 VSS_3 VTT_9
H_A#32 AH4 G12 H_DSTBN1 TP_LGA775_F29 F29 A28 10V 6.3V 10V 680 R373 PSI#
H_A32 H_DSTBN1 H_DSTBN1 6 T134 RSVD_4 VTT_10
H_A#33 AH5 G11 H_DINV#1 A27 I 5% 0402
H_A33 H_DINV1 H_DINV#1 6 VTT_11
H_A#34 AJ5 R422 5% 51 0402 H_CPU_PD_F6 F6 C30 VTT_OUT_LEFT 51 R376 CPU_TEST10
H_A#35 H_A34 I TP_LGA775_G6 FC21 VTT_12 I 5% 0402
AJ6 T97 G6 A30
TP_LGA775_AC4 H_A35 H_PECI RSVD_5 VTT_13
T77 AC4 H_D#[32..47] 6 26 H_PECI G5 C25
TP_LGA775_AE5 RSVD_2 H_D#32 PECI VTT_14
T91 AE4 G16 C26
H_ADSTB#1 RSVD_3 H_D32 H_D#33 VRDSEL VTT_15
6 H_ADSTB#1 AD5 E15 T84 AL3 C27
H_ADSTB_1 H_D33 H_D#34 VRDSEL VTT_16
E16 B26
H_ADS# H_D34 H_D#35 VTT_17
6 H_ADS# D2 G18 D27
H_BNR# ADS# H_D35 H_D#36 VTT_18
C2 G17 D28

ne
6 H_BNR# BNR# H_D36 VTT_19
C H_HIT# D4 F17 H_D#37 V_FSB_VTT R449 I 5% 51 0402
CPU_TEST0 F26 D25 C
6 H_HIT# HIT# H_D37 TESTHI_0 VTT_20
TP_LGA775_H4 H4 F18 H_D#38 VTT_OUT_LEFT R402 I 5% 51 0402
CPU_TEST1 W3 D26
T83 FC35 H_D38 TESTHI_1 VTT_21
H_BPRI# G8 E18 H_D#39 V_FSB_VTT R447 I 5% 51 0402
XU1_F25 F25 B28
6 H_BPRI# BPRI# H_D39 TESTHI_2 VTT_22
H_DBSY# B2 E19 H_D#40 G25 D29
6 H_DBSY# DBSY# H_D40 TESTHI_3 VTT_23
H_DRDY# C1 F20 H_D#41 G27 D30
6 H_DRDY# DRDY# H_D41 TESTHI_4 VTT_24
H_HITM# E4 E21 H_D#42 VTT_OUT_LEFT R369 NI 5% 51 0402 G26 AM6 VRMPWG_R R33 1 2 0 VRMPWG
6 H_HITM# HITM# H_D42 TESTHI_5 FC40 VRMPWG 11,32
H_IERR# AB2 F21 H_D#43 VTT_OUT_LEFT R398 NI 5% 51 0402 G24 I 5% 0402
29 H_IERR# IERR# H_D43 V_FSB_VTT TESTHI_6
H_INIT# P3 G21 H_D#44 F24 AA1 VTT_OUT_RIGHT VTT_OUT_RIGHT
13 H_INIT# INIT# H_D44 TESTHI_7 VTT_OUT_RIGHT
H_LOCK# C3 E22 H_D#45 H_DPSLP# P1 J1 VTT_OUT_LEFT VTT_OUT_LEFT
6 H_LOCK# LOCK# H_D45 11 H_DPSLP# DPSLP# VTT_OUT_LEFT
H_TRDY# E3 D22 H_D#46 H_TDI_TDO_M W2 F27 TP_VTT_SEL C331 C330 C341

do
6 H_TRDY# TRDY# H_D46 TDI_M VTT_SEL T135
TP_LGA775_AD3 AD3 G22 H_D#47 R554 H_CPUSLP# L2 C336 C332 0.1U 0.1U 1U
T76 FC36 H_D47 7,26 H_CPUSLP# SLP#
H_DEFER# G7 G19 H_DSTBP2 51 H_FORCEPH# AK6 0.1U 0.1U 0402 0402 0603
6 H_DEFER# DEFER# H_DSTBP2 H_DSTBP2 6 T94 FC8
G20 H_DSTBN2 0402 0402 0402 10V 10V 10V
H_DSTBN2 H_DSTBN2 6
TP_LGA775_AB3 AB3 D19 H_DINV#2 H_PWRGD N1 F23 TP_LAG775_F23 10V 10V X7R X7R X7R
T80 FC37 H_DINV2 H_DINV#2 6 NI 11,29 H_PWRGD PWRGOOD RSVD_14 T121
H_PROCHOT# AL2 D14 TP_LAG775_D14 X7R X7R I I I
5% ICH_DPRSTP# 31 H_PROCHOT# PROCHOT# RSVD_15 T100
TP_LGA775_U2 U2 CPU_THERMTRIP#_ICH M2 E6 TP_LAG775_E6 I I
T81 FC29 13,26 CPU_THERMTRIP#_ICH THERMTRIP# RSVD_16 T95
TP_LGA775_U3 U3 D1 TP_LAG775_D1 S1 S0 RATIO SET
T87 FC30 H_D#[48..63] 6 RSVD_17 T78
D20 H_D#48 49.9 0402 1% IR430 COMP0 A13 E5 H_DCLKPH
H_D48 COMP_0 FC20 T90
H_BREQ# F3 D17 H_D#49 49.9 0402 1% IR401 COMP1 T1 J3 H_ACLKPH 0 0 0.615xVTT
6 H_BREQ# BR0# H_D49 COMP_1 FC22 T89
BPMb#3 G3 A14 H_D#50 49.9 0402 1% IR406 COMP2 G2

In
BPMb#2 BPMb#3 H_D50 H_D#51 49.9 0402 1% IR400 COMP3 COMP_2 TP_LAG775_AA2 0 1 0.63xVTT
G4 C15 R1 AA2 T86
CPU_TEST10 BPMb#2 H_D51 H_D#52 49.9 0402 1% NI
R395 COMP4 COMP_3 FC39 TP_LAG775_V2
H5 C14 VTT_OUT_LEFT J2 V2 T79
TESTHI10 H_D52 H_D#53 ICH_DPRSTP# FC3 RSVD_7 CPU_BOOT R413 1
B15 7,11 ICH_DPRSTP# T2 Y1 2 51 1 0 0.65xVTT
H_D53 H_D#54 Connected with VR's PSI# 0 0402 5% NI R377 PSI# DPRSTP# FC0/BOOTSELECT I 5% 0402
C18 5,32 CPU_PSI Y3
TP_LGA775_J16 H_D54 H_D#55 49.9 0402 1% I R387 COMP7 PSI# 1 1 0.67xVTT
T101 J16 B16 VTT_OUT_RIGHT AE3 W1
TP_LGA775_H15 FC31 H_D55 H_D#56 24.9 0402 1% I R426 COMP8 FC18 MSID_0 as design guide page 113
T106 H15 A17 B13 V1
TP_LGA775_H16 FC32 H_D56 H_D#57 COMP_8 MSID_1
T104 H16 B18
TP_LGA775_J17 FC33 H_D57 H_D#58 BPMb#0 TP_LGA775_AH2 V_FSB_VTT VCC3
T110 J17 C21 G1 AH2 T85
FC34 H_D58 H_D#59 H_TDI_TDO_M BPMb#0 RSVD_6 U35
B21 U1
CPU_GTLREF0 H_D59 H_D#60 VTT_OUT_LEFT R444 5% 1K 0402 XU1_A24 A24 TDO_M CPU_GTLREF3
H1 B19 G10 6 1

i-
CPU_GTLREF1 GTLREF0 H_D60 H_D#61 NI TP_LGA775_G7 FC23 GTLREF3 CPU_GTLREF2 VTT VDD
H2 A19 T138 E29 F2
TP_LGA775_E24 GTLREF1 H_D61 H_D#62 FC26 GTLREF2 GTLR1
T132 E24 A22 5 2
TP_LGA775_H29 FC10 H_D62 H_D#63 GTLR GND
T137 H29 B22
FC15 H_D63

1
C17 H_DSTBP3 R371 R374 R411 R412 Critical LGA775_C_EL 0 5% R361 U35_4 4 3
H_DSTBP3 H_DSTBP3 6 11 CTRL_GTLREF2 S1 S0
H_CPURST# G23 A16 H_DSTBN3 51 51 51 51 I 0402 I
5,6,29 H_CPURST# RESET# H_DSTBN3 H_DSTBN3 6
H_RS#0 B3 C20 H_DINV#3 0402 0402 0402 0402 GTL3004
B 6 H_RS#0 RS0# H_DINV3 H_DINV#3 6 B
H_RS#1 F5 1% 1% 1% 1% I
6 H_RS#1 RS1#
H_RS#2 A3 I I I I

2
6 H_RS#2 RS2# XDP_BPM#3_R R370 NI 5% 0 0402 BPMb#3 0 R360 U35_3
29 XDP_BPM#3_R 12 CTRL_GTLREF1
XDP_BPM#2_R R385 NI 5% 0 0402 BPMb#2 0402 5% I
Critical
I
LGA775_C_EL
29 XDP_BPM#2_R
29 XDP_BPM#1_R
29 XDP_BPM#0_R
is
XDP_BPM#1_R
XDP_BPM#0_R
R403
R394
NI
NI
5%
5%
0
0
0402 BPMb#1
0402 BPMb#0
R405 0 0402
Stuff them for Kentsfield support NI 5% Thermal Sensor
IC design Layout note: C672 100P 50V
V_FSB_VTT H_GTLREF: Zo=55 ohm,L<0.5" 3VSB I 0402 NPO
Layout note: V_FSB_VTT 0.635*VCC1.2 +/-2% C671 10U 6.3V
kn

H_GTLREF: Zo=55 ohm,L<0.5" I 0805 X5R


R379 0.635*VCC1.2 +/-2% R362 R356 0 LM86VCC C320 0.1U 10V
XDP 57.6
0402
57.6
0402
I 5% 0603 I 0402 X7R

1% NI R365 0 GTLR1
VTT_OUT_RIGHT I 1% I 5% 0402
R379_1 R380 10 0402 CPU_GTLREF0 R362_1 R378 10 CPU_GTLREF1
XDP_TDO R388 I 5% 62 0402 I 5% I 5% 0402 U32
XDP_TDI R384 I 5% 62 0402 C329 C334 C335 16,26 SBDATA 7 4
XDP_TMS R383 I 5% 62 0402 R367 220P R366C327 SDAT THERM H_THERMDA
1U 220P 16,26 SBCLK 8
Te

0402 SCLK C321


100 0603 100 1U 0402
6
ALERT

3
XDP_TCK R386 I 5% 62 0402 0402 50V 04020603 1 100P
XDP_TRST# R390 I 5% 62 0402 10V X7R I VDD 0603 Q12
I NI I 2 2
X7R I X7R DP 50V C55 MMBT3904-7-F
1% I 1% X7R 50V 5 3 NPO 100P 100mA

1
10V GND DN I 0603 SOT23-3
CPU_GTLREF0 0 R404 CPU_GTLREF3 CPU_GTLREF1 R381 0 CPU_GTLREF2 EMC1402-2-ACZL-TR H_THERMDC
I 5% 0402 I 5% 0402 MSOP8 NI I
Critical NPO 50V
I 50V
w.

Near Thermal Sensor Near SO-DIMM


A A
Address: 9AH
ww

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
CPU(1/2)- Host Bus
Date: Friday, March 05, 2010 Sheet 4 of 40
5 4 3 2 1
5 4 3 2 1

XU1D
05
C10 AG13 Place these parts reference
VSS_4 VSS_268 VCCP
D12
VSS_5 VSS_267
AG16 to Intel demo board.
VCCP VCCP
C24
K2
VSS_6 VSS_266
AG17
E8
In CPU socket XU1C
VSS_7 VSS_265
C22 AG20
VSS_8 VSS_264
AN1 AG23 AG22 AK9
VSS_9 VSS_263 VCC_CORE_1 VCC_CORE_225
B14 AF20 K29 M28
VSS_10 VSS_262 C38 C40 C27 C23 C30 C31 C36 C29 C32 C25 C24 C33 C28 C39 C37 C35 C26 C34 VCC_CORE_2 VCC_CORE_224
K7 AL28 AM26 AF12
VSS_11 VSS_261 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U VCC_CORE_3 VCC_CORE_223
AE16 AA23 AE12 N8
VSS_12 VSS_260 X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R VCC_CORE_4 VCC_CORE_222
B11 V26 AE11 AF19
VSS_13 VSS_259 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V VCC_CORE_5 VCC_CORE_221

m
AL10 AM4 W23 K26
VSS_14 VSS_258 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 VCC_CORE_6 VCC_CORE_220
AK23 AB1 W24 J14
D VSS_15 VSS_257 I I I I I I I I I I I I I I I I I I VCC_CORE_7 VCC_CORE_219 D
H12 AJ27 W25 AN22
VSS_16 VSS_256 VCC_CORE_8 VCC_CORE_218
AF7 R30 T25 N24
VSS_17 VSS_255 VCC_CORE_9 VCC_CORE_217
AK7 T7 Y28 AH8
VSS_18 VSS_254 VCC_CORE_10 VCC_CORE_216

co
H7 E27 AL18 W8
VSS_19 VSS_253 VCC_CORE_11 VCC_CORE_215
E14 AE17 AC25 AD29
VSS_20 VSS_252 VCC_CORE_12 VCC_CORE_214
L28 AE20 W30 AL29
VSS_21 VSS_251 VCC_CORE_13 VCC_CORE_213
Y5 P24 Y30 AG8
VSS_22 VSS_250 VCCP VCC_CORE_14 VCC_CORE_212
E11 Y2 AN14 AA8
VSS_23 VSS_249 VCC_CORE_15 VCC_CORE_211
AL16 H3 AD28 AG18
VSS_24 VSS_248 VCC_CORE_16 VCC_CORE_210
AL24
AK13
VSS_25 VSS_247
AN24
AF17
ON CPU socket bottom side. Y26
AC29
VCC_CORE_17 VCC_CORE_209
J30
AF14
VSS_26 VSS_246 VCC_CORE_18 VCC_CORE_208
D21 AG24 M29 M27
VSS_27 VSS_245 VCC_CORE_19 VCC_CORE_207
AL20 AF23 U24 J9
VSS_28 VSS_244 VCC_CORE_20 VCC_CORE_206

a.
D18 AF24 C353 C352 C360 C371 C363 C369 C372 C361 C370 C374 C350 C351 C354 C358 C362 C349 C359 C373 J23 AK14
VSS_29 VSS_243 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U VCC_CORE_21 VCC_CORE_205
AN2 AN27 AC27 Y24
VSS_30 VSS_242 X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R VCC_CORE_22 VCC_CORE_204
AK16 AN28 AM18 AF21
VSS_31 VSS_241 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V VCC_CORE_23 VCC_CORE_203
AK20 AF25 AM19 AD30
VSS_32 VSS_240 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206 VCC_CORE_24 VCC_CORE_202
AM27 AF26 AB8 AL9
VSS_33 VSS_239 I I I I I I I I I I I I I I I I I I VCC_CORE_25 VCC_CORE_201
AM1 AF27 AC26 AG19
VSS_34 VSS_238 VCC_CORE_26 VCC_CORE_200
AL13 AF28 J8 J27
VSS_35 VSS_237 VCC_CORE_27 VCC_CORE_199
AL17 AF29 J28 J12
VSS_36 VSS_236 VCC_CORE_28 VCC_CORE_198
C19 F7 T30 W28
VSS_37 VSS_235 VCC_CORE_29 VCC_CORE_197
E28 H28 AM9 T28

si
VSS_38 VSS_234 VCC_CORE_30 VCC_CORE_196
AK30 AF30 AF15 J13
VSS_39 VSS_233 VCC_CORE_31 VCC_CORE_195
D24 AE13 AC8 J24
VSS_40 VSS_232 VCC_CORE_32 VCC_CORE_194
AL23 AG10 AE14 AM12
VSS_41 VSS_231 VCC_CORE_33 VCC_CORE_193
A12 F4 N23 AL26
VSS_42 VSS_230 VCC_CORE_34 VCC_CORE_192
L25 AA30 W29 AG28
VSS_43 VSS_229 VCC_CORE_35 VCC_CORE_191
J7 N3 U29 AH27
VSS_44 VSS_228 VCC_CORE_36 VCC_CORE_190
AE28 AB23 AC24 AH29
VSS_45 VSS_227 VCC_CORE_37 VCC_CORE_189
AE29 AB24 AC23 AH19
VSS_46 VSS_226 VCC_CORE_38 VCC_CORE_188
K5 AB25 Y23 AJ14
VSS_47 VSS_225 VCC_CORE_39 VCC_CORE_187
J4 M7 AN26 AH11

ne
VSS_48 VSS_224 VCC_CORE_40 VCC_CORE_186
AE30 AN16 AN25 AF22
VSS_49 VSS_223 VCC_CORE_41 VCC_CORE_185
AN20 AB26 AN18 AF9
VSS_50 VSS_222 VCC_CORE_42 VCC_CORE_184
AF10 AB27 AN11 N26
VSS_51 VSS_221 VCC_CORE_43 VCC_CORE_183
AE24 AN17 Y27 AG9
VSS_52 VSS_220 VCC_CORE_44 VCC_CORE_182
C AM24 AB28 Y25 AN12 C
VSS_53 VSS_219 VCC_CORE_45 VCC_CORE_181
AN23 M1 U27 AK8
VSS_54 VSS_218 VCC_CORE_46 VCC_CORE_180
H9 AB29 AD24 T27
VSS_55 VSS_217 VCC_CORE_47 VCC_CORE_179
H8 L7 AE23 AJ19
VSS_56 VSS_216 VCC_CORE_48 VCC_CORE_178
H13 L6 AE22 U26
VSS_57 VSS_215 VCC_CORE_49 VCC_CORE_177
AC6 AB30 AN19 AJ8

do
VSS_58 VSS_214 VCC_CORE_50 VCC_CORE_176
AC7 AK24 V8 AN15
VSS_59 VSS_213 VCC_CORE_51 VCC_CORE_175
AH6 C13 K8 AL22
VSS_60 VSS_212 VCC_CORE_52 VCC_CORE_174
C16 V7 AE21 AH12
VSS_61 VSS_211 VCC_CORE_53 VCC_CORE_173
AM16 AH1 AM30 N28
VSS_62 VSS_210 VCC_CORE_54 VCC_CORE_172
AE25 AE26 AE19 T26
VSS_63 VSS_209 VCC_CORE_55 VCC_CORE_171
AE27 AJ4 AC30 AM8
VSS_64 VSS_208 VCC_CORE_56 VCC_CORE_170
AJ28 B8 AE15 AL19
VSS_65 VSS_207 VCC_CORE_57 VCC_CORE_169
F19 B5 M30 K23
VSS_66 VSS_206 VCC_CORE_58 VCC_CORE_168
AH13 B1 K27 P8
VSS_67 VSS_205 VCC_CORE_59 VCC_CORE_167

In
AD7 D3 M24 K25
VSS_68 VSS_204 VCC_CORE_60 VCC_CORE_166
AH16 A9 AN21 J11
VSS_69 VSS_203 VCC_CORE_61 VCC_CORE_165
AK17 D5 T8 J29
VSS_70 VSS_202 VCC_CORE_62 VCC_CORE_164
E17 D6 AC28 AH9
VSS_71 VSS_201 VCC_CORE_63 VCC_CORE_163
AH17 A6 N25 AJ25
VSS_72 VSS_200 VCC_CORE_64 VCC_CORE_162
AH20 C4 AE18 AL30
VSS_73 VSS_199 VCC_CORE_65 VCC_CORE_161
AE5 D9 W26 N29
VSS_74 VSS_198 VCC_CORE_66 VCC_CORE_160
AH23 E2 AD25 AG14
VSS_75 VSS_197 VCC_CORE_67 VCC_CORE_159
AE7 A2 M8 AK11
VSS_76 VSS_196 VCC_CORE_68 VCC_CORE_158
AM13 A18 N30 AJ9
VSS_77 VSS_195 VCC_CORE_69 VCC_CORE_157

i-
AH24 H6 AD26 AL12
VSS_78 VSS_194 VCC_CORE_70 VCC_CORE_156
AJ30 AF13 AJ26 AH25
VSS_79 VSS_193 VCC_CORE_71 VCC_CORE_155
AJ10 AE10 AM29 AN30
VSS_80 VSS_192 VCC_CORE_72 VCC_CORE_154
AF3 AF16 M25 AL14
VSS_81 VSS_191 VCC_CORE_73 VCC_CORE_153
AK5 P29 M26 K30
VSS_82 VSS_190 VCC_CORE_74 VCC_CORE_152
AJ16 V3 L8 AJ11
VSS_83 VSS_189 VCC_CORE_75 VCC_CORE_151
AF6 P30 U25 AL11
VSS_84 VSS_188 VCC_CORE_76 VCC_CORE_150
AK29
AJ17
VSS_85 VSS_187
R23
R24
Yorkfield/Wolfdale CPU Power Status and max current table Y8
AJ12
VCC_CORE_77 VCC_CORE_149
AM11
AJ21
VSS_86 VSS_186 VCC_CORE_78 VCC_CORE_148
F22 U7 POWER PLANE S0 S3 S4/S5 Voltage I(max) Note AD27 AG30
VSS_87 VSS_185 VCC_CORE_79 VCC_CORE_147
AH3
AK10
AM10
VSS_88
VSS_89
VSS_184
VSS_183
R25
R26
R27
VCC_CORE O
is X X VID 100A Yorkfield@65W
U23
M23
AG29
VCC_CORE_80
VCC_CORE_81
VCC_CORE_146
VCC_CORE_145
AK21
AF8
AM15
B VSS_90 VSS_182 VCC_CORE_82 VCC_CORE_144 B
F16 R28 VCC_CORE O X X VID 75A Wolfdale N27 AD23
VSS_91 VSS_181 VCC_CORE_83 VCC_CORE_143
AJ23 R29 AM22 AF11
VSS_92 VSS_180 VCC_CORE_84 VCC_CORE_142
F13 E25 VTT O X X VCC1.2 4.6A After VCC stable U28 AK15
VSS_93 VSS_179 VCC_CORE_85 VCC_CORE_141
AG7 T6 K28 AG27
VSS_94 VSS_178 VCC_CORE_86 VCC_CORE_140
F10 V23 VTT O X X VCC1.2 4.5A Before VCC stable U8 J21
VSS_95 VSS_177 VCC_CORE_87 VCC_CORE_139
L26 V24 AK18 J18
VSS_96 VSS_176 VCC_CORE_88 VCC_CORE_138
AD4 T3 VCC_PLL O X X VCC1.5 260mA AD8 J26
kn
VSS_97 VSS_175 VCC_CORE_89 VCC_CORE_137
H11 V25 K24 AL15
VSS_98 VSS_174 VCC_CORE_90 VCC_CORE_136
L24 AN10 AH28 AF18
VSS_99 VSS_173 VCC VCC_CORE_91 VCC_CORE_135
L23 E20 AH21 AH15
VSS_100 VSS_172 VCC_CORE_92 VCC_CORE_134
AM23 R7 AK12 AN9
VSS_101 VSS_171 VCC VCC VCC_CORE_93 VCC_CORE_133
A15 V27 AH22 AG26
VSS_102 VSS_170 VCC_CORE_94 VCC_CORE_132
AH10 R5 T29 AJ15
VSS_103 VSS_169 VCC_CORE_95 VCC_CORE_131
B24
VSS_104 VSS_168
V28 Voltage translation AM14
VCC_CORE_96 VCC_CORE_130
J10
L3 V29 required for the swith IC R29 AM25 AK26
VSS_105 VSS_167 VCC_CORE_97 VCC_CORE_129
H27
VSS_106 VSS_166
R2 1K Switch for PSI# connection between AE9
VCC_CORE_98 VCC_CORE_128
AG11
A21 V30 R28 processor and VR.This type of switch Y29 AN29
Te

VSS_107 VSS_165 0402 VCC_CORE_99 VCC_CORE_127


AE2 E26 1K C20 AK25 AK22
AJ29
VSS_108 VSS_164
P7
5% neded as we can not tolerate a delay to AK19
VCC_CORE_100 VCC_CORE_126
R8
VSS_109 VSS_163 0402 0.1U VCC_CORE_101 VCC_CORE_125
AK27 AA24 I
0402
be placed on PSI# assertions. AG15 T23
VSS_110 VSS_162 Q4_C Q3_C 5% VCC_CORE_102 VCC_CORE_124
AK28 AA25 J22 AH14
VSS_111 VSS_161 I X7R VCC_CORE_103 VCC_CORE_123
B20 P4 T24 AN8
VSS_112 VSS_160 VCC_CORE_104 VCC_CORE_122
3

AM20 AA26 10V U56 AG21 AL25


VSS_113 VSS_159 R27 5.11K Q4_B Q4 Q3 I VCC_CORE_105 VCC_CORE_121
H26 AA27 4,6,29 H_CPURST# 2 2 5 1 VRM_PSI 32 AM21 W27
VSS_114 VSS_158 I 1% 0402 VCC IO VCC_CORE_106 VCC_CORE_120
B17 AN13 MMBT3904-7-F MMBT3904-7-F J25 AH26
VSS_115 VSS_157 R19 0 VCC_CORE_107 VCC_CORE_119
H25 AA28 200mA 200mA 4 U30 AH18
1

VSS_116 VSS_156 C19 C NI 5% 0402 VCC_CORE_108 VCC_CORE_118


H24 N7 AL21 J20
w.

VSS_117 VSS_155 SOT23-3 SOT23-3 VCC_CORE_109 VCC_CORE_117


AA3 N6 10U 2 CPU_PSI 4,32 AG25 AJ22
VSS_118 VSS_154 40V 40V OI VCC_CORE_110 VCC_CORE_116
AA7 AA29 0603 AJ18 AG12
VSS_119 VSS_153 I I VCC_CORE_111 VCC_CORE_115
H23 L27 3 J19 J15
VSS_120 VSS_152 X5R GND VCC_CORE_112 VCC_CORE_114
AA6 Y7 AH30
VSS_121 VSS_151 6.3V 74V1G66CTR VCC_CORE_113
H10 AL27
VSS_122 VSS_150
H22
VSS_123 VSS_149
D15 RC delay to turn the switch I VCC I
H21 L29 on only after 50 msec after Critical LGA775_C_EL
VSS_124 VSS_148 Q5 I
H20 L30 RESER# is high
VSS_125 VSS_147 ME2N7002E
H19 C7
VSS_126 VSS_146
ww

H18 P23 SOT23-3


VSS_127 VSS_145
3

A AB7 W7 R30 60V A


VSS_128 VSS_144 250mA
H17 AJ20 1K
VSS_129 VSS_143 I
AJ24 P25 0402
3

VSS_130 VSS_142 Q5_G R31 100


AM17 W4 2 AUTO_PSI_DISABLE 11,32
VSS_131 VSS_141 5% Q7_C Q6 I 5% 0402
AC3 AJ13 2
VSS_132 VSS_140 I
H14 AM28 MMBT3904-7-F
3

VSS_133 VSS_139
P28 P26 200mA
1

VSS_134 VSS_138 R32 1K Q7_B Q7


V6 2
1

VSS_135 I 5% 0402 SOT23-3


AK2 MMBT3904-7-F
VSS_136 40V
P27 200mA
1

VSS_137 I
SOT23-3
40V
Quanta Computer Inc.
Critical For fast switch off of the IC if RESET# is assertedI
I
LGA775_C_EL PROJECT : ZN5
( needed because BIOS uses processor only resets
that will restart the invaild PSI assertion.
C-step Erratum for PSI Size Document Number Rev
X4
CPU(2/2)- Power
Date: Friday, March 05, 2010 Sheet 5 of 40
5 4 3 2 1
5 4 3 2 1

06
U3A
4 H_A#[3..16] EAGLELAKE_DDR3
V_FSB_VTT 0.25*VCCP SYM_REV = 1.5GC
H_D#[0..15] 4
H_A#3 L36 F44 H_D#0
W:10,S:10 , L<3" H_A#4 FSB_AB_3 FSB_DB_0 H_D#1
L37 FSB_AB_4 FSB_DB_1 C44
R443 BreakoutL<0.25" H_A#5 J38 D44 H_D#2
301 H_A#6 FSB_AB_5 FSB_DB_2 H_D#3
F40 FSB_AB_6 FSB_DB_3 C41
0402 H_A#7 H39 E43 H_D#4
1% H_A#8 FSB_AB_7 FSB_DB_4 H_D#5
L38 FSB_AB_8 FSB_DB_5 B43
I 49.9/F as schematic checklist H_A#9 L43 D40 H_D#6
H_A#10 FSB_AB_9 FSB_DB_6 H_D#7
N39 B42

m
D R443_1 R441 49.9 H_SWING H_A#11 FSB_AB_10 FSB_DB_7 H_D#8 D
N35 FSB_AB_11 FSB_DB_8 B38
I 1% 0402 H_A#12 N37 F38 H_D#9
H_A#13 FSB_AB_12 FSB_DB_9 H_D#10
J41 FSB_AB_13 FSB_DB_10 A38

co
R442 H_A#14 N40 B37 H_D#11
C395 H_A#15 FSB_AB_14 FSB_DB_11 H_D#12
100 M45 FSB_AB_15 FSB_DB_12 D38
0402 0.1U H_A#16 R35 C37 H_D#13
4 H_A#[17..35] FSB_AB_16 FSB_DB_13
0402 H_A#17 T36 D37 H_D#14
I H_A#18 FSB_AB_17 FSB_DB_14 H_D#15
I R36 FSB_AB_18 FSB_DB_15 B36 H_D#[16..31] 4
1% H_A#19 R34 E37 H_D#16
X7R H_A#20 FSB_AB_19 FSB_DB_16 H_D#17
R37 FSB_AB_20 FSB_DB_17 J35
10V H_A#21 R39 H35 H_D#18

a.
H_A#22 FSB_AB_21 FSB_DB_18 H_D#19
U38 FSB_AB_22 FSB_DB_19 F37
H_A#23 T37 G37 H_D#20
H_A#24 FSB_AB_23 FSB_DB_20 H_D#21
U34 FSB_AB_24 FSB_DB_21 J33
H_A#25 U40 L33 H_D#22
H_A#26 FSB_AB_25 FSB_DB_22 H_D#23
W:10,S:7 , L<0.5" T34 FSB_AB_26 FSB_DB_23 G33
H_A#27 Y36 L31 H_D#24
BreakoutL<0.25" H_A#28 FSB_AB_27 FSB_DB_24 H_D#25
U35 M31

si
H_A#29 FSB_AB_28 FSB_DB_25 H_D#26
AA35 FSB_AB_29 FSB_DB_26 M30
H_A#30 U37 J30 H_D#27
H_RCOMP H_A#31 FSB_AB_30 FSB_DB_27 H_D#28
Y37 FSB_AB_31 FSB_DB_28 G31
H_A#32 Y34 K30 H_D#29
H_A#33 FSB_AB_32 FSB_DB_29 H_D#30
Y38 FSB_AB_33 FSB_DB_30 M29
R448 H_A#34 AA37 G30 H_D#31
FSB_AB_34 FSB_DB_31 H_D#[32..47] 4
16.5 H_A#35 AA36 J29 H_D#32
FSB_AB_35 FSB_DB_32

ne
0402 F29 H_D#33
C FSB_DB_33 H_D#34 C
I FSB_DB_34 H29
L25 H_D#35
1% FSB_DB_35 H_D#36
FSB_DB_36 K26
L29 H_D#37
4 H_REQ#[0..4] FSB_DB_37
H_REQ#0 G38 J26 H_D#38
H_REQ#1 FSB_REQB_0 FSB_DB_38 H_D#39

FSB
K35 FSB_REQB_1 FSB_DB_39 M26

do
H_REQ#2 J39 H26 H_D#40
H_REQ#3 FSB_REQB_2 FSB_DB_40 H_D#41
C43 FSB_REQB_3 FSB_DB_41 F25
H_REQ#4 G39 F24 H_D#42
FSB_REQB_4 FSB_DB_42 H_D#43
FSB_DB_43 G25
H_ADSTB#0 J40 H24 H_D#44
V_FSB_VTT 4 H_ADSTB#0 FSB_ADSTBB_0 FSB_DB_44
0.365*VCCP H_ADSTB#1 T39 L24 H_D#45
4 H_ADSTB#1 FSB_ADSTBB_1 FSB_DB_45
J24 H_D#46
W:10,S:20 , L<1.5" 4 H_DSTBP[3..0]
H_DSTBP0 H_DSTBP0 FSB_DB_46 H_D#47
C39 N24

In
FSB_DSTBPB_0 FSB_DB_47 H_D#[48..63] 4
R455 H_DSTBP1 H_DSTBN0 B39 C28 H_D#48
57.6 H_DSTBP2 H_DINV#0 FSB_DSTBNB_0 FSB_DB_48 H_D#49
B40 FSB_DINVB_0 FSB_DB_49 B31
0402 H_DSTBP3 H_DSTBP1 K31 F35 H_D#50
4 H_DSTBN[3..0] FSB_DSTBPB_1 FSB_DB_50
1% 49.9/F as schematic checklist H_DSTBN0 H_DSTBN1 J31 C35 H_D#51
I H_DSTBN1 H_DINV#1 FSB_DSTBNB_1 FSB_DB_51 H_D#52
F33 FSB_DINVB_1 FSB_DB_52 B35
R455_1 R451 49.9 MCH_GTLREF0 H_DSTBN2 H_DSTBP2 J25 D35 H_D#53
I 1% 0402 H_DSTBN3 H_DSTBN2 FSB_DSTBPB_2 FSB_DB_53 H_D#54
4 H_DINV#[3..0] K25 D31

i-
H_DINV#0 H_DINV#2 FSB_DSTBNB_2 FSB_DB_54 H_D#55
F26 FSB_DINVB_2 FSB_DB_55 A34
R452 H_DINV#1 H_DSTBP3 C32 B32 H_D#56
C431 C430 H_DINV#2 H_DSTBN3 FSB_DSTBPB_3 FSB_DB_56 H_D#57
100 D32 FSB_DSTBNB_3 FSB_DB_57 F31
0402 0.1U 220P H_DINV#3 H_DINV#3 D30 D28 H_D#58
FSB_DINVB_3 FSB_DB_58 H_D#59
I 0402 0402 FSB_DB_59 A29
B H_ADS# H_D#60 B
I I 4 H_ADS# J42 FSB_ADSB FSB_DB_60 C30
1% H_TRDY# L40 B30 H_D#61
4 H_TRDY# FSB_TRDYB FSB_DB_61
X7R
10V
X7R
50V
is 4 H_DRDY#
H_DRDY#
H_DEFER#
J43
G44
FSB_DRDYB FSB_DB_62 E27
B28
H_D#62
H_D#63
4 H_DEFER# FSB_DEFERB FSB_DB_63
H_HITM# K44
4 H_HITM# FSB_HITMB
H_HIT# H45
4 H_HIT# FSB_HITB
H_LOCK# H40
4 H_LOCK# FSB_LOCKB
H_BREQ# L42 B24 H_SWING
4 H_BREQ# FSB_BREQ0B FSB_SWING
H_BNR# J44 A23 H_RCOMP
4 H_BNR# FSB_BNRB FSB_RCOMP
H_BPRI#
kn

4 H_BPRI# H37 FSB_BPRIB


H_DBSY# H42
4 H_RS#[2..0] 4 H_DBSY# FSB_DBSYB
H_RS#0 G43 C22 MCH_GTLREF0
H_RS#1 FSB_RSB_0 FSB_DVREF
L44 FSB_RSB_1 FSB_ACCVREF B23
H_RS#2 G42
H_CPURST# FSB_RSB_2
4,5,29 H_CPURST# D27 FSB_CPURSTB
P29 CLK_MCH_BCLK
HPL_CLKINP CLK_MCH_BCLK 3
P30 CLK_MCH_BCLK#
Te

HPL_CLKINN CLK_MCH_BCLK# 3
TP_MCH_N25 N25
T133 RSVD_05 1 OF 9

EAGLELAKE_FCBGA1254
Critical
I
w.

A A

Quanta Computer Inc.


ww

PROJECT : ZN5
Size Document Number Rev
X4
NB (1/5) HOST
Date: Friday, March 05, 2010 Sheet 6 of 40
5 4 3 2 1
5 4 3 2 1

U3B

CRT_R#

CRT_G#
16 PEG_RXP0
PEG_RXP0
PEG_RXN0
F6
G7
PEG_RXP_0
EAGLELAKE_DDR3
SYM_REV = 1.5GC

PEG_TXP_0
C11
B11
PEG_TXP0
PEG_TXN0
07
16 PEG_RXN0 PEG_RXN_0 PEG_TXN_0
U3E PEG_RXP1 H6 A10 PEG_TXP1
16 PEG_RXP1 PEG_RXP_1 PEG_TXP_1
EAGLELAKE_DDR3 CRT_B# PEG_RXN1 G4 B9 PEG_TXN1
16 PEG_RXN1 PEG_RXN_1 PEG_TXN_1
SYM_REV = 1.5GC PEG_RXP2 J6 C9 PEG_TXP2
MCH_BSEL0 PEG_RXP_2 PEG_TXP_2
3 MCH_BSEL0 F17 BSEL0 CRT_HSYNC D14 U3_D14 NI R775 5% 0 0402 CRT_HSYNC 28 PEG_RXN2 J7 PEG_RXN_2 PEG_TXN_2 D8 PEG_TXN2
MCH_BSEL1 G16 C14 U3_C14 NI R776 5% 0 0402 CRT_VSYNC 28 R42 R39 R40 PEG_RXP3 L6 B8 PEG_TXP3
3 MCH_BSEL1 BSEL1 CRT_VSYNC 16 PEG_RXP3 PEG_RXP_3 PEG_TXP_3
MCH_BSEL2 P15 150 150 150 PEG_RXN3 L7 C7 PEG_TXN3
3 MCH_BSEL2
M20
BSEL2 16 PEG_RXN3
PEG_RXP4 N9
PEG_RXN_3 PEG_TXN_3
B7 PEG_TXP4
SDVO -> LVDS
ALLZTEST 0402 0402 0402 16 PEG_RXP4 PEG_RXP_4 PEG_TXP_4
N17 XORTEST CRT_RED B18 CRT_R# NI R769 5% 0 0402 CRT_R 28 I I I 16 PEG_RXN4
PEG_RXN4 N10 PEG_RXN_4 PEG_TXN_4 B6 PEG_TXN4
NI R457 5% 1K 0402 TP_MCH_K16 K16 D18 CRT_G# NI R770 5% 0 0402 CRT_G 28 PEG_RXP5 N7 B3 PEG_TXP5
PRIMARY_PEG_PRESENCE CRT_GREEN 5% 5% 5% 16 PEG_RXP5 PEG_RXP_5 PEG_TXP_5
NI R467 5% 1K 0402 EXP_SLR F15 C18 CRT_B# NI R771 5% 0 0402 CRT_B 28 PEG_RXN5 N6 B4 PEG_TXN5
EXP_SLR CRT_BLUE 16 PEG_RXN5 PEG_RXN_5 PEG_TXN_5
G15 F13 PEG_RXP6 R7 D2 PEG_TXP6
RSVD_17 CRT_IRTN PEG_RXP_6 PEG_TXP_6

PCIE
I R454 5% 0 0402 EXP_SM H17 PEG_RXN6 R6 C2 PEG_TXN6
NI R461 5% 1K 0402 U3_L17 EXP_SM PEG_RXP7 PEG_RXN_6 PEG_TXN_6 PEG_TXP7
L17 ITPM_EN# R9 PEG_RXP_7 PEG_TXP_7 H2
I R711 5% 0 0402 CRT_DDC_DATA 28 PEG_RXN7 R10 G2 PEG_TXN7

VGA
I R470 5% 1K 0402 PEG_RXN_7 PEG_TXN_7 C60 I [email protected] 0402 X7R 10V
M17 L15 CRT_DDC_DATA_R PEG_RXP8 U10 J2 C_PEG_TXP8 PEG_TXP8

m
RSVD_10 CRT_DDC_DATA VCC3 V_1P1_CL_MCH 16 PEG_RXP8 PEG_RXP_8 PEG_TXP_8 PEG_TXP8 16
NI R453 5% 1K 0402 TCEN J17 M15 CRT_DDC_CLK_R I R471 5% 1K 0402 PEG_RXN8 U9 K2 C_PEG_TXN8 C61 I [email protected] 0402 X7R 10V PEG_TXN8
D CEN CRT_DDC_CLK 16 PEG_RXN8 PEG_RXN_8 PEG_TXN_8 PEG_TXN8 16 D
G20 I R710 5% 0 0402 CRT_DDC_CLK 28 PEG_RXP9 U6 K1 C_PEG_TXP9 C76 I [email protected] 0402 X7R 10V PEG_TXP9
RSVD_11 16 PEG_RXP9 PEG_RXP_9 PEG_TXP_9 PEG_TXP9 16
J16 RSVD_12 DAC_IREF B15 U3_B15 R466 1% 1.02K 0402
16 PEG_RXN9
PEG_RXN9 U7 PEG_RXN_9 PEG_TXN_9 L2 C_PEG_TXN9 C77 I [email protected] 0402 X7R 10V PEG_TXN9
PEG_TXN9 16
M16 I PEG_RXP10 AA9 P2 C_PEG_TXP10 C63 I [email protected] 0402 X7R 10V PEG_TXP10
RSVD_13 16 PEG_RXP10 PEG_RXP_10 PEG_TXP_10 PEG_TXP10 16
J15 E15 DREFCLK DREFCLK NI R43 5% EV@10K 0402 PEG_RXN10 AA10 M2 C_PEG_TXN10 C62 I [email protected] 0402 X7R 10V PEG_TXN10
RSVD_14 DPL_REFCLKINP DREFCLK 3 16 PEG_RXN10 PEG_RXN_10 PEG_TXN_10 PEG_TXN10 16
J20 D15 DREFCLK# DREFSSCLK NI R45 5% EV@10K 0402 PEG_RXP11 R4 T2 C_PEG_TXP11 C79 I [email protected] 0402 X7R 10V PEG_TXP11

co
RSVD_15 DPL_REFCLKINN DREFCLK# 3 16 PEG_RXP11 PEG_RXP_11 PEG_TXP_11 PEG_TXP11 16
V_FSB_VTT R456 1K DUALX8_ENABLE F20 G8 DREFSSCLK PEG_RXN11 P4 R1 C_PEG_TXN11 C78 I [email protected] 0402 X7R 10V PEG_TXN11
DUALX8_ENABLE VCC_95 DREFSSCLK 3 16 PEG_RXN11 PEG_RXN_11 PEG_TXN_11 PEG_TXN11 16
I 5% 0402 G9 DREFSSCLK# DREFSSCLK# NI R46 5% EV@0 0402 PEG_RXP12 AA7 U2 C_PEG_TXP12 C64 I [email protected] 0402 X7R 10V PEG_TXP12
VSS_370 DREFSSCLK# 3 16 PEG_RXP12 PEG_RXP_12 PEG_TXP_12 PEG_TXP12 16
DREFCLK# NI R41 5% EV@0 0402 PEG_RXN12 AA6 V2 C_PEG_TXN12 C65 I [email protected] 0402 X7R 10V PEG_TXN12
16 PEG_RXN12 PEG_RXN_12 PEG_TXN_12 PEG_TXN12 16
PEG_RXP13 AB10 W4 C_PEG_TXP13 C67 I [email protected] 0402 X7R 10V PEG_TXP13
16 PEG_RXP13 PEG_RXP_13 PEG_TXP_13 PEG_TXP13 16
CL_DATA0 AY4 L13 PEG_RXN13 AB9 V3 C_PEG_TXN13 C66 I [email protected] 0402 X7R 10V PEG_TXN13
13 CL_DATA0 CL_DATA RSVD_35 16 PEG_RXN13 PEG_RXN_13 PEG_TXN_13 PEG_TXN13 16
CL_CLK0 AY2 L11 PEG_RXP14 AB3 AA4C_PEG_TXP14 C69 I [email protected] 0402 X7R 10V PEG_TXP14
13 CL_CLK0 CL_CLK RSVD_34 16 PEG_RXP14 PEG_RXP_14 PEG_TXP_14 PEG_TXP14 16
CL_VREF AN13 B14 TP_MCH_B14 PEG_RXN14 AA2 Y4 C_PEG_TXN14 C68 I [email protected] 0402 X7R 10V PEG_TXN14
CL_VREF NC_19 T142 16 PEG_RXN14 PEG_RXN_14 PEG_TXN_14 PEG_TXN14 16
CL_RST# AW2 AN6 U3_AN6 0402 0 5% R48 I PLT_RST# PEG_RXP15 AD10 AC1C_PEG_TXP15 C71 I [email protected] 0402 X7R 10V PEG_TXP15
13 CL_RST# CL_RSTB RSTINB PLT_RST# 12 16 PEG_RXP15 PEG_RXP_15 PEG_TXP_15 PEG_TXP15 16
CL_PWROK AN8 AR4 U3_AR4 0402 0 5% R475 I PWRGD_140MS PEG_RXN15 AD11 AB2C_PEG_TXN15 C70 I [email protected] 0402 X7R 10V PEG_TXN15

MISC
CL_PWROK PWROK 16 PEG_RXN15 PEG_RXN_15 PEG_TXN_15 PEG_TXN15 16
ICH_SYNCB K15 PM_SYNC#_MCH 0 5% R463 I
PM_SYNC# 11
CLPWROK sequence request JTAG_TDI AR7 0402 DMI_RXP0 AD7 AC2 DMI_TXP0
1. asserted after VCC_CL ramp to 1.0V T147 JTAG_TDI 12 DMI_RXP0 DMI_RXP_0 DMI_TXP_0 DMI_TXP0 12
JTAG_TDO AN10 DMI_RXN0 AD8 AD2 DMI_TXN0

a.
2. asserted before PWROK T145 JTAG_TDO 12 DMI_RXN0 DMI_RXN_0 DMI_TXN_0 DMI_TXN0 12
JTAG_TCK AN11 DMI_RXP1 AE9 AD4 DMI_TXP1
T143 JTAG_TCK 12 DMI_RXP1 DMI_RXP_1 DMI_TXP_1 DMI_TXP1 12
JTAG_TMS AN9 ICH_DPRSTP# DMI_RXN1 AE10 AE4 DMI_TXN1
T146 JTAG_TMS 12 DMI_RXN1 DMI_RXN_1 DMI_TXN_1 DMI_TXN1 12
AU4 The Daisy chain topology should DMI_RXP2 AE6 AE2 DMI_TXP2

DMI
HDA_BCLK 12 DMI_RXP2 DMI_RXP_2 DMI_TXP_2 DMI_TXP2 12
AV4 be routed from ICH10 to IMVP , DMI_RXN2 AE7 AF2 DMI_TXN2
HDA_RSTB 12 DMI_RXN2 DMI_RXN_2 DMI_TXN_2 DMI_TXN2 12
R31 AU2 then to (G)MCH and CPU, in that DMI_RXP3 AF9 AF4 DMI_TXP3
RSVD_31 HDA_SDI 12 DMI_RXP3 DMI_RXP_3 DMI_TXP_3 DMI_TXP3 12
R32 AV1 order. DMI_RXN3 AF8 AG4 DMI_TXN3
RSVD_30 HDA_SDO 12 DMI_RXN3 DMI_RXN_3 DMI_TXN_3 DMI_TXN3 12
U30 RSVD_33 HDA_SYNC AU3
V_1P1_CL_MCH U31 CLK_PCIE_EXP D9 Y7 GRCOMP R472 1% 49.9 0402
RSVD_32 3 CLK_PCIE_EXP EXP_CLKP EXP_RCOMPO V_1P1_CORE
Layout note: CLK_PCIE_EXP# E9 Y8 I
3 CLK_PCIE_EXP# EXP_CLKN EXP_COMPI
H_GTLREF: Zo=55 ohm,L<0.5" R15 J11 DDPC_CTRL_CLK Y6
RSVD_25 DDPC_CTRLCLK DDPC_CTRL_CLK 16 EXP_ICOMPO
R462 0.316*VCC_CL+-2% R14 F11 DDPC_CTRL_DATA SDVO_CTRLDATA R469 NI 5% IV@0 0402 SDVO_CTRLDATA_RJ13
RSVD_26 DDPC_CTRLDATA DDPC_CTRL_DATA 16 17 SDVO_CTRLDATA SDVO_CTRLDATA
1K T15 SDVO_CTRLCLK R468 IV@0 0402 SDVO_CTRLCLK_R G13 AG1 GRBIAS R477 1% 750 0402

si
RSVD_27 17 SDVO_CTRLCLK SDVO_CTRLCLK EXP_RBIAS
0402 T14 NI 5% I
1% RSVD_28 TP_MCH_AB13 AB13
T140 RSVD_23
I AN17 P43 MCH_DPRSTP# R36 5% 0 0402 ICH_DPRSTP# TP_MCH_AD13 AD13
NC_01 DPRSTPB ICH_DPRSTP# 4,11 T141 RSVD_22
CL_VREF P42 H_CPUSLP# I
SLPB H_CPUSLP# 4,26
2 OF 9
Enable Digital Port B
R465 C461 had PU 5.6K to VCC2.5 on CH7308 side EAGLELAKE_FCBGA1254
464 0.1U need to check with intel Critical
0402 0402 AB15 I
RSVD_29
I I
1% X7R TP_MCH_A44 A44

ne
T99 NC_13
10V TP_MCH_BD1 BD1
T22 NC_12
TP_MCH_BD45 BD45
T11 NC_11
TP_MCH_BE2 BE2
T20 NC_10
TP_MCH_BE44 BE44 B45 TP_MCH_B45
T13 NC_09 NC_02 T10
AK15 TP_MCH_AK15
C NC_18 T144 C
TP_MCH_A45 A45 AD42 TP_MCH_AD42
T9 RSVD_18 NC_05 T103
TP_MCH_B2 B2 AN16 TP_MCH_AN16
T148 RSVD_19 NC_04 T139
TP_MCH_BE1 BE1 W30
T21 RSVD_20 NC_06
TP_MCH_BE45 BE45 AW44 TP_MCH_AW44
T12 RSVD_21 NC_03 T4
R42 TP_MCH_R42
NC_08 T98
NC_07 U32
5 OF 9

do
R474 0 CL_PWROK
11,26,29 PWRGD_140MS CL_PWROK 13 VCC3
NI 5% 0402 EAGLELAKE_FCBGA1254
R473 0 Critical
35 MCH_CLPWROK
I 5% 0402 I

C243 C492 C493 C491 C489 C487 C494 C488


2.2U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
0603 0402 0402 0402 0402 0402 0402 0402
I I I I I I I I
X5R X7R X7R X7R X7R X7R X7R X7R

In
6.3V 10V 10V 10V 10V 10V 10V 10V

U8
VCC3

1 PI3PCIE2612-BZFE 55
GND VDD
11 GND VDD 50
16 34 VCC3
C511 C532 C524 C508 C505 C510 C531 C512 GND VDD
20 GND VDD 27 H:SDVO TO LVDS
2.2U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 21 22 R69
GND VDD 2.2K
0603 0402 0402 0402 0402 0402 0402 0402 28 GND VDD 17 L:for MXM lane
U38 29 6 0402

i-
I I I I I I I I GND VDD 5%
35 GND
X5R X7R X7R X7R X7R X7R X7R X7R 48 3 U8_3 0 R70 I
PI3PCIE2612-AZFE 6.3V 10V 10V 10V 10V 10V 10V 10V GND LE# 0402 5% I
1 GND VDD 55 49 GND SEL 2 MXM_PRSNT# 13,16
11 GND VDD 50 56 GND
16 GND VDD 34
20 27 54 C_SDVO_CLK# C54 I 0.1U 0402 X7R 10V SDVO_CLK#
21
GND VDD
22
H:PCIE to DP D0+
53 C_SDVO_CLK C53 I 0.1U 0402 X7R 10V SDVO_CLK
SDVO_CLK# 17
U7
GND VDD D0- SDVO_CLK 17
28 17 PEG_TXN3 4 52 C_SDVO_BLUE# C52 I 0.1U 0402 X7R 10V SDVO_BLUE# DDPC_CTRL_CLK 1 5
29
GND VDD
6
L:For MXM lane to DP PEG_TXP3 5
IN_0+ D1+
51 C_SDVO_BLUE C51 I 0.1U 0402 X7R 10V SDVO_BLUE
SDVO_BLUE# 17 X VCC VCC3
GND VDD IN_0- D1- SDVO_BLUE 17
35 PEG_TXN2 7 3
GND U38_19 0 R509 PEG_TXP2 IN_1+ C_PEG_TXN3_R C706 I 0.1U 0402 X7R 10V PEG_TXN3_R GND MXM_PRSNT#
48 GND LE# 19 8 IN_1- TX0+ 43 PEG_TXN3_R 16 CTRL 4
49 18 0402 5% I MXM_PRSNT# 42 C_PEG_TXP3_R C705 I 0.1U 0402 X7R 10V PEG_TXP3_R VCC3 R47 2.2K U7_2 2
PEG_TXP3_R 16

B
56
GND
GND
SEL

D0+ 43 C_EXT_DPTX0P I C683 0.1U 0402 X7R 10V EXT_DPTX0P


EXT_DPTX0P 16
is TX0-
TX1+
TX1-
41
40
C_PEG_TXN2_R
C_PEG_TXP2_R
C707
C708
I
I
0.1U
0.1U
0402
0402
X7R
X7R
10V PEG_TXN2_R
10V PEG_TXP2_R
PEG_TXN2_R
PEG_TXP2_R
16
16
I 5% 0402 Y
74V1G66CTR
I B
42 C_EXT_DPTX0N I C684 0.1U 0402 X7R 10V EXT_DPTX0N 47 C_SDVO_GREEN# C48 I 0.1U 0402 X7R 10V SDVO_GREEN#
D0- EXT_DPTX0N 16 D2+ SDVO_GREEN# 17
PEG_TXP4 2 41 C_EXT_DPTX1P I C685 0.1U 0402 X7R 10V EXT_DPTX1P 46 C_SDVO_GREEN C47 I 0.1U 0402 X7R 10V SDVO_GREEN
IN_0+ D1+ EXT_DPTX1P 16 D2- SDVO_GREEN 17
PEG_TXN4 3 40 C_EXT_DPTX1N I C686 0.1U 0402 X7R 10V EXT_DPTX1N PEG_TXN1 9 45 C_SDVO_RED# C46 I 0.1U 0402 X7R 10V SDVO_RED#
IN_0- D1- EXT_DPTX1N 16 IN_2+ D3+ SDVO_RED# 17
PEG_TXP5 4 PEG_TXP1 10 44 C_SDVO_RED C45 I 0.1U 0402 X7R 10V SDVO_RED U47
IN_1+ IN_2- D3- SDVO_RED 17
PEG_TXN5 5 54 C_PEG_TXP4_R I C56 0.1U 0402 X7R 10V PEG_TXP4_R PEG_TXN0 12 DDPC_CTRL_DATA 1 5 VCC3
IN_1- TX0+ PEG_TXP4_R 16 IN_3+ X VCC
53 C_PEG_TXN4_R I C57 0.1U 0402 X7R 10V PEG_TXN4_R PEG_TXP0 13 39 C_PEG_TXN1_R C702 I 0.1U 0402 X7R 10V PEG_TXN1_R
TX0- PEG_TXN4_R 16 IN_3- TX2+ PEG_TXN1_R 16
52 C_PEG_TXP5_R I C73 0.1U 0402 X7R 10V PEG_TXP5_R 38 C_PEG_TXP1_R C701 I 0.1U 0402 X7R 10V PEG_TXP1_R 3
TX1+ PEG_TXP5_R 16 TX2- PEG_TXP1_R 16 GND
51 C_PEG_TXN5_R I C72 0.1U 0402 X7R 10V PEG_TXN5_R 37 C_PEG_TXN0_R C703 I 0.1U 0402 X7R 10V PEG_TXN0_R 4 MXM_PRSNT#
TX1- PEG_TXN5_R 16 TX3+ PEG_TXN0_R 16 CTRL
36 C_PEG_TXP0_R C704 I 0.1U 0402 X7R 10V PEG_TXP0_R VCC3 R44 2.2K U47_2 2
TX3- PEG_TXP0_R 16 Y
kn

39 C_EXT_DPTX2P I C687 0.1U 0402 X7R 10V EXT_DPTX2P I 5% 0402


D2+ EXT_DPTX2P 16
38 C_EXT_DPTX2N I C688 0.1U 0402 X7R 10V EXT_DPTX2N 33 SDVO_STALL 74V1G66CTR
D2- EXT_DPTX2N 16 AUX+ SDVO_STALL 17
PEG_TXP6 7 37 C_EXT_DPTX3P I C689 0.1U 0402 X7R 10V EXT_DPTX3P 32 SDVO_STALL# I
IN_2+ D3+ EXT_DPTX3P 16 AUX- SDVO_STALL# 17
PEG_TXN6 8 36 C_EXT_DPTX3N I C690 0.1U 0402 X7R 10V EXT_DPTX3N PEG_RXP2 14 31 SDVO_CTRLDATA
IN_2- D3- EXT_DPTX3N 16 OUT+ HPD
PEG_TXP7 9 PEG_RXN2 15 30 SDVO_CTRLCLK Q11 Q8
PEG_TXN7 IN_3+ C_PEG_TXP6_R I C59 0.1U 0402 X7R 10V PEG_TXP6_R SDVO_CTRLDATA_R OUT- NC ME2N7002E ME2N7002E
10 IN_3- TX2+ 47 PEG_TXP6_R 16 18 X+
46 C_PEG_TXN6_R I C58 0.1U 0402 X7R 10V PEG_TXN6_R SDVO_CTRLCLK_R 19 26 PEG_RXP2_R SOT23-3 SOT23-3
TX2- PEG_TXN6_R 16 X- RX0+ PEG_RXP2_R 16
45 C_PEG_TXP7_R I C75 0.1U 0402 X7R 10V PEG_TXP7_R 25 PEG_RXN2_R 60V 60V
TX3+ PEG_TXP7_R 16 RX0- PEG_RXN2_R 16
44 C_PEG_TXN7_R I C74 0.1U 0402 X7R 10V PEG_TXN7_R 24 U8_24 0402 0 5% R49 I 250mA 250mA
TX3- PEG_TXN7_R 16 RX1+
57 23 U8_23 0402 0 5% R50 I NI NI
UMADP_AUXDP GND RX1-
AUX+ 26 UMADP_AUXDP 16
25 UMADP_AUXDN SDVO_CTRLDATA_R 3 1 Q11_S 1 3 SDVO_CTRLDATA
AUX- UMADP_AUXDN 16
Te

PEG_RXP6 12 24 UMA_HPD TQFN56 SEL: (H,L)=(Dx,Tx)


OUT+ HPD UMA_HPD 16
PEG_RXN6 13 23 U38_23 Critical R257
OUT- NC T149
PEG_RXP7 14 I 1M

2
PEG_RXN7 X+ PEG_RXP6_R 0402
15 X- RX0+ 33 PEG_RXP6_R 16
32 PEG_RXN6_R NI
RX0- PEG_RXN6_R 16
31 PEG_RXP7_R 5%
RX1+ PEG_RXP7_R 16
57 30 PEG_RXN7_R
GND RX1- PEG_RXN7_R 16
MXM_PRSNT#

TQFN56 SEL: (H,L)=(Dx,Tx) R792


Critical 1M
I 0402

2
w.

NI
5%
SDVO_CTRLCLK_R 3 1 Q9_S 1 3 SDVO_CTRLCLK

Q9 Q10
ME2N7002E ME2N7002E
250mA 250mA
SOT23-3 SOT23-3
I I
60V 60V
ww

A A

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
NB (2/5)- VGA, DMI, PCIE
Date: Friday, March 05, 2010 Sheet 7 of 40
5 4 3 2 1
5 4 3 2 1

08

U3D
EAGLELAKE_DDR3 M_B_DQ[0..7] 15
U3C SYM_REV = 1.5GC M_B_DQ0
15 M_B_A[0..14] M_B_A0 M_B_DQS0 M_B_DQ1
EAGLELAKE_DDR3 BD24 AW8

m
M_A_DQ0 M_A_DQ[0..7] 15 M_B_A1 DDR_B_MA_0 DDR_B_DQS_0 M_B_DQS#0 M_B_DQ2
SYM_REV = 1.5GC BB23 AW9
15 M_A_A[0..14] M_A_DQS0 M_A_DQ1 M_B_A2 DDR_B_MA_1 DDR_B_DQSB_0 M_B_DM0 M_B_DQ3
D BC41 BC5 BB24 AY6 D
M_A_A1 DDR_A_MA_0 DDR_A_DQS_0 M_A_DQS#0 M_A_DQ2 M_B_A3 DDR_B_MA_2 DDR_B_DM_0 M_B_DQ4
BC35 BD4 BD23
M_A_A2 DDR_A_MA_1 DDR_A_DQSB_0 M_A_DM0 M_A_DQ3 M_B_A4 DDR_B_MA_3 M_B_DQ0 M_B_DQ5
BB32 BC3 BB22 AV7
M_A_A3 DDR_A_MA_2 DDR_A_DM_0 M_A_DQ4 M_B_A5 DDR_B_MA_4 DDR_B_DQ_0 M_B_DQ1 M_B_DQ6
BC32 BD22 AW4
DDR_A_MA_3 DDR_B_MA_5 DDR_B_DQ_1

co
M_A_A4 BD32 BC2 M_A_DQ0 M_A_DQ5 M_B_A6 BC22 BA9 M_B_DQ2 M_B_DQ7
M_A_A5 DDR_A_MA_4 DDR_A_DQ_0 M_A_DQ1 M_A_DQ6 M_B_A7 DDR_B_MA_6 DDR_B_DQ_2 M_B_DQ3 M_B_DQ8 M_B_DQ[8..15] 15
BB31 BD3 BC20 AU11
M_A_A6 DDR_A_MA_5 DDR_A_DQ_1 M_A_DQ2 M_A_DQ7 M_B_A8 DDR_B_MA_7 DDR_B_DQ_3 M_B_DQ4 M_B_DQ9
AY31 BD7 M_A_DQ[8..15] 15 BB20 AU7
M_A_A7 DDR_A_MA_6 DDR_A_DQ_2 M_A_DQ3 M_A_DQ8 M_B_A9 DDR_B_MA_8 DDR_B_DQ_4 M_B_DQ5 M_B_DQ10
BA31 BB7 BD20 AU8
M_A_A8 DDR_A_MA_7 DDR_A_DQ_3 M_A_DQ4 M_A_DQ9 M_B_A10 DDR_B_MA_9 DDR_B_DQ_5 M_B_DQ6 M_B_DQ11
BD31 BB2 BC26 AW7
M_A_A9 DDR_A_MA_8 DDR_A_DQ_4 M_A_DQ5 M_A_DQ10 M_B_A11 DDR_B_MA_10 DDR_B_DQ_6 M_B_DQ7 M_B_DQ12
BD30 BA3 BD19 AY9
M_A_A10 DDR_A_MA_9 DDR_A_DQ_5 M_A_DQ6 M_A_DQ11 M_B_A12 DDR_B_MA_11 DDR_B_DQ_7 M_B_DQ13
AW43 BE6 BB19
M_A_A11 DDR_A_MA_10 DDR_A_DQ_6 M_A_DQ7 M_A_DQ12 M_B_A13 DDR_B_MA_12 M_B_DQS1 M_B_DQ14
BC30 BD6 BE38 AT15
M_A_A12 DDR_A_MA_11 DDR_A_DQ_7 M_A_DQ13 M_B_A14 DDR_B_MA_13 DDR_B_DQS_1 M_B_DQS#1 M_B_DQ15
BB30 BA19 AU15 M_B_DQ[16..23] 15
M_A_A13 DDR_A_MA_12 M_A_DQS1 M_A_DQ14 DDR_B_MA_14 DDR_B_DQSB_1 M_B_DM1 M_B_DQ16
AM42 BB9 AR15
M_A_A14 DDR_A_MA_13 DDR_A_DQS_1 M_A_DQS#1 M_A_DQ15 DDR_B_DM_1 M_B_DQ17
BD28 BC9

a.
DDR_A_MA_14 DDR_A_DQSB_1 M_A_DM1 M_A_DQ16 M_A_DQ[16..23] 15 M_B_WE# M_B_DQ8 M_B_DQ18
BD9 15 M_B_WE# BD36 AY13
DDR_A_DM_1 M_A_DQ17 M_B_CAS# DDR_B_WEB DDR_B_DQ_8 M_B_DQ9 M_B_DQ19
15 M_B_CAS# BC37 AP15
M_A_DQ8 M_A_DQ18 M_B_RAS# DDR_B_CASB DDR_B_DQ_9 M_B_DQ10 M_B_DQ20
AW42 BB8 15 M_B_RAS# BD35 AW15
M_A_CAS# DDR_A_WEB DDR_A_DQ_8 M_A_DQ9 M_A_DQ19 DDR_B_RASB DDR_B_DQ_10 M_B_DQ11 M_B_DQ21
15 M_A_CAS# AU42 AY8 AT16
M_A_RAS# DDR_A_CASB DDR_A_DQ_9 M_A_DQ10 M_A_DQ20 M_B_BS#0 DDR_B_DQ_11 M_B_DQ12 M_B_DQ22
15 M_A_RAS# AV42 BD11 15 M_B_BS#0 BD26 AU13
DDR_A_RASB DDR_A_DQ_10 M_A_DQ11 M_A_DQ21 M_B_BS#1 DDR_B_BS_0 DDR_B_DQ_12 M_B_DQ13 M_B_DQ23
BB11 15 M_B_BS#1 BB26 AW13 M_B_DQ[24..31] 15
M_A_BS#0 DDR_A_DQ_11 M_A_DQ12 M_A_DQ22 M_B_BS#2 DDR_B_BS_1 DDR_B_DQ_13 M_B_DQ14 M_B_DQ24
15 M_A_BS#0 AV45 BC7 15 M_B_BS#2 BD18 AP16
M_A_BS#1 DDR_A_BS_0 DDR_A_DQ_12 M_A_DQ13 M_A_DQ23 DDR_B_BS_2 DDR_B_DQ_14 M_B_DQ15 M_B_DQ25
15 M_A_BS#1 AY44 BE8 M_A_DQ[24..31] 15 AU16
M_A_BS#2 DDR_A_BS_1 DDR_A_DQ_13 M_A_DQ14 M_A_DQ24 DDR_B_DQ_15 M_B_DQ26
15 M_A_BS#2 BC28 BD10
DDR_A_BS_2 DDR_A_DQ_14 M_A_DQ15 M_A_DQ25 M_SB_CS#0 M_B_DQS2 M_B_DQ27
AY11 15 M_SB_CS#0 BB35 AR20
DDR_A_DQ_15 M_A_DQ26 M_SB_CS#1 DDR_B_CSB_0 DDR_B_DQS_2 M_B_DQS#2 M_B_DQ28

si
15 M_SB_CS#1 BD39 AR17
M_SA_CS#0 AU43 M_A_DQS2 M_A_DQ27 M_SB_CS#2 DDR_B_CSB_1 DDR_B_DQSB_2 M_B_DM2 M_B_DQ29
15 M_SA_CS#0 BD15 T111 BB37 AU17
DDR_A_CSB_0 DDR_A_DQS_2 M_A_DQS#2 M_A_DQ28 M_SB_CS#3 DDR_B_CSB_2 DDR_B_DM_2 M_B_DQ30
AR40 BB15 T14 BD40
M_SA_CS#2 AU44 DDR_A_CSB_1 DDR_A_DQSB_2 M_A_DM2 M_A_DQ29 DDR_B_CSB_3 M_B_DQ16 M_B_DQ31
T3 BD14 AY17 M_B_DQ[32..39] 15
M_SA_CS#3 AM43 DDR_A_CSB_2 DDR_A_DM_2 M_A_DQ30 M_SB_CKE0 DDR_B_DQ_16 M_B_DQ17 M_B_DQ32
T8 15 M_SB_CKE0 BC18 AV17
DDR_A_CSB_3 M_A_DQ16 M_A_DQ31 M_SB_CKE1 DDR_B_CKE_0 DDR_B_DQ_17 M_B_DQ18 M_B_DQ33
BB14 M_A_DQ[32..39] 15 15 M_SB_CKE1 AY20 AR21
M_SA_CKE0 DDR_A_DQ_16 M_A_DQ17 M_A_DQ32 M_SB_CKE2 DDR_B_CKE_1 DDR_B_DQ_18 M_B_DQ19 M_B_DQ34
15 M_SA_CKE0 BB27 BC14 T18 BE17 AV20
M_SA_CKE1 DDR_A_CKE_0 DDR_A_DQ_17 M_A_DQ18 M_A_DQ33 M_SB_CKE3 DDR_B_CKE_2 DDR_B_DQ_19 M_B_DQ20 M_B_DQ35
15 M_SA_CKE1 BD27 BC16 T19 BB18 AP17
M_SA_CKE2 DDR_A_CKE_1 DDR_A_DQ_18 M_A_DQ19 M_A_DQ34 DDR_B_CKE_3 DDR_B_DQ_20 M_B_DQ21 M_B_DQ36
T16 BA27 BB16 AW16
M_SA_CKE3 DDR_A_CKE_2 DDR_A_DQ_19 M_A_DQ20 M_A_DQ35 M_SB_ODT0 BD37 DDR_B_DQ_21 M_B_DQ22 M_B_DQ37
T15 AY26 BC11 15 M_SB_ODT0 AT20
DDR_A_CKE_3 DDR_A_DQ_20 M_A_DQ21 M_A_DQ36 M_SB_ODT1 BC39 DDR_B_ODT_0 DDR_B_DQ_22 M_B_DQ23 M_B_DQ38
BE12 15 M_SB_ODT1 AN20

ne
M_SA_ODT0 AR42 DDR_A_DQ_21 M_A_DQ22 M_A_DQ37 M_SB_ODT2 BB38 DDR_B_ODT_1 DDR_B_DQ_23 M_B_DQ39
15 M_SA_ODT0 BA15 T108 M_B_DQ[40..47] 15
M_SA_ODT1 AM44 DDR_A_ODT_0 DDR_A_DQ_22 M_A_DQ23 M_A_DQ38 DDR_B_ODT_2 M_B_DQS3 M_B_DQ40
15 M_SA_ODT1 BD16 BD42 AU26
M_SA_ODT2 AR44 DDR_A_ODT_1 DDR_A_DQ_23 M_A_DQ39 DDR_B_ODT_3 DDR_B_DQS_3 M_B_DQS#3 M_B_DQ41
T5 M_A_DQ[40..47] 15 AT26
M_SA_ODT3 AL40 DDR_A_ODT_2 M_A_DQS3 M_A_DQ40 DDR_B_DQSB_3 M_B_DM3 M_B_DQ42
T7 AR22 AV25
DDR_A_ODT_3 DDR_A_DQS_3 M_A_DQS#3 M_A_DQ41 DDR_B_DM_3 M_B_DQ43
AT22
C DDR_A_DQSB_3 M_A_DM3 M_A_DQ42 M_B_DQ24 M_B_DQ44 C
AV22 AT25
DDR_A_DM_3 M_A_DQ43 M_SB0_CK0 AY33 DDR_B_DQ_24 M_B_DQ25 M_B_DQ45
15 M_SB0_CK0 AV26
M_A_DQ24 M_A_DQ44 M_SB0_CK#0AW33 DDR_B_CK_0 DDR_B_DQ_25 M_B_DQ26 M_B_DQ46
AW21 15 M_SB0_CK#0 AU29
M_SA0_CK0 AY37 DDR_A_DQ_24 M_A_DQ25 M_A_DQ45 DDR_B_CKB_0 DDR_B_DQ_26 M_B_DQ27 M_B_DQ47
15 M_SA0_CK0 AY22 AV31 AV29 M_B_DQ[48..55] 15
M_SA0_CK#0 BA37 DDR_A_CK_0 DDR_A_DQ_25 M_A_DQ26 M_A_DQ46 DDR_B_CK_1 DDR_B_DQ_27 M_B_DQ28 M_B_DQ48
15 M_SA0_CK#0 AV24 AW31 AW25
DDR_A_CKB_0 DDR_A_DQ_26 M_A_DQ27 M_A_DQ47 M_SB0_CK2 AW35 DDR_B_CKB_1 DDR_B_DQ_28 M_B_DQ29 M_B_DQ49
AW29 AY24 AR25

do
DDR_A_CK_1 DDR_A_DQ_27 M_A_DQ28 M_A_DQ48 M_A_DQ[48..55] 15 15 M_SB0_CK2 M_SB0_CK#2 AY35 DDR_B_CK_2 DDR_B_DQ_29 M_B_DQ30 M_B_DQ50
AY29 AU21 15 M_SB0_CK#2 AP26
M_SA0_CK2 AU37 DDR_A_CKB_1 DDR_A_DQ_28 M_A_DQ29 M_A_DQ49 DDR_B_CKB_2 DDR_B_DQ_30 M_B_DQ31 M_B_DQ51
15 M_SA0_CK2 AT21 AT31 AR29
M_SA0_CK#2 AV37 DDR_A_CK_2 DDR_A_DQ_29 M_A_DQ30 M_A_DQ50 DDR_B_CK_3 DDR_B_DQ_31 M_B_DQ52
15 M_SA0_CK#2 AR24 AU31
M_SA1_CK3 AU33 DDR_A_CKB_2 DDR_A_DQ_30 M_A_DQ31 M_A_DQ51 M_SB1_CK4 AP31 DDR_B_CKB_3 M_B_DQS4 M_B_DQ53
T113 AU24 T125 AR38
M_SA1_CK#3 AT33 DDR_A_CK_3 DDR_A_DQ_31 M_A_DQ52 M_SB1_CK#4 AP30 DDR_B_CK_4 DDR_B_DQS_4 M_B_DQS#4 M_B_DQ54
T114 T119 AR37
DDR_A_CKB_3 M_A_DQS4 M_A_DQ53 DDR_B_CKB_4 DDR_B_DQSB_4 M_B_DM4 M_B_DQ55
AT30 AH43 AW37 AU39 M_B_DQ[56..63] 15
DDR_A_CK_4 DDR_A_DQS_4 M_A_DQS#4 M_A_DQ54 DDR_B_CK_5 DDR_B_DM_4 M_B_DQ56
AR30 AH42 AV35
M_SA1_CK5 AW38 DDR_A_CKB_4 DDR_A_DQSB_4 M_A_DM4 M_A_DQ55 DDR_B_CKB_5 M_B_DQ32 M_B_DQ57
T109 AK42 M_A_DQ[56..63] 15 AR36
M_SA1_CK#5 AY38 DDR_A_CK_5 DDR_A_DM_4 M_A_DQ56 DDR_B_DQ_32 M_B_DQ33 M_B_DQ58
T107 AU38
DDR_A_CKB_5 M_A_DQ32 M_A_DQ57 DDR_B_DQ_33 M_B_DQ34 M_B_DQ59
AL41 AN35
DDR_A_DQ_32 DDR_B_DQ_34

In
AK43 M_A_DQ33 M_A_DQ58 AN37 M_B_DQ35 M_B_DQ60
DDR_A_DQ_33 M_A_DQ34 M_A_DQ59 DDR_B_DQ_35 M_B_DQ36 M_B_DQ61
AG42 AV39
DDR_A_DQ_34 M_A_DQ35 M_A_DQ60 DDR_B_DQ_36 M_B_DQ37 M_B_DQ62
AG44 AW39
DDR_A_DQ_35 M_A_DQ36 M_A_DQ61 DDR_B_DQ_37 M_B_DQ38 M_B_DQ63
AL42 AU40
DDR_A_DQ_36 M_A_DQ37 M_A_DQ62 DDR_B_DQ_38 M_B_DQ39
AK44 AU41 M_B_DM[0..7] 15
DDR_A_DQ_37 M_A_DQ38 M_A_DQ63 M_SA_CS#1 DDR_B_DQ_39 M_B_DM0
AH44 15 M_SA_CS#1 AR43
DDR_A_DQ_38 M_A_DQ39 M_A_A0 DDR3_A_CSB1 M_B_DQS5 M_B_DM1
AG41 15 M_A_A0 BB40 AK34
DDR_A_DQ_39 M_A_WE# DDR3_A_MA0 DDR_B_DQS_5 M_B_DQS#5 M_B_DM2
15 M_A_WE# AT44 AL34
M_A_DQS5 M_SB_ODT3 DDR3_A_WEB DDR_B_DQSB_5 M_B_DM5 M_B_DM3
AD43 T6 AV40 AL37
DDR_A_DQS_5 M_A_DQS#5 H_DRAMPWRGD DDR3_B_ODT3 DDR_B_DM_5 M_B_DM4
AE42 11 H_DRAMPWRGD AR6
DDR_A_DQSB_5 M_A_DM5 M_DDR3_DRAMRST# DDR3_DRAM_PWROK M_B_DQ40 M_B_DM5
AE45 BC24 AL35

i-
DDR_A_DM_5 M_A_DM0 M_A_DM[0..7] 15 15 M_DDR3_DRAMRST# DDR3_DRAMRSTB DDR_B_DQ_40 M_B_DQ41 M_B_DM6
AL36
M_A_DQ40 M_A_DM1 DDR_B_DQ_41 M_B_DQ42 M_B_DM7
AF43 AK36
DDR_A_DQ_40 M_A_DQ41 M_A_DM2 DDR_B_DQ_42 M_B_DQ43
AF42 AJ34
DDR_A_DQ_41 M_A_DQ42 M_A_DM3 TP_MCH_AN29 DDR_B_DQ_43 M_B_DQ44
AC44 T131 AN29 AN39 M_B_DQS[0..7] 15
DDR_A_DQ_42 M_A_DQ43 M_A_DM4 TP_MCH_AN30 RSVD_01 DDR_B_DQ_44 M_B_DQ45 M_B_DQS0
AC42 T127 AN30 AN40
DDR_A_DQ_43 M_A_DQ44 M_A_DM5 TP_MCH_AJ33 RSVD_02 DDR_B_DQ_45 M_B_DQ46 M_B_DQS1
AF40 T112 AJ33 AK37
DDR_A_DQ_44 M_A_DQ45 M_A_DM6 TP_MCH_AK33 RSVD_03 DDR_B_DQ_46 M_B_DQ47 M_B_DQS2
AF44 T102 AK33 AL39
DDR_A_DQ_45 M_A_DQ46 M_A_DM7 RSVD_04 DDR_B_DQ_47 M_B_DQS3
AD44
DDR_A_DQ_46 M_A_DQ47 M_B_DQS6 M_B_DQS4
AC41 AF37
DDR_A_DQ_47 DDR_B_DQS_6 M_B_DQS#6 M_B_DQS5
DDR_Channel_A DDR_B_DQSB_6
AF36
M_A_DQS6 M_B_DM6 M_B_DQS6
DDR_A_DQS_6
DDR_A_DQSB_6
DDR_A_DM_6
Y43
Y42
AA45
M_A_DQS#6
M_A_DM6 M_A_DQS0
is M_A_DQS[0..7] 15 DDR_Channel_B
DDR_B_DM_6

DDR_B_DQ_48
AJ35

AJ38 M_B_DQ48
M_B_DQS7

M_A_DQS1 AJ37 M_B_DQ49


B M_A_DQ48 M_A_DQS2 DDR_B_DQ_49 M_B_DQ50 M_B_DQS#0 M_B_DQS#[0..7] 15 B
AB43 AF38
DDR_A_DQ_48 M_A_DQ49 M_A_DQS3 V_SM DDR_B_DQ_50 M_B_DQ51 M_B_DQS#1
AA42 AE37
DDR_A_DQ_49 M_A_DQ50 M_A_DQS4 DDR_B_DQ_51 M_B_DQ52 M_B_DQS#2
W42 AK40
DDR_A_DQ_50 M_A_DQ51 M_A_DQS5 R38 DDR_B_DQ_52 M_B_DQ53 M_B_DQS#3
W41 AJ40
DDR_A_DQ_51 M_A_DQ52 M_A_DQS6 1K DDR_B_DQ_53 M_B_DQ54 M_B_DQS#4
AB42 AF34
DDR_A_DQ_52 M_A_DQ53 M_A_DQS7 0402 DDR_B_DQ_54 M_B_DQ55 M_B_DQS#5
AB44 AE35
DDR_A_DQ_53 M_A_DQ54 1% DDR_B_DQ_55 M_B_DQS#6
Y44
DDR_A_DQ_54
kn

Y40 M_A_DQ55 I AB35 M_B_DQS7 M_B_DQS#7


DDR_A_DQ_55 DDR_B_DQS_7 M_B_DQS#7
M_A_DQS#[0..7] 15 AD35
M_A_DQS7 M_A_DQS#0 DDR_VREF DDR_B_DQSB_7 M_B_DM7
T44 BB44 AD37
DDR_A_DQS_7 M_A_DQS#7 M_A_DQS#1 DDR_VREF DDR_B_DM_7
DRAM_PWROK generated circuit T43
DDR_A_DQSB_7 M_A_DM7 M_A_DQS#2 MCH_DDR_RPD AY42 M_B_DQ56
T42 AD40
DDR_A_DM_7 M_A_DQS#3 R37 C21 C22 MCH_DDR_RPU BA43 DDR_RPD DDR_B_DQ_56 M_B_DQ57
AD38
M_A_DQ56 M_A_DQS#4 MCH_DDR_SPD BC43 DDR_RPU DDR_B_DQ_57 M_B_DQ58
V42 1K 0.1U 1000P AB40
V_SM DDR_A_DQ_56 M_A_DQ57 M_A_DQS#5 MCH_DDR_SPU BC44 DDR_SPD DDR_B_DQ_58 M_B_DQ59
U45 0402 0402 0402 AA39
DDR_A_DQ_57 M_A_DQ58 M_A_DQS#6 DDR_SPU DDR_B_DQ_59 M_B_DQ60
R40 AE36
DDR_A_DQ_58 M_A_DQ59 M_A_DQS#7 I I I DDR_B_DQ_60 M_B_DQ61
P44 AE39
R480 DDR_A_DQ_59 M_A_DQ60 1% X7R X7R DDR_B_DQ_61 M_B_DQ62
V44 AB37
Te

10K DDR_A_DQ_60 M_A_DQ61 10V 50V DDR_B_DQ_62 M_B_DQ63


V43 AB38
0402 DDR_A_DQ_61 M_A_DQ62 4 OF 9 DDR_B_DQ_63
R41
5% DDR_A_DQ_62 M_A_DQ63
R44
I 3 OF 9 DDR_A_DQ_63 EAGLELAKE_FCBGA1254
H_DRAMPWRGD Critical
EAGLELAKE_FCBGA1254 I
Critical
C479 I
1U
5V_LDO
0402
w.

I R429 249 MCH_DDR_SPD R433 80.6 MCH_DDR_SPU R434 80.6 MCH_DDR_RPU


X5R V_SM V_SM
I 1% 0402 I 1% 0402 I 1% 0402
6.3V R481
1K R427 80.6 MCH_DDR_RPD C357 C443
0402 I 1% 0402 1U 0.01U
3

I 0402 0402
5% I I
Q42_D 2 I X7R X7R
3

6.3V 25V
ww

Q42 Q41
A ME2N7002E ME2N7002E A
R482 1K Q42_G 2 SOT23-3
250mA
1

11,29,30,36 SLP_S4#
I 5% 0402 60V
SOT23-3 250mA
I
60V
1

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
NB (3/5)- DDRIII
Date: Friday, March 05, 2010 Sheet 8 of 40
5 4 3 2 1
5 4 3 2 1

V_1P1_CORE U3F V_FSB_VTT


U3G
EAGLELAKE_DDR3
V_1P1_CL_MCH V_SM
09
EAGLELAKE_DDR3 V_1P1_CORE SYM_REV = 1.5GC
SYM_REV = 1.5GC R22 AA32
VTT_FSB_36 VCC_CL_24 C382
AA19 U23 R24 AA33
VCC_01 VCC_76 C414 C413 VTT_FSB_35 VCC_CL_23 0.1U
AA21 U22 R23 AB32
C463 C366 VCC_02 VCC_75 1U 1U VTT_FSB_34 VCC_CL_22 0402 C420 C41 C50 C42 C49 C458
AA23 U21 R21 AB33
22U 22U VCC_03 VCC_74 0603 0603 VTT_FSB_32 VCC_CL_21 10V
AA25 T29 R20 AD32 2.2U 2.2U 2.2U 2.2U 2.2U 2.2U
0805 0805 VCC_04 VCC_73 10V 10V VTT_FSB_31 VCC_CL_20 X7R
AA27 T27 P24 AD33 0603 0603 0603 0603 0603 0603
6.3V 6.3V VCC_05 VCC_72 X7R X7R VTT_FSB_30 VCC_CL_19 I
AA29 T26 P22 AE32
X5R X5R VCC_06 VCC_71 I I VTT_FSB_29 VCC_CL_18 I I I I I I
AA30 T25 P21 AE33
I I VCC_07 VCC_70 VTT_FSB_28 VCC_CL_17 X5R X5R X5R X5R X5R X5R
AB20 T24 P20 AF32
VCC_08 VCC_69 VTT_FSB_27 VCC_CL_16 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V

m
AB22 T21 N22 AJ32 Close to GMCH
C453 C398 VCC_09 VCC_66 VTT_FSB_26 VCC_CL_15
D AB24 R29 N21 AK31 D
22U 22U VCC_10 VCC_65 C447 C448 VTT_FSB_25 VCC_CL_14
AB26 R27 N20 AL30

Host Bus Power


0805 0805 VCC_11 VCC_64 1U 1U VTT_FSB_24 VCC_CL_13
AB29 R26 M22 AM15
I I VCC_12 VCC_63 0603 VTT_FSB_23 VCC_CL_12 V_1P1_CL_MCH
AB30 R25 0603 M21 AM16
VCC_13 VCC_62 VTT_FSB_22 VCC_CL_11

co
X5R X5R AC16 AJ25 10V I L22 AM17
6.3V 6.3V VCC_14 VCC_61 X7R VTT_FSB_21 VCC_CL_10 C385 C386
AC17 AJ23 L21 AM20
VCC_15 VCC_60 I X7R VTT_FSB_20 VCC_CL_09
AC19 W25 K22 AM21 10U 10U

Core Power

Core Power
VCC_16 VCC_85 10V VTT_FSB_19 VCC_CL_08
AC21 W23 K21 AM22 0805 0805
VCC_17 VCC_84 C426 VTT_FSB_18 VCC_CL_07 C421 C428 C390 C475
AC23 W21 J22 AM24
C381 C379 VCC_18 VCC_83 C425 1U VTT_FSB_17 VCC_CL_06 I I
AC25 W19 J21 AM25 0.1U 0.22U 0.22U 22U
10U 10U VCC_19 VCC_82 1U 0603 VTT_FSB_16 VCC_CL_05 X5R X5R
AC27 U29 H22 AM26 0402 0402 0402 0805
0805 0805 VCC_20 VCC_81 0603 10V VTT_FSB_15 VCC_CL_04 6.3V 6.3V
AC29 U27 H21 AM29
6.3V 6.3V VCC_21 VCC_80 10V X7R VTT_FSB_14 VCC_CL_03 I I I I
AD16 U26 G22 AP1
X5R X5R VCC_22 VCC_79 X7R I VTT_FSB_13 VCC_CL_28 X7R X5R X5R X5R
AD17 U25 G21 AP2
VCC_23 VCC_78 VTT_FSB_12 VCC_CL_27

a.
I I AD20 U24 I F22 Y32 10V 6.3V 6.3V 6.3V
VCC_24 VCC_77 VTT_FSB_11 VCC_CL_26
AD22 T23 F21 Y33
C400 C454 VCC_25 VCC_97 VTT_FSB_10 VCC_CL_25
AD24 T22 E23 Y31
10U 10U VCC_26 VCC_96 V_1P1_CORE VTT_FSB_09 VCC_CL_80
AD26 Y26 D24 AA31
0805 0805 VCC_27 VCC_91 VTT_FSB_08 VCC_CL_79
AD29 Y24 D23 AB31 Close to GMCH
6.3V 6.3V VCC_28 VCC_90 VTT_FSB_07 VCC_CL_78
X5R X5R
AE16
VCC_29 POWER VCC_89
Y22 D22
VTT_FSB_06 VCC_CL_77
AC31
AE17 Y20 JS8 DFS_0805 C26 AD31
I I VCC_30 VCC_88 NOBOM VTT_FSB_05 VCC_CL_76 V_FSB_VTT
AE19 W29 C24 AE31
VCC_31 VCC_87 VTT_FSB_04 VCC_CL_75
AE21 W27 B26 AF31
VCC_32 VCC_86 VTT_FSB_03 VCC_CL_74
AE23 B25 AG30

si
VCC_33 VTT_FSB_02 VCC_CL_73
AE25 V_1P1_CORE A25 AG31
C417 C451 VCC_34 VTT_FSB_01 VCC_CL_72
AE27 L3 AJ30
VCC_35 VCC_EXP_43 VCC_CL_71 C415 C438 C427 C439 C397 C422
10U 10U AE29 H4 AJ31
VCC_36 VCC_EXP_44 VCC_CL_70
0805 0805 AF16 F9 AK16 10U 2.2U 2.2U 2.2U 1U 0.1U
VCC_37 VCC_EXP_45 VCC_CL_69
AF17 AF3 AK17 0805 0603 0603 0603 0603 0402
I I VCC_38 VCC_EXP_39 V_1P1_CORE_EXP VCC_CL_68
X5R X5R
AF19
VCC_39 VCC_EXP_40
AC4 POWER VCC_CL_67
AK19
I I I I I I
AF20 AB14 C472 C473 C474 AK20
6.3V 6.3V VCC_40 VCC_EXP_31 2.2U 2.2U 2.2U VCC_CL_66 X5R X5R X5R X5R X7R X7R
AF21 AA15 AK21
VCC_41 VCC_EXP_32 0603 0603 0603 VCC_CL_65 6.3V 6.3V 6.3V 6.3V 10V 10V
AF22 AA14 AK22
C434 C429 VCC_42 VCC_EXP_33 I I I VCC_CL_64
AF23 V4 AK23

ne
0.1U 0.1U VCC_43 VCC_EXP_41 X5R X5R X5R VCC_CL_63
AF24 P3 AK24
0402 0402 VCC_44 VCC_EXP_42 6.3V 6.3V 6.3V VCC_CL_62
AF25 AE15 AK25
10V 10V VCC_45 VCC_EXP_26 VCC_CL_61
AF26 AE14 AK26
X7R X7R VCC_46 VCC_EXP_27 VCC_CL_60
AF27 AD15 AK27
C I I VCC_47 VCC_EXP_28 VCC_CL_59 C
AF29 AD14 AK29
VCC_48 VCC_EXP_29 VCC_CL_58
AG16 AC15 AK30
VCC_49 VCC_EXP_30 V_SM VCC_CL_57
AG17 AJ11 AL1
VCC_50 VCC_EXP_17 VCC_CL_56
AG20 AJ10 AL10
VCC_51 VCC_EXP_18 C468 C465 C470 VCC_CL_48
AG22 AG15 BE36 AL11
VCC_52 VCC_EXP_23 VCC_SM_15 VCC_CL_47
PCIE and DMI Power

C446 C404 AG24 AF15 0.1U 0.1U 0.1U BE31 AL12

do
VCC_53 VCC_EXP_24 VCC_SM_14 VCC_CL_46

Controller Link Aux Power


0.1U 0.1U AG26 AF14 0402 0402 0402 BE27 AL14
VCC_54 VCC_EXP_25 VCC_SM_13 VCC_CL_45
0402 0402 AG29 AJ7 BE23 AL15
VCC_55 VCC_EXP_21 NI NI NI VCC_SM_12 VCC_CL_44
AJ16 AJ6 BD38 AL16
I I VCC_56 VCC_EXP_22 X7R X7R X7R VCC_SM_11 VCC_CL_43
AJ17 AJ14 BD34 AL17
X7R X7R VCC_57 VCC_EXP_14 10V 10V 10V VCC_SM_10 VCC_CL_42
AJ19 AJ13 BD29 AL19
10V 10V VCC_58 VCC_EXP_15 VCC_SM_09 VCC_CL_41
AJ21 AJ12 BD25 AL2
VCC_59 VCC_EXP_16 VCC_SM_08 VCC_CL_55
AJ2 BD21 AL20
VCC_EXP_2 VCC_SM_07 VCC_CL_40
AJ1 BB39 AL21
VCC_EXP_1 VCC_SM_06 VCC_CL_39

System Memory Power


Y15 BA41 AL22
VCC_EXP_34 VCC_SM_05 VCC_CL_38

In
Y14 AY40 AL23
VCC_EXP_35 VCC_SM_04 VCC_CL_37
W15 AV44 AL24
VCC_EXP_36 VCC_SM_03 VCC_CL_36
U15 AT45 AL25
VCC_EXP_37 VCC_SM_02 VCC_CL_35
U14 AP44 AL26
VCC_EXP_38 VCC_SM_01 VCC_CL_34
AK9 AL27
VCC_EXP_10 VCC_CL_33
AK8 AL29
VCC_EXP_11 VCC_CL_32
AK7 AL4
VCC_EXP_12 VCC_CL_54
AK6 AL5
VCC_EXP_13 VCC_CL_53
AK13 AL6
VCC_EXP_06 VCC_CL_52
AK12 AL7
VCC_EXP_07 VCC_CL_51

i-
AK11 AL8
VCC_EXP_08 VCC_CL_50
VCC_EXP_09
AK10
VCC_CL_49
AL9 SKU G45 P43
VCCDPLL_EXP AJ9 AM2
VCCDPLL_EXP B12 VCC_EXP_19 VCC_CL_31
V_1P1_CL_MCH AJ8 AM3
0 I R438 VCCD_HPLL VCCDPLL_EXP VCC_EXP_20 VCC_CL_30
U33
VCCD_HPLL VCC_EXP_5
AK4
VCC_CL_29
AM4 GMCH_CORE 1.125V 1.1V
VCCAPLL_EXP 5% 0402 VCCAPLL_EXP B16 AK3 AJ15 Close to each pins
VCCAPLL_EXP VCC_EXP_4 VCC_CL_02
AK2 AK14
VCCA_HPLL VCC_EXP_3 VCCAVRM_EXP: 1.125V for G45/G43 VCC_CL_01
B22 AJ27
VCCA_HPLL
VCCA_MPLL VCCA_MPLL A21
VCCA_HPLL V_1P1_CL_MCH 0 R479 V_1P1_CORE VCC_CL_82
AJ29 NB Power Status and max current table
VCCA_DPLLA VCCA_MPLL 0402 5% I VCC_CL_81
VCCA_DPLLA D20 POWER PLANE S0 S3 S4/S5 Voltage I(max) Note
VCCA_DPLLA

B
VCCA_DPLLB
0402 0 NI 5% R478
VCCA_DPLLB C20

U3_AR2 AR2
VCCA_DPLLB VCCAVRM_EXP
VCC_94
AG2 U3_AG2
W31
Y30
C478
4.7U
EV@0
0402
5% NI R460
is System Memory +1.5VSUS_SM_CLK VCC_SM O O X 1.5VSUS 1963mA B
V_1P5_ICH VCC3_HDA VCC_92
0402 0 I 5% R459 U3_E19 E19 Y29 0603 CLK Power L23 O O X
VCC3 VCC3_3 VCC_93 VCCA_DAC
VCC_SMCLK 1.5VSUS 288mA
6.3V D19 AK32 V_SM
6 OF 9 X5R VCCA_DAC_01 VCC_SMCLK_04 C399
B19 AL31 VCC_EXP O X X GMCH_CORE 3082mA SDVO, PCIE, DMI
I VCCA_EXP VCCA_DAC_02 VCC_SMCLK_03 C384 22U 1UH
A17 AL32
R476 EAGLELAKE_FCBGA1254 L46 VCCA_EXP VCC_SMCLK_02 0805 500mA
AM31 0.1U VCCA_EXP O X X VCC1.5 6mA SDVO, PCIE Analog
Critical L46_2 R458 1 U3_B20 VCC_SMCLK_01 6.3V 2518
0 V_1P5_ICH B20 0402
I PBY160808T-601Y-N I 1% 0402 VCCDQ_CRT X5R I
0402 B17 AM30 VTT_FSB O X X VCC1.2 914mA
kn

V_1P1_CORE 1A C449 VSS_369 VCCCML_DDR I I 20%


I 600 ohm 7 OF 9 X7R 0.065 ohm max
1U L25 VCC O X X GMCH_CORE 17984mA
5% VCCA_DPLLB 0603 10V
V_1P1_CORE L28 0603
EAGLELAKE_FCBGA1254 U3_AM30 O X X
VCCA_DPLLA I I V_1P1_CL_MCH VCC_CL GMCH_CORE 4666mA
Critical
L27 X7R I O X X
0.1UH VCC3_3 VCC3 14mA
10V
10UH + C477 250mA
450mA VCCA_DAC O X X VCC3 74mA
220U C471 0805
10UH + C481 1210 0.1U I O X X
Te

450mA C476
18 mohm V_1P1_CL_MCH VCCDQ_CRT VCC1.5 0mA
220U I 7343 0402 10%
1210 0.1U O X X
18 mohm 10% I I VCCAPLL_EXP VCC1.1 20mA
I 7343 0402 0.39 ohm max 20% X7R VCCA_MPLL
10% I I L26 VCCDPLL_EXP O X X VCC1.1 X
6.3V 10V
0.39 ohm max 20% X7R
VCCA_DPLLA O X X VCC1.1 59mA
6.3V 10V
2.2UH VCCA_DPLLB O X X VCC1.1 59mA
150mA
w.

V_1P1_CORE V_1P1_CL_MCH VCCA_HPLL O X X VCC1.1 31mA


0805 R446 R445
VCCDPLL_EXP I 1 1
L21 VCCA_HPLL VCCD_HPLL O X X VCC1.1 X
30% 0402 0402 VCCA_DAC R464 1 0402 L47_2
L24
L21_2 R428 1 0402 I 1% L47 O X X
0.364 ohm max I I VCCA_EXP R505_1
VCCA_MPLL VCC1.1 83mA
I 1% R495 1 0402 R505 40.2 VCC3
C356 C355 1% 1% I 1% I 1% 0603 PBY160808T-601Y-N
1UH 0.1U 10U 1A
60mA R431 1 0603 0805 270NH C392 C393 600 ohm
0805 I 1% 0402 I I 50mA 2.2U 0.1U R697 C717 0603
ww
C387_1

A I X7R X5R 0603 0603 0402 39.2 1U I A


30% 16V 6.3V I 0603 0603
I I
0.1 ohm typ 10% X5R X7R I I
VCCAPLL_EXP 0.8 ohm max 6.3V 10V 1% X7R
L22
C387 10V
L22_2 R432 1 0402 10U
I 1% 0805
C367
1UH 0.1U C377 I
60mA 1 0603 10U X5R
0805 R435 I 0805 6.3V Quanta Computer Inc.
I I 1% 0402 X7R
16V I
30% X5R PROJECT : ZN5
0.1 ohm typ 6.3V Size Document Number Rev
X4
NB (4/5)- Power
Date: Friday, March 05, 2010 Sheet 9 of 40
5 4 3 2 1
A
B
C
D
EAGLELAKE_DDR3

W17 VSS_331 VSS_001 A12


F8 VSS_219 VSS_091 AJ22
BA23 BD43
VSS_180 VSS_371
W16 AJ24
VSS_330 VSS_092
AJ20 VSS_090 VSS_181 BA5
B34 VSS_179 VSS_002 A15
W1 AJ26

W24
W26
W44
W45
W5
Y10
Y11
Y12
Y13
Y16
Y17
Y19
Y2
Y21
Y23
Y25
Y27
Y3
Y35
Y39
Y9
L26
A3
L30
A43
L35
A6
B44
L39
L4
BC1
L8
BC45
L9
BD2
M1
BD44
BE3
M24
BE43
M25
M44
C1
C45
N11
F1
N13
N16
VSS_329 VSS_093
AH4 A19

I
VSS_089 VSS_003
U8 BB21

U3I
VSS_328 VSS_182
AH3 VSS_088 VSS_183 BB25

Critical
B29 VSS_178 VSS_004 A27

5
5

U44 AJ36

VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_259
VSS_368
VSS_260
VSS_366
VSS_261
VSS_367
VSS_365
VSS_262
VSS_263
VSS_361
VSS_264
VSS_360
VSS_265
VSS_359
VSS_266
VSS_358
VSS_357
VSS_267
VSS_356
VSS_268
VSS_269
VSS_364
VSS_363
VSS_270
VSS_362
VSS_271
VSS_272
VSS_327 VSS_094
B27 VSS_177 VSS_095 AJ39
AH2 VSS_087 VSS_184 BB28
B21 VSS_176 VSS_005 A31
AG5 AJ44

GND
VSS_086 VSS_096

9 OF 9
U39 VSS_326 VSS_185 BB6
AG45 A36

EAGLELAKE_FCBGA1254
VSS_085 VSS_006

SYM_REV = 1.5GC
B10 VSS_175 VSS_186 BD12
U36 A40

EAGLELAKE_DDR3
VSS_325 VSS_007
U20 AJ45

NC_17
NC_16
NC_15
NC_14
VSS_334
VSS_333
VSS_332
VSS_317
VSS_316
VSS_315
VSS_314
VSS_313
VSS_312
VSS_311
VSS_310
VSS_309
VSS_308
VSS_307
VSS_306
VSS_305
VSS_304
VSS_303
VSS_302
VSS_301
VSS_300
VSS_299
VSS_298
VSS_297
VSS_296
VSS_295
VSS_294
VSS_293
VSS_292
VSS_291
VSS_290
VSS_289
VSS_288
VSS_287
VSS_286
VSS_285
VSS_284
VSS_283
VSS_282
VSS_281
VSS_280
VSS_279
VSS_278
VSS_277
VSS_276
VSS_275
VSS_274
VSS_273
VSS_324 VSS_097
AY45 VSS_174 VSS_098 AK35
AG27 VSS_084 VSS_008 A8

T9
T8
T7
T6
T4
T3

U1
R8
R5
R2
N8

W2
AY30 BD17

T40
T38
T35
T33
T32
T31
T30
T20
T19
T17
T16
T13
T12
T11
T10
P31
P26
P25
P17
P16

R45
R38
R30
R19
R17
R16
R12
R11
N38
N36
N33
N30
N29
N26
VSS_173 VSS_187

W22
W20

AF30
AE30
AC30
AD30
AG25 VSS_083 VSS_099 AK38
U19 VSS_323 VSS_189 BD8
U17 VSS_322 VSS_009 AA1
AG23 VSS_082 VSS_190 BE10
AY25 VSS_172 VSS_010 AA11
AG21 VSS_081 VSS_100 AK39
AY21 VSS_171 VSS_191 BE15
U16 VSS_321 VSS_101 AL38
AG19 VSS_080 VSS_011 AA12
U13 VSS_320 VSS_012 AA13
AY16 VSS_170 VSS_192 BE19
AF7 VSS_079 VSS_102 AL44
AY15 VSS_169 VSS_013 AA16
U12 VSS_319 GND VSS_103 AL45
U11 BE21
ww
VSS_318 VSS_193
AF6 VSS_078 VSS_194 BE25
AY1 VSS_168 VSS_104 AN21
AW30 VSS_167 VSS_014 AA17
AF39 VSS_077 VSS_195 BE29
L20 VSS_258 VSS_015 AA20
L16 VSS_257 VSS_105 AN22
AW3 AA22

4
4

VSS_166 VSS_016
AF35 AN24
w.
VSS_076 VSS_106
AF33 BE34
VSS_075 VSS_196
L10 AA24
VSS_256 VSS_017
AW26 AN25
VSS_165 VSS_107
K45 BE40
VSS_255 VSS_197
AW24 AN26
VSS_164 VSS_108
AF13 AA26
VSS_074 VSS_018
K33 C16
VSS_254 VSS_372
AW22 AA34
Te
VSS_163 VSS_019
AF12 C3
VSS_073 VSS_199
AW20 AN33
VSS_162 VSS_109
AF11 AN36
VSS_072 VSS_110
K29 AA38
VSS_253 VSS_020
K24 C5
VSS_252 VSS_200
AW17 AN38
VSS_161 VSS_111
AF10 D11
VSS_071 VSS_201
K20 AA40
kn
VSS_251 VSS_021
AE8 AA44
VSS_070 VSS_022
AW11 AN7
VSS_160 VSS_112
K17 D16
VSS_250 VSS_202
AE44 AP20
VSS_069 VSS_113
AV9 AA8
VSS_159 VSS_023
AE40 D21
VSS_068 VSS_203
K13 D25
VSS_249 VSS_204
AV8 AP21
is
VSS_158 VSS_114
AV6 AB11
VSS_157 VSS_024
K11 AP22
VSS_248 VSS_115
AE38 AB12
VSS_067 VSS_025
AE34 D26
VSS_066 VSS_205
AV38 D39
VSS_156 VSS_206
J9 AP24
VSS_247 VSS_116
AV33 AB16
VSS_155 VSS_026
J8 AB17
i-
VSS_246 VSS_027
AE26 D6
VSS_065 VSS_207
AV30 AP25

3
3

VSS_154 VSS_117
AE24 AP29
VSS_064 VSS_118
J5 AB19
VSS_245 VSS_028
J4 D7
VSS_244 VSS_208
AV21 AB21
VSS_153 VSS_029
AE22 E3
VSS_063 VSS_209
AE20 AP45
In
VSS_062 VSS_119
J37 AB23
VSS_243 VSS_030
AV2 AR10
VSS_152 VSS_120
AV16 E31
VSS_151 VSS_210
AE13 AR11
VSS_061 VSS_121
J3 E41
VSS_242 VSS_211
AE12 AB25
VSS_060 VSS_031
H9 E5
VSS_241 VSS_212
AV15 AR13
do
VSS_150 VSS_122
AE11 AB27
VSS_059 VSS_032
AV13 AB34
VSS_149 VSS_033
H8 AR16
VSS_240 VSS_123
H7 F16
VSS_239 VSS_213
AV11 F2
VSS_148 VSS_214
AE1 VSS_058 VSS_124 AR26
AU9 VSS_147 VSS_034 AB36
H44 VSS_238 VSS_215 F30
ne
AD9 VSS_057 VSS_125 AR3
AD6 VSS_056 VSS_035 AB39
H38 VSS_237 VSS_126 AR31
AU6 VSS_146 VSS_036 AB4
AU5 VSS_145 VSS_216 F4
AD39 VSS_055 VSS_217 F42
H33 VSS_236 VSS_127 AR33
AU35 VSS_144 VSS_037 AB6
si
H31 VSS_235 VSS_128 AR35
AD36 VSS_054 VSS_218 F45
H30 VSS_234 VSS_038 AB7
AD34 VSS_053 VSS_039 AB8
AU30 G11
2
2

VSS_143 VSS_220
AD3 VSS_052 VSS_129 AR39
AU25 VSS_142 VSS_130 AR8
H25 VSS_233 VSS_040 AC20
a.
AU22 VSS_141 VSS_221 G17
H20 VSS_232 VSS_041 AC22
AD27 VSS_051 VSS_131 AR9
AD25 VSS_050 VSS_222 G24
AU20 VSS_140 VSS_132 AT1
H16 VSS_231 VSS_223 G26
AT35 VSS_139 VSS_042 AC24
H15 VSS_230 VSS_043 AC26
co
AD23 VSS_049 VSS_224 G29
H13 VSS_229 VSS_133 AT11
AT29 VSS_138 VSS_225 G3
AD21 VSS_048 VSS_134 AT13
m
AT24
H11
VSS_137
VSS_228
VSS_044
VSS_135
AC45
AT17
Size

Date:

AD19 VSS_047 VSS_226 G35


AD12 VSS_046 VSS_045 AC5
AT2 VSS_136 VSS_227 H1
I
U3H

Critical
8 OF 9

Document Number

Friday, March 05, 2010


NB (5/5)- VSS
SYM_REF = 1.5GC
EAGLELAKE_FCBGA1254

1
1

Sheet
10
PROJECT : ZN5

of
40
10

Quanta Computer Inc.


Rev
X4
A
B
C
D
5 4 3 2 1

RTC CRYSTAL
LDRQ0/1# : Internal PU 20K U4D ICH10 U1LB
Layout note:
DPRSTP# , Daisy Chain
(SB>Power>NB>CPU) ROM recovery 11
RISER_DET# J3 REV = 0.72 N7 ICH_BM_BUSY R282 5% 0 BM_BUSY#
LDRQ1B/GP23 GP0/BMBUSYB BM_BUSY# 26
C582 15P 50V CLK_32KX1 LAD0 K3 I 0402 R777 5% 0
19,22,26,29,30 LAD0 FWH0/LAD0

LPC
I 0402 COG LAD1 H1 NI 0402
19,22,26,29,30 LAD1 FWH1/LAD1

2
1
R576 LAD2 M7 A20 H_DRAMPWRGD_R R577 5% 0 H_DRAMPWRGD V_3P3_CL
19,22,26,29,30 LAD2 FWH2/LAD2 DRAMPWROK/GP8 H_DRAMPWRGD 8
Y5 10M LAD3 J1 A18 WOL_EN NI 0402 E16
19,22,26,29,30 LAD3 FWH3/LAD3 GP9/WOL_EN WOL_EN 35
32.768KHZ 0603 LDRQ#0 L6 C17 H_SKTOCC#_R R594 5% 0 SPI_CS0#_C 1 2 SPI_CS0#_R
26 LDRQ#0 LDRQ0B GP10/CPU_MISSING/JTAGTMS H_SKTOCC# 4,26,27
Critical 5% LFRAME# L5 A8 PM_LAN_ENABLE I 0402 SPI_MOSI_R 3
19,22,26,29,30 LFRAME# FWH4/LFRAMEB GP12 PM_LAN_ENABLE 21
I A19 EC_SCI# SPI_MISO_R 5 6
EC_SCI# 30
3
4
C588 15P 50V I CLK_32KX2 HDA_BIT_CLK_R GP13 LPC_SMI# SPI_CLK_R
AH3 A9 LPC_SMI# 26,29,30 7 8
I 0402 COG 10PPM HDA_RST#_R HDA_BIT_CLK GP14/JTAGTDI/QST_BMBUSYB
AJ1 C15 STPPCI# R600 5% 0 E16(1-2)

AUDIO

m
D HDA_RSTB STP_PCIB/GP15 PM_STPPCI# 3 D
ACZ_SDIN0 AK3 M2 PM_DPRSLPVR I 0402 PO@4P*2_4 Wall_2.54MM_ST_Black C276
27 ACZ_SDIN0 HDA_SDIN0 DPRSLPVR/GP16 T163
ACZ_SDIN1 AH4 K1 U4_K1 R629 5% 1K BBR# I 0.1U
T75 HDA_SDIN1 GP18 BBR# 13
ACZ_SDIN2 AH1 AF5 I 0402 0402
T164 HDA_SDIN2 GP20
ACZ_SDIN3 AJ3 A14 AUTO_PSI_DISABLE 10V
T162 HDA_SDIN3 GP24/MEM_LED AUTO_PSI_DISABLE 5,32

co
HDA_SDOUT_R AJ2 B18 STPCPU# I R591 5% 0 0402 X7R
HDA_SDOUT STP_CPUB/GP25 PM_STPCPU# 3
HDA_SYNC_R C11 ICH_GPIO26 I R623 5% 0 0402 PO@MINI_JUMP_2P_FM_2.54MM_BLACK I
RESET JUMP 14M_ICH
AK1
M5
HDA_SYNC S4_STATEB/GP26
A11 BOARD_ID0
S4_STATE_ICH# 26,27,29,31,34
I
3 14M_ICH CLK14 GP27 BOARD_ID0 13 V_3P3_CL
G18 BOARD_ID2 BOARD_ID2 13
GP28 U4_K2 I R642 5% 1K0402
K2 MXM_PWR_LEVEL 16
VCCRTC An RC delay circuit with a time delay in the range of GP32
AF6 U4_AF6 I R263 5% 1K0402 FDT_OVRD#
FDT_OVRD# 13
18 ms to 25 ms should be provided GP33 SPI_CS0# I R194 5% 15 0402 SPI_CS0#_C
If Intel LAN is not used, LAN_RSTB pull down 10k. AH5 HOOD_LOCK_DET
GP34 BOARD_REV0 R300 R301
L1 BOARD_REV0 13
R688 20K CLEAR_CMOS SATACLKREQB/GP35 1K 1K
21 GLAN_CLK F25 F16 AUDIO_AMP_DIS# 27
GLAN_CLK GP56

a.
0603 5% I E14 C12 TPM_PP 0402 0402
21 LAN_RSTSYNC LAN_RSTSYNC GP57/TPM_PP/JTAGTCK
SW50 LAN_PWROK C21 AD23 H_PWRGD 5% 5%
LAN_RSTB CPUPWRGD H_PWRGD 4,29
C649 G15 E21 ICH_LAN100SLP_EN I I

LAN
D46 21 LAN_RXD0 LAN_RXD0 LAN100_SLP
1U 1 3 21 LAN_RXD1 H14 LAN_RXD1 THRMB AK26 THERM# U19
D46_P C22 ICH_VRMPWRGD SPI_CS0#_R

SPI_HD#
0402 2 4 3VSB 21 LAN_RXD2 E13 ICH_VRMPWRGD 3,29 1 8
LAN_RXD2 VRMPWRGD CE# VDD
I 5 21 LAN_TXD0 F15 LAN_TXD0 MCH_SYNCB AH25 PM_SYNC#_ICH R187 5% 0 PM_SYNC# PM_SYNC# 7 SPI_CLK I R200 5% 15 0402 SPI_CLK_R 6 SCK
CLEAR CMOS F14 T3 ICH_PWRBT# I 0402 ICH_PWRBT# 26,30 SPI_MOSI I R184 5% 15 0402 SPI_MOSI_R 5 C266
X5R 1N4148WS 21 LAN_TXD1 LAN_TXD1 PWRBTNB SI
I G14 G19 ICH_RI# SPI_MISO I R296 1% 33 0402 SPI_MISO_R 7 2 0.1U
VCCRTC 200mA 21 LAN_TXD2 LAN_TXD2 RIB ICH_RI# 26 SO HOLD#
6.3V R1 HOOD_SW_DET# I R276 5% 0 0402 0402
SUS_STATB/LPCPD/GP61 SUS_CLK_SIO 26

si
DSM CLK_32KX1 A21 R5 SUSCLK I R275 5% 0 0402 R796 1K SPI_WP# 3 4 10V

RTC
RTCX1 SUSCLK/GP62 SUS_CLK_TPM 22 3VSB WP# VSS
I CLK_32KX2 B21 F19 SYS_RST# SYS_RST# 29 NI 5% 0402 X7R
R542 20K SRTC_RST# CLEAR_CMOS RTCX2 SYS_RESETB
75V A25 RTCRSTB PLTRSTB C14 PLTRST# PLTRST# 12,26,30
ICH_PWROK W25Q32 I
I 5% 0603 SRTC_RST# H20 E20 WAKE# WAKE# 26 SOIC8
C559 SRTCRSTB WAKEB
2

1
SMB_ALERT# C16 G21 HOOD_SENSE# 3VSB Critical
1U G2 SMBCLK_RESUME SMBALERTB/GP11/JTAGTDO INTRUDERB I
15,19,26 SMBCLK_RESUME H16 SMBCLK PWROK C25 ICH_PWROK_SB
0402 SMBDATA_RESUME F22 ICH_RSMRST# R565

MISC
SHORT_ PAD 15,19,26 SMBDATA_RESUME E16 SMBDATA RSMRSTB ICH_RSMRST# 26
I NI CTRL_GTLREF2 F18 E23 ICH_INTVRMEN 16 MXM_PWRGD 2 4 10K
4 CTRL_GTLREF2
1

LINKALERTB/GP60/JTAGRST INTVRMEN 3VSB

SMB
X5R SMB_CLK_ME A15 N8 SPKR 0402
SMLINK0 SPKR SPKR 13,27

ne
SMB_DATA_ME B15 5% U55
C 6.3V SMLINK1 SLP_S3#_R I R606 5% 0 0402 SLP_S3# U26 I I TC7SH08FU C
SLP_S3B A13 SLP_S3# 26,27,29,30

5
SPI_MOSI C26 B13 SLP_S4#_R I R608 5% 0 0402 SLP_S4# 74AHC1G125

SPI
SPI_MOSI SLP_S4B SLP_S4# 8,29,30,36
SPI_MISO B26 G17 SLP_S5#_R I R230 5% 0 0402 SLP_S5# R564 0 U55_2 2 I
SPI_MISO SLP_S5B/GPIO63 SLP_S5# 26
SPI_CS0# E25 F17 ICH_SLP_M# NI 5% 0402 4 ICH_PWROK
VCCRTC SPI_CS0B SLP_MB ICH_SLP_M# 29,35
SPI_CLK G23 T8 CK_PWRGD 7,26,29 PWRGD_140MS 1
SPI_CLK CK_PWRGD CK_PWRGD 3
F23 C13 GP72 R791 33
I R221 5% 1M 0402 HOOD_SENSE# SPI_CS1B GP72 H_DPRSTP#_R I R558 5% 0 0402 I 1% 0402
AK28 ICH_DPRSTP# 4,7

3
I R215 5% 330K 0402 ICH_INTVRMEN DPRSTPB H_DPSLP#_R I R177 5% 0 0402
DPSLPB AE24 H_DPSLP# 4

do
I R220 5% 330K 0402 ICH_LAN100SLP_EN F20 ICH_TP3
TP3 T60
ICH_PWROK_SB
I R260 5% 10K 0402 FDT_OVRD#
3VSB I R288 5% 10K 0402 BBR# ICH10 4OF6 IC 3VSB VCC3
I R607 5% 10K 0402 GP72 Critical 3VSB
I R224 5% 10K 0402 CTRL_GTLREF2 I R289 5% 10K 0402 ICH_BM_BUSY I
NI R597 5% 10K 0402 PLTRST# I R630 5% 8.2K 0402 HOOD_SW_DET#_R
VCC3 I R563 5% 8.2K 0402 THERM# P125 R586 R584 R575
I R274 5% 10K 0402 RISER_DET# 680 1K 1K

In
I R244 5% 2.2K 0402 SMBCLK_RESUME I R622 5% 10K 0402 LPC_SMI# HOOD_SW_DET# R117 5% 1K 0402 HOOD_SW_DET#_R 1 0402 0402 0402
I R235 5% 2.2K 0402 SMBDATA_RESUME I 2
HOOD_SENSE# I NI I ICH_VRMPWRGD
3
I R598 5% 10K 0402 SMB_CLK_ME I R621 5% 1K 0402 TPM_PP 5% 5% 5%
Disable TPM

3
I R602 5% 10K 0402 SMB_DATA_ME WOL function don't supported HOOD SENSOR I
I R595 5% 10K 0402 SMB_ALERT# I R2642 5% 13.3K 0402 HOOD_LOCK_DET Q57_C 2 Q56 C581
I R229 5% 10K 0402 ICH_RI# MMBT3904-7-F 1U

3
I R218 5% 10K 0402 SYS_RST# NI R196 5% 20K 0603 ICH_RSMRST# SOT23-3 R208 0603

1
VRMPWG R604 5% 0 R603_1 R603 10K Q57_B 2 Q57 40V 100K 10V
4,32 VRMPWG

i-
U19 ROM SOCKET I 0402 I 5% 0402 MMBT3904-7-F 200mA 0402 X7R
PROTO 200mA I I

1
I R601 5% 20K 0402 AUTO_PSI_DISABLE SLP_S3# R605 5% 0 I
3VSB SOT23-3 5%
I R285 5% 10K 0402 ICH_PWRBT# NI 0402
I R234 5% 10K 0402 WAKE# I
40V
B I R574 5% 10K 0402 H_DRAMPWRGD_R B

NI R620 5% 4.7K 0402 TPM_PP

HD Audio I/F(CODEC& iHDMI)


is 3VSB
HDA_BIT_CLK_R R632 33
BIT_CLK_AUDIO 27
5% 0402
HDA_SDOUT_R R639 33 I R637 R190
I 5% 0402
ACZ_SDOUT_AUDIO 27 0 RTC BATTERY 8.2K
0402 V_3P3_CL
0402
I I
kn
HDA_SYNC_R R636 33 5% BT1 Q29_C
ACZ_SYNC_AUDIO 27 5%
I 5% 0402 CR2032 ATTERY

3
Critical R195
C607_1

I Q28_C 2 Q29 20K


HDA_RST#_R R638 33 RTC Battery P/N: AHL03003002 MMBT3904-7-F R180 0603
ACZ_RST#_AUDIO 27
I 5% 0402 C607 200mA 1K

1
I

3
10P 0402
0402 ICH_RSMRST# R197 20K Q28_B 2 Q28 SOT23-3 5%
I I 5% 0603 I I
MMBT3904-7-F
3VSB 5%
Te

COG 40V LAN_PWROK


South Bridge Strap Pin (1/3) 200mA

1
50V
SOT23-3

3
R333 I Q30 C180
Pin Name Strap description Sampled Configuration PU/PD 200 40V ME2N7002E 0.22U
0402 VCCRTC R202 4.7K Q30_G 2
35 SLP_M_G_V3P3_CL 250mA 0603
5% I 5% 0402
0 = The Flash Descriptor Security will be overridden. SOT23-3 I
HDA_DOCK_EN/ Flash Descriptor Security This strap should only be enabled in manufacturing I
PWROK 1 = The security measures defined RTC_N03 D13 SS0540 40V I X7R
Override Strap environments using an external pull-up resistor.
GPIO33 in the Flash Descriptor will be in effect
w.

I DSM 500mA 60V 25V

1
RTC_N02 D12 SS0540 40V
A R327 I DSM 500mA A

PCI Express Lane Reversal 1K


SATALED# PWROK Internal PU 0402
(Lanes 1-4) 5% C299
I 1U
XBT1_1

0603
ICH_TP3 HDA_SDOUT Description I
TP3 XOR Chain Entrance
ww

PWROK ICH_TP3 R228 1K


0 0 RSVD NI 5% 0402 X7R Quanta Computer Inc.
1

10V
0 1 Enter XOR Chain XBT1
XOR Chain Entrance /PCI Express* CR2032-SOCKET
PROJECT : ZN5
HDA_SDOUT Port Config 1 bit 1(Port 1-4) PWROK 1 0 Normal opration(Default) HDA_SDOUT_R R633 3.3K +3V_HDA_IO_ICH Size Document Number Rev
2

NI 5% 0402 I X4
1 1 Set PCIE port config bit 1
SB (1/4)- HOST
Date: Friday, March 05, 2010 Sheet 11 of 40
5 4 3 2 1
5 4 3 2 1

PCI/PCI-E/USB/DMI/SPI
U4A ICH10 U1LB 12
E3 PAR AD0 C10
DEVSEL# C6 C8 Integrated 15K pull down
PCLK_ICH DEVSELB AD1 U4B ICH10U1LB
3 PCLK_ICH B3 PCICLK AD2 E9
19 PCIRST# PCIRST# R2 C9
IRDY# PCIRSTB AD3 DMI_TXN0 REV = 0.72 USB#0
J8 IRDYB AD4 A5 7 DMI_TXN0 W28 DMI0RXN USBP0N AD6 USB#0 24
R3 E12 DMI_TXP0 W26 AD5 USB0 USB1(Rear IO)
26 PME_IN# PMEB AD5 7 DMI_TXP0 DMI0RXP USBP0P USB0 24
SERR# K5 E10 DMI_RXN0 V30 AE3 USB#1
SERRB AD6 7 DMI_RXN0 DMI0TXN USBP1N USB#1 25
STOP# F10 B7 DMI_RXP0 V29 AE2 USB1 CAREMA

m
STOPB AD7 7 DMI_RXP0 DMI0TXP USBP1P USB1 25
LOCK# H8 B6 DMI_TXN1 AA26 AD1 USB#2
D PLOCKB AD8 7 DMI_TXN1 DMI1RXN USBP2N USB#2 24 D
TRDY# E6 PCI B4 DMI_TXP1 AA28 AD2 USB2 Dongle USB
PERR# TRDYB AD9 7 DMI_TXP1 DMI_RXN1 DMI1RXP USBP2P USB#3 USB2 24
F5 E7 Y30 AB6

DMI
PERRB AD10 7 DMI_RXN1 DMI1TXN USBP3N USB#3 19
FRAME# G12 A4 DMI_RXP1 Y29 AB5 USB3 TV CARD
FRAMEB AD11 7 DMI_RXP1 DMI1TXP USBP3P USB3 19

co
CTRL_GTLREF1 R265 10K H12 DMI_TXN2 AC26 AC3
VCC3 AD12 7 DMI_TXN2 DMI2RXN USBP4N
NI 5% 0402 F8 DMI_TXP2 AC28 AC2
AD13 7 DMI_TXP2 DMI2RXP USBP4P
C5 7 DMI_RXN2 DMI_RXN2 AB30 AB1 USB#5
GNT0# AD14 DMI_RXP2 DMI2TXN USBP5N USB5 USB#5 19
H5
GNT0B AD15
D2 7 DMI_RXP2 AB29
DMI2TXP USBP5P
AB2 USB5 19 WLAN CARD/BLUETOOTH
A7 E5 DMI_TXN3 AF26 Y6 USB#6
U4_C7 GNT1B/GP51 AD16 7 DMI_TXN3 DMI_TXP3 DMI3RXN USBP6N USB6 USB#6 24
T74 C7 G7 AE26 Y5 Bluetooh

USB
GNT2B/GP53 AD17 7 DMI_TXP3 DMI3RXP USBP6P USB6 24
4 CTRL_GTLREF1 CTRL_GTLREF1 F7 E11 7 DMI_RXN3 DMI_RXN3 AD29 AA3 USB#7
GNT3B/GP55 AD18 DMI_RXP3 DMI3TXN USBP7N USB7 USB#7 24
AD19
G10 7 DMI_RXP3 AD30
DMI3TXP USBP7P
AA2 USB7 24 USB2(Rear IO)
USB#8

a.
AD20 G6 USBP8N Y1 USB#8 24
D3 Y2 USB8 USB3(Rear IO)
AD21 USBP8P USB8 24
REQ0# K7 H6 V6 USB#9
REQ1# REQ0B AD22 USBP9N USB9 USB#9 24
G13 REQ1B/GP50 AD23 G5 21 PCIE_RX#6 D29 PERN6/GLAN_RXN USBP9P V5 USB9 24 USB4(Rear IO)
REQ2# F13 C1 D30 W2 USB#10
REQ3# REQ2B/GP52 AD24 21 PCIE_RX6 PERP6/GLAN_RXP USBP10N USB#10 24
13 BOOT_BLK_EN# R121 10K G8 C2 Giga LAN 21 PCIE_TX#6 I C171 0.1U 0402 X7R 10V PCIE_TX#6_CE26 W3 USB10 USB2(Side IO)
REQ3B/GP54 AD25 PETN6/GLAN_TXN USBP10P USB10 24
I 5% 0402 C3 21 PCIE_TX6 I C172 0.1U 0402 X7R 10V PCIE_TX6_C E28 V1 USB#11
AD26 PETP6/GLAN_TXP USBP11N USB11 USB#11 24
AD27 D1 P30 PERN1 USBP11P V2 USB11 24 USB1(Side IO)
J7 P29

si
INTA# AD28 PERP1 USBOC#0
J5 PIRQAB AD29 F3 R26 PETN1 OC0B/GP59 P5 USBOC#0 24
INTB# E1 G1 R28 N3 USBOC#1
INTC# PIRQBB AD30 PETP1 OC1B/GP40 USBOC#2
F1 PIRQCB AD31 H3 19 PCIE_RX#2 M30 PERN2 OC2B/GP41 P7 USBOC#2 24
INTD# A3 WLAN Card M29 R7 USBOC#3
INTE# PIRQDB 19 PCIE_RX2 PERP2 OC3B/GP42
K6 19 PCIE_TX#2 I C181 0.1U 0402X7R 10V PCIE_TX#2_C N26 N2 USBOC#4
PIRQEB/GP2 PETN2 OC4B/GP43

PCI-E
INTF# L7 19 PCIE_TX2 I C178 0.1U 0402X7R 10V PCIE_TX2_C N28 N1 USBOC#5
INTG# PIRQFB/GP3 PETP2 OC5B/GP29 USBOC#6
F2 PIRQGB/GP4 C/BE0B F11 19 PCIE_RX#3 K30 PERN3 OC6B/GP30 N5 USBOC#6 24
INTH# G2 G9 TV Card K29 M1 USBOC#7
PIRQHB/GP5 C/BE1B 19 PCIE_RX3 PERP3 OC7B/GP31 USBOC#7 24

ne
C4 19 PCIE_TX#3 I C551 0.1U 0402X7R 10V PCIE_TX#3_C L26 P3 USBOC#8
C/BE2B PETN3 OC8B/GP44 USBOC#8 24
E8 19 PCIE_TX3 I C552 0.1U 0402X7R 10V PCIE_TX3_C L28 R6 USBOC#9
C/BE3B PETP3 OC9B/GP45 USBOC#10 USBOC#9 24
23 PCIE_RX#4 H30 PERN4 OC10B/GP46 T7 USBOC#10 24
Card Reader H29 P1 USBOC#11
C 23 PCIE_RX4 PERP4 OC11B/GP47 USBOC#11 24 C
23 PCIE_TX#4 I C549 0.1U 0402X7R 10V PCIE_TX#4_C J26
I C550 0.1U 0402X7R 10V PCIE_TX4_C J28 PETN4 USBRBIAS_PN R631 22.6
23 PCIE_TX4 PETP4 USBRBIASB AG1
ICH10 REV = 0.72 F30 AG2 I 1% 0402
Critical 1OF6 PERN5 USBRBIAS
IC F29 PERP5
I G26 AG3 CLKUSB_48

do
PETN5 CLK48 CLKUSB_48 3
G28 PETP5

V_1P5_ICH R543 24.9 DMI_IRCOMP_R AF28


I 1% 0402 DMI_IRCOMP
AF30
DMI_ZCOMP DMI DEBUG HEADER
CLK_PCIE_ICH# U26 DMI_RXP0
3 CLK_PCIE_ICH# DMI_CLKN 2 1
PLTRST# R596 0 PLT_RST# CLK_PCIE_ICH U25 DMI_TXP0 DMI_RXN0
11,26,30 PLTRST# PLT_RST# 7 3 CLK_PCIE_ICH DMI_CLKP 4 3
I 5% 0402 DMI_TXN0
6 5

In
2OF6 DMI_RXP1
3VSB ICH10 DMI_TXP1 8 7 DMI_RXN1
3VSB 5VSB Critical DMI_TXN1 10 9
IC 12 11
I DMI_RXP2
R66 DMI_TXP2 14 13 DMI_RXN2
3VSB_USBOC 10K DMI_TXN2 16 15
R108 R81 0402 18 17 DMI_RXP3
I DMI_TXP3 20 19 DMI_RXN3
0 1K 22 21
5% DMI_TXN3

i-
0603 0603 24 23
I NI MXM_PRSNT 31 26 25
28 27

3
5% 1%
Q14 29
ME2N7002E P153
R83 2 250mA NI
16 MXM_PRSNT_L#
2K SOT23-3
0603
is NI
I
60V
DMI DEBUG HEADER

1
B 1% B

USBOC# PULL-UP
South Bridge Strap Pin (2/3) PCI PULL-UP
kn

RP14
REQ0# R283 8.2K USBOC#8 6 5 3VSB_USBOC
Pin Name Strap description Sampled Configuration PU/PD I 5% 0402 USBOC#11 7 4
IRDY# R720 8.2K USBOC#9 8 3 USBOC#0
I 5% 0402 USBOC#7 9 2 USBOC#2
PCI Express Port 0 = Default LOCK# R721 8.2K 10 1 USBOC#10
HDA_SYNC PWROK I 5% 0402 3VSB_USBOC
Config 1 bit 0 (Port 1-4) 1 = Setting bit 0 STOP# R722 8.2K 10K
Te

I 5% 0402 10P8R
INTB# R723 8.2K 5%
PCI Express Port 0 = Setting bit 2 I 5% 0402 NI
GNT2# / GPIO53 PWROK TRDY# R724 8.2K
Config 2 bit 2 (Port 5-6) 1 = Default I 5% 0402 USBOC#1 R797 10K 3VSB_USBOC
REQ1# R725 8.2K I 5% 0402
I 5% 0402 USBOC#5 R798 10K
0 = DMI for ESI-compatible REQ2# R726 8.2K I 5% 0402
GNT1# / GPIO51 ESI Strap(Server Only) PWROK
w.

I 5% 0402 USBOC#4 R799 10K


1 = Default DEVSEL# R727 8.2K VCC3 I 5% 0402
I 5% 0402 USBOC#3 R800 10K
FRAME# R728 8.2K I 5% 0402
0 = "top-block swap" mode I 5% 0402
GNT3# / GPIO55 Top-Block Swap Override PWROK CTRL_GTLREF1 R266 1K INTD# R729 8.2K
1 = Default NI 5% 0402 I 5% 0402
INTH# R730 8.2K
I 5% 0402
ww

A INTG# R731 8.2K USBOC#6 R110 10K A


3VSB_USBOC
I 5% 0402 I 5% 0402
INTC# R732 8.2K
I 5% 0402
PERR# R733 8.2K
PCI_GNT#0 SPI_CS#1 Boot Location R270 1K VCC3 I 5% 0402
GNT0# Boot BIOS Selection 0 PWROK NI 5% 0402 INTF# R734 8.2K
GNT0# R271 1K I 5% 0402
0 1 SPI(Default) I 5% 0402 SERR# R735 8.2K Quanta Computer Inc.
I 5% 0402
INTA# R736 8.2K
1 0 PCI I 5% 0402 PROJECT : ZN5
SPI_CS1# / INTE# R737 8.2K Size Document Number Rev
Boot BIOS Selection 1 CLPWROK
GPIO58 / CLGPIO6 I 5% 0402
SB (2/4) PCIE/PCI/USB/DMI X4
1 1 LPC
Date: Friday, March 05, 2010 Sheet 12 of 40
5 4 3 2 1
5 4 3 2 1

V_3P3_CL
24.9 Ohm pull up to 1.5V for
GLAN_COMPI/O is required, no
matter intel LAN is used or not.
V_1P5_ICH

R540 24.9 GLAN_COMP A29


U4C ICH10 U1LB

REV = 0.72 AK17 SATA_RX#0


13
GLAN_COMPO SATA0RXN SATA_RX#0 18
I 1% 0402 B29 AJ17 SATA_RX0 To SATA HDD
I GLAN_COMPI SATA0RXP SATA_RX0 18
CL_CLK0 G22 AK19 SATA_TX#0_C I C158 0.1U 0402 X7R 10V SATA_TX#0
1% 7 CL_CLK0 CL_CLK0 SATA0TXN SATA_TX#0 18
ICH_TP5 C18 AJ19 SATA_TX0_C I C159 0.1U 0402 X7R 10V SATA_TX0
0603 T153 TP5 SATA0TXP SATA_TX0 18
CL_DATA0 H21 AJ15 SATA_RX#1
3.24K 7 CL_DATA0 CL_DATA0 SATA1RXN SATA_RX#1 18
ICH_TP4 E19 AK15 SATA_RX1 To SATA ODD
R552 T61 TP4 SATA1RXP SATA_RX1 18
CL_VREF0_SB C27 AH16 SATA_TX#1
CL_VREF0 SATA1TXN SATA_TX#1 18
10V ICH_TP6 A16 AF16 SATA_TX1

SATA
T156 TP6 SATA1TXP SATA_TX1 18
X7R CL_PWROK T6 AJ13 SATA_RX#2
I 7 CL_PWROK CLPWROK SATA2RXN T158
I ICH_TP7 B16 AK13 SATA_RX2
T155 TP7 SATA2RXP T157

m
1% 0402 CL_RST# G20 AH14 SATA_TX#2
D 0402 7 CL_RST# CL_RST0B SATA2TXN T66 D
0.1U AF14 SATA_TX2
453 SATA2TXP T69
AJ11 SATA_RX#3
R553 C564 SATA3RXN T159
AK11 SATA_RX3
SATA3RXP T160
ICH10D_PWM0 AJ21 AF12 SATA_TX#3

co
26 ICH10D_PWM0 PWM0 SATA3TXN T71
U4_AJ2 AJ22 AH12 SATA_TX3
T151 PWM1 SATA3TXP T72
U4_AK22 AK22
T152 PWM2
SATA4RXN AJ9
R589 5% 0 U4_AH21 AH21 AK9 VCC3
25,26 SIO_FAN_SEN_FRONT TACH0/GP17 SATA4RXP
0 5% R585 NI 0402 U4_AK21 AK21 AF10
18 ODD_EJECT_SIG# TACH1/GP1 SATA4TXN
0402 I 16 MXM_TH_OVERT# I R573 5% 0 0402 U4_AH22 AH22 AH9
10V X7R 0402 0.1U C583 I R206 5% 0 0402 ICH_GPIO7 TACH2/GP6 SATA4TXP A20GATE R279 8.2K
16 MXM_TH_ALERT# AK23 TACH3/GP7
NI AJ7 I 5% 0402
U4_C19 SATA5RXN KBRST# R281 10K
C19 AK7

a.
T154 SST SATA5RXP
AF8 I 5% 0402
SATA5TXN
SATA5TXP AH7
AF18 CLK_PCIE_SATA#
VCC3 SATA_CLKN CLK_PCIE_SATA# 3
I R570 5% 10K FRONT_USB2_DET# AJ24 AF19 CLK_PCIE_SATA
SCLOCK/GP22 SATA_CLKP CLK_PCIE_SATA 3
0402 MXM_PRSNT# AK24
7,16 MXM_PRSNT# SLOAD/GP38
PASSWORD_EN AH23 AE7 ICH_SATA_LED#
SDATAOUT0/GP39 SATALEDB ICH_SATA_LED# 26
I R217 5% 2.7K FRONT_USB_DET# AD20 AK6
R280 10K SERIRQ 0402 GPIO49 SDATAOUT1/GP48 SATARBIASB SATA_RBIAS_PN 1%
AJ25 GP49 SATARBIAS AJ6
I 5% 0402 I

si
AK25 FRONT_AUDIO_DET# 0402
SATA0GP/GP21 BOARD_ID1
SATA1GP/GP19 AE20 24.9
R571 10K MXM_PRSNT# AE21 BOARD_REV1 SATA_RBIAS_PN<0.5".Avoid routing
NI 5% 0402 SATA2GP/GP36 EDID_ROM R626 next to clock/high speed signals
SATA3GP/GP37 AE22 EDID_ROM 20
AF22 SATAGP4
R277 10K ICH10D_PWM0 SATA4GP SATAGP5
SATA5GP AD21
I 5% 0402
P8 A20GATE A20GATE 26
A20GATE
AJ28 H_A20M#

HOST
A20MB H_A20M# 4

ne
VCC3
AC22 H_IGNNE#
C IGNNEB H_IGNNE# 4 C
M3 U4_M3
R231 INIT3_3VB T161
AE23 H_INIT#
10K INITB H_INIT# 4
AH27 H_INTR
INTR H_INTR 4
0402 AJ27 H_FERR#
FERRB H_FERR# 4
5% CPU_THERMTRIP#_ICH AF24 H_NMI CPU_THERMTRIP#_ICH R178 62 V_FSB_VTT
NMI H_NMI 4
NI L3 KBRST#
RCINB KBRST# 26
3

N6 SERIRQ 0402 VCC3


SERIRQ SERIRQ 22,26,29,30

do
Q35_B 2 Q35 AH26 H_SMI#_R R176 0 H_SMI#
SMIB H_SMI# 4 I
MMBT3904-7-F AJ29 H_STPCLK# I 5% 0402 5% 5% 5%
STPCLKB H_STPCLK# 4
3

200mA AD24 CPU_THERMTRIP#_ICH 5% I NI NI


CPU_THERMTRIP#_ICH 4,26
1

Q36 THRMTRIPB
SOT23-3 0402 0402 0402
ME2N7002E AC23 U4_AC23 C175
NI PECI T59 10K 10K 10K
MXM_TH_OVERT# 0 R237 Q36_G 2 250mA 0.1U
0402 5% NI 40V 0402 R258 R225 R619
SOT23-3 NI
NI 10V BOARD_ID0
11 BOARD_ID0
60V ICH10 3OF6 X7R BOARD_ID1

In
1

Critical IC BOARD_ID2 5% 5% 5%
11 BOARD_ID2
I NI I I
0402 0402 0402
10K 10K 10K
R262 R216 R617

i-
Clear Password Header R572 2010/01/08 modify for DVT
On: Enable 8.2K
0402 VCC3
Off: Disable 5%
I E49 I 2P*1_PH_2.54MM_ST_BLACK/HTP R59 301
PASSWORD_EN 1 2 PASSWORD_EN_UP VCC3 5% 5% 5% 5% 5% 5%
B 0402 1% I B
E14 I 2P*1_PH_2.54MM_ST_BLACK/HTP
NI I NI I I I
PCB REVISION ID
12 BOOT_BLK_EN#
BOOT_BLK_EN# 1 2 VCC3
is GPI can't not be floating
0402
10K
0402
8.2K
0402
8.2K
0402
10K
0402
10K
0402
10K BOARD REV[1:0] PHASE
E1 I 2P*1_PH_2.54MM_ST_BLACK/HTP R568 R635 R209 R210 R201 R268
11 FDT_OVRD#
FDT_OVRD# 1 2 00 ALL EVT
FRONT_AUDIO_DET#
E15 I 2P*1_PH_2.54MM_ST_BLACK/HTP
11 BOARD_REV0
BOARD_REV0 01 ALL DVT
BBR# BOARD_REV1
11 BBR# 1 2
10 PVT1
SATAGP4
11 PVT2+
kn

SATAGP5
R120 ICH_SATA_LED#
1K 5% 5% 5% 5% 5% 00 MCB,A
0402
I
I
0402
NI
0402
I
0402
NI
0402
NI
0402
01 1st Major ECN
5% 2.7K 2.7K 2.7K 10K 10K 10 2nd Major ECN
R566 R641 R213 R214 R205
11 3rd Major ECN
Te
w.

South Bridge Strap Pin (3/3)

A Pin Name Strap description Sampled Configuration PU/PD A

GPIO20 Reserved PWROK


ww

0 = Default
SPKR No Reboot PWROK
1 = No Reboot mode 11,27 SPKR
SPKR R284
NI 5%
1K
0402
VCC3 Quanta Computer Inc.
PROJECT : ZN5
0 = AC coupled Size Document Number Rev
DMI Termination 1 = DC coupled
GPIO49 PWROK GPIO49 R562 1K
SB(3/4) SATA/GPIO X4
Voltage Internal PU NI 5% 0402
Date: Friday, March 05, 2010 Sheet 13 of 40
5 4 3 2 1
5 4 3 2 1

14
D41 SS0540 40V 6.3V+SB_V5REF
VCC3 X5R
I DSM 500mA
I
0402
R625 10 1U
VCC C602 ICH10
I 1% 0603 U4E REV = 0.72

A6
V5REF
D42 SS0540 40V 6.3V +5V_STBY_ICH_V5REF_SUS AF1
3VSB X5R V5REF_SUS
I DSM 500mA U1LB
I ICH10
V_1P5_ICH H10 U4F
0402 VCC1_5_A_23 REV = 0.72
H11
R640 10 1U 6.3V 1U C217 I VCC1_5_A_24
5V_LDO AC11 H13 VSS_100 VSS_099 G30
I 1% 0603 C606 X5R 0402 VCC1_5_A_19 +VCCLAN1_1_INT_ICH I C599 0.1U 0402 X7R 10V VSS_100 VSS_099
AB23 A10 H19 G29
VCC1_5_A_22 VCCLAN1_1_1 VSS_101 VSS_098
AC18 B10 H2 G25
VCC1_5_A_20 VCCLAN1_1_2 VSS_102 VSS_097
AC20 AA7 V_1P5_ICH H22 G16

m
+VCCCL1_5_INT_ICH VCC1_5_A_21 VCC1_5_A_28 I C226 0.1U 0402 X7R 10V VSS_103 VSS_096
A26 AA8 H25 F9
D X7R X5R +3V_VCCSUSHDA VCCCL1_5 VCC1_5_A_29 VSS_104 VSS_095 D
AC9 AB7 H26 F6
10V 6.3V +3V_HDA_IO_ICH VCCSUSHDA VCC1_5_A_30 VSS_105 VSS_094
AC10 AB8 H28 F28
0402 0402 0 R278 +3V_VCCPCORE_ICH VCCHDA VCC1_5_A_31 I C188 0.1U0402 X7R 10V I C220 1U 0402 X5R 6.3V VSS_106 VSS_093
VCC3 AD10 T1 H9 F26
0.1U 1U 0603 5% I VCC3_3_03 VCC1_5_A_32 VSS_107 VSS_092
AC19 J29 F21
VCC3_3_04 VSS_108 VSS_091

co
C567 I C568 I 0 R627 AC21 AC14 J30 F12
V_1P5_ICH VCC3_3_05 VCC1_5_A_25 VSS_109 VSS_090
V_1P5_ICH 0 R255 C233 0603 5% I AF21 AC15 J6 E30
0603 5% NI VCC3_3_06 VCC1_5_A_26 I C213 0.1U0402 X7R 10V VSS_110 VSS_089
0.1U AH24 AC16 K26 E29
C604 0.1U0402 I +1.5V_USB_ICH AK5 VCC3_3_07 VCC1_5_A_27 VSS_111 VSS_088
3VSB 0402 K28 E22
X7R 10V VCCUSBPLL VSS_112 VSS_087
A24 L2 E2
I +1.5V_APLL_ICH VCC1_1_01 VSS_113 VSS_086
AK20 B24 L23 E18
X7R VCCSATAPLL VCC1_1_02 VSS_114 VSS_085
C24 L29 E15
C250 C598 C600 10V +1.5V_ICH_VCCDMIPLL VCC1_1_03 +1.1V_ICH R513 0 VSS_115 VSS_084
T30 E24 V_1P1_ICH L30 D28
VCCDMIPLL VCC1_1_04 C196 C206 C197 I 5% 0805 VSS_116 VSS_083
1U 1U 0.1U F24 M14 B8
+1.5V_ICH_GLANPLL_R VCC1_1_05 0.022U 0.1U 0.1U VSS_117 VSS_082
0402 0402 0402 A28 G24 M16 B5
VCCGLANPLL VCC1_1_06 0402 0402 0402 VSS_118 VSS_081
H23 M26 B28

a.
NI NI I 5% I 0603 0 R634 +3VM_3V_STBY_ICH AF2 VCC1_1_07 I I I VSS_119 VSS_080
3VSB H24 M28 B25
X5R X5R X7R 5% NI 0603 0 R291 VCCSUS3_3_01 VCC1_1_08 ICH_CPU_IO X7R X7R X7R VSS_120 VSS_079
VCC3 J23 M6 B22
6.3V 6.3V 10V I C247 0.1U VCC1_1_09 16V 10V 10V VSS_121 VSS_078
C23 M12 M8 B2
10V X7R 0402 VCCCL3_3_2 VCC1_1_10 VSS_122 VSS_077
B23 M13 N13 B19
+3V_HDA_IO_ICH R569 0 +3VM_VCCCL3_ICH VCCCL3_3_1 VCC1_1_11 ICH_CPU_IO R533 0 VSS_123 VSS_076
V_3P3_CL M15 V_FSB_VTT N14 B17
I 5% 0603 VCC1_1_12 I I I I 5% 0603 VSS_124 VSS_075
C30 M17 N15 B14
VCCGLAN1_5_4 VCC1_1_13 X7R X7R X5R VSS_125 VSS_074
C29 M18 N16 B11
0 R273 VCCGLAN1_5_3 VCC1_1_14 10V 10V 6.3V VSS_126 VSS_073
V_1P5_ICH C28 M19 N17 AK8
0603 5% NI R537 0 +SB_VCCGLAN1_5 VCCGLAN1_5_2 VCC1_1_15 0402 0402 0603 VSS_127 VSS_072
V_1P5_ICH B30 N12 N18 AK30
I 5% 0603 VCCGLAN1_5_1 VCC1_1_16 0.1U 0.1U 4.7U VSS_128 VSS_071
N19 N23 AK29
VCC1_1_17 C553 C555 C545 VSS_129 VSS_070

si
C240 AA23 R12 N29 AK2
0 R269 VCC1_5_B_01 VCC1_1_18 VSS_130 VSS_069
VCC3 0.1U AA24 R19 N30 AK16
0603 5% I VCC1_5_B_02 VCC1_1_19 VSS_131 VSS_068
0402 AA25 U12 P12 AK14
VCC1_5_B_03 VCC1_1_20 R535 0 VSS_132 VSS_067
AB24 U19 VCC3 P13 AK12
I VCC1_5_B_04 VCC1_1_21 I I 5% 0603 VSS_133 VSS_066
L36 AB25 V12 P14 AJ8
X7R VCC1_5_B_05 VCC1_1_22 X7R VSS_134 VSS_065
AC25 V19 P15 AJ5
10V VCC1_5_B_06 VCC1_1_23 10V VSS_135 VSS_064
V_1P5_ICH AD25 W12 P16 AJ26
VCC1_5_B_07 VCC1_1_24 0402 VSS_136 VSS_063
AD26 W13 P17 AJ23
VCC1_5_B_08 VCC1_1_25 0.1U VSS_137 VSS_062
AD28 W15 P18 AJ20
10UH C594 C595 VCC1_5_B_09 VCC1_1_26 C554 VSS_138 VSS_061
AE28 W17 P19 AJ16
100mA VCC1_5_B_10 VCC1_1_27 VSS_139 VSS_060
10U 1U AE29 W18 P2 AJ14

ne
0805 VCC1_5_B_11 VCC1_1_28 VSS_140 VSS_059
0805 0402 AE30 W19 P26 AJ12
VCC1_5_B_12 VCC1_1_29 VSS_141 VSS_058
I J24 P28 AH8
I I VCC1_5_B_13 R628 0 VSS_142 VSS_057
20% J25 AH28 VCC3 P6 AH6
X5R X5R VCC1_5_B_14 V_CPU_IO_1 I I 5% 0603 VSS_143 VSS_056
K23 AJ30 R13 AH20
C 6.3V 6.3V VCC1_5_B_15 V_CPU_IO_2 X7R VSS_144 VSS_055 C
L34 K24 R14 AH2
VCC1_5_B_16 10V VSS_145 VSS_054
K25 AH30 +3V_DMI_ICH R15 AH19
VCC1_5_B_17 VCC3_3_01 0402 VSS_146 VSS_053
V_1P5_ICH L24 AK4 +3V_SATA_ICH R16 AH15
VCC1_5_B_18 VCC3_3_02 0.1U VSS_147 VSS_052
C547 C546 L25 A27 +SB_VCCGLAN3_3 R555 0 VCC3 R17 AH13
1UH 10U 0.01U VCC1_5_B_19 VCCGLAN3_3 I 5% 0603 C605 VSS_148 VSS_051
M23 R18 AG28
300mA 0805 0402 VCC1_5_B_20 VSS_149 VSS_050
M24 A2 R23 AF9
0805 I I VCC1_5_B_21 VCC3_3_08 VSS_150 VSS_049
M25 B1 R29 AF7

do
20% X5R X7R VCC1_5_B_22 VCC3_3_09 +3V_PCI_ICH R290 0 VSS_151 VSS_048
N24 B9 VCC3 R30 AF29
I 6.3V 25V VCC1_5_B_23 VCC3_3_10 10V 10V 10V I 5% 0805 VSS_152 VSS_047
N25 G11 R8 AF25
L35 VCC1_5_B_24 VCC3_3_11 X7R X7R X7R VSS_153 VSS_046
P23 G3 T12 AF23
VCC1_5_B_25 VCC3_3_12 I I I VSS_154 VSS_045
V_1P5_ICH P24 H7 T13 AF20
VCC1_5_B_26 VCC3_3_13 0402 0402 0402 VSS_155 VSS_044
P25 J2 T14 AF15
1UH VCC1_5_B_27 VCC3_3_14 0.1U 0.1U 0.1U VSS_156 VSS_043
R24 K8 T15 AF13
300mA C557 C556 VCC1_5_B_28 VCC3_3_15 C223 C237 C222 VSS_157 VSS_042
R25 L8 T16 AE9
0805 VCC1_5_B_29 VCC3_3_16 VSS_158 VSS_041
10U 2.2U T23 T17 AE8
VCC1_5_B_30 VSS_159 VSS_040
I 0805 0603 T24 T18 AE6
VCC1_5_B_31 VSS_160 VSS_039
20% T25 T19 AE5
I I VCC1_5_B_32 VSS_161 VSS_038

In
T26 A12 +3VM_VCCPAUX 0 R618 T2 AE25
X5R X5R VCC1_5_B_33 VCCLAN3_3_1 V_3P3_CL VSS_162 VSS_037
T28 B12 0603 5% I T29 AE19
6.3V 6.3V VCC1_5_B_34 VCCLAN3_3_2 VSS_163 VSS_036
U24 T5 AE18
V_1P5_ICH VCC1_5_B_35 C597 C219 VSS_164 VSS_035
U28 U13 AE16
VCC1_5_B_36 +3V_STBY_ICH VSS_165 VSS_034
U29 U1 0.1U 0.1U U14 AE15
VCC1_5_B_37 VCCSUS3_3_07 VSS_166 VSS_033
U30 U2 0402 0402 U15 AE14
VCC1_5_B_38 VCCSUS3_3_08 VSS_167 VSS_032
V23 U3 U16 AE13
VCC1_5_B_39 VCCSUS3_3_09 C225 C238 C239 I I VSS_168 VSS_031
V24 U5 U17 AE12
+ C603 C537 C536 C209 VCC1_5_B_40 VCCSUS3_3_10 X7R X7R VSS_169 VSS_030
V25 U6 0.022U 0.022U 0.1U U18 AE10
VCC1_5_B_41 VCCSUS3_3_11 10V 10V VSS_170 VSS_029
220U 10U 10U 2.2U W24 U7 0402 0402 0402 U23 AE1
VCC1_5_B_42 VCCSUS3_3_12 VSS_171 VSS_028
W25 U8 V13 AD9

i-
18 mohm 0805 0805 0603 VCC1_5_B_43 VCCSUS3_3_13 I I I VSS_172 VSS_027
Y23 V8 V14 AD7
7343 I I I VCC1_5_B_44 VCCSUS3_3_14 X7R X7R X7R R252 0 VSS_173 VSS_026
Y24 W7 VCC3 V15 AD3
I X5R X5R X5R VCC1_5_B_45 VCCSUS3_3_15 16V 16V 10V NI 5% 0603 VSS_174 VSS_025
Y25 W8 V16 AD22
20% 6.3V 6.3V 6.3V VCC1_5_B_46 VCCSUS3_3_16 VSS_175 VSS_024
Y8 V17 AD19
VCCSUS3_3_17 VSS_176 VSS_023
6.3V V18 AD18
0 R534 VSS_177 VSS_022
V26 AD16
For P43 SKU V_1P1_CL_MCH
0603 5% NI A17 +3V_STBY_ICH R251 0 3VSB V28
VSS_178 VSS_021
AD15
VCCSUS3_3_02 I 5% 0603 VSS_179 VSS_020
B20 V3 AD14
0 R526 +1.125V_ICH_DMI VCCSUS3_3_03 VSS_180 VSS_019
AG29 C20 V7 AC8
For G45 SKU V_1P1_CORE 0603 5% I AG30
VCCDMI_1 VCCSUS3_3_04
E17 W1
VSS_181 VSS_018
AC6
VCCDMI_2 VCCSUS3_3_05 VSS_182 VSS_017

B
C548
22U
C558
4.7U
AC13
AD11
VCC1_5_A_09
VCC1_5_A_10
is VCCSUS3_3_06

VCCRTC
H15

A22 VCCRTC
VCCRTC
W14
W16
W23
VSS_183
VSS_184
VSS_185
VSS_016
VSS_015
VSS_014
AC5
AC30
AC29 B
AD12 AC7 +TP_VCCSUS1_1_ICH_1 T73 W29 AC24
0805 0603 VCC1_5_A_11 VCCSUS1_1_1 VSS_186 VSS_013
AD13 H17 +TP_VCCSUS1_1_ICH_2 T65 W30 AC12
I I VCC1_5_A_12 VCCSUS1_1_2 C576 C579 C578 VSS_187 VSS_012
AE11 W5 AC1
X5R X5R VCC1_5_A_13 VSS_188 VSS_011
AF11 A23 +VCCCL1_1_INT_ICH C224 0.1U 0.1U 1U W6 AB3
6.3V 6.3V VCC1_5_A_14 VCCCL1_1 VSS_189 VSS_010
V_1P5_ICH AH10 0.1U 0402 0402 0402 Y26 AB28
VCC1_5_A_15 C210 VSS_190 VSS_009
AH11 0402 Y28 AB26
VCC1_5_A_16 I I I VSS_191 VSS_008
AJ10 H18+TP_VCCSUS1_5_ICH_1 0.1U Y3 AA6
C216 C218 VCC1_5_A_17 VCCSUS1_5_1 +TP_VCCSUS1_5_ICH_2 I X7R X7R X5R VSS_192 VSS_007
AK10 AD8 0402 Y7 AA5
VCC1_5_A_18 VCCSUS1_5_2 VSS_193 VSS_006
kn

1U 1U AC17 X7R 10V 10V 6.3V AA30


VCC1_5_A_01 I 10V VSS_005
0402 0402 AD17 AA29
VCC1_5_A_02 C235 X7R VSS_004
AE17 AA1
I I VCC1_5_A_03 10V VSS_003
AF17 0.1U A30
X5R X5R VCC1_5_A_04 10V 10V VSS_002
AH17 0402 A1
6.3V 6.3V VCC1_5_A_05 X7R +VCCCL1_1_INT_ICH X7R VSS_001
AH18
VCC1_5_A_06 I
AJ18 I I
VCC1_5_A_07 X7R
AK18 0402 0402
VCC1_5_A_08 10V
0.1U 0.1U
C204 C574
Te

ICH10 5OF6
Critical MATERIAL = IC AK27
I VSS_194
AH29
VSS_195
AJ4
VSS_196
AF3
VSS_197
B27
VSS_198

SB Power Status and max current table(1/2)


POWER PLANE S0 S3 S4/S5 Voltage I(max) Note
SB Power Status and max current table(2/2)
w.

POWER PLANE S0 S3 S4/S5 Voltage I(max) Note


VCCRTC X X X VCCRTC 6uA 6uA@G3
VCC1_1 O X X VCC1.1 1.634A ICH CORE
V5REF O X X VCC5 2mA
VCCDMIPLL O X X VCC1.5 23mA
V5REF_SUS O O O 5V_STBY 2mA 2mA@S0,1mA@S3/S5
VCC_DMI O X X GMCH_CORE 50mA 1.125V@G45, 1.1V@P43
VCC1_5_B O X X VCC1.5 646mA
O X X ICH10 6OF6 IC
V_CPU_IO VCC1.2 2mA Critical
A VCCSATAPLL O X X VCC1.5 47mA A
O X X I
VCC3_3 VCC3 308mA
ww

VCC1_5_A O X X VCC1.5 1644mA


VCCHDA O X X VCC1.5 70mA
VCCUSBPLL O X X VCC1.5 11mA
VCCSUSHDA O O O RVCC1.5 70mA
VCCLAN1_1 X X X 1.1V X Internal VR powered, S3/S5 powered when AMT actived
VCCSUS1_1 X X X 1.1V X Internal VR powered
VCCLAN3_3 O X X VCC3 78mA 78mA@S3/S5 powered when AMT actived
VCCSUS1_5 X X X 1.5V X Internal VR powered
VCCGLANPLL O X X VCC1.5 23mA
VCCSUS3_3 O O O 3V_STBY 212mA 53mA@S3/S5
VCCGLAN1_5 O X X VCC1.5 80mA
VCCCL1_1 X X X 1.1V X Internal VR powered Quanta Computer Inc.
VCCGLAN3_3 O X X VCC3 1mA
VCCCL1_5 X X X 1.5V X Internal VR powered PROJECT : ZN5
O X X 73mA Size Document Number Rev
VCCCL3_3 VCC3 S3/S5 powered when AMT actived X4
SB(4/4) POWER/VSS
Date: Friday, March 05, 2010 Sheet 14 of 40
5 4 3 2 1
5 4 3 2 1

V_SM

75
XMM1

76
V_SM V_SM

75
XMM3

76
V_SM
Decoupling capacitor
15
VDD1 VDD2 VDD1 VDD2 V_SM
81
VDD3 VDD4
82 81
VDD3 VDD4
82 Close to SO-DIMM0
87 88 87 88
VDD5 VDD6 VDD5 VDD6
93 94 93 94
VDD7 VDD8 VDD7 VDD8 I C44 470U 9 mohm 20%
99 100 99 100
VDD9 VDD10 VDD9 VDD10 2.5V Critical 7343

+
105 106 105 106
VDD11 VDD12 VDD11 VDD12 I C437 10U 0805 X5R 6.3V
111 112 111 112
VDD13 VDD14 VDD13 VDD14 I C440 10U 0805 X5R 6.3V
117 118 117 118
VDD15 VDD16 VDD15 VDD16 I C409 10U 0805 X5R 6.3V
123 124 123 124
VDD17 VDD18 VDD17 VDD18 I C411 10U 0805 X5R 6.3V
DIMM_VREFB 1 126 VREFCAB DIMM_VREFB 1 126 VREFCAB
VREF_DQ VREF_CA VREF_DQ VREF_CA I C433 10U 0805 X5R 6.3V
3VSB 199 3VSB 199
VDD(SPD) VDD(SPD) I C410 10U 0805 X5R 6.3V

m
M_SA_ODT[3:0] M_A_DQ0 5 4 M_A_DQ4 M_B_DQ0 5 4 M_B_DQ4 I C469 2.2U 0603 X5R 6.3V
D 8 M_SA_ODT[3:0] DQ0 DQ4 DQ0 DQ4 D
M_A_DQ1 7 6 M_A_DQ5 M_B_DQ1 7 6 M_B_DQ5 I C412 2.2U 0603 X5R 6.3V
M_SA_CKE[3:0] M_A_DQ2 DQ1 DQ5 M_A_DQ6 M_B_DQ2 DQ1 DQ5 M_B_DQ6 I C396 2.2U 0603 X5R 6.3V
8 M_SA_CKE[3:0] 15 16 15 16
M_A_DQ3 DQ2 DQ6 M_A_DQ7 M_B_DQ3 DQ2 DQ6 M_B_DQ7 NI C302 1U 0603 X7R 10V
17 18 17 18
DQ3 DQ7 DQ3 DQ7

co
M_A_CAS# M_A_DM0 11 10 M_A_DQS#0 M_B_DM0 11 10 M_B_DQS#0 NI C304 1U 0603 X7R 10V
8 M_A_CAS# DM0 DQS#0 DM0 DQS#0
12 M_A_DQS0 12 M_B_DQS0
M_A_RAS# M_A_DQ8 DQS0 M_B_DQ8 DQS0
8 M_A_RAS# 21 21
M_A_DQ9 DQ8 M_A_DQ12 M_B_DQ9 DQ8 M_B_DQ12
23 22 23 22
M_A_WE# M_A_DQ10 DQ9 DQ12 M_A_DQ13 M_B_DQ10 DQ9 DQ12 M_B_DQ13
8 M_A_WE# 33 24 33 24
M_A_DQ11 DQ10 DQ13 M_A_DQ14 M_B_DQ11 DQ10 DQ13 M_B_DQ14
35 34 35 34
M_A_BS#[2:0] M_A_DQS#1 DQ11 DQ14 M_A_DQ15 M_B_DQS#1 DQ11 DQ14 M_B_DQ15 V_SM_VTT
27 36 27 36
8 M_A_BS#[2:0] SO-DIMM0 M_A_DQS1 29
DQS#1
DQS1
DQ15
DM1
28 M_A_DM1 M_B_DQS1 29
DQS#1
DQS1
DQ15
DM1
28 M_B_DM1
M_A_DM[7:0] 25V
8 M_A_DM[7:0]
M_A_DQ16 39 40 M_A_DQ20 M_B_DQ16 39 40 M_B_DQ20 I C485 0.01U 0402 X7R
DQ16 DQ20 DQ16 DQ20

a.
M_A_DQS#[7:0] M_A_DQ17 41 42 M_A_DQ21 M_B_DQ17 41 42 M_B_DQ21 I C378 2.2U 0603 Y5V
8 M_A_DQS#[7:0] DQ17 DQ21 DQ17 DQ21
M_A_DQ18 51 50 M_A_DQ22 M_B_DQ18 51 50 M_B_DQ22 6.3V
M_A_DQS[7:0] M_A_DQ19 DQ18 DQ22 M_A_DQ23 M_B_DQ19 DQ18 DQ22 M_B_DQ23
8 M_A_DQS[7:0] 53 52 53 52
M_A_DQS#2 DQ19 DQ23 M_A_DM2 M_B_DQS#2 DQ19 DQ23 M_B_DM2
45 46 45 46
M_A_A[14:0] M_A_DQS2 DQS#2 DM2 M_B_DQS2 DQS#2 DM2
8 M_A_A[14:0] 47 47
DQS2 M_A_DQ28 DQS2 M_B_DQ28
56 56
M_A_DQ[63:0] M_A_DQ24 DQ28 M_A_DQ29 M_B_DQ24 DQ28 M_B_DQ29 VCC3
8 M_A_DQ[63:0] 57 58 57 58
M_A_DQ25 DQ24 DQ29 M_A_DQ30 M_B_DQ25 DQ24 DQ29 M_B_DQ30 25V
59 68 59 68
M_A_DQ26 DQ25 DQ30 M_A_DQ31 M_B_DQ26 DQ25 DQ30 M_B_DQ31 I C345 0.01U 0402 X7R
67 70 67 70
M_B_CAS# M_A_DQ27 DQ26 DQ31 M_A_DQS#3 M_B_DQ27 DQ26 DQ31 M_B_DQS#3 I C346 2.2U 0603 Y5V
8 M_B_CAS# 69 62 69 62

si
M_A_DM3 DQ27 DQS#3 M_A_DQS3 M_B_DM3 DQ27 DQS#3 M_B_DQS3 6.3V
63 64 63 64
M_B_RAS# DM3 DQS3 DM3 DQS3
8 M_B_RAS#
M_SA_CKE0 73 74 M_SA_CKE1 M_SB_CKE0 73 74 M_SB_CKE1
M_B_WE# CKE0 CKE1 CKE0 CKE1
8 M_B_WE#
M_A_BS#2 79 108 M_A_BS#1 M_B_BS#2 79 108 M_B_BS#1
M_B_BS#[2:0] 8 M_A_BS#2 BA2 BA1 M_A_BS#1 8 8 M_B_BS#2 BA2 BA1 M_B_BS#1 8
M_A_BS#0 109 M_B_BS#0 109
8 M_B_BS#[2:0] 8 M_A_BS#0 BA0 8 M_B_BS#0 BA0
80 M_A_A14 80 M_B_A14 Close to SO-DIMM1
M_B_DM[7:0] M_A_A12 A14 M_A_A11 M_B_A12 A14 M_B_A11
8 M_B_DM[7:0] 83 84 83 84
M_A_A9 A12/BC# A11 M_A_A7 M_B_A9 A12/BC# A11 M_B_A7 V_SM
85 86 85 86
M_B_DQS#[7:0] M_A_A8 A9 A7 M_A_A6 M_B_A8 A9 A7 M_B_A6
89 90 89 90

ne
8 M_B_DQS#[7:0] A8 A6 A8 A6
M_A_A5 91 92 M_A_A4 M_B_A5 91 92 M_B_A4
8 M_B_DQS[7:0]
M_B_DQS[7:0] SO-DIMM1 M_A_A3 95
A5
A3
A4
A2
96 M_A_A2 M_B_A3 95
A5
A3
A4
A2
96 M_B_A2 2.5V C43 470U 9mohm 20%
M_A_A1 M_A_A0 M_B_A1 M_B_A0 I Critical 7343

+
97 98 97 98
M_B_A[14:0] M_A_A10 A1 A0 M_B_A10 A1 A0 I C462 10U 0805 X5R 6.3V
8 M_B_A[14:0] 107 107
M_A_A13 A10/AP DDR3_RST#_DIMM0 M_B_A13 A10/AP DDR3_RST#_DIMM1 I C457 10U 0805 X5R 6.3V
C 119 30 119 30 C
M_B_DQ[63:0] A13 RESET# A13 RESET# I C452 10U 0805 X5R 6.3V
8 M_B_DQ[63:0]
8 M_SA0_CK0 101 102 M_SA0_CK2 8 8 M_SB0_CK0 M_SB0_CK0 101 102 M_SB0_CK2 M_SB0_CK2 8 I C464 10U 0805 X5R 6.3V
M_SB_CKE[3:0] CK0 CK1 M_SB0_CK#0 103 CK0 CK1
8 M_SB_CKE[3:0] 8 M_SA0_CK#0 103 104 M_SA0_CK#2 8 8 M_SB0_CK#0 104M_SB0_CK#2 M_SB0_CK#2 8 I C466 10U 0805 X5R 6.3V
CK0# CK1# CK0# CK1# I C467 10U 0805 X5R 6.3V
M_SB_ODT[3:0]

SO-DIMM (204P)

SO-DIMM (204P)
121 114 121 114 I C460 2.2U 0603 X5R 6.3V

do
8 M_SB_ODT[3:0] 8 M_SA_CS#1 CS1# CS#0 M_SA_CS#0 8 8 M_SB_CS#1 CS1# CS#0 M_SB_CS#0 8
I C445 2.2U 0603 X5R 6.3V
M_A_WE# 113 110 M_A_RAS# M_B_WE# 113 110 M_B_RAS# I C423 2.2U 0603 X5R 6.3V

DDR3 SDRAM

DDR3 SDRAM
M_A_CAS# WE# RAS# M_B_CAS# WE# RAS# NI C401 1U 0603 X7R 10V
115 115
CAS# M_SA_ODT0 CAS# M_SB_ODT0 NI C402 1U 0603 X7R 10V
116 116
M_A_DQ32 ODT0 M_SA_ODT1 M_B_DQ32 ODT0 M_SB_ODT1
129 120 129 120
M_A_DQ33 DQ32 ODT1 M_B_DQ33 DQ32 ODT1
131 131
M_A_DQ34 DQ33 M_A_DQ36 M_B_DQ34 DQ33 M_B_DQ36
141 130 141 130
M_A_DQ35 DQ34 DQ36 M_A_DQ37 M_B_DQ35 DQ34 DQ36 M_B_DQ37
143 132 143 132
M_A_DQS#4 DQ35 DQ37 M_A_DQ38 M_B_DQS#4 DQ35 DQ37 M_B_DQ38
135 140 135 140
M_A_DQS4 DQS#4 DQ38 M_A_DQ39 M_B_DQS4 DQS#4 DQ38 M_B_DQ39 V_SM_VTT

In
137 142 137 142
DQS4 DQ39 M_A_DM4 DQS4 DQ39 M_B_DM4
136 136
M_A_DQ40 DM4 M_B_DQ40 DM4 10V
147 147
M_A_DQ41 DQ40 M_A_DQ44 M_B_DQ41 DQ40 M_B_DQ44 I C483 0.1U 0402 X7R
149 146 149 146
M_A_DQ42 DQ41 DQ44 M_A_DQ45 M_B_DQ42 DQ41 DQ44 M_B_DQ45 I C380 2.2U 0603 Y5V
157 148 157 148
M_A_DQ43 DQ42 DQ45 M_A_DQ46 M_B_DQ43 DQ42 DQ45 M_B_DQ46
159 158 159 158
M_A_DM5 DQ43 DQ46 M_A_DQ47 M_B_DM5 DQ43 DQ46 M_B_DQ47 6.3V
153 160 153 160
DM5 DQ47 M_A_DQS#5 DM5 DQ47 M_B_DQS#5
152 152
M_A_DQ48 DQS#5 M_A_DQS5 M_B_DQ48 DQS#5 M_B_DQS5
163 154 163 154
M_A_DQ49 DQ48 DQS5 M_B_DQ49 DQ48 DQS5 VCC3
165 165
DQ49 DQ49

i-
M_A_DQ50 175 164 M_A_DQ52 M_B_DQ50 175 164 M_B_DQ52 10V
M_A_DQ51 DQ50 DQ52 M_A_DQ53 M_B_DQ51 DQ50 DQ52 M_B_DQ53 X7R C339 0.1U 0402 I
177 166 177 166
VCC3 M_A_DQS#6 DQ51 DQ53 M_A_DQ54 M_B_DQS#6 DQ51 DQ53 M_B_DQ54 Y5V C338 2.2U 0603 I
169 174 169 174
M_A_DQS6 DQS#6 DQ54 M_A_DQ55 VCC3 5% M_B_DQS6 DQS#6 DQ54 M_B_DQ55
171 176 171 176
DQS6 DQ55 M_A_DM6 DQS6 DQ55 M_B_DM6 6.3V
170 I 170
M_A_DQ56 DM6 M_B_DQ56 DM6
181 0402 181
R407 M_A_DQ57 DQ56 M_A_DQ60 M_B_DQ57 DQ56 M_B_DQ60
183 180 183 180
M_A_DQ58 DQ57 DQ60 M_A_DQ61 10K M_B_DQ58 DQ57 DQ60 M_B_DQ61
10K 191 182 191 182
M_A_DQ59 DQ58 DQ61 M_A_DQ62 R417 M_B_DQ59 DQ58 DQ61 M_B_DQ62
0402 193 192 193 192
M_A_DM7 DQ59 DQ62 M_A_DQ63 M_B_DM7 DQ59 DQ62 M_B_DQ63
187 194 187 194
I DM7 DQ63 DM7 DQ63
5% PM_EXTTS#0 198
EVENT#
DQS#7
DQS7
186
188
is
M_A_DQS#7
M_A_DQS7 PM_EXTTS#1 198
EVENT#
DQS#7
DQS7
186
188
M_B_DQS#7
M_B_DQS7
B VREFCAB B
I R415 5% 10K 0402 A_SA0 197 200 SDA_DDR I R424 5% 10K 0402 B_SA0 197 200 SDA_DDR
I R408 5% 10K 0402 A_SA1 SA0 SDA SCL_DDR I R420 5% 10K 0402 B_SA1 SA0 SDA SCL_DDR
201 202 3VSB 201 202
SA1 SCL SA1 SCL
Close to DIMM0 Close to DIMM1
77 78 77 78
V_SM_VTT NC1 A15 NC1 A15
11,19,26 SMBDATA_RESUME SMBDATA_RESUME I R409 5% 0 0402 SDA_DDR 125 122 V_SM_VTT V_SM_VTT 125 122 V_SM_VTT
SMBCLK_RESUME I R410 5% 0 0402 SCL_DDR NCTEST NC2 NCTEST NC2 R439 1% 1K 0402
11,19,26 SMBCLK_RESUME
203 204
0*3C 203 204
V_SM
I
0*AC
kn
VTT1 VTT2 VTT1 VTT2
3 2 3 2 R436
C344 VSS2 VSS1 C342 C333 C340 VSS2 VSS1 C337 C343 C388 C383 C700
9 8 9 8 1K
VSS4 VSS3 VSS4 VSS3
10U 13 14 2.2U 0.1U 10U 13 14 2.2U 0.1U 0.1U 0402 0.1U 0.1U
V_SM VSS5 VSS6 VSS5 VSS6
0603 19 20 0603 0402 0805 19 20 0603 0402 0402 0402 0402
VSS7 VSS8 VSS7 VSS8 I
25 26 25 26
V_SM R54 I VSS9 VSS10 I I I VSS9 VSS10 I I I 1% I I
31 32 31 32
5% 100 X5R VSS11 VSS12 Y5V Y5V X5R VSS11 VSS12 Y5V X7R X7R X7R X7R
37 38 37 38
0402 6.3V VSS13 VSS14 6.3V 16V 6.3V VSS13 VSS14 6.3V 10V 10V 10V 10V
I 43 44 43 44
5% VSS15 VSS16 VSS15 VSS16
49 48 49 48
Te

0402 VSS18 VSS17 VSS18 VSS17


I 55 54 55 54
1K VSS20 VSS19 VSS20 VSS19
61 60 61 60
R55 DDR3_RST#_DIMM1 VSS22 VSS21 VSS22 VSS21 R485 1% 1K 0402
65 66 65 66 V_SM DIMM_VREFB
VSS23 VSS24 VSS23 VSS24 I
71 72 71 72
3

VSS25 VSS26 VSS25 VSS26


127 128 127 128
Q15_C 1K R53 Q13_B Q13 C83 VSS27 VSS28 VSS27 VSS28 M_DDR3_DRAMRST# R484
2 133 134 133 134
0402 5% I VSS29 VSS30 VSS29 VSS30 C484 C482 C764
MMBT3904-7-F 1000P 139 138 139 138 1K
1

VSS32 VSS31 VSS32 VSS31


3

200mA 0402 145 144 145 144 0.1U 0402 0.1U 0.1U
1

R76 4.7K Q15_B Q15 VSS34 VSS33 VSS34 VSS33


8 M_DDR3_DRAMRST# 2 151 150 151 150 0402 0402 0402
I 5% 0402 SOT23-3 NI VSS36 VSS35 VSS36 VSS35 I
155 156 155 156
w.

MMBT3904-7-F VSS37 VSS38 VSS37 VSS38 I I I

1
I X7R 161 162 161 162 1%
200mA
1

40V 50V VSS39 VSS40 VSS39 VSS40 C92 X7R X7R X7R
167 168 167 168
SOT23-3 V_SM 1% VSS41 VSS42 VSS41 VSS42 10V 10V 10V
173 172 173 172 10P

2
I VSS44 VSS43 VSS44 VSS43
I 179 178 179 178 0402
40V VSS46 VSS45 VSS46 VSS45
0402 185 184 185 184
VSS48 VSS47 VSS48 VSS47 NI
189 190 189 190
GND

GND

GND

GND
100 VSS49 VSS50 VSS49 VSS50 COG
195 196 195 196
R56 VSS51 VSS52 VSS51 VSS52 50V
DDR3_SODIMM_H9.2_RVS DDR3_SODIMM_H5.2_RVS
205

206

205

206
ww

Critical Critical
A DDR3_RST#_DIMM0 I I A
3

R58 1K Q16_B
2 Q16 C84
I 5% 0402 MMBT3904-7-F 1000P
SO-DIMM0 SO-DIMM1
1

200mA 0402
1

SOT23-3
I
NI
X7R
SMbus address A0 SMbus address A2
40V 50V

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
DDRIII SO-DIMM
Date: Friday, March 05, 2010 Sheet 15 of 40
5 4 3 2 1
5 4 3 2 1

MXM Module
16
MXM_PRSNT# Sku
Low MXM
High WO/ MXM

10Amp
VIN_MXM J41A VIN_MXM
DisplayPort
E1 E2 VCC3
PWR_SRC PWR_SRC
E3 E4
PWR_SRC PWR_SRC
E5 E6
PWR_SRC PWR_SRC
E7 E8
PWR_SRC PWR_SRC
E9 E10
PWR_SRC PWR_SRC EXT_DP_AUXDN C97 0.1U I X7R 10V MXMDP_AUXN UMADP_AUXDN C271 0.1U I X7R 10VUMADP_AUXDN_C R695 R694

m
E11 E12 7 UMADP_AUXDN
PWR_SRC PWR_SRC 0402 0402 4.99K 4.7K
D E13 E14 D
PWR_SRC PWR_SRC MXM_PRSNT_L# 10K R57 0402 0402
E15 E16 3VSB
PWR_SRC PWR_SRC 0402 5% I 1% 5%
E17 E18
PWR_SRC PWR_SRC EXT_DP_AUXDP C94 0.1U I X7R 10V MXMDP_AUXP UMADP_AUXDP C272 0.1U I X7R 10V UMADP_AUXDP_C I NI
7 UMADP_AUXDP
E20 0402 0402 MXM_PRSNT#
GND
E22
GND
E19 E24

co
GND GND I R246 5% 0 0402 MXM_DDCCK
E21 E26 17,20 LCD_CLK
GND GND

MODE1
MODE0
I R253 5% 0 0402 MXM_DDCDAT

IN1_PEQ
IN2_PEQ
E23 E28 17,20 LCD_DAT
GND GND

MODE2
E25 E30

REXT
GND GND
E27 E32

PIO
GND GND
E29 E34 update MXM footprint to Mxm-mm70-314-310b1-1-310p
GND GND
2.5Amp E31
GND GND
E36
E33
GND MXM CN_2 R267 5% 0 MXM_PRSNT# J41B VCC

72
71
70
69
68
67
66
65
64
63
E35 2 MXM_PRSNT# 7,13
+5V_MXM GND PRSNT_R# I 0402 MXM_PRSNT_L# U49
281 MXM_PRSNT_L# 12
PRSNT_L# LVDS_MXM_UCLK# C291 0.22U0402 Y5V
169 277

REXT
MODE2
IN1_PEQ / SDA_CTL
IN2_PEQ / SCL_CTL

MODE1
MODE0
PIO
GND

SW / I2C_ADDR

GND
MXM CN_19 R259 5% 0 LVDS_MXM_UCLK LVDS_UCLK# DP_A_AUX# I 10V I C691 2.2U 0603 X5R 6.3V U49_1
1
5VRUN PEX_STD_SW#
19 PEX_Swing adjust 171
LVDS_UCLK DP_A_AUX
279 1
CEXT VDD
62 VCC3
3 I 0402 MXM_DPTX0P 2 61 C_DP_TX0P C692 0.1U 0402 I X7R 10V DP_TX0P
5VRUN MXM_RST# LVDS_MXM_UTX0# MXM_DPTX0N IN1_D0p DP_D0p C_DP_TX0N C693 0.1U 0402 I X7R 10V DP_TX0N
5
5VRUN PEX_RST#
156 193
LVDS_UTX0# DP_A_L0#
253 DP_CAD Behavior 3
IN1_D0n DP_D0n
60
7 154 MXM CN_154 10K R169 +3V_MXM LVDS_MXM_UTX1# 187 259 VCC3 4 59
5VRUN PEX_CLK_REQ# LVDS_UTX1# DP_A_L1# VDD PD

Upper-CH

DP-A
1, 3, 5, 7, 9 = 5VRUN 0402 5% NI LVDS_MXM_UTX2# MXM_DPTX1P C_DP_TX1P C694 0.1U 0402 I X7R 10V DP_TX1P
1Amp 9 181 265 Low DP signal (AC couple) 5 58

a.
5VRUN MXM_PEGCLK# LVDS_MXM_UTX3# LVDS_UTX2# DP_A_L2# U27 MXM_DPTX1N IN1_D1p DP_D1p C_DP_TX1N C695 0.1U 0402 I X7R 10V DP_TX1N
153 MXM_PEGCLK# 3 175 271 6 57
+3V_MXM PEX_REFCLK# MXM_PEGCLK LVDS_UTX3# DP_A_L3# IN1_D1n DP_D1n DP_CAD
PEX_REFCLK
155 MXM_PEGCLK 3 16
VCC GND
8 High TMDS signal (DC couple) 7
IN1_CADET DP_CADET
56
MXM_DPTX2P 8 55 C_DP_TX2P C696 0.1U 0402 I X7R 10V DP_TX2P
LVDS_MXM_UTX0 MXM_DPTX2N IN1_D2p DP_D2p C_DP_TX2N C697 0.1U 0402 I X7R 10V DP_TX2N
278 195 255 9 54
3V3RUN278, 280 = 3V3RUN LVDS_MXM_UTX1 LVDS_UTX0 DP_A_L0 UMADP_AUXDP_C 2 MXM_DP_HPD IN1_D2n DP_D2n DP_HPD
280 189 261 10 53
3V3RUN C_PEG_RXN0 C149 0.1U 0402 I X7R 10V PEG_RXN0 LVDS_MXM_UTX2 LVDS_UTX1 DP_A_L1 UMADP_AUXDN_C 5 IA0 UMA_DP_AUXDP MXM_DPTX3P IN1_HPDX DP_HPD C_DP_TX3P C698 0.1U 0402 I X7R 10V DP_TX3P
147 PEG_RXN0 7 183 267 4 11 52
PEX_RX0# C_PEG_RXN1 C154 0.1U 0402 I X7R 10V PEG_RXN1 LVDS_MXM_UTX3 LVDS_UTX2 DP_A_L2 MXMDP_AUXP IB0 YA MXM_DPTX3N IN1_D3p DP_D3p C_DP_TX3N C699 0.1U 0402 I X7R 10V DP_TX3N
141 PEG_RXN1 7 177 273 11 12 51
PEX_RX1# LVDS_UTX3 DP_A_L3 IC0 IN1_D3n DP_D3n

LVDS
11 135 C_PEG_RXN2 C157 0.1U 0402 I X7R 10V PEG_RXN2_R MXMDP_AUXN 14 7 UMA_DP_AUXDN 13 50
13
GND
GND
PEX_RX2#
PEX_RX3#
121 C_PEG_RXN3 C164 0.1U 0402 I X7R 10V PEG_RXN3
PEG_RXN2_R 7
PEG_RXN3 7 DP_A_HPD
276
ID0 YB
7 EXT_DPTX0P
EXT_DPTX0P 14
GND
IN2_D0p
PS8325 GND
TMDS_CH2p
49
15 11,13, 15, 17 = GND 115 C_PEG_RXN4 C167 0.1U 0402 I X7R 10V PEG_RXN4 LVDS_MXM_LCLK# 176 DDPC_CTRL_CLK 3 9 MXM_DP_AUXP EXT_DPTX0N 15 48
GND PEX_RX4# PEG_RXN4 7 LVDS_LCLK# 7 DDPC_CTRL_CLK IA1 YC 7 EXT_DPTX0N IN2_D0n TMDS_CH2n
17 109 C_PEG_RXN5 C169 0.1U 0402 I X7R 10V PEG_RXN5 PEG_RXN5 7 LVDS_MXM_LCLK 178 DDPC_CTRL_DATA 6 16 47 VCC3
GND PEX_RX5# LVDS_LCLK 7 DDPC_CTRL_DATA IB1 IN2_CADET VDD
103 C_PEG_RXN6 C173 0.1U 0402 I X7R 10V PEG_RXN6_R PEG_RXN6_R 7 270 EXT_DP_AUXDP 10 12 MXM_DP_AUXN EXT_DPTX1P 17 46
PEX_RX6# DP_B_AUX# IC1 YD 7 EXT_DPTX1P IN2_D1p TMDS_CH1p
97 C_PEG_RXN7 C177 0.1U 0402 I X7R 10V PEG_RXN7_R PEG_RXN7_R 7 LVDS_MXM_LTX0# 200 272 EXT_DP_AUXDN 13 EXT_DPTX1N 18 45
PEX_RX7# LVDS_LTX0# DP_B_AUX ID1 7 EXT_DPTX1N IN2_D1n TMDS_CH1n
36 91 C_PEG_RXN8 C182 0.1U 0402 I X7R 10V PEG_RXN8 PEG_RXN8 7 LVDS_MXM_LTX1# 194 R311 0 UMA_HPD_R 19 44
GND PEX_RX8# LVDS_LTX1# 7 UMA_HPD IN2_HPDX TMDS_PC1

Lower-CH

si
37 85 C_PEG_RXN9 C185 0.1U 0402 I X7R 10V PEG_RXN9 PEG_RXN9 7 LVDS_MXM_LTX2# 188 246 I 5% 0402 EXT_DPTX2P 20 43
GND PEX_RX9# LVDS_LTX2# DP_B_L0# 7 EXT_DPTX2P IN2_D2p TMDS_CH0p
C_PEG_RXN10 C187 0.1U 0402 I X7R 10V PEG_RXN10 LVDS_MXM_LTX3# DP_CAD EXT_DPTX2N

DP-B
46 79 182 252 1 15 21 42

IN1_AUXn_SDA
PEG_RXN10 7

IN1_AUXp_SCL

DP_AUXn_SDA
7 EXT_DPTX2N

DP_AUXp_SCL
GND PEX_RX10# C_PEG_RXN11 C190 0.1U 0402 I X7R 10V PEG_RXN11 LVDS_LTX3# DP_B_L1# S OE IN2_D2n TMDS_CH0n

DP_AC_AUXp
DP_AC_AUXn
47 73 PEG_RXN11 7 258 VCC3 22 41
GND PEX_RX11# C_PEG_RXN12 C193 0.1U 0402 I X7R 10V PEG_RXN12 DP_B_L2# SN74CBT3257CPW R EXT_DPTX3P VDD TMDS_HPD
52 67 264 23

TMDS_SDA
40

TMDS_SCL
GND PEX_RX12# PEG_RXN12 7 DP_B_L3# 7 EXT_DPTX3P IN2_D3p TMDS_CLKp
53 61 C_PEG_RXN13 C198 0.1U 0402 I X7R 10V PEG_RXN13 PEG_RXN13 7 LVDS_MXM_LTX0 202 TSSOP16 EXT_DPTX3N 24 39
GND PEX_RX13# LVDS_LTX0 7 EXT_DPTX3N IN2_D3n TMDS_CLKn
58 55 C_PEG_RXN14 C201 0.1U 0402 I X7R 10V PEG_RXN14 PEG_RXN14 7 LVDS_MXM_LTX1 196 Critical UMA_DP_AUXDP 25 38 VCC3
GND PEX_RX14# C_PEG_RXN15 C207 0.1U 0402 I X7R 10V PEG_RXN15 LVDS_MXM_LTX2 LVDS_LTX1 I UMA_DP_AUXDN IN2_AUXp_SCL VDD
59 49 190 248 26 37

GND

GND
GND PEX_RX15# PEG_RXN15 7 LVDS_LTX2 DP_B_L0 IN2_AUXn_SDA TMDS_PC0
64 LVDS_MXM_LTX3 184 254
GND LVDS_LTX3 DP_B_L1
65 260
GND DP_B_L2 Critical PS8325
70 23 266

27
28
29
30
31
32
33
34
35
36
GND 20 EV_LVDS_VDDEN LVDS_PWREN DP_B_L3

Display Port
71 149 C_PEG_RXP0 C141 0.1U 0402 I X7R 10V PEG_RXP0 PEG_RXP0 7 20 EV_LVDS_BLON 25 I
GND PEX_RX0 C_PEG_RXP1 C152 0.1U 0402 I X7R 10V PEG_RXP1 MXM CN_27 LVDS_BLEN AJ083250000
76 143 27 274
77
GND
GND
PEX_RX1
PEX_RX2
137 C_PEG_RXP2
C_PEG_RXP3
C156 0.1U 0402 I X7R 10V PEG_RXP2_R
PEG_RXP3
PEG_RXP1 7
PEG_RXP2_R 7
T70
MXM_DDCDAT
LVDS_BRIGHT_PWM DP_B_HPD DP connector DFHS20FR029 VCC3 IC CTRL(72P)PS8325TQFN72G(TQFN)
82 123 C162 0.1U 0402 I X7R 10V PEG_RXP3 7 T68 33 qfn72-11x5-4-73p
GND PEX_RX3 LVDS_DDC_DAT

DP_AC_AUXN_31
DP_AC_AUXP_30
83 117 C_PEG_RXP4 C166 0.1U 0402 I X7R 10V PEG_RXP4 MXM_DDCCK 35 223 EXT_DP_AUXDN

MXM_DP_AUXN
MXM_DP_AUXP
PEG_RXP4 7 T67

2
GND PEX_RX4 LVDS_DDC_CLK DP_C_AUX#

ne
88 111 C_PEG_RXP5 C168 0.1U 0402 I X7R 10V PEG_RXP5 PEG_RXP5 7 225 EXT_DP_AUXDP 500mA (Max.)
GND PEX_RX5 C_PEG_RXP6 C170 0.1U 0402 I X7R 10V PEG_RXP6_R DP_C_AUX J64 F2
89 105 PEG_RXP6_R 7
GND PEX_RX6

DP_AUXN
DP_AUXP
94 99 C_PEG_RXP7 C174 0.1U 0402 I X7R 10V PEG_RXP7_R 199 C_MXM_DPTX0N C675 0.1U 0402 I X7R 10V MXM_DPTX0N VCC3 SHIELD1 21 1206L150PR
GND PEX_RX7 PEG_RXP7_R 7 DP_C_L0# QFN72
95 93 C_PEG_RXP8 C179 0.1U 0402 I X7R 10V PEG_RXP8 MXM CN_158 158 205 C_MXM_DPTX1N C676 0.1U 0402 I X7R 10V MXM_DPTX1N SHIELD3 23
C GND PEX_RX8 PEG_RXP8 7 T53 CRT_DDC_DAT DP_C_L1# RC1206 C
100 87 C_PEG_RXP9 C183 0.1U 0402 I X7R 10V PEG_RXP9 PEG_RXP9 7 T50 MXM CN_160 160 211 C_MXM_DPTX2N C677 0.1U 0402 I X7R 10V MXM_DPTX2N 30mil

1
GND PEX_RX9 C_PEG_RXP10 C186 0.1U 0402 I X7R 10V PEG_RXP10 CRT_DDC_CLK DP_C_L2# C_MXM_DPTX3N C678 0.1U 0402 I X7R 10V MXM_DPTX3N I L14 I 0805 Critical
101 81 PEG_RXP10 7 217
GND PEX_RX10 C_PEG_RXP11 C189 0.1U 0402 I X7R 10V PEG_RXP11 MXM CN_162 DP_C_L3# 5% PWR +3V_DP 3A 120 ohm L14_1 0.08 ohm C710
106 75 PEG_RXP11 7 T52 162 20
GND PEX_RX11 C_PEG_RXP12 C192 0.1U 0402 I X7R 10V PEG_RXP12 MXM CN_164 VGA_VSYNC 0402
20
PWR_RET PBY201209T-121Y-N 1206 0.1U
107 69 164 19

DP-C
GND PEX_RX12 PEG_RXP12 7 T45 VGA_HSYNC 100K
19
I

CRT
112 63 C_PEG_RXP13 C194 0.1U 0402 I X7R 10V PEG_RXP13 201 C_MXM_DPTX0P C679 0.1U 0402 I X7R 10V MXM_DPTX0P DP_HPD 18 HPD I 0402
GND PEX_RX13 PEG_RXP13 7 DP_C_L0 R315
18
113 57 C_PEG_RXP14 C200 0.1U 0402 I X7R 10V PEG_RXP14 PEG_RXP14 7 T47 MXM CN_168 168 207 C_MXM_DPTX1P C680 0.1U 0402 I X7R 10V MXM_DPTX1P C300 C301 6V C709 10V
GND PEX_RX14 C_PEG_RXP15 PEG_RXP15 VGA_RED DP_C_L1 C_MXM_DPTX2P C681 0.1U 10V MXM_DPTX2P DP_AUXN AUXN
17
GND

DP_AC_AUXN_31
118 51 C202 0.1U 0402 I X7R 10V PEG_RXP15 7 213 0402 I X7R 17 16 4.7U 0.1U 0.1U X7R
GND PEX_RX15 DP_C_L2 16

DP_AC_AUXP_30
119 MXM CN_170 170 219 C_MXM_DPTX3P C682 0.1U 0402 I X7R 10V MXM_DPTX3P DP_AUXP 15 AUXP 0402 I
GND T46 VGA_GREEN DP_C_L3 15 0603 0402
124 GND 14 J64_14 10V
GND VCC3 MXM CN_172 MXM CN_234 R85 10K MXM_DP_HPD
14
MODE IDP_CAD I X7R
125 T44 172 234 13
GND VGA_BLUE DP_C_HPD I 5% 0402 R314 DP_TX3N LANE_3N
13
X5R X7R I
133 12

do
GND R261 10K DP_TX3P LANE_3P
12
GND 6.3V 10V
134 100K 10 11
GND I 5% 0402
11
139 230 0402
GND PEG_TXN0_R DP_D_AUX# DP_TX2N LANE_2N
10
R334 R124
140 148 PEG_TXN0_R 7 4 232 9
GND PEX_TX0# PEG_TXN1_R WAKE# DP_D_AUX I DP_TX2P LANE_2P
9
GND
145 142 PEG_TXN1_R 7 11 MXM_PW RGD 6 7 8 1M 1M
GND PEX_TX1# PEG_TXN2_R PWR_GOOD VCC3 5%
8
146 136 PEG_TXN2_R 7 206 0402 0402
GND PEX_TX2# DP_D_L0# 7

PM
151 120 PEG_TXN3_R MXMPWR_EN 8 212 DP_TX1N 6 LANE_1N
GND PEX_TX3# PEG_TXN3_R 7 PWR_EN DP_D_L1# 6
I I
152 114 PEG_TXN4_R 218 DP_TX1P 4 LANE_1P GND 5
GND PEX_TX4# PEG_TXN4_R 7 DP_D_L2#

1
5
PEG_TXN5_R MXM_PW RLV D60 1% 1%

DP-D
157 108 PEG_TXN5_R 7 18 224
GND PEX_TX5# PEG_TXN6_R I PWR_LEVEL DP_D_L3# DA204U DP_TX0N LANE_0N
4
166 102 PEG_TXN6_R 7 21 3
GND PEX_TX6# PEG_TXN7_R R238 5% 10K 0402 Main_VGA_DIS# MXM_DP_HPD UMT DP_TX0P LANE_0P
3
GND
173 96 PEG_TXN7_R 7 +3V_MXM 3 1 2
GND PEX_TX7# PEG_TXN8 R233 5% 10K 0402 NI
2
174 90 PEG_TXN8 7 208
GND PEX_TX8# PEG_TXN9 I DP_D_L0 20V
1
179 84 PEG_TXN9 7 214
GND PEX_TX9# DP_D_L1

THERM
180 78 PEG_TXN10 PEG_TXN10 7 13 MXM_TH_OVERT# MXM_TH_OVERT# 20 220 100mA

2
GND PEX_TX10# PEG_TXN11 MXM_TH_ALERT# TH_OVERT# DP_D_L2 DP_CONN SHIELD2
185 72 PEG_TXN11 7 13 MXM_TH_ALERT# 22 226 22
GND PEX_TX11# PEG_TXN12 TH_ALERT# DP_D_L3 I Change Footprint

In
186 66 PEG_TXN12 7 24
GND PEX_TX12# PEG_TXN13 FAN_PWM VCC3 MODE1: output port selection
191 60 PEG_TXN13 7 236
GND PEX_TX13# PEG_TXN14 MXM_PW RLV R232 0 SBDATA_R1 DP_D_HPD R313 4.7K L: DP output is the MUX output port
192 54 PEG_TXN14 7 32
GND PEX_TX14# PEG_TXN15 NI 0402 5% SBCLK_R1 SMB_DAT V_1P1_CORE NI 5% 0402 H: TMDS output is the MUX output port
197 48 PEG_TXN15 7 34 29
GND PEX_TX15# SMB_CLK HDMI_CEC MODE1 R510 4.7K M: TMDS output is the MUX output port, the HDMI_ID is enabled.
198 31
GND DVI_HPD NI 5% 0402
203
GND VCC3
204 126 159
GND PEG_TXP0_R KEY RSVD R514 4.7K MODE2 : power down and configuration control
209 150 PEG_TXP0_R 7 127 161
GND PEX_TX0 PEG_TXP1_R KEY RSVD I 5% 0402 L: Automatic power down is enabled & Automatic squelch is disabled
210
GND PEX_TX1
144 PEG_TXP1_R 7 128
KEY RSVD
163 Swap pin H: Automatic power down is disabled & Automatic squelch is disabled
215 138 PEG_TXP2_R PEG_TXP2_R 7 129 165 R718 5% MODE2 R516 4.7K
GND PEX_TX2 PEG_TXP3_R KEY RSVD NI R329 EV@33 0402 U30 I 5% 0402 M: Automatic power down is enabled & Automatic squelch is enabled
216 122 PEG_TXP3_R 7 130 167 22K
GND PEX_TX3 PEG_TXP4_R KEY RSVD DP_TX2P DP_TX2P VCC3
221 116 PEG_TXP4_R 7 131 227 0402 1 10
GND PEX_TX4 PEG_TXP5_R KEY RSVD DP_TX2N 1 10 DP_TX2N R689 4.7K PIO: HPD Control
222 110 PEG_TXP5_R 7 132 229 2 9
GND PEX_TX5 PEG_TXP6_R KEY RSVD NI 2 9 I 5% 0402 L: IN1_HPDX & IN2_HPDX are 3.3V CMOS outputs to GPU (default)
228 104 PEG_TXP6_R 7 231 3
GND PEX_TX6 PEG_TXP7_R RSVD UMA_HPD 5% DP_HPD GND_3/8 DP_HPD PIO R690 4.7K H: IN1_HPDX = inverted HPD @ 0.9V
244 98 PEG_TXP7_R 7 38 233 4 7
GND PEX_TX7 OEM RSVD 4 7

i-
250 92 PEG_TXP8 39 235 DP_CAD 5 6 DP_CAD I 5% 0402 IN2_HPDX = HPD @ 3.3V
PEG_TXP8 7

3
GND PEX_TX8 PEG_TXP9 OEM RSVD 5 6 M: IN1_HPDX = HPD @ 3.3V
251 86 PEG_TXP9 7 40 237
GND PEX_TX9 PEG_TXP10 OEM RSVD IN2_HPDX = inverted HPD @ 0.9V
256
GND PEX_TX10
80 PEG_TXP10 7 +3V_MXM 41
OEM RSVD
238 Q40 5% RClamp0524P
VCC3
257 74 PEG_TXP11 PEG_TXP11 7 5% 42 239 ME2N7002E I R328 EV@100K 0402 NI
GND PEX_TX11 PEG_TXP12 DP AUDIO OEM RSVD SOT23-3 Q40_G R312 0 UMA_HPD_R U59
262 68 PEG_TXP12 7 I T63 43 240 2
GND PEX_TX12 PEG_TXP13 OEM RSVD NI NI 5% 0402 DP_AUXP DP_AUXP IN1_PEQ R691 4.7K IN1_PEQ/IN2_PEQ: Input Equalization Control
263 62 PEG_TXP13 7 0402 44 241 1 10
GND PEX_TX13 PEG_TXP14 MXM CN_45 OEM RSVD 60V DP_AUXN 1 10 DP_AUXN NI 5% 0402 L: Low RX EQ setting (LEQ), (default)
268 56 PEG_TXP14 7 T62 45 242 2 9
GND PEX_TX14 PEG_TXP15 10K OEM RSVD 250mA R316 2 9 IN2_PEQ R692 4.7K H: High RX EQ setting (HEQ)
269 50 PEG_TXP15 7 243 3
GND PEX_TX15 R239 RSVD DP_TX3N GND_3/8 DP_TX3N NI 5% 0402
275 10 245 100K 4 7

1
GND RSVD RSVD DP_TX3P 4 7 DP_TX3P
12 247 0402 5 6
RSVD RSVD 5 6
26 14 249
GPIO0 RSVD RSVD NI 5% RClamp0524P
28 16
GPIO1 MXM_PW RLV R240 0 MXM_PW R_LEVEL RSVD 5% NI R332 EV@33 0402 NI
30 MXM_PW R_LEVEL 11
GPIO2 I 5% 0402 MXM3_2.0 CONNECTOR U28
Critical DP_TX1N DP_TX1N VCC3
B
To low power status mode 1 10 B
MXM3_2.0 CONNECTOR
Critical
I
LCDVCC
I
+12V
is VIN_MXM NI R331 5%
DP_TX1P
EV@33 0402
DP_TX0N
DP_TX0P
2
3
4
5
1
2
GND_3/8
4
5
10
9

7
6
9

7
6
DP_TX1P

DP_TX0N
DP_TX0P
VIN_MXM L37 NI HI0805R800R-105A 80 ohm
0805 5% RClamp0524P C711 C712 C713 C714 C715
L38 NI HI0805R800R-105A 80 ohm NI R330 EV@33 0402 NI 0.1U 0.1U 0.1U 0.1U 0.1U
C82 0805 0402 0402 0402 0402 0402
0.1U L39 NI HI0805R800R-105A 80 ohm
0805 NI R248 5% 0 I I I I I
0402 X7R X7R X7R X7R X7R
C255 C254 C251 C245 C259 C242 C256 0402
C408 C406 10U 4.7U 1U 1U 0.1U 0.1U 100U
I Activate: H 3VSB 10V 10V 10V 10V 10V
10U 10U X7R +19V_MXM
1206 1206
1206
I
0805
I
0603
I
0603
NI
0402
I
0402
I
7343
NI
10V MXM_ENABLE
MAINON I C214 0.1U
kn
NI NI X5R X5R X5R X5R X5R X5R 25V L9 I HI0805R800R-105A 80 ohm R245 10K X7R 10V 0402
X5R
25V
X5R
25V
25V 25V 25V 25V 25V 25V MXM_LVDS_CONNECT
LCDVCC L8 I
0805
HI0805R800R-105A 80 ohm
VCC3
I 5% 0402

5
+5V_MXM 0805 MXMPWR_EN 1 PWRGD_30MS 26,33,35,36
L11 I HI0805R800R-105A 80 ohm MXMPW R_EN 4
0805 2 MXM_TH_OVERT#_R
CON1

3
PLTRST# U22
29 30 MC74VHC1G09DFT2G
C601 C228 C229 C231 C232 27 28 I
LVDS_MXM_LTX1# 25 26 LVDS_MXM_LTX2
10U 1U 1U 0.1U 0.1U 23 24
max low power consumption
0805 0402 0402 0402 0402 LVDS_MXM_LTX1 LVDS_MXM_LTX2#
21 22 for S5: 2uA
I I I I I LVDS_MXM_LTX0# 19 20 LVDS_MXM_LTX3
Y5V X5R X5R X7R X7R LVDS_MXM_LTX0 17 18 LVDS_MXM_LTX3# 3VSB
Te

10V 6.3V 6.3V 10V 10V LVDS_MXM_UCLK# 15 16 LVDS_MXM_LCLK


LVDS_MXM_UCLK 13 14 LVDS_MXM_LCLK# C147 0.1U 0402
11 12 I X7R 10V
LVDS_MXM_UTX3# 9 10 LVDS_MXM_UTX0 MXM Reset

5
LVDS_MXM_UTX3 7 8 LVDS_MXM_UTX0# 1
LVDS_MXM_UTX2# 5 6 LVDS_MXM_UTX1 MXM_RST# 4
LVDS_MXM_UTX2 3 4 LVDS_MXM_UTX1# 2 PCIE_RST# 17,19,22,23,26,29
1 2

3
LCD_CON30 U17 max low power consumption
87216-300x-30p-ldv-smt 3VSB TC7SH08FU
I I
for S5: 2uA

R219 470K PW RGD_30MS


NI 5% 0402 C199
w.

0.1U 3VSB
LVDS PIN Swap 0402 C203
NI 0.1U
R767 X7R 0402 0
R766 R249 R250 10V I R98 5%
510K VCC +5V_MXM
7

0402 20K 20K 100 U21 X7R I 0805


R189 0 SBDATA_R1 10V
GNDVCC
S

4,26 SBDATA SBDATA_R1 26 I 0402 0402 0402


I 5% 0402 U21_2 2 5 U21_5 R223 100 MXM_TH_OVERT#_R
5% I I I D Q I 5% 0402 +3V_MXM
MXM_PWRGD 5% 5% Q37_D 5% 1 3
CP 0
R

A Q R272 5%
A
VCC3
3

74LVC1G74DP I 0805
6

4
2

Q37 MSOP8
ME2N7002E U21_6 I
4,26 SBCLK R175 0 SBCLK_R1 SBCLK_R1 26 MXM_TH_OVERT# 1 3 Q46_D R794 0 Q37_G 2 250mA C230 C227
ww

I 5% 0402 I 5% 0402 4.7U 1U


SOT23-3 C195 R222
I 0603 0402
Q46 0.1U 1K I I
3,20,26,29 SMBDATA_MAIN R183 0 60V 0402 0402
1

NI 5% 0402 ME2N7002E X5R X5R


250mA NI I 6.3V 6.3V
R172 0 SOT23-3 X7R 5%
3,20,26,29 SMBCLK_MAIN
NI 5% 0402 I 10V 3VSB
R241 0
60V NI 5% 0402
C405
1

1000P
0402
50V
Quanta Computer Inc.
2

X7R
NI
PROJECT : ZN5
Size Document Number Rev
X4
MXM3.0
Date: Friday, March 05, 2010 Sheet 16 of 40
5 4 3 2 1
1 2 3 4 5 6 7 8

VCC3
L31 I
1
AVDD_PLL
0603 600 ohm
2 IV@BLM18AG601SN1D
VCC2.5
L29 I
1 2
0603 600 ohm
IV@BLM18AG601SN1D
DVDD_7308
VCC3
L32
1
200mA
2
I 0603 600 ohm
IV@BLM18AG601SN1D
LVDD1 VCC3
L33
1
I
2
0603 600 ohm
IV@BLM18AG601SN1D
LVDD2
VCC2.5
L30
1 2
I 0603 600 ohm
IV@BLM18AG601SN1D
AVDD_7308 17
200mA 200mA 200mA 200mA

C523 C521 C513 C527 C526 C525


C514 C509 C507 C502 C522 IV@10U [email protected] [email protected] IV@10U [email protected] [email protected] C498 C503 C504 C500
IV@10U [email protected] IV@10U [email protected] [email protected] 0805 0402 0402 0805 0402 0402 IV@10U [email protected] [email protected] [email protected]
0805 0402 0805 0402 0402 I I I I I I 0805 0402 0402 0402

m
I I I I I X5R X7R X7R X5R X7R X7R I I I I
A X5R X7R X5R X7R X7R X5R X7R X7R X7R A
6.3V 10V 10V 6.3V 10V 10V
6.3V 10V 6.3V 10V 10V 6.3V 10V 10V 10V

co
7 SDVO_RED SDVO_RED
7 SDVO_RED# SDVO_RED#
7 SDVO_GREEN SDVO_GREEN
7 SDVO_GREEN# SDVO_GREEN#

a.
7 SDVO_BLUE SDVO_BLUE
7 SDVO_BLUE# SDVO_BLUE#
7 SDVO_CLK SDVO_CLK
7 SDVO_CLK# SDVO_CLK#
AVDD_7308
I R78 5% 10K TST2
I 5% 0402 TST1

si
R77 10K DVDD_7308
0402

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
TST1
TST2
AVDD

SDVOB_CLK+
AGND

SDVOB_B+
AVDD

SDVOB_G+
AGND

SDVOB_R+
TST3
DVDD
SDVOB_CLK--

SDVOB_B-

SDVOB_G-

SDVOB_R-
VCC2.5 LVDD1

ne
10V
R86 20 INT_LVDS_BLON INT_LVDS_BLON 1 48 STALL# I C95 [email protected] 0402 X7R SDVO_STALL# SDVO_STALL# 7
INT_LVDS_DIGON ENABKL SDVOB_STALL- STALL I C96 [email protected] 0402 X7R SDVO_STALL
IV@10K 20 INT_LVDS_DIGON 2 ENAVDD SDVOB_STALL+ 47 SDVO_STALL 7
B 0402 AVDD_PLL 3 46 INT_TXLOUT#0 10V B
PCIE_RST# AVDD_PLL LDC0* INT_TXLOUT0
I 16,19,22,23,26,29 PCIE_RST# 4 RESET* LDC0 45
SDVO_AS 5 Chrontel 44
5% SDVO_CTRLCLK AS LVDD INT_TXLOUT#1
7 SDVO_CTRLCLK 6 SPC LDC1* 43
SDVO_CTRLDATA 7 CH7308 42 INT_TXLOUT1

do
7 SDVO_CTRLDATA SPD LDC1
R88 8 41
SDA_PROM AGND_PLL LGND INT_TXLOUT#2
IV@100K
SCL_PROM
9 SD_PROM 64 pin - LQFP LDC2* 40
INT_TXLOUT2
0402 10 SC_PROM LDC2 39
LCD_DAT 11 38
NI 16,20 LCD_DAT SD_DDC LVDD
16,20 LCD_CLK LCD_CLK 12 37 INT_TXLCLK#
5% SC_DDC LL1C* INT_TXLCLK
13 DGND LL1C 36
C119 IV@18P 50V NPO SDVO_XI VCC2.5
I 0402 SDVO_XO
14
15
XI LGND 35
34 INT_TXLOUT#3 VCC3 500mA output

In
XO LDC3*
2

Y2 16 33 INT_TXLOUT3 6.3V
DVDD LDC3

VSWING
[email protected] DVDD_7308 X5R U36
LDC7*

LDC6*

LDC5*

LDC4*
DGND
LL2C*

LGND

LGND
LVDD

LVDD
30PPM
LDC7

LDC6

LDC5

LDC4
I 1 5
LL2C

Critical VIN VOUT


0603
1

C124 IV@18P 50V NPO I 3 C496


I 0402 U29 [email protected] EN U36_4 IV@1U
4
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
LQFP64 C501 NC 0402
2 GND

i-
3 14M_CH7308B 14M_CH7308B R111 5% IV@0 SDVO_XI Critical 6.3V
NI 0402 LVDD2 I VSWING R125 1% [email protected] IV@G9001-250T11U X5R
I 0402 Critical C506 I
I [email protected]
VCC2.5 R91 5% [email protected] SDVO_CTRLCLK INT_TXUOUT#4 0402
I 0402 INT_TXUOUT4 10V
VCC2.5 R93 5% [email protected] SDVO_CTRLDATA INT_TXUOUT#5 X7R
I 0402 INT_TXUOUT5 NI

C
is INT_TXUOUT#6
INT_TXUOUT6
C
INT_TXUOUT#7
INT_TXUOUT7
INT_TXUCLK#
INT_TXUCLK
VCC
kn

R94 R95
U9
5.6K 5.6K
1 8 0402 0402 0402
INT_TXLOUT#0 IV@0X2 5% 4P2R RN2 I TXLOUT#0 A0 VCC U9_7 NI R96 5% 0
1 2 TXLOUT#0 20 2 A1 WP 7 NI NI
INT_TXLOUT0 3 4 TXLOUT0 3 6 SCL_PROM
Te

TXLOUT0 20 A2 SCL 5% 5%
INT_TXLOUT#1 IV@0X2 5% 4P2R 1 2 RN3 I TXLOUT#1 TXLOUT#1 20 4 5 SDA_PROM
INT_TXLOUT1 TXLOUT1 VSS SDA
3 4 TXLOUT1 20
INT_TXLOUT#2 IV@0X2 5% 4P2R 1 2 RN4 I TXLOUT#2 TXLOUT#2 20
INT_TXLOUT2 3 4 TXLOUT2 TXLOUT2 20 M24C16
INT_TXLOUT#3 IV@0X2 5% 4P2R 1 2 RN6 I TXLOUT#3 TXLOUT#3 20 SOIC8 C100
INT_TXLOUT3 3 4 TXLOUT3 TXLOUT3 20 NI 0.1U
INT_TXLCLK# IV@0X2 5% 4P2R 1 2 RN5 I TXLCLK# TXLCLK# 20 0402
INT_TXLCLK TXLCLK
w.

3 4 TXLCLK 20 NI
INT_TXUOUT#4 IV@0X2 5% 4P2R 1 2 RN11 I TXUOUT#4 TXUOUT#4 20
INT_TXUOUT4 3 4 TXUOUT4 X7R
TXUOUT4 20
INT_TXUOUT#5 IV@0X2 5% 4P2R 1 2 RN10 I TXUOUT#5 TXUOUT#5 20 10V
INT_TXUOUT5 3 4 TXUOUT5 TXUOUT5 20
INT_TXUOUT#6 IV@0X2 5% 4P2R 1 2 RN9 I TXUOUT#6 TXUOUT#6 20
INT_TXUOUT6 3 4 TXUOUT6 TXUOUT6 20
INT_TXUOUT#7 IV@0X2 5% 4P2R 1 2 RN8 I TXUOUT#7 TXUOUT#7 20
ww

D INT_TXUOUT7 3 4 TXUOUT7 TXUOUT7 20 D


INT_TXUCLK# IV@0X2 5% 4P2R 1 2 RN7 I TXUCLK# TXUCLK# 20
INT_TXUCLK 3 4 TXUCLK TXUCLK 20

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
LVDS TRANSMITTER
Date: Friday, March 05, 2010 Sheet 17 of 40
1 2 3 4 5 6 7 8
5 4 3 2 1

+19V V_SM V_FSB_VTT V_FSB_VTT V_SM +19V V_FSB_VTT V_FSB_VTTV_1P1_CORE V_1P1_CORE

C145 C18 C328 C326 C368 C486 C394 C455 C480 C441
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
P60 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
GND3 7 I i I I I I I I I I
6 SATA_TX0 SATA_TX0 13
RXP SATA_TX#0 VCC X5R VCC X7R X7R X7R X7R X5R X7R X7R X7R X7R
RXN 5 SATA_TX#0 13
4 0.01U 25V 10V 10V 10V 10V 25V 10V 10V 10V 10V
GND2

m
3 SATA_RD_RX#0 C161 I 0402 X7R 25V SATA_RX#0 SATA_RX#0 13 VCCP VCC3 VCC3 V_FSB_VTT
TXN
D TXP 2 D
1 SATA_RD_RX0 C160 I 0402 X7R 25V SATA_RX0 SATA_RX0 13 V_1P1_CORE
GND1 V_1P1_CL_MCH V_1P1_CL_MCH V_1P1_CL_MCH VCC3 VCC3 VCC3 VCC3 VCC3 VCC3
SATA 7P 0.01U

co
sata-c12712-10704-l-7p-r
I
C763
0.1U C450 C459 C80 C495 C93 C497 C91 C529 C139
+12V VCC 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
0402
NI 0402 0402 0402 0402 0402 0402 0402 0402 0402
X7R I I I I I I I I I

a.
10V X7R X7R X7R X7R X7R X7R X7R X7R X7R
10V 10V 10V 10V 10V 10V VCC 10V 10V 10V
V_1P1_CL_MCH VCC3

P160 +19V VCC3 VCC3 VCC3 VCC3 V_1P5_ICH V_1P5_ICH V_1P5_ICH V_1P5_ICH

si
2
3 C490 C535 C577 C592 C587 C138 C165 C212 C215 C258
4
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
SATA POW ER + C279 C277 C289 + C297 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
I 100U 10U 10U 100U I I I I I I I I I I
6.3*7.7 1206 0805 6.3*7.7
VCC3 X5R VCC X7R X7R X7R X7R VCC3 X7R X7R X7R VCC3 X7R VCC3 X7R
I I I I 25V 10V 10V 10V 10V 10V 10V 10V 10V 10V

ne
105C X5R Y5V 105C
20% 25V 10V 20% VCC3 VCC VCC3 VCC3
16V 16V
C VCC3 C

C257 C653 C290 C286


0.1U 0.1U 0.1U 0.1U

do
0402 0402 0402 0402
C81
I I I I
0.1U
+19V +19V +19V +19V +19V +19V +19V +19V +19V +19V +19V +19V +19V +19V X7R X7R VCC X7R VCC X7R
0402
10V 10V 10V 10V
C718 C719 C720 C721 C723 C722 C724 C725 C727 C726 C728 C729 C730 C731 I
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U X7R
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 10V

In
I I I I I I I I I I I I I I
X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V 25V

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC +19V
VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3

i-
C732 C733 C734 C735 C736 C737 C738 C739 C740 C741
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U C759 C742 C743 C745 C744 C747 C746 C749 C748
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
I I I I I I I I I I 0402 0402 0402 0402 0402 0402 0402 0402 0402
X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R I I I I I I I I I
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V X5R X7R X7R X7R X7R X7R X7R X7R X7R
25V 10V 10V 10V 10V 10V 10V 10V 10V

+19V +19V +19V +19V +19V


is
B VCC V_1P5_ICH B
C775 C776
C760 C761 C762 0.1U 0.1U C756 C757
0.1U 0.1U 0.1U 0402 0402 0.1U 0.1U
0402 0402 0402 I I 0402 0402
kn

NI NI NI X5R X5R I I
X5R X5R X5R 25V 25V X7R X7R
25V 25V 25V 10V 10V

Near MXM 19V VCC3 30 ODD_EJECT# R793 5% 0


NI 0402
CN18
VCC
Te

R717 5% 0 ODD_EJECT#_R 12
13 ODD_EJECT_SIG# 11
I 0402
10
R294_1 9
I C261 0.01U 0402 X7R 25V 8
13 SATA_RX#1 7
SATA_RX#1_C
C244 C246 C236 I C262 0.01U 0402 X7R SATA_RX1_C 6
13 SATA_RX1 5
0.1U 10U 100U 25V
4
w.

0402 0603 7343 R294 SATA_TX#1_C


I R243 0 SATA_TX#1_RI C263 0.1U 0402 X7R 10V SATA_TX1_C 3
I I I 1K 13 SATA_TX#1 2
I 0402 5%
Y5V X5R 20% 1
16V 6.3V 10V 0402 I R778 0 SATA_TX1_R I C264 0.1U 0402 X7R 10V ODD_CONN I
5% 13 SATA_TX1
0402 5%
ww

A A

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
SATA HDD/ODD
Date: Friday, March 05, 2010 Sheet 18 of 40
5 4 3 2 1
1 2 3 4 5 6 7 8

For wirlesss Lan card/Bluetooth 19


J105
3V_SLOT1 51 52 3V_SLOT1
Reserved +3.3Vaux
49 Reserved GND 50
47 Debug(PCIRST#) +1.5V 48 V_1P5_ICH
45 Debug(PCICLK) LED_W PAN# 46
43 GND LED_W LAN# 44
41 42 J105_42 R304 5% 10K VCC3
+3.3Vaux LED_W W AN# NI 0402
39 40

m
+3.3Vaux GND USB5
A
37 GND USB_D+ 38 USB5 12 A
35 36 USB#5
GND USB_D- USB#5 12
PCIE_TX2 33 34
12 PCIE_TX2 PETp0 GND
PCIE_TX#2 31 32 J105_32 I R305 5% 0 0402 SMBDATA_RESUME

co
12 PCIE_TX#2 PETn0 SMB_DATA SMBDATA_RESUME 11,15,26
29 30 J105_30 I R306 5% 0 0402 SMBCLK_RESUME SMBCLK_RESUME 11,15,26
0402 I X7R 10V GND SMB_CLK
27 GND +1.5V 28 V_1P5_ICH
PCIE_RX2 C252 0.1U PCIE_RXP2_WLAN 25 26
12 PCIE_RX2 PERp0 GND
PCIE_RX#2 0402 PCIE_RXN2_WLAN 23 24 3V_SLOT1
12 PCIE_RX#2 PERn0 +3.3Vaux
C253 0.1U X7R 10V 21 22 PCIE_RST#
GND PERST# PCIE_RST# 16,17,22,23,26,29
PCLK_DEBUG I 19 20 J105_20 R307 5% 10K 3V_SLOT1
3 PCLK_DEBUG Reserved W _DISABLE#
PCIRST# 17 18 I 0402
12 PCIRST# Reserved GND

a.
15 16 LAD0
CLK_PCIE_MINI GND Reserved LAD1 LAD0 11,22,26,29,30
3 CLK_PCIE_MINI 13 REFCLK+ Reserved 14
CLK_PCIE_MINI# 11 12 LAD2 LAD1 11,22,26,29,30
3 CLK_PCIE_MINI# REFCLK- Reserved
9 10 LAD3 LAD2 11,22,26,29,30
GND Reserved LFRAME# LAD3 11,22,26,29,30
7 CLKREQ# Reserved 8
5 6 LFRAME# 11,22,26,29,30
Reserved +1.5V V_1P5_ICH
3 4

GND

GND
Reserved GND

si
PCIE_WAKE# R293 5% 0 J105_1 1 2 3V_SLOT1
I 0402 W AKE# 3.3Vaux
3VSB C15706-190A1-L

53

54
I

10
11
12
13
14
9
C267 X5R

ne
0.1U 6.3V V_1P5_ICH 3V_SLOT1

GND
GND
GND
GND
GND
GND
0603
0402 4.7U
I C774
B 1 GND OC1 8 B
X7R 2 7
IN OUT1 3V_SLOT1
CLAMP_CTRL R308 5% 20K Q39_D R302 5% 10V 33 U54_3 3 6 3V_SLOT2 C269 C270 C617 C268 C618 C615
26,36 CLAMP_CTRL EN1 OUT2
I 0402 I 0402 4 5 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
EN2 OC2

do
0402 0402 0402 0402 0402 0402
3VSB R309 5% 20K Q39_G C773
U54 I I I I I I
3

NI 0402 4.7U
Q39 TPS2060DGN 0603 X7R X7R X7R X7R X7R X7R
ME2N7002E Critical 6.3V 10V 10V 10V 10V 10V 10V
R310 5% 1K 2 250mA MSOP8 X5R
26 V_3P3_SLOT_EN
I 0402 I I
SOT23-3
I

In
60V
1

For TV MODULE CARD

i-
J106
3V_SLOT2 51 52 3V_SLOT2
Reserved +3.3Vaux
49 Reserved GND 50
47 Debug(PCIRST#) +1.5V 48 V_1P5_ICH
45 Debug(PCICLK) LED_W PAN# 46
43 GND LED_W LAN# 44
41 42 J106_42 R242 5% 10K VCC3
+3.3Vaux LED_W W AN#

C
39
37
is
+3.3Vaux
GND
GND
USB_D+
40
38
NI
USB3
0402
USB3 12 C
35 36 USB#3
GND USB_D- USB#3 12
PCIE_TX3 33 34
12 PCIE_TX3 PETp0 GND
PCIE_TX#3 31 32 J106_32 I R254 5% 0 0402 SMBDATA_RESUME
12 PCIE_TX#3 PETn0 SMB_DATA
29 30 J106_30 I R256 5% 0 0402 SMBCLK_RESUME
I 0402 X7R 10V GND SMB_CLK
27 GND +1.5V 28 V_1P5_ICH
PCIE_RX3 C241 0.1U PCIE_RXP3_TV 25 26
12 PCIE_RX3
kn

PCIE_RX#3 C234 0.1U PCIE_RXN3_TV PERp0 GND


12 PCIE_RX#3 23 PERn0 +3.3Vaux 24 3V_SLOT2
I 0402 X7R 10V 21 22 PCIE_RST#
GND PERST#
19 NC W _DISABLE# 20
17 AUX1/DETECT GND 18

15 GND NC 16
CLK_PCIE_MINI2 13 14
3 CLK_PCIE_MINI2 REFCLK+ BCAS_RST
CLK_PCIE_MINI2# 11 12
Te

3 CLK_PCIE_MINI2# REFCLK- BCAS_CLK


9 GND BCAS_DATA 10
7 CLKREQ# BCAS_PW R 8
5 AUX2/NC +1.5V 6 V_1P5_ICH
3 4
GND

GND

R292 5% 0 J106_1 COEX1 GND


26 PCIE_WAKE# 1 W AKE# 3.3Vaux 2 3V_SLOT2
I 0402
C15706-190A1-L
53

54

I
w.

V_1P5_ICH
3V_SLOT2

C211 C248 C221


0.1U 0.1U 0.1U C205 C208 C249
ww

D 0402 0402 0402 0.1U 0.1U 0.1U D

I I I 0402 0402 0402


X7R X7R X7R I I I
10V 10V 10V X7R X7R X7R
10V 10V 10V

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
MINI PCIE(WLAN/TV)
Date: Friday, March 05, 2010 Sheet 19 of 40
1 2 3 4 5 6 7 8
5 4 3 2 1

VCC3 20
BACKLIGHT CONTROL 5% EEPROM IIC Selection
I
0402
Q53_C
PANEL EDID
VCC3
DATA
VCC3 EDID_ROM
10K

3
R116
Address:A8/A9

m
C108 0.1U X7R Q53 R512
VCC3
D I 040210V EDID_ROM 2 DDTC144EUA-7-F 10K D
100mA 0402 C134 0.1U 0402 X7R 10V

5
I VCC3 VCC3

co
U12_2 UMT I U58
2

1
4 DISPON I VCC 5% 8 1
BLON 50V VCC A0
1 7 WC# A1 2
U12 6 3
SCL A3

2
TC7SH08FU 5 4 R154 R142

3
G1 SDA GND 4.7K 4.7K
C123 U15 0402 0402
SHORT_PAD

a.
I 0.22U 16 8 NI M24C02 5% 5%

1
C110 VCC GND I I
0402
X7R 0.1U C104 1000P
VCC3

1
10V 0402 I I SOIC8
0402 16,17 LCD_CLK 2 IA0
Y5V 5 4 EEPROM_SCL
NI 16,17 LCD_DAT IB0 YA
5

10V 11 I
X7R IC0 EEPROM_SDA
2 14 ID0 YB 7
R105 0 U57_1 4 U57_4 D3 SDM10K45-7-F BLON 50V

si
17 INT_LVDS_BLON
I 5% 0402 1 I 100mA 40V 3,16,26,29 SMBCLK_MAIN 3 9 C144 C137
IA1 YC

1
U57 DSM 6 1000P 1000P
TC7SH08FU
3,16,26,29 SMBDATA_MAIN
10
IB1
12 CN9 EMI 0402 0402
3

IC1 YD VCC 50V 50V


13

2
R127 5% 2.2K ID1 X7R X7R
VCC3 1
I NI 0402 EEPROM_SCL I I
R106 0 EDID_ROM EEPROM_SDA 2
16 EV_LVDS_BLON 13 EDID_ROM 1 S OE 15 3

ne
I 5% 0402
SN74CBT3257CPWR 4
TSSOP16 EDID CONNECTOR
Critical 85205-04xx-4p-l
C C
R131 I I
PANEL VCC CONTROL VCC3
10K
0402 LCDVCC

do
I
5%
Discharge panel power
3VSB R789
10K
R515 LCDVCC
0402 VCC
NI 220
R137 DIGON_R 0805

In
10K 5% LCDVCC
X7R 0.1U C132 I
0402
144mil
3

10V 0402 I 5% C86

Q25_D
I Q62 11 VCC SOURCE1 1 0.1U
5% ME2N7002E 6 2
NC SOURCE2 0402

3
DIGON_R# 2 250mA LCDVCC R788 11 U16_7 7 3
DIGON_R I 1% 0402 ILIMIT SOURCE3 C533 C534 Q25 I
SOT23-3 8 ENABLE/FAULT SOURCE4 4
U16_9 9 5 10U 0.1U ME2N7002E X7R

i-
dv/dt SOURCE5
3

I 10 0603 0402 DIGON_R# 2 10V


GND 250mA
Q52 60V I I
1

C758 U16 X5R X7R SOT23-3


16 EV_LVDS_VDDEN 2 DDTC144EUA-7-F

1
0.1U NIS5135MN1TXG 6.3V 10V I
100mA
0402 DFN10 C135 60V

1
R525 UMT NI CRITICAL 3300P
1

2
10K I X7R I 0402
0402 50V 10V
is NI
NI X7R
B B
5% 50V
3

Q61
LCD PANEL CONNECTOR
kn

17 INT_LVDS_DIGON 2 DDTC144EUA-7-F
100mA
R511 UMT
1

10K I LCDVCC
0402 50V
NI
Te

5% CN7

29 30
27 28
TXLOUT#1 25 26 TXLOUT2
17 TXLOUT#1 23 24 TXLOUT2 17
TXLOUT1 TXLOUT#2
TO CONVERTER CONNECT 17 TXLOUT1
TXLOUT#0
21
19
22
20 TXLOUT3
TXLOUT#2 17
w.

CN10 F1 17 TXLOUT#0 17 18 TXLOUT3 17


17 TXLOUT0 TXLOUT0 TXLOUT#3
15 16 TXLOUT#3 17
1 VIN_LCD 2 1 +19V 17 TXUCLK# TXUCLK# TXLCLK TXLCLK 17
C121 C120 C151 C140 TXUCLK 13 14 TXLCLK#
2 17 TXUCLK 11 12 TXLCLK# 17
3 10U 0.1U 0466003.NR 0.1U 10U
1206 0402 Critical 0402 1206 TXUOUT#7 9 10 TXUOUT4
4 17 TXUOUT#7 7 8 TXUOUT4 17
5 DISPON I I 3A I I 17 TXUOUT7 TXUOUT7 TXUOUT#4 TXUOUT#4 17
VADJ-1 X5R Y5V 0.02 ohm Y5V X5R TXUOUT#6 5 6 TXUOUT5
6 17 TXUOUT#6 TXUOUT5 17
ww

25V 25V 1206 25V 25V TXUOUT6 3 4 TXUOUT#5


A
7 17 TXUOUT6 1 2 TXUOUT#5 17 A
8 I
9 32V LVDS CONNECTOR
10 L6 5% 0 I
ADJ 30
I 0402 87216-300x-30p-ldv-smt
INV CONNECTOR
2

I LVDS PIN Swap


C118
PWM CONTROL Quanta Computer Inc.
1000P
1

0402 PROJECT : ZN5


NI Size Document Number Rev
X7R X4
50V LCD PANEL
Date: Friday, March 05, 2010 Sheet 20 of 40
5 4 3 2 1
A B C D E

12 PCIE_RX6 C273
I
C274
0.1U 0402

0.1U 0402
X7R
10V
X7R
PCIE_RX6_C

PCIE_RX#6_C
52

53
U10

GLAN_TXP
MDI_N_0
MDI_P_0
26
27

22
LAN0_MDI0-
LAN0_MDI0+

LAN0_MDI1-
LAN0_MDI0-
LAN0_MDI0+
22
22 21
12 PCIE_RX#6 GLAN_TXN MDI_N_1 LAN0_MDI1- 22

GLCI
I 10V 23 LAN0_MDI1+
MDI_P_1 LAN0_MDI1+ 22
55

MDI
12 PCIE_TX6 GLAN_RXP
20 LAN0_MDI2-
MDI_N_2 LAN0_MDI2- 22
56 21 LAN0_MDI2+
12 PCIE_TX#6 GLAN_RXN MDI_P_2 LAN0_MDI2+ 22
4 4
16 LAN0_MDI3- V_3P3_CL
MDI_N_3 LAN0_MDI3- 22
R667 5% 33 GLAN_CLK_R 45 17 LAN0_MDI3+

m
11 GLAN_CLK JKCLK MDI_P_3 LAN0_MDI3+ 22
I 0402
11 LAN_RSTSYNC 50 JRSTSYNC VDDO_33_3 3
46 C642 C632 C281 C278 C634 C644 C639 C633
VDDO_33_46 0.1U 0.1U 0.1U 0.1U 0.1U 4.7U 4.7U 10U
42 28

co
11 LAN_TXD0 JTXD_0 AVDD_33_28 0402 0402 0402 0402 0402 0603 0603 0805
C631 R663
43 NI NI NI I I I I NI
11 LAN_TXD1 JTXD_1
C631_1 GLAN_CLK 5 X7R X7R X7R X7R X7R X5R X5R X5R
DVDD_105_5 10V 10V 10V 10V 10V 6.3V 6.3V 6.3V
44
11 LAN_TXD2 JTXD_2
BOAZMAN DVDD_105_8 V_3P3_CL

LCI
8 VCC1.05M_LAN
10P 0
11 LAN_RXD0 47 JRXD_0
0402 0402
82567 DVDD_105_33 33 C647 C298 R687 Q60

a.
NI NI 11 LAN_RXD1 48 C285 C287 C284 C621 C620 10U 0.1U 5.11K BCP69T1G
JRXD_1

3
COG 5% 38 0.1U 0.1U 1000P 4.7U 10U 0805 0402 0402 SOT223-4
DVDD_105_38 25V
49

E
50V 11 LAN_RXD2 JRXD_2 0402 0402 0402 0603 0805 I I CTRL18 I
1 1A
I I I I I X5R X7R 1% B I
AVDD_18_11 11 364mA

C
C
LAN_RSET near to 82567 1000mil R326 1% 4.99K LAN_RSET 15 14 X7R X7R X7R X5R X5R 6.3V 10V
I 0402 RSET AVDD_18_14 10V 10V 50V 6.3V 6.3V
19

2
4
AVDD_18_19 Place 0.5"x0.5" Plane under Q37
AVDD_18_18 18

si
4 24 VCC1.8M_LAN VCC1.8M_LAN
3 22 LAN_ACT# LED_0 AVDD_18_24 C648 3
22 LAN_LINK# 2 LED_1 AVDD_18_25 25
1 41 10U
22 LAN_LINK1# LED_2 AVDD_18_41 0805 C296 C294 C295 C293 C275 C280 C650
AVDD_18_54 54
32 I 1000P 0.1U 0.1U 1000P 0.1U 0.1U 4.7U Boazman power up Sequencing
AVDD_18_32 X5R
AVDD_18_30 30 0402 0402 0402 0402 0402 0402 0603
Keep this resistor on TOP side 6.3V VCC3M_WOL
LAN_TESTN CTRL18 I I I I I I I
Route differentially 12 29

ne
R325 5% 0 LAN_TESTP IEEE_TEST_P CTRL18 CTRL10 X7R X7R X7R X7R X7R X7R X5R VCC1.8M_LAN
Crystal measurement 13 IEEE_TEST_N CTRL10 31
NI 0402 50V 10V 10V 50V 10V 10V 6.3V
R679 1% 1K 51 U10_51 VCC1.05M_LAN
V_3P3_CL RESERVED_NC
DIS_Reg10: NI 0402 T166 CTRL18/CTRL10 >12mil
Low : Use internal 1.0V regulator R678 1% 1K U10_34 34
I 0402 DIS_REG10 Near BJT <1" Crystal near to 82567 750mil
GND_PAD 57
Away from other signal >15mil
R682 0 BOAZ_LOM_DISABLE# 37

do
11 PM_LAN_ENABLE LAN_DISABLE_N
I 5% 0402
V_3P3_CL R681 10K
NI 5% 0402 10 LAN_XTAL1 33P C646 NPO V_3P3_CL

JTAG_TRST
XTAL1

JTAG_TMS

JTAG_TDO
JTAG_TCK
0402 I 50V

JTAG_TDI

1
R680 5% 10K U10_36 36 9
I 0402 TEST_EN XTAL2 R686 Critical Y3
1M I 25MHz
30PPM C638 C643 R669

In
2 0402 2

2
BOAZMAN 10U 0.1U 5.11K

35
40
39
7
6
NI

3
QFN56 LAN_XTAL2 C645 33P NPO 0805 0402 0402 Q58
Critical 1% I 0402 50V BCP69T1G

E
U10_35
U10_40
U10_39
I NI NI CTRL10 NI SOT223-4

U10_7
U10_6
1 B
X5R X7R 1% 25V

C
C
6.3V 10V 1A
NI

2
4
i-
VCC1.05M_LAN
T171
T167
T170
T168
T169
is
1 1
kn

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
LAN BOAZMAN 82567
Te

Date: Friday, March 05, 2010 Sheet 21 of 40


A B C D E
w.
ww
5 4 3 2 1

LAN Transformer & EOS CONN to RJ45 22


NI C665 1500P 0402 X7R 50V

NI C664 1500P 0402 X7R 50V RJ45

m
D D
J9

LAN_ACT# R703 5% 510 J9_13 L3 13


21 LAN_ACT# Y-
I 0603

co
L4 14
V_3P3_CL Y+
R10 10
21 LAN0_MDI3- NC/3-
VCC1.8M_LAN R9 9
21 LAN0_MDI3+ NC/3+
R8 8

a.
21 LAN0_MDI2- NC/2-
R7 7
21 LAN0_MDI2+ NC/2+
C654 1500p 50V TCT1 R6 6
I 0402 X7R NC/6
C655 1500p 50V TCT2 R5 5
I 0402 X7R NC/5

si
R4 4
21 LAN0_MDI1- RX-/1-
NC1 18
R3 3
21 LAN0_MDI1+ RX+/1+
NC 17
R2 2
21 LAN0_MDI0- TX-/0-
C GND 16 C
R1 1

ne
21 LAN0_MDI0+ TX+/0+
GND 15
21 LAN_LINK# LAN_LINK# R702 5% 510 GLED- L1111
I 0603 G-/O+

21 LAN_LINK1# GLED+ L1212


C663 G+/O-
1500P C662 RJ45-CONN
0402 1500P Critical

do
NI 0402 I
X7R NI
50V X7R
50V

TPM (3.16)

In
PCLK_TPM
3VSB VCC3
VCC3
U40
R658 26 10 VCC3
11,19,26,29,30 LAD0 LAD0 VDD
33 11,19,26,29,30 LAD1 23 LAD1 VDD 19
R659

i-
0402 11,19,26,29,30 LAD2 20 LAD2 VDD 24
10K 17 5 C283 C282 C629 C627
I 11,19,26,29,30 LAD3 PCLK_TPM LAD3 VSB
B 0402 3 PCLK_TPM 21 LCLK 0.1U 0.1U 0.1U 0.1U B
5%
C628_1

I GND 4 0402 0402 0402 0402


LFRAME# 22 11 R323 R324
5% 11,19,26,29,30 LFRAME# LFRAME# GND I I I I
PCIE_RST# 16 18 4.7K 4.7K
16,17,19,23,26,29 PCIE_RST# LRESET# GND X7R X7R X7R X7R
30 LPCPD# LPCPD# 28 25 0603 0603
SERIRQ LPCPD# GND 10V 10V 10V 10V
C628
is
13,26,29,30 SERIRQ 27 SERIRQ
GPIO 6 U40_6 NI NI
10P 9 2 U40_2 5% 5%
TEST/BADD GPIO2 NI R319 5% 0 0402
0402 FOR EMI 15 7 U40_7 NI R322 5% 0 0402
VCC3
I CLKRUN# PP R317 R318
TESTI 8
COG VCC3 1 4.7K 4.7K

U40_15
50V NC
kn

3 NC XTALI/32K IN 13 SUS_CLK_TPM 11 0402 0402


12 NC XTALO 14
R321 I I
SLB9635TT1.2R3.16 5% 5%
Address 4.7K
0402 TSSOP28
R303 Critical
BADD I U40_9 4.7K I
5%
Te

HIGH 4EH/4F (default) 0402


R320 I
LOW 2EH/2FH 4.7K 5%

A
DB2 stage: 0402
A
Chanhed address to "4E". NI
5%
w.

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
ww

X4
TPM & RJ45 with LAN Transformer
Date: Friday, March 05, 2010 Sheet 22 of 40
5 4 3 2 1
A B C D E

23
VCC3

CARD READER SD/MS_3V


R286
CARDREADER POWER SD/MS_3V

R592 5% 10K SD_WP#/XD_WP SD/MS_3V U18


150
I 0402 0402 1 8
R588 5% 10K MS_BS/SD_CMD/XD_WE MC_PWR_CTRL_0# GND OUT
I 2 IN OUT 7
I 0402 3 6
R556 5% 1K XD_R/B 5% IN OUT
4 EN OC 5
I 0402 C596 C539 C184 C565

LED8_P

U18_4
VCC3 10U 0.1U 0.1U 0.1U TPS2061
0805 0402 0402 0402 MSOP8
R561 NI for JMB380 C version Critical

2
R587 5% 10K XD_C_L I I I I NI
R561 5% 200K XD_READ I 0402 LED8 X5R X7R X7R X7R R171
I 0402 R550 5% 4.7K SD_CD#/XD_CD# GREEN 6.3V 10V 10V 10V 0

m
4 R557 5% 200K XD_ADD_L I 0402 LED17-21VGC-TR8 0402 4
I 0402 SD/MS_3V
MS_CD_CLK/XD_CD_R R593 22 MS_CD_CLK/XD_CD I NI

1
I 5% 0402 5% R541 5% 0
VCC3 CARD_LED I 0805
CARD POWER

co
RESERVED for JMicron -- after
R539 5% 4.7K MS_CD# C584 C584 Reserved for JMB380 C version programming can out-put VCC3
I 0402 22P throught MC_PWR_CTRL_0# signal
VCC3 0402
NI
C571 0.1U X7R NPO
I 0402 10V 50V

C562 0.1U X7R 4 IN 1 CONN

a.
I 0402 10V
MS_CD# I D38 1SS355 100mA DSM 80V
C544 0.1U X7R L1394_TPB0- R298 5% 0
Reserve for EMI
I 0402 10V NI 0402 XD_CD#
L1394_TPB0+ R299 5% 0 SD_CD#/XD_CD# I D39 1SS355 100mA DSM 80V
C572 10U X5R NI 0402
I 0805 6.3V L1394_TPA0- R287 5% 0 CN15

L1394_TPA0+
NI 0402 Reserve for JMB385 B C538
XD_CD# CN15_2
1 XD-GND1 GND 43
270P I R609 33 0402 5% 2
XD_R/B I R610 33 0402 5% CN15_3 XD-CD# CN15_42 33 5% R544 SD_WP#/XD_WP
0402 3 XD-R/B SD-WP 42
TPBIAS0 VCC3 XD_READ I R611 33 0402 5% CN15_4 4 41 0402 I

si
+1.8V_CARD I MS_CD_CLK/XD_CD I R612 33 0402 5% CN15_5 XD-RE SD-GND1 10K 5% R624 VCC3
5 XD-CE SD-CD# 40
X5R XD_C_L I R613 33 0402 5% CN15_6 6 39 0402 NI
C575 10U X5R 50V XD_ADD_L I R614 33 0402 5% CN15_7 XD-CLE SD-GND2 MS_D2/SD_D2/XD_D2 SD_CD#/XD_CD#
7 38

XD_READ
I 0805 6.3V MS_BS/SD_CMD/XD_WE I R615 33 0402 5% CN15_8 XD-ALE SD-D2 MS_D1/SD_D1/XD_D1
8 XD-WE SD-D1 37

XD_D4

XD_D5

XD_D6

XD_D7
C569 0.1U X7R R583 SD_WP#/XD_WP I R616 33 0402 5% CN15_9 9 36 MS_D0/SD_D0/XD_D0
I 0402 10V 12K XD-WP SD-D0
10 XD-GND2 SD-GND 35
C580 0.1U X7R 0402 MS_D0/SD_D0/XD_D0 I R144 33 0402 5% CN15_11 11 34 MS_CD_CLK/XD_CD
I 0402 10V I MS_D1/SD_D1/XD_D1 I R143 33 0402 5% CN15_12 12 XD-D0 SD-CLK
33 SD/MS_3V
U41_36

SD/MS_3V C573 1000P X7R 1% MS_D2/SD_D2/XD_D2 I R139 33 0402 5% CN15_13 13 XD-D1 SD_VCC
XD-D2 SD-GND3 32
I 0402 50V MS_D3/SD_D3/XD_D3 I R140 33 0402 5% CN15_14 14 31 MS_BS/SD_CMD/XD_WE

ne
C563 0.1U X7R XD_D4 I R134 33 0402 5% CN15_15 15 XD-D3 SD-CMD MS_D3/SD_D3/XD_D3
3 XD-D4 SD-D3 30 3
NI 0402 10V XD_D5 I R135 33 0402 5% CN15_16 16 29
C566 10U X5R XD_D6 I R128 33 0402 5% CN15_17 17 XD-D5 MS-GND2
28
36

35

34

33

32

31

30

29

28

27

26

25
XD-D6 MS-VCC SD/MS_3V
NI 0805 6.3V U41 XD_D7 I R129 33 0402 5% CN15_18 18 27 MS_CD_CLK/XD_CD
R599 XD-D7 MS-SCLK MS/SD_DAT3 040233 5% I R211 MS_D3/SD_D3/XD_D3
JMB385 need change value to 0 19 26
TPBIAS_1

TPA1P

TPB1P

TAV33

MDIO8

MDIO9

MDIO10

MDIO11

MDIO12
TREXT

TPA1N

TPB1N SD/MS_3V XD-VCC MS-P-D3 10K 5% R207


22 Reserve for JMB385 MS_BS/SD_CMD/XD_WE I R182 33 0402 5%
20
CN15_21 21 MS-GND1 MS-INS 25
24 MS_DAT2 040233 5% I R204 MS_D2/SD_D2/XD_D2 0402 NI
VCC3
0402 MS-BS MS-P-D2
MS_D1/SD_D1/XD_D1 I R188 33 0402 5% MS_DAT122 23 MS/SD_DAT0 040233 5% I R192 MS_D0/SD_D0/XD_D0 MS_CD#
NI +1.8V_CARD U41_24 R559 1% 10K MS-D1 MS-SDIO
37 DV18 TCPS 24 44 Con-GND1 Con-GND2 45
5% I 0402 T150

do
JMB380CLK+ 38 23 XD_R/B PLA 4 IN 1 NO PUSH REVERSE TYPE
TXIN MDIO13 SD/MS_3V SD/MS_3V I

D3E_GPIO#
JMB380CLK- 39 22 XD_ADD_L
TXOUT MDIO14 VCC3
R590 1M XD_C_L 40 21 CARD_LED
I 0402 MDIO7 CR_LEDN C593
1% SD_WP#/XD_WP 41 MDIO6
JMB380/JMB385 DV33 20 VCC3 D40 10U C591
1SS355 0603 2.2U
MS_CD_CLK/XD_CD_R 42 19 100mA CLOSE CONN 0603
MDIO5 DV33 R538 R551 DSM I
Y4
I

In
MS_BS/SD_CMD/XD_WE 43 18 4.7K 4.7K NI X5R
MDIO4 DV18 +1.8V_CARD Y5V
0402 0402 80V 6.3V
24.576MHz VCC3 44 17 MC_PWR_CTRL_0# I 6.3V
Critical DV33 CR1_PCTLN 5% I
C589 30PPM C590 MS_D3/SD_D3/XD_D3 45 16 5% SD_CD#/XD_CD#
I MDIO3 CR1_CD0N/WAKEN
22P 22P
0402
I
0402
I
MS_D2/SD_D2/XD_D2

MS_D1/SD_D1/XD_D1
46

47
MDIO2 CR1_CD1N 15

14 U41_14 R536 5% 0 XD_CD# VCC3


MS_CD#
1394
NPO NPO MDIO1 NC NI 0402
MS_D0/SD_D0/XD_D0

i-
50V 50V 48 13 R173
MDIO0 CPPEN 10K
Reserve for JMB385 C
APCLKN

APREXT
APCLKP

49 0402 TPBIAS0 C586 [email protected] X5R


APGND
APVDD

APRXN
XRSTN

APRXP

APTXN

APTXP
XTEST

EPAD
APV18

NI I 0402 6.3V
5% 1394@CL-2M2012-900JT
TO SB 300mA
R174 5% 22 0805
1

10

11

12

CR_CPPE# L10
2 LFCSP48 NI 0402 I 2

1
Critical R582 R581 1
I Q27 1 2 2
[email protected] [email protected] 4 4 3 3
U41_7

16,17,19,22,26,29 PCIE_RST#
R795 5% 0
I 0402
U41_1 CPPEN
is 2
ME2N7002E
250mA
SOT23-3
0402
I
1%
0402
I
1%
CN17
R567 NI RN13 5
8.2K NI L1394_TPA0+ 4 4P2R L1394_TPA0+_C L1394_TPB0-_C
R (100 Ω)/C (0.1u F) for JMB380 C version L1394_TPA0-
3
L1394_TPA0-_C L1394_TPA0-_C
1
C765 0.1U X7R 0402 60V As close as 1 2 0X2 3
3

NI 0402 10V I 5% L1394_TPA0+_C 4


1%
possible to JMB380 L1394_TPB0+_C 2 6
+1.8V_CARD

+1.8V_CARD

3 CLK_PCIE_JMB385#
NI RN14
R54=8.2K used in JMB385 B version L1394_TPB0- 3 4 4P2R L1394_TPB0-_C EV@C13141-10405-L
kn
3 CLK_PCIE_JMB385
R54= 12K used in JMB385 C version L1394_TPB0+ 1 2 0X2
5%
L1394_TPB0+_C I

12 PCIE_TX4 L12
12 PCIE_TX#4 R579 R580 GND1
C561 I 0.1U 0402 X7R 10V PCIE_RXN4_C [email protected] [email protected] 1 2
12 PCIE_RX#4 1 2
C560 I 0.1U 0402 X7R 10V PCIE_RXP4_C 0402 0402 4 3 R295 5% 0
12 PCIE_RX4 4 3 I 0805
I 1394_COM I
1% 1% 1394@CL-2M2012-900JT GND1
Te

300mA These 1394 signals are high speed


R578 C585 0805
differential pairs and must be kept equal
[email protected] EV@220P I
length with a differential impedance (Zo)
0402 0402
of 110ohms.
I I
1% X7R
50V

L1394_TPA0+_C L1394_TPB0+_C
w.

L1394_TPA0-_C L1394_TPB0-_C
1 1
VCC3 VCC3

2
D5 D6

D1

D2

D1

D2
SR05.TCT SR05.TCT

GND

GND
25A 25A
VCC

VCC
SOT143-4 SOT143-4
ww

I I
4

1
20V 20V
Quanta Computer Inc.
PROJECT : ZN5
Size Document Number Rev
X4
Card Reader-JMB380/JMB385
Date: Friday, March 05, 2010 Sheet 23 of 40
A B C D E
5 4 3 2 1

Rear USB
10V
X7R
I
10V
X7R
I
24
0402 0402
0.1U 0.1U
5VSB C767 5VSB C769
300mA 90 ohm 0805 USB USBVCC0 U53 U51
CL-2M2012-900JT
L42 I USBVCC0 1
40 mils 1
2
GND OC1
8
7 USBVCC0
USBOC#0 12 1
2
GND OC1
8
7 USBVCC8
USBOC#8 12
USB#0 USB0_FB# IN OUT1 USBVCC7 IN OUT1 USBVCC9
12 USB#0 1 2 2 3 6 3 6

1
USB0 USB0_FB USB_PWR_EN_1 EN1 OUT2 USB_PWR_EN_2 EN1 OUT2
12 USB0 3 4 3 4 5 USBOC#7 12 4 5 USBOC#9 12
C656 C658 D51 EN2 OC2 EN2 OC2
4
5 0.1U 100U PESD5V0U1BB TPS2062 C766 TPS2062 C768
4 3 6 0402 7343 15A C752 R714 SOIC8 0.1U C753 R713 SOIC8 0.1U
2 1 0.1U 0 Critical 0402 0.1U 0 Critical 0402

1
I I SOD523 I I 0402 I I

m
0402 0402 0402

2
1
RN22 X7R 20% I X7R I X7R

EGA10402V05AH
J90 I I I
D 0X2 RV10 RV9 10V 10V 5V 10V X7R 10V D
4P2R 0402 EGA10402V05AH X7R 5% 10V 5%

2
5% I I 10V
0402

2
NI 10V
I 5VSB U50

co
X7R
I 1 8 USBVCC2
0402 GNDOUT
2 7
5VSB 0.1U IN OUT
U52
3 6
C771 USB_PWR_EN_4 IN OUT
4 5 USBOC#2 12
EN OC
1 8 USBOC#10 12
300mA 90 ohm USB USBVCC7 GND OC1 USBVCC10 TPS2061 C772
2 7
CL-2M2012-900JT 0805 IN OUT1 USBVCC11 C754 R712 MSOP8 0.1U
40 mils 3 6
L44 I USBVCC7 USB_PWR_EN3 EN1 OUT2 Critical 0402
1 4 5 USBOC#11 12 0.1U 0
USB#7 USB7_FB# EN2 OC2 I I
12 USB#7 1 2 2 0402 0402

1
USB7 3 4 USB7_FB 3 TPS2062 X7R
12 USB7 I I

a.
4 C667 D58 C755 R708 SOIC8 C770 10V
5 C669 100U PESD5V0U1BB 0.1U 0 Critical 0.1U X7R 5%
4 3 6 0.1U 7343 15A 0402 0402 I 0402 10V
2 1 I USBVCC11
0402 I SOD523 I I
1

X7R
40 mils

2
I

1
RN24 RV14 20% I X7R 5% 10V
EGA10402V05AH

J91
0X2 0402 RV13 X7R 10V 5V 10V

1
4P2R I EGA10402V05AH 10V C613
2

5% I L13 I 100U D7
0402

2
NI CL-2M2012-900JT J93 7343 PESD5V0U1BB
I 300mA 90 ohm 0805 I
1 4 15A
V GND

si
USB11 1 2 USB11_FB 3 5 C265 20%
12 USB11 D+GND SOD523
USB#11 3 4 6 0.1U 10V

2
12 USB#11 GND I
USB11_FB# 2 7 0402 VCC
D-GND 5V
2 1 8 I
GND
4 3
RV4 SIDE_USB X7R

1
300mA 90 ohm USB USBVCC8 RN15 I 10V DATA-

EGA10402V05AH

1
CL-2M2012-900JT 0805 0X2
L43 I USBVCC8 1
40 mils 4P2R RV3
USB#8 1 2 USB8_FB# 2 5% EGA10402V05AH
12 USB#8

2
1
USB8 3 4 USB8_FB 3 NI 0402 DATA+
12 USB8

ne
4 C657 D52
C659 I
EGA10402V05AH

5 100U PESD5V0U1BB
4 3 6 0.1U 7343 15A 0402
2 1 0402 I GND
1

I SOD523 USBVCC10

2
1

RN23 RV12 I 20% I


C J70 C
0X2 RV11 X7R 10V 5V
4P2R EGA10402V05AH 10V
2

5% 0402 I C641
0402
2

1
NI I 300mA 90 ohm 0805 100U
I CL-2M2012-900JT J94 7343 D10
L15 I C292 I BT_LED

do
1 4 PESD5V0U1BB
USB10 USB10_FB V GND 20%
12 USB10 3 4 3 5 0.1U 15A
USB#10 D+GND 10V
12 USB#10 1 2 6 0402 SOD523
USB10_FB# GND R133
2 7

2
D-GND I I
8 150
300mA 90 ohm 0805 USB J71 USBVCC9 RV6 GND X7R 5V
4 3 0402
CL-2M2012-900JT SIDE_USB 10V
40 mils 2 1 I

1
L45

EGA10402V05AH
I USBVCC9 1 I

LED6_P
USB#9 1 2 USB9_FB# 2 RN16 RV5 5%
12 USB#9

1
USB9 3 4 USB9_FB 3 0X2 EGA10402V05AH
12 USB9
4 D59 4P2R 0402 0402

2
C668 NI I

In
5 C670 PESD5V0U1BB I

2
4 3 6 0.1U 100U 15A 5%
2 1 7343 LED6
1

RV16 0402 SOD523


RED
2
1

RN25 EGA10402V05AH I I I I
20% I
0X2 0402 RV15 X7R 5V 2010/2/26 ADD
4P2R I EGA10402V05AH 10V 10V USBVCC2
2

1
5% 0402
2

NI
I C314
100U C403

i-
7343 0.1U
I 0402
L19 I USB
CL-2M2012-900JT 20% I R738 280 USBOC#6
3VSB X7R USBOC#6 12
300mA 90 ohm 0805 10V 1 I 1% 0402 R739 C347
USB#2 1 2 USB2_FB# 10V 2 332 0.1U
12 USB#2
USB2 3 4 USB2_FB 3 0402 0402
12 USB2
R742 4 I I
1

1
10K 5 1% X7R
0402 2 1 RV7 RV8 6 10V
I 4 3 EGA10402V05AH EGA10402V05AH
5%

USBVCC0 R740 280 USBVCC0_R R130 0 USBOC#0


RN17
0X2
4P2R
is 0402
I
2

0402
I J92
I 1 F5 2 5VSB

B I 1% 0402 NI 5% 0402 5% Buletooth USBVCC6


1206L150WR B
R741 C348 NI RC1206 0.11 ohm 1.5A NI 6V
332 0.1U C543 Critical 1206 Critical 1206
0402 0402 3VSB 100U 1.5A I 6V RC1206 0.11 ohm
I I 1206L150WR
7343
1% X7R BT USB 1 2 3VSB
10V R752 P151 I F6
10K 20%
kn

0402 1 10V NI L7 300mA 90 ohm


I 2 CL-2M2012-900JT 0805
5% 3 USB6_FB 4 3 USB6 12
4 USB6_FB# 2 1
3VSB USB#6 12
5 BT_LED RV1

1
EGA10402V05AH

EGA10402V05AH
USBVCC9 R753 280 USBVCC9_R R751 0 USBOC#9 6 BT_ON RV2 RN12
I 1% 0402 NI 5% 0402 2 1
R744 R750 C375 4 3
10K 332 0.1U 3VSB I 0402 0402

2
0402 0402 0402 I I 0X2
I I I 100K 5% R162 4P2R
Te

VCC
5% 1% X7R R760 0402 NI I
10V 10K 5%
0402
USBVCC7 R745 280 USBVCC7_R R236 0 USBOC#7 I
I 1% 0402 NI 5% 0402 5%
R743 C364
332 0.1U
0402 0402 USBVCC11 R761 280 USBVCC11_R R759 0 USBOC#11
I I I 1% 0402 NI 5% 0402
1% X7R 3VSB R758 C389
10V 332 0.1U
w.

0402 0402
R756 I I
10K 1% X7R
0402 10V
I
5%

3VSB USBVCC10 R757 280 USBVCC10_R R755 0 USBOC#10


I 1% 0402 NI 5% 0402
R754 C376 3VSB
ww

R748 332 0.1U


10K 0402 0402
A A
0402 I I R764
I 1% X7R 10K
5% 10V 0402
I
5%
USBVCC8 R749 280 USBVCC8_R R747 0 USBOC#8
I 1% 0402 NI 5% 0402
R746 C365 USBVCC2 R765 280USBVCC12_R R763 0 USBOC#2
332 0.1U I 1% 0402 NI 5% 0402
0402 0402 R762 C391
I I 332 0.1U
1% X7R 0402 0402
10V I I
1% X7R
10V
Quanta Computer Inc.
PROJECT : ZN5
Size Document Number Rev
X4
USB Port X6
Date: Friday, March 05, 2010 Sheet 24 of 40
5 4 3 2 1
5 4 3 2 1

25
2nd FAN SYSTEM FAN CONN
D P11_1 R787 5% 0 VCC3 D
I 0805

m
D47 Vout=4*Vset VCC3 VCC3 VCC3

VCC3
VSET 3~1V
VSET = 3V ; VO = 12V
CAMERA POWER CONTROL

co
2
SS0540 NI VSET = 1V ; VO = 4V 5VSB VCC CCD_VCC

2
DSM 40V R151 current quired: 150 mA max
P11 500mA D8 8.2K D4 R141
BAT54C +12V BAT54C 1K I R359 5% 0
P9 0402
16.3V Y5V 2.2U C716 30V 30V 0402 0805

1
0603 I I I NI R358 5% 0
2 6 1

1
P11_3 R705 5% 8.2K SOT23-3 GND GND 5% 5% I I 0805
3 VCC3 5 2
I 0402 200mA GND 12V P9_3 I R150 2 0402 SOT23-3 5% + C325
3 11.2K C322 C323 C324

a.
SENSE SIO_FAN_SEN_FRONT 13,26
85205-03XX 4 P9_4 I R152 2 0402 1150 200mA 10U 0.1U 1000P 10P
I R786 2 1.2K CONTROL 5% SIO_FRONT_FAN_CTRL 26
1 SIO_FAN_SEN_REAR 26 53048-0410 0805 0402 0402 0402
I 5% 0402 C142
C260 53398-0410-4P-L 100P C143 I I I NI
100P DFHD04MR779 I 47P C136 C146 Y5V X7R X7R COG
I I 0603 0402 10U 0.01U 10V 10V 50V 50V
50V 1206 0402
0603 NPO I

si
50V NPO I I
NPO 50V X5R X7R
25V 25V
C C
5%
RN1 2 1 0X2
I 4 3 4P2R

ne
90 ohm 300mA P150
CL-2M2012-900JT 0805
PS2 KEYBOARD& PS2 MOUSE 12
12
USB1
USB#1
L3 NI 2
4
1
3
USB1_FB
USB#1_FB
1
2
CCD_VCC 3
0402 600 ohm 300mA R10 I SBY100505T-601Y-N P150_4 4
27 DMIC_CLK
0402 600 ohm 300mA R9 I SBY100505T-601Y-N P150_5 5
27 DMIC_DAT

do
6
5VSB 5VSB
close to conn close to conn R403 and R392 (0 ohm)are I
changed to bead for EMI
2

2
D33 D32 D25 D21 damand. change BOM value
PESD5V0U1BB PESD5V0U1BB R353 R354 PESD5V0U1BB PESD5V0U1BB R342 R343
15A 15A 4.7K 4.7K 15A 15A 4.7K 4.7K

In
SOD523 SOD523 0402 0402 SOD523 SOD523 0402 0402
1

1
I I I I I I I I
J66 5V 5V 5% 5% J67 5V 5V 5% 5%
1 J66_1 R351 5% 0 R351_2 R352 5% 33
KCLK 26 1 J67_1 R340 0 R340_2 R341 33
MCLK 26
TO WEB CAM MODULE
B 2 I 0402 I 0402 2 I 5% 0402 I 5% 0402 B
3 R357 5% 0 R357_2 R355 5% 33 3 R345 0 R345_2 R344 33
KDAT 26 MDAT 26
4 J66_4 I 0402 I 0402 4 J67_4 I 5% 0402 I 5% 0402
1

1
i-
7 5 J66_5 7 5 J67_5 C17 1 2 10P COG 50V USB1
1

1
8 6 C317 8 6 C307 NI 0402
180P C319 180P C308
FOR EMI C16 1 2 10P COG 50V USB#1
2

2
PS2 0402 180P PS2 0402 180P NI 0402
2

2
I 0402 I 0402
I I C14 DMIC_CLK
I FOR EMI CHANGE CAP I 2 1 22P NPO 50V
NPO NPO 1:DATA I 0402
minidin-2mj-0304-004-6p-v 50V NPO minidin-2mj-0304-004-6p-v 50V NPO C13 0.1U X7R 10V CCD_VCC
2:NC
DFMD06FS007 50V
is
DFMD06FS006 50V 6 5
3:GND
I 0402
5VSB 1:DATA 5VSB
L20 F4 L18 F3 4 4:VCC
L20_2 1 2 6 5 2:NC L18_2 1 2 3 5:CLK
3:GND 6:NC
BLM18PG181SN1D 2 1
BLM18PG181SN1D 1206L110WR 4 4:VCC C306 1.5A 1206L110WR
kn

C318 1.5A RC1206 C315 3 5:CLK 0.1U 180 ohm RC1206 C309
0.1U 180 ohm Critical 0.1U 0402 0603 Critical 0.1U
0603 1.1A 2 1 6:NC I I 1.1A
0402 0402 0402
I 0.11 ohm X7R 0.11 ohm
I I 10V I
X7R 1206 X7R 1206 X7R
10V I 10V I 10V
A A
6V 6V
Te

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
w.

X4
FAN/CAM/PS2
Date: Friday, March 05, 2010 Sheet 25 of 40
5 4 3 2 1
ww
5 4 3 2 1

26
VCCRTC VCC3 3VSB

LFRAME# NI C651 10P 0402 50V COG


LAD3 NI C652 10P 0402 50V COG
C150 C99 C109 C98 C117 C87 LAD2 NI C673 10P 0402 50V COG
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U LAD1 NI C674 10P 0402 50V COG
0402 0402 0402 0402 0402 0402 LAD0 NI C750 10P 0402 50V COG

m
LDRQ#0 NI C751 10P 0402 50V COG
D I I I I I I D
X7R X7R X7R X7R X7R X7R
10V 10V 10V 10V 10V 10V V_FSB_VTT
VCC3

co
3VSB VCC3

NC_SIO_PIN92 R97 I 5% 10K 0402 C148


NC_SIO_PIN93 R92 I 5% 10K 0402 0.1U
NC_SIO_PIN94 R90 I 5% 10K 0402 0402
NC_SIO_PIN95 R89 I 5% 10K 0402
I

121
NC_SIO_PIN96 R84 I 5% 10K 0402

19
80

15
9
U5 X7R
LFRAME# I R779 5% 0 0402 U5_25 25 81 NC_SIO_PIN81 10V

VTR2
VTR4
VTR5

VTR1
VCCIN
11,19,22,29,30 LFRAME# LFRAME_N INIT_N T41
LAD3 U5_24 NC_SIO_PIN82 F_CAP

a.
11,19,22,29,30 LAD3 I R780 5% 0 0402 24 82
LAD3 SLCTIN_N T38
VCC 11,19,22,29,30 LAD2 LAD2 I R781 5% 0 0402 U5_23 23 91 NC_SIO_PIN91
LAD2 PD7 T34
11,19,22,29,30 LAD1 LAD1 I R782 5% 0 0402 U5_22 22 90 NC_SIO_PIN90 C107
LAD1 PD6 T33
11,19,22,29,30 LAD0 LAD0 I R783 5% 0 0402 U5_21 21 89 NC_SIO_PIN89 4.7U
LAD0 PD5 T37
11 LDRQ#0 LDRQ#0 I R784 5% 0 0402 U5_26 26 88 NC_SIO_PIN88 0603 C106
LDRQ_N PD4 T36
11,12,30 PLTRST# PLTRST# 27 86 NC_SIO_PIN86 0.01U
PCI_RESET_N PD3 T35 I
7
5
3
1

3,16,20,29 SMBCLK_MAIN SMBCLK_MAIN 28 85 NC_SIO_PIN85 0402


SMB_CLK_M/GP21 PD2 T40 X5R
RP1 R122 13,22,29,30 SERIRQ SERIRQ 31 84 NC_SIO_PIN84
PCLK_SIO SER_IRQ PD1 NC_SIO_PIN83 T42 NI
1K 301 3 PCLK_SIO 30 83 6.3V
PCI_CLK PD0 T39 X7R
8P4R 0402 92 NC_SIO_PIN92
KDAT SLCT NC_SIO_PIN93 25V
74 93

si
I I 25 KDAT KDAT PE
25 KCLK KCLK 75 94 NC_SIO_PIN94
8
6
4
2

5% 1% MDAT KCLK BUSY NC_SIO_PIN95 CPU_THERMTRIP#_ICH


25 MDAT 76 MDAT ACK_N 95
25 MCLK MCLK 77 96 NC_SIO_PIN96
P_RD_D# VCC3 KBRST# MCLK ERROR_N NC_SIO_PIN97
13 KBRST# 78 KBDRST_N ALF_N 97 T31
P_DSKCHG# 13 A20GATE A20GATE 79 98 NC_SIO_PIN98
A20M STROBE_N T30
P_INDEX# C153
P_TRACK# 30 LED_COLOR LED_COLOR 8 46 VCCRTC 150P
P_WP# R75 LED_BLINK COLOR/GP04 VBAT VCCRTC
30 LED_BLINK 13 BLINK_GR/GP06 0402
10K 17 CLAMP_CTRL CLAMP_CTRL 19,36
RXD1 CLAMP_CTRL/GP20 F_CAP I
0402 29 RXD1 112 18

ne
TXD1 RXD1 VCORF SMBCLK_RESUME NPO
29 TXD1 113 TXD1/TEST SMB_CLK_R/GP22 29 SMBCLK_RESUME 11,15,19
I DSR1# PCIE_RST#_R R126 I 5% 33 0402 50V
29 DSR1# 114 DSR1_N GPRST2_N/GP23 33 PCIE_RST# 16,17,19,22,23,29
C 5% RTS1# 115 34 SIO_FRONT_FAN_CTRL R164 C
29 RTS1# RTS1_N/BADDR_N PWM2/GP24 SIO_FRONT_FAN_CTRL 25
29 CTS1# CTS1# 116 35 SIO_PIN35 R132 I 5% 0 0402 10M
CTS1_N RC_ID/GP25/FANTCH2 ICH10D_PWM0 13
29 DTR1# DTR1# 117 40 U5_40 R163 I 5% 0 0402 0603
DTR1_N PECI/TSI_SDA H_PECI 4
DEFAULT I/O ADDRESS IS 2E R71 29,30 RI1# RI1# 118 41 V_FSB_VTT
DCD1# RI1_N VTT SIO_PROCHOT# I
470 29 DCD1# 119 DCD1_N PROCHOT1_N 42 SIO_PROCHOT# 31
43 SIO_PROCHOT2# R165 I 5% 10K 0402 H_SKTOCC# 5%
0402 PROCHOT2_N V_FSB_VTT
NC_SIO_PIN123 123 44 CPU_THERMTRIP#_ICH
NI T25 RXD2/TACH6/GP55 THERMTRIP_N CPU_THERMTRIP#_ICH 4,13
3VSB NC_SIO_PIN124 124 45 H_CPUSLP#_R R364 5% 0 H_CPUSLP# H_CPUSLP#_R R363 5% 10K V_FSB_VTT
T28 TXD2/GP56 PECI_AVL/TSI_SCL H_CPUSLP# 4,7

do
5% NC_SIO_PIN125 125 47 V_3P3_SLOT_EN NI 0402 I 0402
T24 DSR2_N/TACH7/GP57 PDS_EN2/GP12 V_3P3_SLOT_EN 19
NC_SIO_PIN126 126 48 H_SKTOCC#
T27 RTS2_N/GP62 SLOTOCC1_N/GP32 H_SKTOCC# 4,11,27
NC_SIO_PIN127 127 49 WAKE#
T23 CTS2_N/TACH8/GP52 WAKE_OUT_N/GP33/SLOTOCC2_N WAKE# 11
NC_SIO_PIN128 128 50 SIO_HOOD_LOCK#
T26 TRIS/XOR_OUT/DTR2_N/GP63 GP14/HDLOCK_N
RI2# 120 51 SIO_HOOD_UNLOCK#
R346 R72 R67 NC_SIO_PIN122 RI2_N/GP53 GP16/HDUMLCK_N NC_SIO_PIN54
T29 122 DCD2_N/TACH5/GP54 PWM1/GP43 54 T58
10K 10K 10K 58 SBCLK
HMCLK/GP42/MTR1_N SBDATA SBCLK 4,16
0402 0402 0402 HMDATA/GP40/DS1_N 59 SBDATA 4,16
NC_SIO_PIN60 60 103 SIO_FAN_SEN_REAR
I I I T57 DRVDEN0/GP10 GP41/FAN_TACH3 SIO_FAN_SEN_REAR 25
30 HD_LED_OUT# HD_LED_OUT# 61 104 SIO_REAR_FAN_CTRL
HD_LED_OUT_N/GP50/DRVDEN1 PWM3/GP45 T176

In
5% 5% 5% RI1# NC_SIO_PIN62 62 110 SIO_FAN_SEN_FRONT
T56 MTR0_N FAN_TACH4/GP61 SIO_FAN_SEN_FRONT 13,25
RI2# NC_SIO_PIN64 64
T55 DS0_N
NC_SIO_PIN65 65 1 PWRBT_SIO# R68 5% 0
T54 DIR_N PWRBTN_IN/GP00 PWRBT# 30
PWRBT# NC_SIO_PIN66 66 2 SLP_S3# I 0402
T51 STEP_N SLP_S3_N/GP01 SLP_S3# 11,27,29,30
NC_SIO_PIN67 67 3 S4_STATE_ICH#
T49 WDATA_N SLP_S5_N/GP02 S4_STATE_ICH# 11,27,29,31,34
NC_SIO_PIN68 68 7 NC_SIO_7
T48 WGATE_N PDS_EN/GP03/FAN_TACH1 T32
NC_SIO_PIN69 69 10 ICH_PWRBT#
T43 HDSEL_N PWRBTN_OUT_N/GP05 ICH_PWRBT# 11,30
P_INDEX# 70 11 PWR_PS_ON#
INDEX_N PS_ON_N/GP60 PWR_PS_ON# 29,31,32,34
3VSB P_TRACK# 71 14 ICH_RI#
TRK0_N SIO_PME_N/GP07 ICH_RI# 11
P_WP# 72 36 PME_IN# VCC3
WRTPRT_N PME_IN_N/GP17 PME_IN# 12
P_RD_D# SLP_S5#

i-
73 RDATA_N USB_PWR_N/GP27 37 SLP_S5# 11
P_DSKCHG# 63 38 3V_SW_MAIN#
DSKCHG_N 3V_SW_MAIN_N/EVENT5_N/GP44 PCIE_WAKE#
EVENT6_N/GP15 39 PCIE_WAKE# 19
R82 R74 R73 53 SIO_DIAG_BEEP SIO_DIAG_BEEP 27
SUS_CLK_SIO DIAG_BEEP/GP11 SMBDATA_MAIN
20K 20K 1K 11 SUS_CLK_SIO 16 CLKI32 SMB_DAT_M/3V_SW_AUX/WOL_N/GP13 100 SMBDATA_MAIN 3,16,20,29
0402 0402 0402 3 CLK14SMC CLK14SMC 20 101 SMBDATA_RESUME R80 R119 R123 R138
CLOCKI14 SMB_DAT_R/5V_USB_AUX/GP46 SMBDATA_RESUME 11,15,19
102 5V_USB_MAIN# 5V_USB_MAIN# 27,34 2.2K 2.2K 8.2K 8.2K
I I I 5V_USB_MAIN_N/GP47 LPC_SMI#
IO_SMI_N/GP31 111 LPC_SMI# 11,29,30 0402 0402 0402 0402
5% 5% 5% PWRGD_50MS# 106
31 PWRGD_50MS# PWRGD_SD2/GP26 I I NI NI
16,33,35,36 PWRGD_30MS PWRGD_30MS 105
B
PWRGD_140MS PWRGD_SD/GP51 BM_BUSY# SMBDATA_MAIN 5% 5% 5% 5% B
4 55
7,11,29 PWRGD_140MS
11 ICH_RSMRST#
VCC
ICH_RSMRST# 5
107
PWRGOODA
RSMRST_N
5VIN
is GND1
GND2
GND3

GND5
GND6

PECI_REQ/GP35
HD_LED_IN_N/GP36
AGND
56 ICH_SATA_LED#
BM_BUSY# 11
ICH_SATA_LED# 13
SMBCLK_MAIN
SERIRQ
R65 5% 0 PSU_PG SIO_PIN35
VTR3

VCC3 108 PWROK_PS


NI 0402 31 SIO_12VIN SIO_12VIN 109
R60 2 1% 12VIN
+19V 1 287K
I 0603 QFP28 SCH5327
6
12
32
57
87
99

52

Critical C85
C90 I 0.1U
R64 0.1U 0402
100K C89 3VSB VCC3
0402
kn
NI
1% I 0.01U
X7R
I X7R 0402
R159 5% 0 U5_57 R158 5% 0 3VSB 10V
0402 10V I I 0402 NI 0402
X7R INSTALL FOR INSTALL FOR 8.2K R227
+12V 25V SMSC SCH5327 WPCD376 INSTALL FOR R155 R79 R145 R168 R160 R161 R99 R87 INSTALL FOR R226 8.2K
WPCD376 20K 20K 20K 4.7K 4.7K 4.7K 8.2K 1K SMSC SCH5327 0402 0402
0402 0402 0402 0402 0402 0402 0402 0402 1% 1%
R62 ZN5 ONLY USE SCH5327 I I
I I I I NI NI I I
118K
Te

V_3P3_SLOT_EN 5% 5% 5% 5% 5% 5% 5% 5%
0402
5V_USB_MAIN#
I 3V_SW_MAIN#
1% PCIE_WAKE#
SIO_12VIN SBCLK
SBDATA
CLAMP_CTRL
R63 ICH_RSMRST#
C88 17.8K 16 SBDATA_R1 SBDATA_R1
0.01U 0402 16 SBCLK_R1 SBCLK_R1
w.

0402 I
I 1% VCC3
X7R
25V

A A
R156 R157
10K 10K
0402 0402
ww

SIO_HOOD_LOCK# I I
SIO_HOOD_UNLOCK# 5% 5%

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
SUPER IO SMSC SCH5327
Date: Friday, March 05, 2010 Sheet 26 of 40
5 4 3 2 1
5 4 3 2 1

1/20 Wei modify;


AVDD D28 AVDD D26 AVDD D19 AVDD D18
AR34 I change to NI

27
BAV99 BAV99 BAV99 BAV99
SOT23-3 SOT23-3 SOT23-3 SOT23-3
AR34 0R 0603 AR15 0R 0603 100V 100V 100V 100V
200mA 200mA 200mA 200mA
I I I I
I 1% I 1% 1 2 1 2 1 2 1 2

AC18 0.1U X5R 10V AC14 0.1U X5R

3
NI 0402 NI 0402 10V
ADOUTR ADOUTL HPOUT_R HPOUT_L
2/12 Wei modify:
from Vendor suggesion reduce POP noise AVDD D29 AVDD D30 AVDD D24 AVDD D23
AC25 from 0.1uF/10v X5R --> 0,1uF/ 16v X7R Analog_ground digital_ground BAV99 BAV99 BAV99 BAV99
AC27 from 10uF / 6.3v --> 2.2uF/ 6,3v Please next to U14 SOT23-3 SOT23-3 SOT23-3 SOT23-3
Please next to CODEC 100V 100V 100V 100V
200mA 200mA 200mA 200mA
D D
I I I I
1 2 1 2 1 2 1 2

m
28 SENSE_A_MIC# AR25 1% 20K AC29

3
I 0402 AC31 2.2U U13_27
2.2U 0603 AC25 AC27 AC38 LINEOUT_R LINEOUT_L MICIN_R MICIN_L

U13_30
28 SENSE_B_HP# AR26 1% 39.2K 0603 I 0.1uF 2.2U 10U
I 0402 X5R X7R 0603 0805

co
U13_31

U13_29
I 6.3V 25V I NI AVDD

U13_34
X5R 0603 X5R X5R
ADOUTL 6.3V I 6.3V 6.3V

ADOUTR

AR19 1% 10K AC47_1 AC47 0.068u AR43_1 AR43 76.8K SIO_DIAG_BEEP AR29 1% 10K AC35_1 AC35 0.068u AR31_1 AR31 76.8K

36

35

34

33

32

31

30

29

28

27

26

25
26 SIO_DIAG_BEEP
U13 AC24 AC23 I 0402 X7R 16V 0402 I 0402 I 0402 X7R 16V 0402 I I 1% 0402
0.1U 10U 1%

MIC1-VREFO

VREF
FRONT-R

HPOUT-R

CBN
FRONT-L

HPOUT-L

AVSS1

AVDD1
Sense B

CPVEE

CBP
0402 0603 R350 C316 I R701 C661
1K 0.1U 1K 0.1U
I I 0402 INR 0402 INL

a.
X5R X5R 0402 0402
Spilt by DGND 37 24 X5R X5R
MONO-OUT LINE1-R 10V 6.3V I 10V I 10V
Place next to pin 25
38 23 1% I 1% I
AVDD AVDD2 LINE1-L
39 22 11,13 SPKR AR37 1% 10K AC46_1 AC46 0.068u AR42_1 AR42 76.8K SPKR AR28 1% 10K AC36_1 AC36 0.068u AR32_1 AR32 76.8K
28 LINEOUT_L LOUT2-L MIC1-R I 0402 X7R 16V 0402 I 0402 I 0402 X7R 16V 0402 I I 1% 0402
AC11 AC12 AR14 1% 20K U13_40 40 21 1%
I 0603 JDREF MIC1-L R709 I R700 C660
10U 0.1U
0603 0402 41 20 LINE2-VREFO-L LINE2-VREFO-L 28 1K C666 1K 0.1U
LOUT2-R LINE2-VREFO 0.1U 0402
I I 28 LINEOUT_R 0402 0402
42 19 MIC2-VREFO-L MIC2-VREFO-L 28 0402 X5R
X5R X5R AVSS2
ALC272AF-GR MIC2-VREFO I X5R I 10V

si
6.3V 10V 43 18 1% 10V 1% I
NC LINE1-VREFO I
44 DMIC-CLK3/4 MIC2-R 17 MICIN_R 28

45 SPDIFO2 MIC2-L 16 MICIN_L 28


R704 5% 22 U13_46 46 15 HPOUT_R HPOUT_R 28
25 DMIC_CLK I 0402 DMIC-CLK1/2 LINE2-R
C C
EAPD1 47 14 HPOUT_L EAPD1 AR80 0 EA_AMP_TG 1 AD46
DMIC-1/2/GPIO0

DMIC-3/4/GPIO1

EAPD LINE2-L HPOUT_L 28


NI 5% 0402
SDATA-OUT

U13_48 48 13 SENSE# AR5 1% 39.2K SENSE_A_LOUT# 28 3SHUTDOWN#


T172 SPDIFO1 Sense A
SDATA-IN

I 0402 AC58
DVDD-IO

ne
PCBEEP
RESET#
BIT-CLK

AR76 5% 0 EC_AMP_TG 1000P


DVDD2

2
DVSS1

30 EC_MUTE#
SYNC
DVSS

NI 0402 BAT54A 50V


200mA X7R 30mil
0402 L_SPK_NO AL17 2A MPZ1608S221AT 0603
LQFP48 SOT23-3 I I 220 ohm
1

10

11

12

Critical ANALOG I AC72 AC66


I 1/20 Wei modify; 470P 10P
30V 0402 0402
INL
AGND --> DGND X7R NPO
DVDD DIGITAL 1/20 Wei modify;
DVDD 50V 50V
I I
AGND --> DGND
AC33 AC34 2/10 Wei modify: L_SPK_PO AL19 2A MPZ1608S221AT 0603

do
0.1U 10U ADOUTL AC37 0.068u INL_B AR33 76.8K I 220 ohm 30mil
from HP request import sonic focus in DVT 1.5
R693 X7R 16V 0402 I 0402 AC65 AC76
U13_2

0402 0603 I I
0 1% U14 470P 10P
I I

1
0603 I 1/20 Wei modify; 0402 0402
X5R X5R X7R NPO 2/10 Wei modify;

OUTL-
SD
INL+

OUTL+
10V 6.3V I AGND --> DGND 50V 50V
17 1/20 Wei modify; impot correct HF connector for ZN5
ACZ_SDIN

1% AC77 0.068u AP_L1N_G AR72 76.8K AN1_LN 5 EP I I


16 AGND --> DGND
ACZ_BITCLK_R

+AZA_VDD R696 0 X7R 16V 0402 I 0402 INL- GND AL18


VCC3
R699 5% 0 NI 1% 0603 1% AD44 PSM I
25 DMIC_DAT I 0402 I 6 15 5VSPK1 MPZ1608S221AT I 100 mil
I P6
NC VDD 5VSB
2A 220 ohm AMP_MAIN_P1 L_SPK_NC 2
AC28 AC26 SSM2306CPZ AC75 AC74 0603 SSM24PT 40V 2A L_SPK_PC 2
1

In
ACZ_RST#_AUDIO 11 1
0.1U 10U 7 14 0.1U 10U I AC64 R_SPK_PC 4
NC VDD X7R 0603 10U R_SPK_NC 4
ACZ_SYNC_AUDIO 11 0402 0603 3 3
10V X5R 0603 AD43 SOD123 I
AR22 5% 22 I I AC60 0.068u AP_L2N_G AR74 76.8K AN2_LN 8 0402 6.3V X5R INT_SPK

OUTR+
13

OUTR-
ACZ_SDIN0 11 X5R X5R INR- GND 3VSB
I 0402 X7R 16V 0402 I 0402 I I 6.3V

INR+

N.C.
AC30 10P COG 50V 10V 6.3V 1% 1/20 Wei modify; I SS1040 40V 1A PIN1:Internal
I SPK_L+
I 0402 I AGND --> DGND PIN2:Internal SPK_L-
ACZ_SDOUT_AUDIO 11
Place next to pin 9 LFCSP16 PIN3:Internal SPK_R-

10

11

12
AR23 5% 22 Critical PIN4:Internal SPK_R+
BIT_CLK_AUDIO 11
I 0402 ADOUTR AC45 0.068u INR_B AR41 76.8K I 30mil
X7R 16V 0402 I I 0402 R_SPK_PO AL15 2A BLM18PG221SN1D 0603
B B
AC32 1% I 220 ohm

i-
10P AC71 AC78
0402 470P 10P
INR 0402 0402 1/20 Wei modify;
I X7R NPO
COG 50V 50V
AGND --> DGND
50V R_SPK_NO AL16 2A BLM18PG221SN1D 0603 I I
I 220 ohm 30mil
AC73 AC79
470P 10P
0402 0402 1/20 Wei modify;
X7R NPO
+19V +12V 50V 50V
AGND --> DGND
is 3VSB
3VSB
I I

AQ4
AQ9 AD45 AD9 FDN340P
AO3409 RB500V 3VSB 2.4A
SSM24PT
2.6A 2A DSM AR40 SOT23-3
SOT23-3 40V 3VSB 20V
40V 20K
I 100mA 3VSB I DVDD
PSM 0402
30V AU1 I AVDD AR30
I AR27 I
20K 1 3
1 3 AV_19VIN AR17 5% 10 AVDD_LDO_VIN 8 1 10K 5% SHUTDOWN#
VIN VOUT 0402
kn
+19V I 1206 0402 I

3
AR18 AC15 AC16 AR36

2
10K 4.7uF 0.1uF AC22 I 5% AQ3_C AQ6
7 2 2 4.7K
2

0402 X5R X7R GND NC1 AR20 4.7U 5% AU_DVDD_TG


MMBT3904-7-F 0402

3
AC20 I 25V 25V 309K X5R 200mA

1
0.1uF 5% 0805 0603 0402 10V AR24 20K AQ3_B AQ3 I AR35 1% 49.9K
6 NC3 NC2 3 11 AUDIO_AMP_DIS# 2 SOT23-3
AR44 X7R I I 1% 0805 I 1% 0402 MMBT3904-7-F 1/25 Wei modify; 5% I 0402 AC39 0.1U
49.9K 25V I I I AU_STAT_CN 0402
200mA AGND --> DGND

3
GND1

0402 I AVDD_EN 5 4 AVDD_ADJ 40V I


EN NC/ADJ SOT23-3

3
0603 AQ7 X5R
I I AQ5 10V
ME2N7002E
1% SOP8 APL5156 AR21 AR39 5% 0 AQ7_G 40V 2 ME2N7002E
4,11,26 H_SKTOCC# 250mA
9

Te

AUDIO_DVDD_G_1 Critical 100K I 0402 AR46 0 2 250mA


SOT23-3 11,26,29,31,34 S4_STATE_ICH#
AUDIO_DVDD_G I 0402 NI 5% 0402
I AU_DV_EN SOT23-3
A AR45 5% 100K 1% A
3

I 0402 I 60V AR47 0 I


11,26,29,30 SLP_S3#

1
I 5% 0402 60V

1
2/12 Wei modify:
26,34 5V_USB_MAIN# 2 from Vendor suggesion 1/20 Wei modify;
AQ8
ME2N7002E LDO grounding from AGND to DGND AGND --> DGND
250mA
SOT23-3
1

I Vout = Vref(1+AR20/AR21)
w.

60V
1.24(1+309K/100K)=5.07
Quanta Computer Inc.
PROJECT : ZN5
Size Document Number Rev
X4
Realtek ALC272AF-GR
Date: Friday, March 05, 2010 Sheet 27 of 40
5 4 3 2 1
ww
5 4 3 2 1

28
MIC2-VREFO-L AD6 1SS355 100mA 80V AD6_N
I DSM

27 MIC2-VREFO-L MIC2-VREFO-L AD4 1SS355 80V AD4_N


I DSM 100mA AR10
4.7K
AR7
4.7K
0402
0402
I MIC-IN Jack
1%
I GMLB-100505-0300A-N8 J72 AC10 0.1U X5R 10V
6
1% 0402 0.3A 300 ohm 1 I 0402
MICIN_L 100U 6.3V X5R 1210 AC5 MICIN_L1 AR8 1% 75 MICIN-L2 I AL1 MICIN-L3 2 AR13 0
27 MICIN_L
I I 0402 0402 NI 1% 0603

m
MICIN_R 100U 6.3V X5R 1210 AC8 MICIN_R1 AR11 1% 75 MICIN-R2 I AL2 GMLB-100505-0300A-N8 0.3A 300 ohm MICIN-R3 3
27 MICIN_R
D I I 0402 4 D
5
SENSE_A_MIC# D17 AC9 AC7 7 Please next to MIC IN Jack
27 SENSE_A_MIC#
PESD5V0U4BF 220P 220P 8 MIC_JACK

co
5V I
Max. 100mVrms input for Mic-IN SOT886
0402
0402
I I I
LINE2-VREFO-L AD3 1SS355 100mA 80V AD3_N X7R X7R
I DSM 1 6 50V 50V

27 LINE2-VREFO-L LINE2-VREFO-L AD5 1SS355 80V AD5_N 2 5


I DSM 100mA
AR6 3 4

a.
4.7K
AR9
4.7K
0402
I Headphone-OUT
0402 1%
I GMLB-100505-0300A-N8 J75
6
1% 0402 0.3A 300 ohm 1
27 HPOUT_L HPOUT_L AC3 100U 6.3V AR12_1 AR12 39R HPOUT_L1 I AL3 HPOUT_L2 2
I 3528 20% 0402 1% I 0402
+

si
27 HPOUT_R HPOUT_R AC6 100U 6.3V AR16_1 AR16 39R HPOUT_R1 I AL4 GMLB-100505-0300A-N8 0.3A 300 ohm HPOUT_R2 3 AC19 0.1U X5R 10V
I 3528 20% 0402 1% I 4 I 0402
+

27 SENSE_B_HP# SENSE_B_HP# 5 AR38 1% 0R


7 NI 0603
2/12 Wei modify; 8 Headphone_JACK
I
following Cayman design, meeting HP outpt 1v FSOV spec
at 320 ohm load
Please next to Headphone Out Jack

ne
AC13 AC17
1000P 1000P
0402 0402
I I
C X7R X7R C
50V 50V

Line

do
27 LINEOUT_L
LINEOUT_L AC56 100U 6.3V out
I 3528 20% GMLB-100505-0300A-N8
+

0402 0.3A 300 ohm 5 J74


LINEOUT_R AC57 100U 6.3V R338_1 I R338 1% 75 LINEOUT_L1 I L17 J74_4 4
27 LINEOUT_R
I 3528 20% 0402 0402 J74_1 1 AR4 5% 0R
+

R336_1 I R336 1% 75 LINEOUT_R1 I L16 GMLB-100505-0300A-N8 0.3A 300 ohm 3 NI 0603


0402 2
SENSE_A_LOUT# CN AUDIO JACK 5P H15 Green AC4 0.1U X5R 10V

In
27 SENSE_A_LOUT#
I 0402
I

2
D15 Please next to Line Out Jack
PESD5V0U2BM
5V C305 C303
STD-883 1000P 1000P
I 0402 0402
I I

i-
X7R X7R

3
50V 50V

is
B Reserve to CRT B

VCC
7 CRT_R PROTO R772 5% 0 0402 J69_R
J69
7 CRT_G PROTO R773 5% 0 0402 J69_G 6
11
kn

7 CRT_B PROTO R774 5% 0 0402 J69_B 1


7 16
12 17
Change value to 150 C3 C2 C4 2
6/30 12P 12P 12P 8
R13 R12 R14 50V 50V 50V 13
150 150 150 COG COG COG VCC 3
0603 0603 0603 0402 0402 0402 9
1% 1% 1% PROTO PROTO PROTO 14
Te

PROTO PROTO PROTO 4


1

10
D35 D34 D37 D36 15
3 DA204U 3 DA204U 3 DA204U 3 DA204U 5
UMT UMT UMT UMT
20V 20V 20V 20V
100mA 100mA 100mA 100mA DFDS15FR0B5
2

PROTO PROTO PROTO PROTO NI


w.

VCC
7 CRT_DDC_DATA R3 33 DDCDATA_L1
U1_1 0402 1%
PROTO
C1
0.1U 7 CRT_DDC_CLK R4 33 DDCCLK_L1
5

10V 0402 1%
X5R U1 PROTO
0402 AHCT1G125DCH L1 27NH 0603
ww

7 CRT_HSYNC PROTO 2 4 CRT_HSYNC_L R8 33 R8_2 CRT_HSYNC_L1


A PROTO 0402 1% 5% 0.55ohm 300mA A
PROTO PROTO
L2 27NH 0603
CRT_VSYNC_L R2 33 R2_2 CRT_VSYNC_L1 C10
0402 1% 5% 0.55ohm 300mA 0.1U
PROTO PROTO 10V
R5 X5R
1K C5 C6 C7 C8 0402
5

5% 220P 220P 47P 47P PROTO


0603 50V 50V 50V 50V
PROTO X7R
0603
X7R
0603
NPO
0603
NPO
0603
Quanta Computer Inc.
7 CRT_VSYNC 2 4
NI NI PROTO PROTO
U2 PROJECT : ZN5
AHCT1G125DCH Size Document Number Rev
PROTO X4
AUDIO JACK/CRT
Date: Friday, March 05, 2010 Sheet 28 of 40
5 4 3 2 1
5 4 3 2 1

29
SERIAL PORT
XDP1
1 2
1 2
4 XDP_BPM#5 3 4
3 4
4 XDP_BPM#4 5 6
5 6
7 8
7 8
4 XDP_BPM#3 9 10
9 10
4 XDP_BPM#2 11 12
P54 11 12
U31 13 14
R5I NDSR1 13 14
1 2 4 XDP_BPM#1 15 16
NRTS1 NRXD1 NRTS1 15 16

m
26 RTS1# 14 9 3 4 4 XDP_BPM#0 17 18
T1I T1O NTXD1 NTXD1 NCTS1 17 18
26 TXD1 13 10 5 6 19 20
D T2I T2O NDTR1 NDTR1 NRI1 19 20 D
26 DTR1# 12 11 7 8 21 22
T3I T3O 21 22
9 10 23 24
23 24
19 4 25 26
RIO R1I 25 26

co
18 5 NDSR1 5P*2_4 Wall_2.54MM_ST_Black 27 28
26 DSR1# R2O R2I 4 XDP_BPM#3_R 27 28
17 6 NRXD1 PROTO 29 30
26 RXD1 R3O R3I 4 XDP_BPM#2_R 29 30
16 7 NCTS1 31 32
26 CTS1# R4O R4I 31 32
15 8 R5I 33 34
26 DCD1# R5O R5I 4 XDP_BPM#1_R 33 34
4 XDP_BPM#0_R 35 36
R506 1% 10K U31_23 35 36
VCC 23 37 38
PROTO 0402 FORCEON XDP_PWRGD 37 38
22 39 40 XDP_DCLKOUT_DP 3,4
FORCEOFF# XDP_TESTIN# 39 40
21 41 42 XDP_DCLKOUT_DN 3,4
INVAILD# 41 42
20 V_FSB_VTT 43 44 V_FSB_VTT
R2OUTB 43 44 XDP1_46 R1 1% 1K
45 46 H_CPURST# 4,5,6
45 46

a.
U31_28 28 26 VCC 47 48 PROTO 0402 XDP_DBRESET# 4
U31_24 C1+ VCC U31_27 47 48
24 27 49 50
C515 U31_1 C1- V+ U31_3 R21 1% 0 0402 PROTO XDP1_51 49 50
1 3 3,16,20,26 SMBDATA_MAIN 51 52 XDP_TDO 4
U31_2 C2+ V- R22 1% 0 0402 PROTO XDP1_53 51 52
0.1U 2 25 3,16,20,26 SMBCLK_MAIN 53 54 XDP_TRST# 4
C2- GND 53 54
0402 55 56 XDP_TDI 4
C520 SC3243ECTR C519 C518 C516 55 56
4 XDP_TCK 57 58 XDP_TMS 4
PROTO SSOP28 57 58
0.47U 0.47U 0.47U 0.1U 59 60
X7R Critical 59 60
0603 0603 0603 0402
10V PROTO CN XDP SMD 60P(P0.5_H3.25)
PROTO PROTO PROTO PROTO PROTO

si
X7R X7R X7R X7R
10V 10V 10V 10V
CPU XDP Debug Port
RI1# 26,30
3

D2 R51
Q18
NRI1 D2_N Q18_B 2 DTC144EUA-7-F R24 1% 0 XDP_PWRGD R25 5% 1.5K VTT_OUT_RIGHT XDP_DBRESET# R382 0 0402 SYS_RST#
4,11 H_PWRGD SYS_RST# 11
PROTO 0402 PROTO 0402 I 5%

ne
30mA
1SS355 4.7K R52 UMT XDP_TESTIN# R26 5% 68
1

100mA 0402 2.2K C288 NI PROTO 0402


DSM 5% 0402 0.01U 50V
C PROTO I 0402 C
5%
80V
I X7R
25V
I
LPC HEADER

do
LED
VCC3 VCC3

Q1
AO3413 E17
SOT23-3 SERIRQ

In
1 2 SERIRQ 13,22,26,30
3A Q21 LFRAME# 3 4 LAD1
11,19,22,26,30 LFRAME# LAD1 11,19,22,26,30
20V AO3413 LAD3 5 6
11,19,22,26,30 LAD3
PROTO SOT23-3 8 LAD2
LED1 LAD2 11,19,22,26,30
20V LAD0 9 10 LPC_SMI#
11,19,22,26,30 LAD0 LPC_SMI# 11,26,30
VCC3 1 3 LED1_P 2 1 LED1_N R20 150 3A PCIE_RST# 11 12 PCLK_EC
16,17,19,22,23,26 PCIE_RST# PCLK_EC 3,30
PROTO1% 0402 PROTO 13 14
LED5
GREEN LED5_P LED5_N R118 1% 150 7P*2/_2.54MM_ST_Omit7
3VSB 1 3 2 1
2

R23 10K Q1_G LED17-21VGC-TR8 PROTO 0402 PROTO


VCC3

i-
PROTO 1% 0402 PROTO
3

GREEN

2
R18 10K Q2_B 2 Q2 LED17-21VGC-TR8
V_FSB_VTT
PROTO 1% 0402 MMBT3904-7-F PROTO
200mA Q38
26,31,32,34 PWR_PS_ON#
1

AO3413
SOT23-3 SOT23-3
PROTO 20V
4 H_IERR#
40V 3A
PROTO
LED10
is 3VSB 1 3 LED10_P 2 1 LED10_N R297 1%
PROTO
150
0402
B B
GREEN
2
LED17-21VGC-TR8
PROTO
Q17
8,11,30,36 SLP_S4#
AO3413
SOT23-3
kn

20V
3A
PROTO
LED2
LED4
LED4_N 1 2LED4_P R113 1% 150 VCC3 3VSB 1 3 LED2_P 2 1 LED2_N R61 1% 150
PROTO 0402 PROTO 0402
GREEN
GREEN
3

LED17-21VGC-TR8
2

Q20 LED17-21VGC-TR8
ME2N7002E Q26 PROTO
Te

PROTO
2 250mA AO3413
7,11,26 PWRGD_140MS 11,26,27,30 SLP_S3#
SOT23-3
SOT23-3 20V
PROTO 3A
60V PROTO
LED7
1

3VSB 1 3 LED7_P 2 1 LED7_N R153 1% 150


PROTO 0402
GREEN
w.

LED9 LED17-21VGC-TR8
LED9_N 1 2LED9_P R181 1% 150 VCC3 PROTO
PROTO 0402 Q19
11,35 ICH_SLP_M#
GREEN AO3413
3

LED17-21VGC-TR8 SOT23-3
Q32 PROTO 20V
ME2N7002E 3A
2 250mA PROTO
3,11 ICH_VRMPWRGD LED3
SOT23-3
ww

3VSB 1 3 LED3_P 2 1 LED3_N R112 1% 150


A PROTO PROTO 0402 A
60V
1

GREEN
2

LED17-21VGC-TR8
PROTO
11,26,27,31,34 S4_STATE_ICH#

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
LED/SERIAL PORT/XDP
Date: Friday, March 05, 2010 Sheet 29 of 40
5 4 3 2 1
5 4 3 2 1

3VSB
30
3VSB

C611 C612 C637 C640 C609 C623


0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
0402 0402 0402 0402 0402 0402 I L41 0603 300mA 120 ohm R645
EC_3AVCC BK1608HS121-T 10K R644
X7R X7R X7R X7R X7R X7R 3VSB
I L40 0603 300mA 120 ohm 0402 10K
10V 10V 10V 10V 10V 10V EC_3VSTBY BK1608HS121-T 3VSB 5% 0402
I I I I I I C635 C636 U43
C610 0.1U X7R 8512_SCE# I 5%
1000P 0.1U 1 CE# 8
I 0402 10V 8512_SCK I R646 5% 47 0402 8512_SCK_R VDD I

m
0402 0402 6 SCK
8512_SI 0402 8512_SI_R

U43_7
I R647 5% 47 5 SI
D X7R X7R BL_UP# 8512_SO I R643 5% 15 0402 8512_SO_R C608 D
50V 10V
U43 ROM SOCKET 2 SO
HOLD#
7
CIR_ED1 PROTO 0.1U
I I U43_3 3 4 0402
WP# VSS

co
3VSB W25X40B X7R
SOIC8 10V
3VSB SCI#(PU to MAIN or S5) Critical I
EC_MUTE# I
leakage issue EC_MUTE# 27
R675 5% 10K EC_SCI# LPCPD#_R R664 5% 10K
I 0402 Ir_LED_ON# NI 0402
SLP_S4#
SLP_S4# 8,11,29,36
VCC3 3VSB
C625 R654
TO POWER BUTTON & LED LIGHT& IR

a.
C625_1 PCLK_EC CIR_TX1 VCC3
CIR_RX1
R651 5% 0 ODD_EJECT# 3VSB 5V_LDO
22P 22 C622 I 0402 BL_UP# I R706 5% 10K 0402
0402 0402 0.1U BL_DW# I R707 5% 10K 0402
COG 5% 0402 U44_93 C619 0.1U X7R ODD_EJECT# I R650 5% 10K 0402 3VSB 5VSB R348 5% 0 R347 5% 0
50V I X7R I 0402 10V NI 0805 I 0805 P5

114
121

127

107
I 10V P5_1 1

11
26
50
92

74

84
83
82

56
57
33
19
20

99
98
97
96
95
94
93
3
11,19,22,26,29 LAD[3:0] I 2
LAD0 10 110 3VSB 3

VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

VSTBY

GPE3/ISCLK
GPE2/ISAS

KSO16/GPC3
KSO17/GPC5
GINT/GPD5
L80HLAT/GPE0
L80LLAT/GPE7

GPG1/ID7
GPH6/ID6
GPH5/ID5
GPH4/ID4
GPH3/ID3
GPH2/ID2/BADDR1
GPH1/ID1/BADDR0
VCC

VBAT
AVCC

GPE1/ISAD

GPH0/ID0/SHBM
LAD0 SMCLK0/GPB3 26 LED_COLOR
LAD1

si
9 LAD1 SMDAT0/GPB4 111 26 LED_BLINK 4

SM BUS
LAD2 8 115 Has pull high at R349 Ir_LED_ON# 5
LAD3 LAD2 SMCLK1/GPC1 HD_LED_OUT#_R
7 LAD3 SMDAT1/GPC2 116 daughter board 100 6
22 117 0402 BL_DW# 7
11,12,26 PLTRST# PCLK_EC LPCRST#/WUI4/GPD2 SMCLK2/GPF6 BL_DW# BL_UP#
3,29 PCLK_EC 13 LPCCLK SMDAT2/GPF7 118 8
5% ODD_EJECT#
11,19,22,26,29 LFRAME# 6 LFRAME#
IR Receiver 18 ODD_EJECT# 9
85 U44_85 R768 20K NI PWRBT# 10
PS2CLK0/GPF0 26 PWRBT#
LPCPD# R698 5% 0 LPCPD#_R 17 86 I 5% 0603 R247 CIR_RX0 11
22 LPCPD# LPCPD#/WUI6/GPE6 PS2DAT0/GPF1
NI 0402 87 8.2K RX1B 12
PS2CLK1/GPF2

PS/2
R665 5% 0 U44_15 126 GPIO 88 40V 1D48 I 2 0402 Learing Receiver in 13
NI 0402 GA20/GPB5 PS2DAT1/GPF3 U44_89 RB500V-40 DSM 100mA R716 5% 820 PWRBT#
5 89 14

ne
13,22,26,29 SERIRQ SERIRQ PS2CLK2/GPF4 NI
I D43 2 1RB500V-40 40V DSM 15 90 NI 0402
11,26,29 LPC_SMI# ECSMI#/GPD4 PS2DAT2/GPF5 5%
100mA 2 D44 1 40V 23 LPC D48_P Pwer_IR_board
11 EC_SCI# ECSCI#/GPD3
PCURST# 100mA DSM RB500V-40 14 R790 5% 0 I
I WRST# NI 0402 R715 5% 0
4 KBRST#/GPB6 RI1# 26,29
R672 5% 0 U44_23 16 I 0402
C NI 0402 PWUREQ#/GPC7 C
R666 5% 10K U44_16 24 ADJ 3VSB
PWM0/GPA0 ADJ 20
NI 0402 25
CIR_RX0 119 GPC0/CRX
IT8512 PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
28
29 R719 5% 2.2K

do
T165 U44_123 123 CIR 30 I 0402
GPB2/CTX PWM4/GPA4
PWM5/GPA5 31

2
PWM6/GPA6 32
PWM PWM7/GPA7 34
HD_LED_OUT# 1 3 HD_LED_OUT#_R
3VSB 26 HD_LED_OUT#
TACH0/GPD6 47
TACH1/GPD7 48
Q45
TMR0/WUI2/GPC4 120
R657 124 ME2N7002E
TMR1/WUI3/GPC6 250mA
470K

In
0603 SOT23-3
5% I
PWRSW/GPE4 125
I SLP_S3# 60V
RI1#/WUI0/GPD0 18
PCURST# WAKE UP 21 U44_21 R668 5% 10K 3VSB
RI2#/WUI1/GPD1 I 0402
35 PCUHOLD# 3VSB
C630 WUI5/GPE5 C310 0.1U X7R
RING#/PWRFAIL#/LPCRST#/GPB7 112 3VSB
0.1U I 0402 10V
0402

i-
109 C312 0.1U X7R BL_UP#
X7R TXD/GPB1 C570 I 0402 10V
UART 108
10V RXD/GPB0
0.1U
BL_DW#
FOR EMI
I 0402 C313 0.1U X7R
66 U44_66 I R683 0 0402 5% I 0402 10V
R648 5% 10K U44_106 ADC0/GPI0 U44_67 I R684 0 0402 5% X7R C311 0.1U X7R ODD_EJECT#
106 FLRST#/WUI7/GPG0/TM ADC1/GPI1 67
I 0402 8512_SCK 105 68 U44_68 I R676 0 0402 5% 10V I 0402 10V
FLCLK/SCK ADC2/GPI2 U44_69 I R677 0 0402 5% I
104 FLAD3/GPG6 ADC3/GPI3 69
8512_SO 103 FLASH 70 U44_70 I R673 0 0402 5%
8512_SI FLAD2/SO ADC4/GPI4 U44_71 I R674 0 0402 5% VCC
102 FLAD1/SI ADC5/GPI5 71
8512_SCE# U44_72 I R670 0 0402 5%

88502-2401-24P-L
R649 5%
NI
100K
0402
U44_100
101
100
FLAD0/SCE#
FLFRAME#/GPG2 A/D D/A
is ADC6/GPI6
ADC7/GPI7
72
73 U44_73 I R671 0 0402 5%
IR Blaster
MY0 36
B MX2 MY1 KSO0/PD0 R337 D16 B
24 24 37 KSO1/PD1
23 MX4 MY2 38 4.7K 1SS355
23 MX1 MY3 KSO2/PD2 U44_76 I R661 0 0402 5% 200mA
22 22 39 KSO3/PD3 DAC0/GPJ0 76 0402
21 MX7 MY4 40 KBMX 77 U44_77 I R660 0 0402 5% DSM
21 MX3 MY5 KSO4/PD4 DAC1/GPJ1 U44_78 I R656 0 0402 5% 5% 75V CN24
20 20 41 KSO5/PD5 DAC2/GPJ2 78
19 MX0 MY6 42 79 U44_79 I R655 0 0402 5% I I 5
19 MX6 MY7 KSO6/PD6 DAC3/GPJ3 U44_80 I R653 0 0402 5% CIR_TX1 R335 1% 100 CN24_4
18 43 80 4
kn
18 MX5 MY8 KSO7/PD7 DAC4/GPJ4 U44_81 I R652 0 0402 5% I 0402
17 17 44 KSO8/ACK# DAC5/GPJ5 81 1
16 MY4 MY9 45 CIR_ED1 R339 1% 1K CN24_3 3
16 MY1 MY10 KSO9/BUSY I 0402
15 15 46 KSO10/PE
2
14 MY3 MY11 51 2 PMUX1
14 KSO11/ERR# CK32KE
KSI3/SLIN#
KSI1/AFD#
KSI0/STB#

KSI2/INIT#

13 MY5 MY12 52 CLOCK 128 PMUX2 IR Blaster


13 MY6 MY13 KSO12/SLCT CK32K I
12 12 53 KSO13
MY7 MY14
AVSS

11 54
KSI4
KSI5
KSI6
KSI7

11 KSO14
VSS
VSS
VSS
VSS
VSS
VSS
VSS

10 MY8 MY15 55 VCC


10 KSO15 Y6 VCC
9 MY9
9 MY10 LQFP128
8 IT8512 U44 1 4
58
59
60
61
62
63
64
65

1
12
27
49
91
113
122

75

8
Te

7 MY14 Critical 2 3
7 MY11 I R179 VCC3
6 6 AJ085120F05
1

1
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

5 MY2 R199 R198 1.8K R185


5 MY0 C614 32.768KHZ C616 0402
4 4 1.8K 100K 10K
3 MY12 10P Critical 10P U11A 5%
0402 0402 0402
2

3 R193

2
2 MY13 0402 10PPM 0402 I U20
2 MY15 5% U11_3 5%3 5%
1 I
- 1 5 C176 0.1U X7R
1 U44_12 COG COG I I U11_4 I 0402 10V I
4 2
U44_75

CON2 50V 50V U11_1 1 + 3 4 CIR_RX1


PROTO I I 1K
1

2
0402 G1214TAU NL17SZ14DFT2G
w.

5
C624 C626 R203 5% I I
0.1U 0 12K I
2

3VSB 0402 0402 0603

Q33_C
X7R

1
10V 5% 5% VCC
I NI I
R662 R186
C191
1

3
0
Q59 RX1B Q33_B 2 Q33 R191
0402 100K
ICH_PWRBT# 2 DDTA124EUA-7-F MMBT3904-7-F 18K
11,26 ICH_PWRBT#
ww

5% 0402
100mA 200mA 0402

1
I R212 0.01U 5%
A UMT 0402 SOT23-3 5% A
100 I
3

40V PCUHOLD# X7R 40V I


11,26,27,29 SLP_S3# 0402
D45 1N4148WS I 25V I
5%
200mA I I
DSM
75V R685
I 100K
0402
5%
I
Quanta Computer Inc.
PROJECT : ZN5
Size Document Number Rev
X4
ITE8512
Date: Friday, March 05, 2010 Sheet 30 of 40
5 4 3 2 1
5 4 3 2 1

INRUSH_19V +19V_INPUT +19V

PR246
0
PR244
0
0603
PQ29
MMBT2907A
SOT23_3P
+19V

INRUSH_19V VCC3
26 SIO_12VIN SIO_12VIN
31
0603 NI I
I PR108 62 INRUSH_PASS_THRU_E1 1 3 PQ60

3
0603 I PR90 MMBT3904
PQ66 226K PR225 PWRGD_50MS# PR228 4.7K PQ60_B 2 SOT23_3P
26 PWRGD_50MS#
MMBT2907A 0402 10K 0402 I I

2
SOT23_3P 0.01 0402

1
8
I I 0.01
PR109 62 INRUSH_PASS_THRU_E2 1 3 ADATER_ID 5 + I
PR113 0 0603 I 7 U28_7
1206 NI CR1 PC82 U28_6 6 -
YELLOW 0.1uF PU13B

2
PR112 0 2 1 I INRUSH_PASS_THRU_BASE X7R PR91 LM393 PR99 100K

m
4
D 1206 NI 25V 100K SOP_8P VCC 0402 I D
PR239 0603 0402 I VCC
PR248 0 PR243 0 I 0.01
1206 NI PQ30 Id=14A 6.8K 0402 I I VCC
SO_8P 0603 PR89 PR84
dcjk-2dc1003-000313-6p-v Qg=68~96nC

co
PR249 0 FDS6679BZ I +19V 133K 10K
1206 NI CRITICAL Rdson=9.3~14.8mOHM PQ64_D 0402 0402

8
POWER_JACK +19V_INPUT I 0.01 0.01
PL15
1 8 I U29_3 3 I V_FSB_VTT
+
5 19V_DC_SOURCE 2 7 PC90 1 U29_1

3
4 1uH 3 6 1uF 2 -
3 4.6mohm PC204 5 X5R PR96 PU14A
6 ADATER_ID CRITICAL PC205 4700pF PR247 PQ64 25V 80.6K LM393

4
I 1uF X7R 100K PR237 1M PQ64_G 1 ME2N7002E 0603 0402 SOP_8P PR100 PR102

4
X5R 50V 0603 0402 NI 60V I 0.01 I 604K 1K

1
J103 25V 0603 I PC199 250mA I 0402 0402
1
2

0603 PR114 I 1000pF SOT23_3P PD7 0.01 I

a.
PR111 PR110 I 2.2 19V_VIN_GATE X7R NI MMSZ5235 I SIO_PROCHOT# SIO_PROCHOT# 26

2
215K 64.9K 1206 PQ67 50V DSM
0402 0603 I MMBT2907A 0402 6.8V PC81

2
1
0.01 0.01 SOT23_3P NI I VCC 0.027uF PR104

ADP_VIN_SUNB
I I I 1 3 0603 0
PD14 PC83 X7R VCC 0402
PQ31_D

P4SMAJ20A PR107 0.1uF 25V I


PSM 100K X7R I H_PROCHOT# H_PROCHOT# 4
2

2
25V 0603 PR245 100K INRUSH_B PR241 2K 25V PR103
3

20A I 0402 NI 0402 I 0603 10K

3
I PC93 I 0402

8
PQ31 1uF 0.01

si
1 ME2N7002E X5R PC87 PR238 1M 5VSB_CTRL 34 R1377_2 PR92 3.9K 5 I PQ27
12 MXM_PRSNT +
60V 25V 0.1uF 0402 I 0402 0.01 I 7 Q89_G 1 ME2N7002E
250mA 0603 X7R PC80 U29_6 6 60V
-
SOT23_3P I PD8 25V 3900pF PR87 PU14B 250mA
I 1N4148 0603 INRUSH_19V PR240 0402 3.9K LM393 SOT23_3P
2

4
DSM I 3.3K X7R 0402 SOP_8P I

2
0603 50V 0.01 I
75V

8
PU13A I I I
200mA ID_INRSUH_COMP 3 +
I 1 ID_OP_OUT
PR98 10K ID_INRSUH_COMP# 2 R1379_1 PR88 330K
-

ne
0603 I PC84 LM393 0402 0.01 I
0.1uF SOP_8P

4
C X7R I +12V_AUX +12V C
25V
0603
19V_DC_SOURCE I PR252 0
1206 I
PC206 PC94 Adapter Support ( Adapter ID )
10uF 4.7uF PR251 0
X5R X5R
Rid with no MXM stuffing: 64.9K Recommand use 150W adapter. 1206 I
25V 25V Rid with MXM stuff: 49.9K Recommand use 180W adapter.
1206 0805

do
NI NI
1 8
2 7
Fix ISN issue. 3 6
5
PQ23

4
FDS6675
-30V

PQ23_G
5VSB -11A
SOIC8

In
PR212 NI
20K
PC64 0402 PR208
PD6 0.1uF NI 30
SS0540 X7R 0402
DSM 25V NI
40V 0603 3VSB
500mA I PR206 100K PC174_1 PC174 0.1uF
I 0402 NI

PQ52_D
X7R 25V 0603 NI

PR214

D54_K
i-
+12V_AUX Regulator +19V 20K

3
0402
I
5VSB MAGIC 3VSB PQ52
PL11 PR67 1 ME2N7002E
DCR=1.9mohm 0.5uH 4.7 60V
Idc=10A,Isat=12A CRITICAL 0805 250mA
PC63 I I PR213 SOT23_3P

3
10uF 4.7K NI

2
B X5R PR64 0402 B
25V 4.7 PR66 2.2 12V_BST_D I PQ51
1206
NI
0805
I
is 0805 I
+12V_AUX_VIN
26,29,32,34 PWR_PS_ON#
PWR_PS_ON#

PC176
1 ME2N7002E
60V
250mA
PC178 PC177 PC71 1uF SOT23_3P
5
6
7
8
10uF 10uF + 47uF X5R I +19V +19V_MXM

2
PC173 PC70 X5R X5R 25V 25V
PU11_VCC

1uF 0.1uF 25V 25V D6.3*6MM 0603 1 8


X5R 12V_HDRV_R 4 X7R 1206 1206 CRITICAL NI 2 7
25V PQ54 25V I I OS-CON 3 6
0603 FDS8884 0603 I 5
I 30V I MAGIC
30mOHM PQ69
kn
DCR=17mohm

4
CRITICAL FDS6675
5

PU11 I Irms=6.5A, Isat=10A -30V


3
2
1

3VSB 12V_COMP 12V_BST +12V_AUX -11A

PQ69_G
7 1
VCC

COMP/DIS BST 12V_HDRV PR216 0 PL10 SOIC8


2
TG 12V_SW 1206 I I
8
PR69 PC69 PR68 PHASE 8.5uH PR254
PR70 2K 100pF 20K CRITICAL 20K
GND
3

20K 0402 NPO 0402 12V_FB 6 4 12V_LDRV I PC180 PC67 PC66 0402 PR253
12V_COMP_R

FB BG
5
6
7
8

0402 I 50V I PC179 10uF + 100uF + 100uF I 30


NI PQ25 0402 0.01 NCP1587DR2G 1000pF 1206 16V 16V 0402
3

PR72 0 PQ25_G 1 ME2N7002E I SOIC_8P X7R X5R D6.3*8MM D6.3*8MM I


26,29,32,34 PWR_PS_ON#
Te

0402 I 60V CRITICAL 4 50V 25V OS-CON OS-CON


PC68_1
3

250mA I PQ53 0402 I CRITICAL CRITICAL PR250 100K PC208_1 PC208 0.1uF

PQ68_D
SOT23_3P PC175 PR65 PR207 FDS6690AS I I I 0402 I
PR215_1

PQ24 I 0.1uF PC68 47.5 3.3K 30V X7R 25V 0603 I


2

PR71 0 PQ24_G 1 ME2N7002E X7R 1000p 0.01 0.01 PR209 15mOHM


11,26,27,29,34 S4_STATE_ICH#
0402 NI 60V 25V 0603 0402 0402 15K CRITICAL
250mA 0402 50V I I 0402 I PR215
3
2
1

3
SOT23_3P I NPO 0.01 2.2
PC65_1

NI I I 1206
2

PC65 I PQ68
0.022uF +19V_MXM_EN 1 ME2N7002E
PR211 X7R 60V
w.

232 16V 250mA


0.01 0402 SOT23_3P
0402 I +12V_AUX I

2
12V I
PR210_1 PR210 0
A L=10uH 0603 I A
∆I={(Vin-Vout)*Vout}/(Vin*L*Fsw)
∆I={(19-12)*12}/(19*10u*275k)=1.6A
Ripple Voltage=∆I*ESR=1.6A*12mohm=19.2mV
OCP=1.6A*2=3.2A
ww

Rocset=Iocth*Rdson/Iocset
Rocset=4.5A*15mohm/10uA=6.8Kohm

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
DC-IN,+12V
Date: Friday, March 05, 2010 Sheet 31 of 40
5 4 3 2 1
1 2 3 4 5 6 7 8

V_FSB_VTT
8V_CORE

PR125
1K
0402
I
PD5
SS0540
DSM
40V
PC51
0.1uF
X7R
25V
0603
32
VRMPWG 500mA I
I
PC96 +12V
0.1uF R380_1 PC102 0.022uF U46_DAC PD5_K PR58 2.2 PC59_1
X7R V_FSB_VTT X7R 0805 I
25V 50V
0402 0603
NI PR138 I PR201 PR57
PR123 VCC 619 2.2 1
VRM_GND 4.7K 0402 +19V 0805 0805 +19V_POWER_FILTER CS1
0402 I I I CS1N
I 0.01 PC59
VRM_EN PR24 PR155 PC169 0.22uF PC165 PC164

PU8_1

m
U46_VPP
10 150K 1uF X5R 10uF 10uF

3
PC95 0805 0402 X5R 25V X5R X5R
A A

5
1000pF I I 25V 0603 PQ21 25V 25V
PQ32 X7R 0.01 0603 I NTMFS4921NT1G 1206 1206

1
PWR_PS_ON# 1 ME2N7002E 50V U46_VCC U46_19VMON I PU8 30V I NI
26,29,31,34 PWR_PS_ON# 60V 0402 PC114 PU8_VCC 4 8 PU8_DRVH PR198 0 PQ21_G 4 10mohm

BST
250mA I 4.7uF PC117 PR149 VCC DRVH 1206 I CRITICAL

co
SOT23_3P X5R 0.1uF 10K I PL8

1
2
3
I VRM_GND 6.3V X7R 0402 7 PU8_SW
2

SWN

PGND
0603 25V I 2 0.5uH
IN

5
I 0603 0.01 PR199 2.2 PU8_OD 3 5 PQ48 PQ22 PC168 1mohm
I 0603 I OD DRVL NTMFS4935NT1G NTMFS4935NT1G 1500pF CRITICAL
VRM_GND
NCP5359A 30V 30V X7R I

6
VRM_GND SO_8P PU8_DRVL 4 4mohm 4 4mohm 50V
CRITICAL CRITICAL CRITICAL 0402 MAGIC
I I I I

PR200_1
DCR=1mohm

1
2
3

1
2
3
8V_CORE

35
36
34
VTT_OUT_RIGHT U46 Irms=33A, Isat=35A
VRMPWG 39

VCC

12VMON
VPP/TEST
4,11 VRMPWG VR_RDY
VRM_EN 1 29 U46_DRVON

a.
PR130 0 H_VID0_R ENABLE DRVON U46_G1 PC40
4 H_VID_SEL 2 30
0402 NI H_VID1_R VID0 G1 CS1N PD4 0.1uF PR200
3 21
PR15 H_VID2_R VID1 CS1N U46_CS1 PR159 100K NI SS0540 X7R 2.2
4 22
PR129 0 680 H_VID3_R VID2 CS1 0402 DSM 25V 1206
4,5 CPU_PSI 5
0402 NI 0402 H_VID4_R VID3 CS1 PR166 1.24K PC121 0.47uF 25V 40V 0603 I
6
I H_VID5_R VID4 0402 0.01 I 0603 X7R I +12V 500mA I
7
H_VID6_R VID5 I
8
H_VID7_R VID6 U46_G2
9 31
TP1 VID7 G2 CS2N PD4_K PR51 2.2 PC41_1
1 5 VRM_PSI 37
PSI CS2N
23
NOBOM U46_15 15 24 U46_CS2 PR160 100K NI PR187 0805 I
TP2 DIFFOUT CS2
1 NOBOM 0402 2.2
PR21 30.1 0.01 R397_2 PC8 1500pF I PR142 2.4K R398_2 PC105 2200pF 16 CS2 PR167 1.24K PC122 0.47uF 25V 0805 PR50 VCCP
0402 I 50V X7R 0402 0402 0.01 I 50V X7R 0402 I COMP 0402 0.01 I 0603 X7R I I 1 +19V_POWER_FILTER CS2

si
PR22 1K 0.01 PC106 NPO I COMP 0805 CS2N
0402 I 50V 47pF 0402 TP3 1 NOBOM PC156 I PC41
VCC U46_G3 1uF 0.22uF PC153 PC154

PU5_1
32
PR153 10K VFB G3 CS3N X5R X5R 10uF 10uF PC53 PC39 PC32 PC55
17 25
0402 NI TP4 VFB CS3N
1 NOBOM 26 U46_CS3 PR161 100K NI 25V 25V X5R X5R 820UF 820UF 820UF 820UF
CS3

5
PR152 PR137 6.65K 0402 I 0.01 U46_18 18 0402 0603 0603 PQ18 25V 25V + 2.5V + 2.5V + 2.5V + 2.5V
187K VDRP CS3 PR168 1.24K PC123 0.47uF 25V I I NTMFS4921NT1G 1206 1206 D6.3*9.0MM D6.3*9.0MM D6.3*9.0MM D6.3*9.0MM

1
0402 0402 0.01 I 0603 X7R I PU5 30V NI I CRITICAL CRITICAL CRITICAL CRITICAL
0.01 NTC_2 PR31 226 I PU5_VCC 4 8 PU5_DRVH PR184 0 PQ18_G 4 10mohm OS-CON OS-CON OS-CON OS-CON

BST
NI 0402 0.01 VCC DRVH 1206 I CRITICAL I I I I
PR45 PR27 PC107 33 U46_G4 I PL7

1
2
3
4.7K Place close 1K 1500pF G4 CS4N PU5_SW
27 7
CS4N SWN

PGND
VCCP 0603 to inductor 0.01 X7R U46_CS4 PR162 100K NI 0.5uH

ne
VRM_GND 28 2
0.01 0402 50V CS4 0402 PR185 2.2 PU5_OD IN PC155 1mohm
3 OD DRVL
5
Thermistor I 0402 CS4 PR169 1.24K PC124 0.47uF 25V 0603 I 1500pF CRITICAL

5
PR127 CRITICAL U46_DAC NI 19 0402 0.01 I 0603 X7R I NCP5359A PQ19 PQ43 X7R I

6
100 I VDFB SO_8P NTMFS4935NT1G NTMFS4935NT1G 50V PC35 PC44 PC43 PC37 PC42 PC207
MAGIC
0402 Pin40:Hi is one phase CRITICAL 30V 30V 0402 560uF 560uF 560uF 560uF 560uF 560uF
B I NTC_1 PR32 510 PR26 523 U46_20 20 I PU5_DRVL 4mohm 4mohm I
DCR=1mohm 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V B
CSSUM Lo is two phase 4 4 + + + + + +
0402 I 0402 I 0.01 CRITICAL CRITICAL Irms=33A, Isat=35A D6.3*6MM D6.3*6MM D6.3*6MM D6.3*6MM D6.3*6MM D6.3*6MM

PR186_1
VCC_VRM_SENSE JS5 DFS_0805 U46_13 13 40 1_2PHSEL VCC 8V_CORE I I CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
4 VCC_VRM_SENSE

1
2
3

1
2
3
PC100 VSP N.C OS-CON OS-CON OS-CON OS-CON OS-CON OS-CON
DGND
ROSC
IMON

0.01uF I I I I I I
ILIM

VSS_VRM_SENSE X7R 14 38 AP-ENABLE PR12 PC34


4 VSS_VRM_SENSE VSN NTC
PC98 PC97 16V 1K PD3 0.1uF

do
PR128 0.1uF 0.1uF 0402 NCP5392Q 0402 SS0540 X7R PR186
12
11

10

41

100 X7R X7R NI QFN_40P NI DSM 25V 2.2


0402 25V 25V CRITICAL +12V 40V 0603 1206
I 0603 0603 I 500mA I I
U46_ROSC
U46_IMON

NI NI I
U46_11

PR10 PD3_K PR49 2.2 PC36_1


VRM_GND 1K 0805 I
VRM_GND VRM_GND VRM_GND 0402 PR183
NI 2.2
0805 PR48
PR13 I 1 +19V_POWER_FILTER
300 0805 CS3
180A
3

0402 I CS3N

In
NI PC152
300KHz PQ1 1uF PC36 PC149 PC150

PU4_1
PR1 100 PQ1_1 1 ME2N7002E X5R 0.22uF 10uF 10uF
0402 I 60V 25V X5R X5R X5R
C49_1

5
AUTO_PSI_DISABLE 5,11 250mA 0603 25V PQ16 25V 25V
SOT23_3P I 0603 NTMFS4921NT1G 1206 1206
PR151 49.9K VFB PC2 I I 30V NI I
2

1
0402 I 0.01 1uF PU4 PU4_DRVH PR180 0 PQ16_G 4 10mohm
PC120 X5R PU4_VCC 4 8 1206 I CRITICAL

BST
150pF 25V VCC DRVH I
Q42_C

1
2
3
NPO 0603 PL6
U46_VCC 50V NI 7 PU4_SW
SWN

PGND
0402 2 0.5uH
IN

i-
I PR181 2.2 PU4_OD 3 5 1mohm
OD DRVL

5
PR164 0603 I PQ17 PQ42 PC151 CRITICAL
9.09K NCP5359A NTMFS4935NT1G NTMFS4935NT1G 1500pF I

6
0.01 VRM_GND SO_8P 30V 30V X7R
3

0402 PQ35 CRITICAL PU4_DRVL 4 4mohm 4 4mohm 50V MAGIC


I Q42_B 2 MMBT3904
SOT23_3P
FILTER I CRITICAL
I
CRITICAL
I
0402
I
DCR=1mohm

PR182_1
1
2
3

1
2
3
40V 8V_CORE Irms=33A, Isat=35A
1

200mA
CS1N

CS2N

CS3N

CS4N

Q42_E COMP
CS1

CS2

CS3

CS4

I PC111
PR165 PC125 0.033uF
1K 0.1uF PR143 X7R PC131 PC130 PC133 PC132 PC135 PC134 PC137 PC136 PC30
0.01 X7R 33K 25V 10pF 10pF 10pF 10pF 10pF 10pF 10pF 10pF PD2 0.1uF PR182
0402
I
25V
0402
I
0402
I
0603
I
NPO
50V
0402
NI
NPO
50V
0402
NI
NPO
50V
0402
NI
NPO
50V
0402
NI
NPO
50V
0402
NI
NPO
50V
0402
NI
NPO
50V
0402
NI
NPO
50V
0402
NI
+12V
is
SS0540
DSM
40V
500mA
X7R
25V
0603
I
2.2
1206
I
C C
Noise filter, I
VRM_GND VRM_GND VRM_GND
increase CMRR PD2_K PR47 2.2 PC31_1 +19V_POWER_FILTER
VRM_GND PR179 0805 I
CPU POWER IN FILTER 2.2
0805 PC141 PC138
I 10uF 10uF
PR46 X5R X5R CS4
1 25V 25V CS4N
kn
PC148 0805 1206 1206
1uF I PC31 I NI
X5R 0.22uF
PU3_1

MAGIC
+19V 25V X5R
DCR=1.9mohm

5
0603 25V PQ14
Idc=10A,Isat=12A I 0603 NTMFS4921NT1G
PL9 I 30V
1

0.5uH PU3 PU3_DRVH PR175 0 PQ14_G 4 10mohm


CRITICAL PU3_VCC 4 8 1206 I CRITICAL
BST

I +19V_POWER_FILTER VCC DRVH I

1
2
3
PL5
+19V_POWER_FILTER 7 PU3_SW
SWN
PGND

2 0.5uH
IN
Te

PC49 PC38 PC33 PC28 PC210 PC211 PC212 PR177 2.2PU3_OD 3 5 1mohm
OD DRVL
5

5
+ 47uF + 47uF + 47uF + 47uF + 47uF + 47uF + 47uF 0603 I PQ41 PQ15 PC145 CRITICAL
25V 25V 25V 25V 25V 25V 25V NCP5359A NTMFS4935NT1G NTMFS4935NT1G 1500pF I
6

D6.3*6MM D6.3*6MM D6.3*6MM D6.3*6MM D6.3*6MM D6.3*6MM D6.3*6MM PR176 SO_8P 30V 30V X7R MAGIC
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL 0 CRITICAL PU3_DRVL 4 4mohm 4 4mohm 50V
OS-CON OS-CON OS-CON OS-CON OS-CON OS-CON OS-CON I CRITICAL CRITICAL 0402
DCR=1mohm
0603 Irms=33A, Isat=35A
I I I I I I I I I I

PR178_1
1
2
3

1
2
3
NI

VCC
PR178
2.2
w.

JS4 PC127 1206


JP_SMT4_DFS 0.1uF I
NOBOM X5R
1 2 25V
0402
8

I
U46_ROSC 5 +
VRM_GND VCC +12V PU9
7
VID PU/PD RESISTOR PR124
6 -
U34B
GND/ADJ
8V_CORE 8V_SYSTEM

25.5K LM392 PR135 3 4 8V_ALL PR60 0 8V_CORE


4

V_FSB_VTT SO_8P 180K VIN VOUT 0805 I


0.01
0402 I 0.01 PR157 PR61 0 8V_SYSTEM
ww

U46_11 I VRM_GND CRITICAL 0402 3K PC62 0805 I


8

D U77_6 I 0402 10uF APL1117UC D


1

U77_PIN3 3 + I X5R SOT223


PR126 1 PR133 100 AP-ENABLE 25V I
PR122 PR121 PR120 PR119 PR118 PR117 PR116 PR115 11.3K U46_IMON 0402 I 1206
PU9_1

2 -
680 680 680 680 680 680 680 680 0.01 PC5 U34A I PR62 121
0402 0402 0402 0402 0402 0402 0402 0402 0402 0.1uF LM392 PC104 PR134 0402 0.01 I
4

I I I I I I I I I X5R SO_8P 0.1uF 0 R1 PC61 PC60


0
PR2 H_VID0_R 25V CRITICAL X5R 0402 PR63 10uF + 100uF
4 H_VID0
0402 I VRM_GND 0402 VRM_GND I 25V NI 649 X5R 16V
0
PR5 H_VID1_R NI 0402 0402 25V D6.3*8MM
4 H_VID1 AP-ENABLE_R
0402 I PR158 0402 NI R2 0.01 1206 OS-CON
0
PR3 H_VID2_R 1M I VRM_GND VRM_GND I I CRITICAL
4 H_VID2
0402 I I
0
PR8 H_VID3_R
4 H_VID3
0402 I PR163 0402 C1472_1 PC128 4.7pF 0402
0
PR7 H_VID4_R 10K I NPO 50V I
4 H_VID4
0402 I Vout = 1.25V*{(R1+R2)/R1}
4 H_VID5
PR4
0
H_VID5_R PD10 PR136 Quanta Computer Inc.
0402 I RB500V 23.7K
0
PR6 H_VID6_R DSM 0402
4 H_VID6
0402 I 100mA 0.01 PROJECT : ZN5
0
PR9 H_VID7_R 40V I Size Document Number Rev
4 H_VID7
0402 I I X4
VRD11.1 NCP5392
VRM_GND Date: Friday, March 05, 2010 Sheet 32 of 40
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

8V_SYSTEM

+19V

PD1
SS0540
PC14
0.1uF
33
DSM X7R
40V 25V
500mA 0603
PL4 I I

V_1P1_CORE 0.5uH
CRITICAL

PD1_K
I

m
A PR18 A
4.7
+12V 0805
I

co
PR30 PR17 2.2 V_1P1_BST_D
4.7 0805 I
0805
I V_1P1_19VIN

PU1_VCC PC20 PC21 PC4 PC3


10uF 10uF + 47uF + 47uF
PC12 X5R X5R 25V 25V
1uF 25V 25V D6.3*6MM D6.3*6MM

a.
X5R 1206 1206 CRITICAL CRITICAL
+12V 10V I I OS-CON OS-CON

5
0603 PQ6 I I
I NTMFS4921NT1G PC10
30V 0.1uF
PR39 0 PQ6_G 4 10mohm X7R MAGIC
PR16 0805 I CRITICAL 25V
10K PR34 I 0603 PL2
DCR=3mohm colse to ich

1
2
3
Idc=18A,Isat=24A

5
0402 PU1 20K I 1.2uH
I V_1P1_COM 7 1 V_1P1_BST_R 0402 CRITICAL V_1P1_CORE V_1P1_CORE V_1P1_ICH

VCC
COMP/DIS BST V_1P1_HDRV NI I
2
TG

si
PR35 8 V_1P1_PHASE JS6 DFS_0805
PQ4_D PR147 0 PHASE NOBOM
2K PC110 0402

GND
3

0402 100pF NI V_1P1_FB 6 4 V_1P1_LDRV JS7 DFS_0805


I X7R FB BG PC25 PC27 NOBOM

5
PR147_2
0.05 50V NCP1587DR2G PQ3 PQ2 PC9 PC29 PC26 820UF 820UF

3
16,26,35,36 PWRGD_30MS PR23 0 PQ4_G 1 1 0402 SOIC_8P PR11 NTMFS4935NT1G NTMFS4935NT1G 1000pF 0.1uF 10uF + 2.5V + 2.5V

PC16_1
0402 I I PR145 CRITICAL 10K 30V 30V X7R X7R X5R D6.3*9.0MM D6.3*9.0MM
PC108 47.5 I 0402 4 4mohm 4 4mohm 50V 25V 6.3V CRITICAL CRITICAL
PQ4 PQ5 0.33uF 0.01 0.01 CRITICAL CRITICAL 0402 0402 0805 OS-CON OS-CON
ME2N7002E ME2N7002E X7R PC16 0402 I I NI I I I I I
2

1
2
3

1
2
3

ne
60V 60V 6.3V 1000pF I PR154
250mA 250mA 0402 0402 2.32K

PC113_1

PR14_1
SOT23_3P SOT23_3P I 50V 0.01
I I NPO 0402
NI PC113 I
B 0.022uF PR14 B
X7R 2.2
16V 1206
0603 V_1P1_CORE I
PR144 I
V_1P1_CORE 5.76K PR156_1 PR156 0
0.01 0603 I

do
L=1.2uH
0402
∆I={(Vin-Vout)*Vout}/(Vin*L*Fsw) I
∆I={(19-1.1)*1.1}/(19*1.2u*275k)=3.14A
Ripple Voltage=∆I*ESR=3.14A*2.6mohme=8.16mV
OCP=12*2=24A
Rocset=Iocth*Rdson/Iocset
Rocset=24A*4mohm/10uA=10Kohm

In
i-
C
is C
kn
Te
w.
ww

D D

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
V_1P1_CORE
Date: Friday, March 05, 2010 Sheet 33 of 40
1 2 3 4 5 6 7 8
5 4 3 2 1

+19V
34
PL14
0.5uH
5V_LDO CRITICAL
I
5V_LDO
5VSB_3VSB_PWM_VIN 5VSB_3VSB_PWM_VIN
PC72 PC192
PC203 PC183 PC186 10uF 10uF PC73 PC198 PC77 PC89
10uF 10uF 1uF X5R X5R 10uF 1uF + 47uF + 47uF

m
X5R X5R 0603 25V 6.3V X5R 0603 25V 25V
D 25V 25V X5R 1206 0805 25V X5R D8.0*20.0MM D8.0*20.0MM D
1206 1206 25V I I 1206 25V CRITICAL CRITICAL

5
6
7
8
I I I I I EC EC

8
7
6
5
I I

co
PQ65
FDS8880_NL 5VSB_BST_R PC194 0.1uF I 5VSB_BST 3VSB_BST PC188 0.1uF I 3VSB_BST_R 4
MAGIC CRITICAL 45VSB_UG_R PR231 2.2 0603 X7R 25V 0603 X7R 25V PQ56
0805 I FDS8884
DCR=9.2mohm I PR229 PR221 30V MAGIC
IDC=10A, Isat=16A 30V 4.7 4.7 30mOHM DCR=9.2mohm
SOIC_8P 0805 0805 PR220 2.2 3VSB_UG_R CRITICAL 3VSB
5VSB PL13 11.6A I I 0805 I I PL12 IDC=10A, Isat=16A

3
2
1
5uH 5uH

1
2
3
5VSB_PHASE 3VSB_PHASE
9.2mohm 9.2mohm

8
7
6
5

8
7
6
5

a.
PC91 PC92 PC200 PC201 CRITICAL CRITICAL PC75 PC182 PC181

5
6
7
8
+ 560uF + 560uF 10uF 10uF I PC85 PC79 I + 560uF 10uF 10uF
6.3V 6.3V X5R X5R 1000pF 1000pF 6.3V X5R X5R
D6.3*8MM D6.3*8MM 6.3V 6.3V X7R 4 5VSB_LG 4 5VSB_LG X7R D6.3*8MM 6.3V 6.3V
CRITICAL CRITICAL 0805 0805 50V 3VSB_LG 4 50V CRITICAL 0805 0805
OS-CON OS-CON I I 0402 PQ73 PQ61 DC_GND PQ59 0402 OS-CON I I
I I I FDS6690AS FDS6690AS FDS6690AS I I

PR97_1
30V 30V 30V PR218

PR86_1
15mOHM 15mOHM 15mOHM 7.68K
CRITICAL CRITICAL 5V_LDO +19V CRITICAL 0.01

1
2
3

1
2
3
I I 5V_LDO I 0402

35
34
33
32
31
30
29
28
27
26
25

3
2
1

si
PR97 PU12 3VSB I
PR236 1.5 PR106 42 VREG3 PR222 PR75 PR86

GNDA
GNDA
GNDA
SW1
VBST1
DRVL1
VREG5

DRVL2
VBST2
SW2
GND
GNDA DC_GND
13.3K 1206 5VSB 100K 41 100K 2.2 1.5
0.01 I 0402 GNDA 0402 0805 PR76 1206
40
0402 NI GNDA NI I 47K I
39
I PR232 0 5VSB_UG GNDA 3VSB_UG 0402 PR219 13.3K 0.01
1 24
0402 I 5VSB_SW DRVH1 DRVH2 3VSB_5VSB_VIN NI 0402 I
2 23
PR230 7.68K 5VSB PR233 330K 5VSB_RF V5SW VIN VREG3
3 22

2
0402 I 0402 I 0.01 5VSB_EN RF VREG3 3VSB_EN
4 21
PR105 47K 5VSB_PG EN1 EN2 3VSB_PG PC187 0.1uF I JS1
0.01 5 20
PC196 0.1uF I I 0402 SKIPSEL PGOOD1 PGOOD2 SKIPSEL 0603 X7R 25V DFS_0603
6 19
SKIPSEL1 SKIPSEL2

ne
0603 X7R 25V 5VSB_CSP 7 18 3VSB_CSP NOBOM
5VSB_CSN CSP1 CSP2 3VSB_CEN
8 17

1
PC88 CSN1 CSN2

COMP1

COMP2
PC197 0.022uF

VREF2
2

GNDA
GNDA
GNDA
FUNC
VFB1

VFB2
1uF X7R PC185 PC184 PC76

TRIP
C JS3 X5R 16V 1uF 0.022uF 1uF C

EN
DFS_0603 6.3V 0402 X5R X7R X5R
NOBOM 0402 I TPS51220RHBR 6.3V 16V 25V

9
10
11
12
13
14
15
16

36
37
38
I CRITICAL 0402 0402 0603
1

I I I I

do
3V_5V_CTRL
DC_GND
5VSB_FB_R PR101 120K 5VSB_FB 3VSB_FB PR77 62K 3VSB_FB_R
0402 I 0402 I
0.01 PR95 FUNC TRIP PR83 0 5V_LDO 0.01
29.4K VREG3 0402 I PR85
0.01 5VSB_COMP 3VSB_COMP 27K
0402 PR93 0 PC193 PR82 0 0.01
I 0402 NI PR94 1500pF PR226 PC189 0402 NI 0402
0 X7R 10K 1000pF PR224 I
0402 50V 0.01 0402 10K

In
DC_GND I 0402 0402 X7R 0.01
I I 50V 0402 DC_GND
I I VREG3

VREF2 VREF2
PC191
0.1uF PR235 PR234
X7R AUTO SKIP 0 0
25V 0402 0402
0402 NI I
I

i-
SKIPSEL
JS2
1 2

DFS_0603
is DC_GND

PQ62 PQ58
SI4800BDY-T1-E3 SI4800BDY-T1-E3
B SOIC_8P SOIC_8P B

5VSB_EN control +12V 5VSB


30V
7A VCC 3VSB
30V
7A VCC3
CRITICAL CRITICAL
I I
8 1 8 1
VREG3 3VSB 7 2 7 2
PR81 6 3 PC86 6 3 PC74
5VSB_EN2 PR223 0 5VSB_EN 5 560uF 5 560uF
kn
100K + +
PR73 PR74 0402 I 0402 6.3V 6.3V
10K 10K D6.3*8MM D6.3*8MM

4
0402 0402 I CRITICAL CRITICAL
3

I NI PR80 1K PR80_2 PR79 30 PQ62_G OS-CON OS-CON


0402 I 0402 I I I
PQ57 PC195 PC190

3PQ28_D
S4_STATE_5VSB_EN ME2N7002E 0.1uF 0.1uF
1
60V X5R X5R
250mA PC78 25V 25V
3

SOT23_3P 0.1uF 0402 0402


I X7R
Te

NI NI
2

PQ26 PQ28 25V PR78 30 PQ58_G


11,26,27,29,31 S4_STATE_ICH# S4_STATE_ICH# 1 ME2N7002E 1 ME2N7002E 0402 0402 I
26,29,31,32 PWR_PS_ON#
60V PR217 60V I
250mA 10K 250mA
SOT23_3P 0402 SOT23_3P
I NI I
2

2
PQ55_D
w.

VREG3
PQ55
26,27 5V_USB_MAIN# 5V_USB_MAIN# 1 ME2N7002E
60V PR227
250mA 100K
SOT23_3P 0402
NI I
ww

A A
3V_5V_CTRL
If R821 and Q107 install 3

S4_STATE_ICH- 5V_USB_MAIN- VR_5VSB_EN


PQ63
0 1 1 31 5VSB_CTRL 1 ME2N7002E
60V
250mA
0 0 0 PR242 PC202 SOT23_3P
10M 1000pF I
Quanta Computer Inc.
2

0402 X7R
1 X 1 I 50V
0402
I PROJECT : ZN5
1 X 1 Size Document Number Rev
X4
5VSB,3VSB,VCC3,VCC
Date: Friday, March 05, 2010 Sheet 34 of 40
5 4 3 2 1
5 4 3 2 1

V_1P1_CL_MCH 5V_LDO

2010/2/26 ADD 35
3VSB PR261 V_SM
0
0603
I
PR52
10K PC47
0402 1uF PC52 PC56
I X7R 10uF 0.1uF

PU6_6
3VSB +1.1V_CL_OK 16V X5R X7R
0402 6.3V 25V

m
I 0805 0402
D I I D
PR193 V_SM

6
1K
0402 5

VCNTL
VIN V_1P1_CL_MCH

co
I 7 9
SLP_M PR189 POK VIN
1K
PQ45 0.01 3 V_1P1_CL_MCH

3
0402 VOUT0
MMBT3904 4
ICH_SLP_M# PR195 10K Q22_B SOT23_3P I VOUT1
11,29 ICH_SLP_M# 2
0402 I I PR190
0 V_1P1_ME_MCH_EN 8 2 PU6_FB PR188 1.13K PC163 PC48 PC159

GND
1
PC166 0402 EN FB 0402 0.01 I 0.1uF 560uF 10uF
+

3
1uF I X7R 2.5V X5R
X5R PU6 PR191 0 PC162_1 PC162 33pF 25V D6.3*6MM 6.3V

a.
25V PQ44 SOIC8 PR263 0402 NI 0402 CRITICAL 0805
0603 PQ44_G 1 ME2N7002E APL5930KAI 0 50V NPO 0402 NI I OS-CON I
NI 60V I 0402 I
250mA PR192
I

PC215_1
SOT23_3P 2.87K
I 0.05 0402

2
0.01
V_3P3_CL I
PC215
2200p
X7R

si
PR259 50V
5V_LDO 1K 0402
0402 I
V_1P1_CL_MCH
NI
PR258 0.01
5.6K MCH_CLPWROK
MCH_CLPWROK 7
0402
PR257
NI

3
1K

3
0.05
0402

ne
PQ72
NI PR255
CL_PWROK_NET2 1 ME2N7002E PQ70
0.01 60V SLP_M PQ70_G 1 ME2N7002E PC214
PQ71 250mA 60V 1uF
PR256
3

MMBT3904 SOT23_3P 250mA X5R


C +1.1V_CL_OK CL_PWROK_NET1 SOT23_3P NI 1K SOT23_3P 25V C
2

2
NI 0.01 I 0603

2
0402 NI
1

0
I
0402 PC209 PC213
NI 4.7uF 1uF
X5R X5R

do
0.05
6.3V 25V
0805 0603
NI NI

V_SM
PR260

In
+12V
0 PD13
3VSB V_1P1_ICH PC158 PC161
0402 10uF 0.1uF
V_1P5_ICH
I X5R X7R
0.05 6.3V 25V
SS0540 PC54 0805 0402
PR194 PR197 NI 1uF I I
8.2K 1K DSM X7R
0402 0402 40V 16V
I PU7 0402

i-
I 500mA
I

5
PQ46_1 V_FSB_VTT_EN 1 6 PU7_VCC PQ20
EN VCC NTMFS4921NT1G
3

30V
2 5 PU7_DRI PR53 100 PQ20_G 4 10mohm
PQ47 PQ46 GND DRI 0805 I CRITICAL
16,26,33,36 PWRGD_30MS PR196 0 PQ47_G 1 ME2N7002E 1 ME2N7002E I

1
2
3
0402 I 60V 60V 3 4 SS PC46
250mA 250mA FB SS
SOT23_3P SOT23_3P PC167 PC50 PR55 0.01uF
I I NCP102 0.047uF 1000pF 10K X7R
is
2

SOT23_6P X7R X7R 0402 25V


CRITICAL 16V 50V I 0402 V_FSB_VTT
B I 0402 0402 B
I
I NI
PR55_2

PR54
47
PR56 0402 PC157 PC45 PC160
PC58 Rg 10K NI 0.1uF + 560uF 4.7uF
4.7nF 0402 X7R 2.5V X5R
kn

X7R 0.01 25V D6.3*6MM 6.3V

PC57_1
25V I 0402 CRITICAL 0805
0402 I OS-CON I
I I
PC57
0.022uF
X5R
50V
V_FSB_VTT_FB 0402
NI
Te

2010/2/26 Modify
PR59
19.1K
0402
Rh 0.01
I

PCB
signal Layer
V_3P3_CL
w.

Prepreg 3VSB

Power Layer
3VSB
Prepreg PC172
1uF
signal Layer X5R
11 SLP_M_G_V3P3_CL
25V
Core PR203 0603
62mils 10K I
ww

A signal Layer 0402 A


I PQ49
Prepreg SI2303-T1-E3
SLP_M PR202 47K SLP_M_G_V3P3_CL 2 -30V
3,36 SLP_M
GND Layer 0402 I -2A
PQ50 SOT23_3P
3

Prepreg MMBT3904 PC171 I


PR204 10K Q44_B 2 SOT23_3P 1uF V_3P3_CL
3

11 WOL_EN
signal Layer 0402 I I X5R
25V
1

PR205 0603 PC170


100K I 0.1uF
CRITICAL 0402 X7R
I NI 25V
0402
Quanta Computer Inc.
I
PROJECT : ZN5
Size Document Number Rev
X4
V_3P3_CL/V_1V_1P1_ME+T/U PAR
Date: Friday, March 05, 2010 Sheet 35 of 40
5 4 3 2 1
5 4 3 2 1

5V_LDO
8V_SYSTEM
36
5V_LDO
+12V

PC99
PD9 PC116 0.1uF
BAT54C 0.1uF PD11 X7R
X7R BAT54C 16V
16V 0402
0402 I +19V

m
I PL1

PR19_1
D D

PR150_1
0.5uH
CRITICAL
I
V_SM_19VIN

co
PR19
4.7 MAGIC
0805 PR150 PC129 PC126 PC101 PC109 PC7 PC1 DCR=1.9mohm
4.7 2200p 0.1u 10uF 10uF + 47uF + 47uF
I 0805 X5R X5R X5R X5R 25V 25V Idc=10A,Isat=12A
I 25V 25V 25V 25V D6.3*6MM D6.3*6MM
PR33 2.2 PR33_2 0603 0603 1206 1206 OS-CON OS-CON
0805 I I I I I CRITICAL CRITICAL
PC17 I I
PC6 0.1u
1uF X5R

a.
X5R 25V PQ36

PU2_VCC
25V 0603 NTMFS4921NT1G
0603 I 30V MAGIC
I PR29 0 PQ36_G 4 10mohm DCR=3mohm
0805 I CRITICAL
3VSB I Idc=18A,Isat=24A

1
2
3
PL3

5
PU2 1.2uH
V_SM_COM 7 1 V_SM_BST_R CRITICAL V_SM

VCC
PR42 COMP/DIS BST V_SM_HDRV I
2
TG

si
10K 8 V_SM_PHASE
3

PR146 PHASE
0402
PR25 0

GND
I PQ10 2K 0402 V_SM_FB V_SM_LDRV PC15
6 4
SLP_S4_V_SM_CTRL 1 ME2N7002E 0402 NI FB BG 1000pF
60V 0.01 PC13 NCP1587DR2G PR20 X7R

3
3

5
250mA I 100pF SOIC_8P 10K PQ33 PQ34 50V

PC112_1
SOT23_3P NPO PR132 CRITICAL 0402 NTMFS4935NT1G NTMFS4935NT1G 0402 PC142 PC139 PC23 PC24
PR25_2

PQ11 I 50V 47.5 I 0.01 30V 30V I 10uF 0.1u + 560uF + 560uF

PR28_1
2

PR43 1K PQ11_G 1 ME2N7002E 0402 0402 I 4 4mohm 4 4mohm X5R X5R 6.3V 6.3V

PC103_1
0402 I 60V PC11 I I PR139 CRITICAL CRITICAL 25V 25V D6.3*8MM D6.3*8MM
SLP_S4# 8,11,29,30

ne
250mA 0.33uF PC112 2K I NI 1206 0603 CRITICAL CRITICAL

1
2
3

1
2
3
SOT23_3P X7R 1000pF 0402 I I OS-CON OS-CON
I 0402 PC103 0.01 PR28 I I
2

50V 50V 0.022uF I 2.2


0402 NPO X5R 1206
C I NI 50V I C
0603 V_SM
I
PR131 PR140_1 PR140 0
2.21K 0402 I
1.5V 0402
0.01

do
L=1.2uH
I
∆I={(Vin-Vout)*Vout}/(Vin*L*Fsw)
∆I={(19-1.5)*1.5}/(19*1.2u*275k)=4.18A
Ripple Voltage=∆I*ESR=4.18A*4mohm=16.7mV
OCP=19A
Rocset=Iocth*Rdson/Iocset
Rocset=24A*4mohm/10uA=10Kohm V_SM

In
PR141
1K
0402
0.01
I V_SM_VTT_REF

PR148

3
1K PC115
U33 0402 0.1u
5V_LDO 0.01 X7R

i-
8 1

2
NC VIN I 25V 1
7 2 0402 SLP_M 3,35
NC GND I PQ37
6 3 ME2N7002E
VCNTL REFEN 60V

2
5 4 250mA
GND

PC119 NC VOUT SOT23_3P


10uF I
X5R RT9199PSP V_SM_VTT
9

6.3V CRITICAL
0603 I

B
V_FSB_VTT
PD12
V_1P5_ICH
I
is
PC118 PC19 B
10uF + 560uF
X5R 2.5V PR262
6.3V D6.3*6MM 1K V_SM
SS1040
SOD123
40V
0603
I
CRITICAL
OS-CON
I
0402
NI V_1P5_ICH
1A 2010/2/26 ADD
I
kn

PC147 PC146
4.7uF 0.1uF
X5R X7R
6.3V 16V
+12V 0805 0402

CLAMP_CTRL I I

PR170
100K
Te

VCC3 VCC V_1P1_CORE +12V V_SM 0402


I

5
6
7
8
PR38 PQ40
PR41 PR40 PR36 PR37 22 FDS8880_NL
10 10 10 22 1206 3VSB PR171 1K PR172_1 PR172 30 PQ40_G 4

PQ38_D
CRITICAL
1206 1206 1206 1206 NI 0402 I 0402 I
I I I I I
PR173 30V
PQ9_D

20K PC144 SOIC_8P


PQ13_D

PQ12_D

PQ7_D

PQ8_D

0402 0.1uF 11.6A


w.

3
I 0402

3
2
1
PQ38 X7R
ME2N7002E 16V
PQ38_G 1 60V I V_1P5_ICH
3

250mA
SOT23_3P
PQ13 PQ12 PQ7 PQ8 PQ9 I

3
19,26 CLAMP_CTRL CLAMP_CTRL 1 ME2N7002E 1 ME2N7002E CLAMP_CTRL 1 ME2N7002E 1 ME2N7002E SLP_S4_V_SM_CTRL 1 ME2N7002E

2
60V 60V 60V 60V 60V
250mA 250mA 250mA 250mA 250mA PQ39
SOT23_3P SOT23_3P SOT23_3P SOT23_3P SOT23_3P 16,26,33,35 PR174 0 PQ39_G 1 ME2N7002E PC22
ww

A
PWRGD_30MS A
I I I I NI 0402 I 60V + 470uF PC143 PC140 PR44
2

250mA 2.5V 4.7uF 0.1uF 10


SOT23_3P CC7343 X5R X7R 1206
2 I CRITICAL 6.3V 16V NI
POS-CAP 0805 0402
I I I

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
DDR3_V-SM_V-SM-VTT
Date: Friday, March 05, 2010 Sheet 36 of 40
5 4 3 2 1
5 4 3 2 1

37

m
D D

co
H25 H24 H26 H27
h-c276d169p2 h-c276d169p2 h-c276d169p2 h-c276d169p2

a.
1

si
C C

ne
do
H18 H14 H13 H17 H16 H8 H11 H12 PAD3 PAD4 PAD5
H-C276D276N H-C276D276N h-c276d118p2 h-c276d118p2 h-c276d118p2 H-C236D122P2 h-c276d118p2 H-C236D122P2 SPAD-ZN6-NP-1 PAD-SHAPE-DA0ZN6MB6D0-1 SPAD-R270X960

In
1

1
i-
B B
H1 H7 H4 H20 H23 H9 H19 H22 H3 H10 H2 H15
h-c276d165p2 h-c276d169p2 h-c276d169p2 H-C276D165P2 H-C276D138P2 h-c276d138p2 h-c276d138p2 h-c276d138p2 h-c276d138p2 h-c276d138p2 h-c276d138p2 h-c276d138p2
is
1

1
kn

H5 H6 H21
O-ZN5-1 O-ZN5-2 O-ZN5-3
Te
1

A A
w.

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
ww

X4
SCREW HOLE & EMI
Date: Friday, March 05, 2010 Sheet 37 of 40
5 4 3 2 1
5 4 3 2 1

DATE ZN5 Schematic file for EVT2 Revision


18th Dec. 2009 ZN5-1218-1.DSN X2 38
PS ZN5 Schematic Change from EVT1 to EVT2

Schematic Change Description


1. Change AVDD/DVDD name to AVDD_7308/DVDD_7308 on CH7308 chip side
2. Add R81(I),R83(I),R715(I), R716(NI), R717(NI), change 3VSB name to 3VSB_USBOC of RP14 and RP18
3. Add 32 pcs 0.1uF capacitor C718-C749 (NI), change SATA HDD connector footprint and reverse pin define
4. Change dedicated component location to follow HP PCA specification
ACN1 to J74, ACN2 to J72, ACN3 to J75, ACN4 to P6, AU2 to U13, AU3 to U14, BT1 to XBT1, CN1 to J69, CN11 to P60, CN12 to P151
CN13 to P9, CN14 to J41, CN16 to J106, CN19 to J105, CN2 to P11, CN20 to J93, CN22 to J94, CN21 to P160, CN23 to J64, CN25 to J67
CN33 to J66, CN26 to J9, CN27 to J70, CN28 to J90, CN29 to P5, CN3 to P150, CN30 to J92, CN31 to J71, CN32 to J91, CN4 to XDP1
CN5 to XMM2, CN6 to XMM1, CN8 to P125, P1 to P54, P2 to P153, SW1 to SW50, U10 to U29, U11 to U5, U29 to U53, U19 to U11
U13 to U51, U14 to U52, U23 to U19, U25 to U40, U40 to U55, U3 to U50, U37 to U31, U31 to U54, U39 to U6, U6 to U10, PJ1 to J103
U5 to U3, U42 to U4, U4 to XU1, Y1 to Y2, Y2 to Y1, Y3 to Y6, Y6 to Y3

m
D D
5. Change Audio Amplifier from TPA6020A2 to SSM2306CPZ, Del de-pop circuit
Del AC1(NI), AC2(NI), AC20(NI), AC21(NI) AC38(I), AC40-AC44(I) AD1(NI), AD2(NI), AQ1(NI), AQ2(NI), AR1-AR3(NI)
Change AC18 and AC19 from 1000pF(NI) to 0.1uF(NI), change footprint
Change AC45 from 1uF(I) to 0.047uF(I), change footprint Del D57, BAT54A(I)

co
Add AC56 and AC57, 22uF(I) Add AC58, 1000pF(I) Add AC60,AC77, 0.047uF(I) Add AC71,AC72,AC73,AC65, 470pF(I)
Add AC74, 10uF(I) Add AC75, 0.1uF(I) Add AC66, AC76,AC78,AC79, 10pF(I) Add AC64, 10uF(I)
Add AD43, AD8, SS1040(I) Add AD44,AD7, SSM24PT(I) Add AD46, BAT54A(I) Add AL15-19, MPZ1608S221AT(I)
Change AR17 POP from I to NI
Change AR33, AR41 value from 14K ohm to 76.8K ohm (I)
Change AR34, AR38 value from 14K ohm to 0 ohm(NI)
Add AR72 and AR74 76.8K ohm(I) Add AR76 and AR80 0 ohm (I)
6. Change Speaker connector tyrpe from vertical to right angle

a.
7. Del DP AUX SW unnecessary circuit Del C101, 0.1uF (I) Del C276, 0.22uF (I), Del Q22 and Q23, ME2N7002E(I)
8. Change 2nd FAN connector from 4 pin to 3pin Del C11, 0.01uF (I) C12, 100pF (I) C15, 10uF (I), C9, 47pF(I), Del D1, BAT54A(I)
9. Change C122 voltage rating from 10V to 6.3V
10. Change C175 POP from I to NI
11. Change C236(I), C260(NI),C288(NI),C314(I),C543(I),C668(I)C289(I) footprint and QPN
12. Change C256(NI),C613(I),C641(I), C302(NI), C304(NI) footprint and QPN
13. Change C356(I) and C367(I), C449(I) footprint and QPN to follow Intel Spec
14. Del C651(I), C652(I), C673(I), C674(NI)
15. Add C675-C715, 0.1uF(I), Add C716, 2.2uF(I), Add C717, 1uF(I), Add C718-C749, 0.1uF(NI)

si
16. Change CCD connector type from right angle to vertical
17. Change CN9 EDID connector POP from NI to I
18. Del CT1, CT label(I)
19. Change D11 and D14 value(I)
20. Change D4 from BAT54A to BAT54C(I)
21. Change L34 and L35 footprint and QPN(I), Add L46(I) and L47(I)to follow Intel Spec
22. Del Q24, DDTC144EUA(I). Del Q31(I), Q34(I), Q40(I), Q45(I), Q46(I), Q50(I), Q51(I), ME2N7002E
23. Change Q52(I) footprint and QPN, Chnage L21(I) and L22(I) QPN

ne
24. Add Q61(I), BA001440013 Del Q62(NI), Q63(NI), Q64(NI)
25. Del R108(I), R110(I), R11(I), R15(I), R16(I), R17(NI), R236(I), R283(I), R312(I), R316(I), R6(I), R7(I),RN18-21(I)
26. Change R117(I) value from 0 ohm to 1K ohm
C C

27. Change R123,R172,R196,R226,R227,R282,R347,R348, R564 POP friom I to NI


28. Change R282, R347, R565, R650, R693 POP from NI to I
29. Change R308(I) value from 100 ohm to 20K ohm
30. Change R313(NI) value from 0 ohm to 4.7K ohm
31. Change R464(I) value from 0 ohm to 1 ohm
32. Change R495(I) value from 1M ohm to 1 ohm

do
33. Change R505(I) value from 1M ohm to 40.2 ohm
34. Change R510(NI) value 0 ohm to 4.7K ohm
35. Change R514(I). R516(I) value from 2K ohm to 4.7K ohm
36. Change R515(I) value from 169 ohm to 220 ohm
37. Change R62(I) value from 11.8K ohm to 118K ohm, Change R63(I) value from 1.78K ohm to 17.8K ohm
38. Change R630(I) value from 10K ohm to 8.2K ohm
39. Change R689(I), R690(I) value from 1K to 4.7K ohm
40. Change R691(NI) and R692(NI) value from 30K ohm to 4.7K ohm

In
41.Change R694(NI) value from 1K ohm to 4.7K ohm
42.Change R695(I) value from 1K ohm to 4.99K ohm
43.Change R697(I) value from 30K ohm to 39.2K ohm
44. Change R698(NI) value from 30K ohm to 0 ohm
45. Add R710-714(I) and R716(I), R715(NI), R717(NI)
46. Change R81(I)value from 100K ohm to 1K ohm
47. Change R83(I)value from 100K ohm to 1K ohm
48. Del RN18-21(I)

i-
49. Change RP1(I) QPN
50. Change U26 value from SN74CBT3257CPWR to 74AHC1G125
51. Add PS8325 DisplayPort Dual Mode 2x2 Crosspoint Switch
52. Change C646(I) and C645(I) value from 180pF to 18pF
53. Change PC102(I), PC113(I), PC115(I), PC175(I), PC186(I), PC198(I), PC47(I), PR100(I), PR102(I), PR103(I) QPN
54. Change PC18(I), PC19(I), PC22(I), PC23(I), PC24(I). PC25(I), PC27(I), PC45(I), PC48(I), PC60(I) footprint and QPN
55. Add PC207(I), PC208(NI). PC209(NI), PC210(I), PC211(I), PC212(I), PQ68(NI), PQ69(NI), PQ70(NI), PR250-PR254(NI)
56. Change PC35(I) and PC37(I), PC42(I), PC43(I), PC44(I) value, footprint and QPN
57. Change PC66(I), PC67(I), PR90(I) footprint and QPN

B
58. Change PD1-PD7(I), PR111(I), PR241(I), PR62(I), PR63(I)footprint
59. Change PC11(I), PC1107(I) , PR125(I), PR132(I), PR141(I), PR148(I), PR149(I), PR156(I). PR16(I), PR163 QPN
B
is
60. Change PC137(I), PR142(I), PR166-PR169(I) value and QPN
61. Change PR170(I), PR171(I), PR193(I), PR195(I), PR197(I), PR203(I), PR204(I). PR213(I), PR221(I) QPN
62. Change PR224-PR229(I), PR23(I), PR232(I), PR234(I), PR42(I), PR43(I), PR52(I), PR55(I), PR56(I), PR73(I) QPN
63. Change PR45 POP from NI to I
64. Change PR80(I), PR81(I), PR83-84(I), PR87-89(I), PR91-92(I), PR94(I), PR96(I) QPN
65. Change Thermal sensor from EMC1412-2 to EMC1402-2
kn
66. Change R127 POP from NI to I, R131, R309 POP from I to NI
67. Del 20 pcs 10uF 0805 package capacitor in page 5
68. Add R718(NI). R312(NI), R316(NI), Q40(NI). Q45(I), R719(I)
69. Change EMI Cap POP from NI to I in page 18, Change USB/1394 Resistor array to common choke in page 23 and page 24
70. Change P5 pin2 power source from VCC3 to 5VSB
71. RP14 pin 10 change to 3VSB_USBOC, PCLK_ICH change to U39 pin 7
72. Change J41, CON1, P11, P125. CN7 footprint
73. DEL D48(NI),D47(NI),D54(NI),D53(NI),D50(NI),D49(NI),D56(NI),D55(NI),D9(NI),D8(NI),D14(NI),D11(NI)
74. Change AC14 and AC18 POP from I to NI
Te

75. Change AR34/AR15 POP from NI to I, footprint and QPN


76. Change AC37/AC77/AC60/AC45/AR31/AR32/AR42/AR43 QPN
77. Change AC47/AC46/AC36/AC35 footprint and QPN
78. Change L8, L9 and L11 POP form NI to I, Change L37, L38 and L39 from I to NI.
79. Move R226 and R227 tp page 26 and change them POP from NI to I, Change R160 and R161 and C85 from I to NI
80. Add over current design for each USB port, BT power add over current design and reverse power connect to 3VSB
81. Del R130(I) in page 20, change C55 POP form I to NI
82. Del RP15-RP17(I) footprint, and Add R720-737(I) footprint
w.

83. Move 1394 ESD protect device to near connector side


84. Change PQ40 value from FDC653N to SI4800BDY and footprint change
85. Change P5 pin 1 power source from 5VSB to 5V_LDO
86. Change R249 value from 10K ohm to 20K ohm, Add R766(I), R767(I), Q46(I)
87. Add R768(I) for EC code ID selection
88. Change All component that use BS870-7-F originally to ME2N7002E
89. Connecto PQ52 pin 1 to PQ68 pin1, Change PR254, PR250, PR253, PC208, PQ69 from NI to I
A
90. Add R769-R776(I) A
ww

91. Change PL2(I). PL3(I), PL5(I), PL6(I), PL7(I), PL8(I) QPN


92. Change PC210, PC211, PC212 from NI to I
93. Change PQ40(I), PR209(I), PR20(I), PC58(I) value to QPN
94. Change PQ2, PC164, PC149. PC153, PC138 from I to NI
95. Change CRT connector from I to NI
96. Change R241 POP from I to NI, R223 POP form NI to I
97. Add E16(I) and R777(NI), E16(1-2)Jumper(I)
98. Change R296(I) value and QPN
99. Change AC3(I) and AC6(I) value, description and QPN
100. Add R243(I), R778-R784(I), C651(NI), C652(NI), C673(NI), C674(NI), C750(NI), C751(NI)
101. Change CN15, CN17, J66, J67, J105, J106, J74, CN24, J72, J75 QPN
102. Change Location: JP1 to JP49, JP2 to E1, JP3 to E15, JP4 to E14
103. Change schematic reversion from 1B to X2 Quanta Computer Inc.
104. Change R81, R83, RP14 from I to NI PROJECT : ZN5
Size Document Number Rev
X4
105. Add R110(I), R108(I), C752-C755(I) CHANGE LIST(EVT1 to EVT2)
Date: Friday, March 05, 2010 Sheet 38 of 40
5 4 3 2 1
5 4 3 2 1

DATE ZN5 Schematic file for EVT2 Revision


6th Feb. 2010 ZN5-0206.DSN X3 39
PS ZN5 Schematic Change from EVT2 to DVT1.0

Schematic Change Description


1. Update schematic reversion and sheet number
2. Change C43 POP from NI to I, F6 POP from I to NI
3. Change U7, U10 value, footprint and QPN
4. Add CN25(I),R785(I),C756(I),C757(I) for B-CAS feature

m
D
5. Change dedicated location: XMM1 to XMM3, XMM3 to XMM1 D

6. Change R59 to 301 ohm, R572 to 8.2K ohm, Change JP49 dedicated location to E49.
7. Add PAD3, PAD4 and PAD5 for gasket mount.

co
8. Del PC18(I), Change value, footprint and QPN for PC22,PC25,PC27, Change PC23 and PC24 footprint and QPN
9. Change R704 from 0 ohm to 22 ohm, Del R705(I) in page 27
10. Chnage R693 ,R696, R336 and R338 footprint, QPN
11. Del D20(I), D22(I), D27(I), D31(I), C302(NI), C304(NI)
12. Change D15 ,D17 value, footprint and QPN, Change AR18 and AC15 vlue and QPN
13. Change C303 and C305 footprint and QPN, Change AL1, AL2, AL3, AL4, L16, L17, AR17, AC16, AC56,,AC57 value, footprint and QPN

a.
14. Change Speaker conn to DFHD04MR103 for halogen free request
15. Add AQ8(I), AQ9(I), AR44(I), AR45(I), AC20(I), AD45(I), AR46(I), AR47(I)
16. Add R786(NI), R787(I), D47(NI), R705(I),C260(I),D8(I) for 2nd FAN
17. Change SATA HDD CONN footprint and QPN
18. Change dedicated location: U50 to U56, U51 to U57, U52 to U58, U53 to U59, U54 to U53, U48 to U50, U47 to U51, U45 to U52

si
19. Change dedicated location: U10 to U47, U46 to U10, PU10 to U46, U24 to U54
20. Change E16 vaule, footprint and QPN, B-CAS connector footprint and QPN
21. Change R9 and R10 value and QPN
22. Change PL10 value, footprint and QPN
23. Change R127 POP from I to NI, R131 POP from NI to I, AR46 POP from I to NI, R468 and R469 POP from I to NI
24. Change AQ9 value to QPN, Change PR132 value

ne
25. modify netname MICIN-L1 error
C 26. Change AR12 and AR16 value and QPN C

27. Change SW50 material to Halogen free


28. Add PR251(NI), PR252(NI)
29. SWAP Memory CHA CK0/CK0# and CK2/CK2#

do
30. Connect RJ45 CONN Pin 5 to power plane VCC1.8M_LAN
31. Change LED1 vaule and QPN
32. Change AR45 from 49.9K to 100K, AR44 from 100K to 49.9K
33. Change AC3, AC6, H14, H18, H20, H23 footprint
33. Change C163, C540, R654, C625, C103 POP from NI to I
34. Change C119, C124, C656, C646, C582 and C588 value and QPN

In
35. Change R769, R770, R771, R775 and R776 POP from I to NI
36. Change AR34 POP from I to NI
37. Change AQ7 pin 1, U14 Pin.16 and Pin.17 connect from AGND to DGND
38. Change AC58, AC64, AC65, AC66, AC71, AC72, AC73, AC76, AC78, AC79, AQ3.1, AQ6.1 connect from AGND to DGND
39. Add VCC1.8M_LAN power source node

i-
40. Add U19 and U43 ROM SOCKET
41. Change U16 to NIS5135, Add R788(I), C758(NI), PD14(I)
42. Change AR34 and AR15 change footprint to 0603
43. Don't connect RJ-45 pin15 & pin16 to GND, and connect H18 and H14 to GND
44. Change PR71,PR70,PR212,PR206,PR208,PC174,PQ24,PQ52,PQ23 POP from I to NI. Change PR72,PR252,PR251 POP from NI to I
45. Move PR72 to PQ24.3
B 46. Change AL1-AL4, L16 and L17 value and QPN, Change R709, R700, R350, R701 QPN(from 5% to 1%)
is B

47. Change P5, P150, P151, CN7, CON1, CN18 QPN for plating request
48. Change R104 and R112 value and QPN for 14M CLK fine tune
49. Change C163,C625 vaule and QPN, Stuff C541 22pF. Change R658 and C628 POP from NI to I
50. Change Q52 and Q61 from bipolar to MOS(footprint change). Add Q62(I) and R789(I)
kn

50. Change C654 and C655 value, footprint and QPN


51. Change L24 and L26 power source to V_1P1_CL_MCH, Change L26 and L23 value/footprint, QPN and current rating
52. Change C41,C42,C49,C50,C420,C458 value, footprint and QPN
53. Change C469,C412,C396,C460,C445 and C423 QPN and temperature characteristic
54. Change C43 and C44 value and QPN
55. Change E1, E14, E15, E49, E16, E17, P54 QPN for plating 15u request
Te

56. Del R247(I) and R257(I),T123,T124


57. Change C357 and C443 value and QPN
58. Add C302(NI), C304(NI), C401(NI), C402(NI)
59. Change XMM1 and XMM3 QPN for silkscreen modificaton
60. Change R213,PR36,PR40,PR41,D43,D44,R716 value and QPN
w.

61. Change C135 POP from I to NI


62. Change Q61 from MOS to bipolar
63. Change R525, R517,R476 POP from NI to I
64. Change R789,R518,R641,R478 POP from I to NI, Change R641 value
65. Change R635 from NI to I, Change R635, R209 vaule and QPN
A 66. Change PC121,PC122,PC123,PC124,PR166,PR167,PR168,PR169,PC167 value and QPN A
ww

66. Change PR152 POP from I to NI, Change PR225,L23 QPN


67. Change XDP1,R1,R21,R22,R24,R51,R52,R25,R26,LED1,R20,R113,R181,R118,R297,R61,R153,R112,Q1,Q21,Q38,Q17 POP to PROTO
68. Change Q26,Q19,R18,R23,R506,Q2,Q20,Q32,LED4,LED9,LED5,LED10,LED2,LED7,LED3,U31,C515,C516,C518,C519,C520,D2,P54 POP to PROTO
69. Change E17,U19,U43,R12,R13.R14,R39,R40,R42,C2,C3,C4,R772,R773,R774,U1,U2,C1,C10,R5,R2,R3,R4,R8,L1,L2,C7,C8,D34 POP to PROTO
70. Change D35,D36,D37,CON2 POP to PROTO

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
CHANGE LIST(EVT2 to DVT1.0)
Date: Friday, March 05, 2010 Sheet 39 of 40
5 4 3 2 1
5 4 3 2 1

DATE ZN5 Schematic file for EVT2 Revision


5th Mar. 2010 ZN5-0305.DSN X4 40
PS ZN5 Schematic Change from DVT1.0 to DVT1.5

Schematic Change Description


1. Update schematic reversion and sheet number

m
2. Add JS8 short pin to separate V_1P1_CORE_EXP to V_1P1_CORE
D D

3. Connect RJ45 connector pin 6 to VCC1.8M_LAN

co
4. Change Q25 pin 2 netname to DIGON_R#
5. Change R716 POP from I to NI, R715 and R259 POP form NI to I
6. Add D48(I), R790(NI),R247(NI)
7. Add R791(I) as ICH_PWROK damping resistor

a.
8. Change L23 footprint
9. Change R718 pull up source to V_1P1_CORE
10. Add D60(NI),R257(NI),R792(NI)
11. Add C759(I) for stitching cap, Change R51,R52 value to 4.7K & 2.2K. Add C288(I)

si
12. Change R39,R40 and R42 the footprint to 0402 from 0603 and change the location near to GMCH
13. BOM change apply correct HF speaker connector
14. BOM change from HP request, apply sonic focus function ALC272AF-GR chip
15. Change Pin L3, H4, F9, AF3, AC4, V4, P3 power source to V_1P1_CORE

ne
16. Change R131 POP from NI to I and R127 POP from I to NI
17. Schematic change from vendor suggestion. LDO Vin GND from AGND to DGND
C C

18. Reduce POP noise, AC27 from 0.1uF/10v X5R to 0.1uF/25v/X7R ; AC25 from 10uF / 6.3v to 2.2uF /6.3v
19. Follow Cayman design HP output FSOV >= 1Vrms spec AR12/AR16 from 56 ohm to 39 ohm

do
20. Change R85 value and QPN
21. Change R585 and R717 POP from NI to I. Add R793(NI), Move C263 and C264 near to ODD connector side
22. update dedicated netname on schematic page 31-36
23. Change C486, C490,C718-C731,C756-C759 QPN, Add C760(NI),C761(NI),C762(NI),C763(NI)

In
24. Change R481 pull high source to 5V_LDO, Change PU6 pin 6 connect to 5V_LDO, Add PR255(I), PQ70(I)
25. Add C766-C772(I) ,PR256-PR259(NI), PR260(I),PC209(NI), PC213(NI), PC214(NI), PQ71(NI), PQ72(NI)
26. Change R420 pull up power source to 3VSB, Add C403(I), Change PC159 value
27. Add PC215(I), PR261(I), Change PR191 and PC162 from I to NI, Add PR262(NI), PC50(NI)

i-
28. Change R437 and R483 POP from I to NI, Change R439, R436, R485, R484 POP from NI to I
29. Add C764(I), R794(I), C405(NI), Change R525 POP from I to NI, Change Q52 to Bipolar, R137 pull up voltage change to 3VSB
30. Add R795(I), C765(NI), Change D40 POP from I to NI, Add R796(NI), Change R300 and R301 value and QPN
31. Change C7, C8, C321, C260,C142, PC68, C481, C477, C603, R264, PR95 QPN, Change C153 footprint and QPN
32. Del RP18, Add R797-R800(I), Change J93,J94,J70,J71,J90,J91,J92 QPN
is
B B

33. Change PD13 to SS0540 and POP from I to NI


34. Update dedicated netname on schematic page 3-36
35. Change AL1-AL4, L16, L17 value and QPN
kn

36. Change U8 to PI3PCIE2612-BZFE


37. Move PC215 to PU6.2 and Change PC215 footprint and QPN, Add PR263(I), C773(I), C774(I)
38. Change U54 to TPS2060, Correct 2 pcs Mini Card CONN Symbol, Connect the pin 41,39,24 to 3V_SLOT1 for 2 pcs Mini Card CONN.
39. Add PQ73(I)
Te

40. Del R785(I), CN25(I)


41. Change D12, D13, D41, D42 to SS0540, Swap U8 some net for la yout smoothly
42. Change XMM1 and XMM3 to right color, Change L21, L22, L23, L24, L26 component, Add AC38(NI)
43. Del C81(I), R437(NI), R483(NI), Change L23 value footprint and QPN, Change L27, L28 footprint and QPN
w.

44. Move R791 near U55 output side, Change R21, R22, R24 and R26 value and QPN, Chnage XDP conn pin 48 connection
45. Add C81(I), Change L23 value footprint and QPN for HP reqeust
46. Change to AU1 pin7 and pin9 to AGND
ww

A A

Quanta Computer Inc.


PROJECT : ZN5
Size Document Number Rev
X4
CHANGE LIST(DVT1.0 to DVT1.5)
Date: Friday, March 05, 2010 Sheet 40 of 40
5 4 3 2 1

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