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Bee 451 Nas - Lab

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641 views43 pages

Bee 451 Nas - Lab

Uploaded by

clashofwwe2k17
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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JSS MAHAVIDYAPEETHA

LABORATORY MANUAL

Subject Name: Network Analysis & Synthesis Lab

Subject Code: BEE 451

NBA Code: C211

COURSE: B. Tech SEMESTER: IV

Name:
Roll No.:
Group/Branch:

Department of Electrical and Electronics Engineering


JSS ACADEMY OF TECHNICAL EDUCATION
C-20/1, SECTOR-62, NOIDA
JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

VISION OF THE INSTITUTE

Aims to become an Institution of excellence in imparting quality outcome-based education that


empowers the young generation with knowledge, skills, research aptitude and ethical values to
solve contemporary challenging problems.

MISSION OF THE INSTITUTE

Develop a platform for achieving globally acceptable level of intellectual acumen and
technological competence.
Create an inspiring ambience that raises the motivation level for conducting quality research.
Provide an environment for acquiring ethical values and positive attitude.

VISION OF THE DEPARTMENT

Emerge as a premier department of Electrical and Electronics Engineering, a source of


technically outstanding energetic engineers, entrepreneurs and leaders through its highest quality
academics and research
MISSION OF THE DEPARTMENT

1. Provide the students with basic and advanced knowledge in the field of Electrical and
Electronics Engineering as well as professional skills necessary to face the challenges of
the future.
2. Encourage the students to strive for excellence through innovation and collaborative
research activities.
3. Imbibe students with qualities like team work, managerial skills and ethical & cultural
values to work in a collaborative environment.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

PROGRAM EDUCATIONAL OBJECTIVES (PEOs)

After 3 to 5 years of graduation, graduates will be able to


1. Apply their basic, advanced and analytical skills in the field of Electrical and Electronics
Engineering necessary to take on higher responsibilities in industry.
2. Hold position in academics and research organizations to pursue a continual path of
professional development and excel through innovation and collaborative research
activities.
3. Exhibit professional ethics, team work skills and leadership qualities to serve in
interdisciplinary fields.

PROGRAM SPECIFIC OUTCOMES (PSOs)


PSO1:
Apply the knowledge in the field of Embedded and Control systems to provide acceptable
solutions for industrial and societal needs
PSO2:
Model, analyze and validate the performance of Smart Energy Systems that are sustainable.

PROGRAM OUTCOMES (POs)

Engineering Graduates will be able to:

1. Engineering knowledge: Apply the knowledge of mathematics, science, engineering


fundamentals, and an engineering specialization to the solution of complex engineering
problems.
2. Problem analysis: Identify, formulate, review research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of
mathematics, natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering problems and
design system components or processes that meet the specified needs with appropriate
consideration for the public health and safety, and the cultural, societal, and environmental
considerations.
4. Conduct investigations of complex problems: Use research-based knowledge and research

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

methods including design of experiments, analysis and interpretation of data, and synthesis of
the information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modeling to complex engineering activities
with an understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to assess
societal, health, safety, legal and cultural issues and the consequent responsibilities relevant
to the professional engineering practice.
7. Environment and sustainability: Understand the impact of the professional engineering
solutions in societal and environmental contexts, and demonstrate the knowledge of, and
need for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member or leader
in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend and
write effective reports and design documentation, make effective presentations, and give and
receive clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, as a member and
leader in a team, to manage projects and in multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and ability to engage in
independent and life-long learning in the broadest context of technological change.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

COURSE OUTCOMES (COs)


Pre-requisites of course: Basic Electrical Engineering

At the end of this course students will demonstrate the ability to:

Course Outcomes: Knowledge Level, KL


CO1 Understand basics of electrical circuits with nodal and mesh analysis. K2
CO2 Appreciate electrical network theorems. K3
CO3 Analyze RLC circuits. K3
CO4 Determine the stability of an electrical circuit. K2
CO5 Design network filters. K2

KL- Bloom’s Knowledge Level (K1, K2, K3, K4, K5, K6) K1 – Remember K2 – Understand K3 – Apply K4 –
Analyze K5 – Evaluate K6 – Create

CO-PO-PSO MAPPING

PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2

C211.1 3 3 2 2 3 2 1 1 2 3 2

C211.2 3 3 2 2 3 2 1 1 2 3 2

C211.3 3 3 2 2 3 2 1 1 2 3 2

C211.4 3 3 2 2 3 2 1 1 2 3 2

C211.5 3 3 2 2 3 2 1 1 2 3 2

OBJECTIVE OF THE LABORATORY COURSE:

1. To provide hands on practical exposure.


2. To provide experience in working on various types of Electrical Machines, Instruments
and other accessories.
3. To enforce theoretical instructions with related practical work.
4. To develop ability to test Electrical Machines for satisfactory performance.
5. To get training in Technical Report Writing.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

AKTU-SYLLABUS

Ten experiments to be performed:

1. Verification of Maximum power transfer theorem.


2. Verification of Tallegen's theorem.
3. Study of phenomenon of resonance in RLC series circuit and obtain resonant frequency.
4. Design and find cut-off frequency of low pass and high pass filters.
5. Design and find the pass band frequencies of band pass filters.
6. Design and find the stop band frequencies of band reject filters.
7. Determination of two port network Z and h parameters.
8. Verification of parameters properties in interconnection of 2, two port networks in series-
series interconnection.
9. Verification of parameters properties in interconnection of 2, two port networks in parallel-
parallel interconnection.
10. Determination of Z parameters of a T network and Computation of corresponding parameters
to equivalent π network.
11. To perform the transient response of RL circuit.
12. Verification of parameters properties in interconnection of 2, two port networks in cascade
interconnection.
Note: Any two experiments from above list should also be performed by students on Virtual
Lab.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

INDEX

S.No Name of Experiment Associated COs Page No.

1 Verification of Kirchhoff’s laws. CO1 8

2 Verification of Superposition theorem. CO2 11

Verification of Thevenin’s Theorem and Maximum power


3 CO2 13
transfer theorem.

4 Verification of Tellegen's theorem. CO2 16

Study of phenomenon of resonance in RLC series circuit and


5 CO3 18
obtain resonant frequency.

6 To perform the transient response of RL circuit. CO3 21

7 Determination of two port network Z and h parameters. CO4 23

Verification of parameters properties in interconnection of 2,


8 CO4 29
two port networks in series- series interconnection.
Verification of parameters properties in interconnection of 2,
9 two port networks in parallel-parallel interconnection using CO4 31
VIRTUAL LAB.
Verification of parameters properties in interconnection of 2,
10 two port networks in cascade interconnection using VIRTUAL CO4 33
LAB.
Design and find cut-off frequency of low pass and high pass
11 CO5 35
filters.

12 Design and find the pass band frequencies of band pass filters. CO5 38

Design and find the stop band frequencies of band reject


13 CO5 41
filters.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

EXPERIMENT NO. 1

Verification of Kirchhoff’s laws

AIM: To verify Kirchhoff’s Voltage Law (KVL) and Kirchhoff’s Current Law (KCL) in a
Passive Resistive Network

APPARATUS REQUIRED:

S. No Apparatus Name Specification Quantity

1 DC Power Supply 0-30 V 1


2 Ammeter 0-200 mA 1
3 Voltmeter 0-30 V 3
100 Ω,150 Ω, 220
4 Resistors 3

5 Bread Board - 1
6 Connecting Wires - As required

CIRCUIT DIAGRAMS:

Figure 1.1. Verification of KVL

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

Figure 1.2. Verification of KCL

PROCEDURE:

To Verify KVL

1. Connect the circuit diagram as shown in Figure 1.1

2. Switch ON the supply to RPS.

3. Apply the voltage (say 5v) and note the voltmeter readings.

4. Gradually increase the supply voltage in steps.

5. Note the readings of voltmeters.

6. sum up the voltmeter readings (voltage drops) , that should be equal to applied
voltage .

7. Thus KVL is Verified practically.

To Verify KCL

1. Connect the circuit diagram as shown in Figure 1.2

2. Switch ON the supply to RPS.

3. Apply the voltage (say 5v) and note the Ammeter readings.

4. Gradually increase the supply voltage in steps.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

5. Note the readings of Ammeters.

6. Sum up the Ammeter readings (I1 and I2) , that should be equal to total current
(I).

7. Thus, KCL is Verified practically

OBSERVATIONS:

For KVL

Applied
Voltage V1 (volts) V2 (volts) V3 (volts) V1+V2+V3 (volts)
V Theoritical Practical Theoritical Practical Theoritical Practical Theoritical Practical
(volts)

For KCL

Applied I(A) I1 (A) I2 (A) I1+I2 (A)


Voltage
(V) Theoretical Practical Theoretical Practical Theoretical Practical Theoretical Practical

PRECAUTION:

1. Check for proper connections before switching ON the supply.


2. Make sure of proper color coding of resistors.
3. The terminal of the resistance should be properly connected.

RESULT:

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

EXPERIMENT NO. 2

Verification of Superposition theorem

AIM: To Verify principle of Superposition theoretically and practically.

APPARATUS REQUIRED:

S. No Apparatus Name Specification Quantity

1 Resistors 100 Ω, 150 Ω, 220 Ω 3


2 Ammeter 0-200 mA 1
3 R.P.S 0-30V 2
4 Bread Board - 1
5 Connecting Wires - As required

THEORY: In a linear, bilateral network the response in any element is equal to sum of
individual responses while all other sources are non-operative.

CIRCUIT DIAGRAM:

Figure 2.1. Both Voltage Sources are acting (V1&V2)

Figure 2.2. Voltage Source V1 is acting alone

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

Figure 2.3 Voltage Source V2 is acting alone

PROCEDURE:

1. Connect the circuit as shown in figure 2.1 and note the current flowing through R3 and let
it be I.
2. Connect the circuit as shown in figure 2.2 and note down the ammeter Reading, and let it
be I1.
3. Connect the circuit as shown in figure 2.3 and note down the ammeter reading, and let it
be I2.
4. Verify for I = I1 + I2, compare the theoretical and practical results.

OBSERVATIONS:

WHEN BOTH WHEN V1≠0 & WHEN V1=0&


Parameters V1 & V2≠0 (I) V2=0 (I1) V2≠0 (I2)

Current through R3
(Theoretical Values)
Current through R3
(Practical Values)

PRECAUTION:

1. Check for proper connections before switching ON the supply.


2. Make sure of proper color coding of resistors.
3. The terminal of the resistance should be properly connected.

RESULT:

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

EXPERIMENT NO. 3

Verification of Thevenin’s Theorem and Maximum power transfer theorem

AIM:
1. To find the Thevenin’s equivalent resistance (Rth) for a given circuit
2. To find Thevenin’s equivalent voltage (Vth) for a given circuit
3. To find the Thevenin’s equivalent of the given network circuit.
4. To find the Circuit current in the equivalent Thevenin’s Network
5. To find maximum power at load

APPARATUS REQUIRED:

S. No Apparatus Name Specification Quantity

1 DC Voltage Source 0-30 V 1

2 DC Current Source 0-2 mA 1

2 DC Voltmeter 0-30 V 1

3 DC Ammeter 0-2 mA 1

4 Resistance 2KΩ, 3KΩ, 1Ω 1 Each

5 Bread Board - 1

5 Connecting Wires - As required

CIRCUIT DIAGRAM:

Fig 3.1. Circuit Fig 3.2. Circuit for finding Thevenin’s resistance

Figure 3.3. Thevenin’s equivalent circuit

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

THEORY:

Thevenin’s Theorem for DC circuits states that any two port linear network may be replaced by a
single voltage source with an appropriate internal resistance. The Thevenin’s equivalent will
produce the same load current and voltage as the original circuit to any load. Consequently, if
many different loads or sub-circuits are under consideration, using a Thevenin’s equivalent may
prove to be a quicker analysis route than “reinventing the wheel” each time.

The Thevenin’s voltage is found by determining the open circuit output voltage. The Thevenin’s
resistance is found by replacing any DC sources with their internal resistances and determining
the resulting combined resistance as seen from the two ports using standard series-parallel
analysis techniques. In the laboratory, the Thevenin’s resistance may be found using an
ohmmeter (again, replacing the sources with their internal resistances) or by using the matched
load technique. The matched load technique involves replacing the load with a variable
resistance and then adjusting it until the load voltage is precisely one half of the unloaded
voltage. This would imply that the other half of the voltage must be dropped across the
equivalent Thevenin’s resistance, and as the Thevenin’s circuit is a simple series loop then the
two resistances must be equal as they have identical currents and voltages.

PROCEDURE:

1. Connect the circuit as shown in figure 3.1

2. Set the voltage source to 4 V and current source to 1mA.

3. Measure the current flowing through the load resistance equal to 1kΩ.

4. Find the Thevenin’s equivalent of the given network by finding the equivalent circuit
parameters. Calculate Rth as shown in figure 3.2

5. Calculate Vth for the given network.

6. Construct the Thevenin’s Equivalent circuit for the given network by connecting the
Vth and Rth in series and reconnecting the load resistance 1kΩ. Measure the Current
through the equivalent circuit.

7. Compare the current available in both the cases.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

OBSERVATIONS:

volts

PRECAUTION:

1. Check for proper connections before switching ON the supply.


2. Make sure of proper color coding of resistors.
3. The terminal of the resistance should be properly connected.

RESULT:

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

EXPERIMENT NO. 4

Verification of Tellegen's theorem

AIM: To verify the Tellegen’s Theorem for two networks of same topology.

APPARATUS REQUIRED:

S. No Apparatus Name Specification Quantity


100 Ω, 150 Ω, 220
1 Resistors As required
Ω…etc
2 Ammeter 0-200 mA As required

3 R.P.S 0-30V As required

4 Bread Board - 1
5 Connecting Wires - As required

THEORY:

Tellegen’s theorem: In any liner/non linear, active/passive, time variant/invariant network, the
summation of power of each branch (instantaneous power in case of AC network) is equal to
zero.

ΣvK iK = 0
Another extension is when the branch voltage vK is from one network and branch current iK is
from an entirely different network, so long as the two networks have the same topology (same
incidence matrix) Tellegen's theorem remains true.

So, if for network N:

Branch voltages: v1, v2 , v3 ,...vn

Branch currents: i1 , i2 , i3 ,...in

And for network N ':

Branch voltages: v1' , v2' , v3' ,...vn'

Branch currents: i1',i2' ,i3' ,...in'


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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

Then ΣvK iK' = ΣvK' iK = 0 (Two networks may be at different instants)

CIRCUIT DIAGRAM: Following two networks are topological

CALCULATION:

RESULT:

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

EXPERIMENT NO. 5

Resonance in RLC series circuit

AIM: To study the frequency response of a RLC series circuit

i) To plot the frequency response of a RLC series circuit at resonance.


ii) To calculate the bandwidth of the RLC circuit at resonance.
iii) To calculate Q-factor of the RLC series circuit at resonance.

APPARATUS REQUIRED:

S. No Apparatus Name Specification Quantity

1 AC Power source 0-30V 1

2 CRO 25 MHz 1

3 Function Generator 2 Mhz 1

4 Connecting leads - As required

5 Resistor 1-10 KΩ 1

6 Inductor 10 mH 1

7 Capacitor 0.1 µF 1

8 Bread Board - 1

CIRCUIT DIAGRAM:

Figure 5.1. Circuit Diagram

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

THEORY:

For RLC series circuit:

In an ac circuit, the circuit is said to be in resonance when the current is in phase with the applied
voltage. Thus at resonance, the equivalent complex impedance of the circuit consists of only resistance
R. Since V and I are in phase, the power factor of the resonant circuit is unity. The total impedance for
the series RLC circuit is given by

PROCEDURE:

1. Connect the circuit as shown in figure 5.1 and switch ON the supply.
2. Feed the sine wave to the I/P terminal from function generator.
3. Adjust the peak to peak voltage of the sine wave to 2 V and frequency to 1 KHz.
4. Reduce the input frequency to about 100 Hz with the help of function generator and note
down the corresponding reading of peak value of output voltage from the CRO screen.
5. Repeat step 4 by changing the frequency of the supply and take readings well beyond the
resonant frequency.
6. At the cut off frequency the voltage becomes 0.707 Vm.
7. At resonance frequency the output voltage will be maximum.
8. Plot the graph between frequency and output voltage. Calculate the frequency bandwidth
and the Q factor.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

RESPONSE:

OBSERVATIONS:
For RLC series circuit:

Supply voltage Vs =________ V; R = _______Ω

L=______ mH; C = _______ µF

S. No FREQUENCY PEAK OUTPUT VOLTAGE

Bandwidth BW = f2 – f1

Q factor = fr/ BW

RESULT:

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

EXPERIMENT NO. 6

Transient response of series RL circuit

AIM: To perform transient response of series RL circuit.


i) To plot the current response of a series RL circuit.
ii) To plot the voltage response of a series RL circuit.

APPARATUS REQUIRED:

S. No Apparatus Name Specification Quantity

1 Resistors 1k Ω 1

2 Inductor 1mH 1

2 Ammeter 0-200 mA 1

3 R.P.S 0-30V 1

4 Bread Board - 1
5 Connecting Wires - As required

THEORY:

Whenever a network containing energy storage elements such as inductor or capacitor is


switched from one condition to another, either by change in applied source or change in network
elements, the response current and voltage change from one state to the other state. The time
taken to change from an initial steady state to the fi nal steady state is known as the transient
period. This response is known as transient response or transients. The response of the network
after it attains a fi nal steady value is independent of time and is called the steady-state response.
The complete response of the network is determined with the help of a differential equation.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

CIRCUIT DIAGRAM:

Voltage across resistor:

Voltage across inductor:

CALCULATIONS:

PRECAUTION:

1. Check for proper connections before switching ON the supply.


2. Make sure of proper color coding of resistors.
3. The terminal of the resistance should be properly connected.

RESULT:

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

EXPERIMENT NO. 7
OBJECTIVE/AIM: Determination of Z and h-parameters (DC only) for a network.

APPARATUS REQUIRED:

Sr. Item Name Specifications Qty


No.
1. DC supply 2
2. . Voltmeter (0-50V) 1
3. Ammeter (0-20 mA) 1
4. Resistors 1-kΩ 3
5. Resistors 2.2-kΩ 2
6. Bread board 1

FLOW CHART/SCHEMATIC DIAGRAM/CIRCUIT DIAGRAM

1K 1K 1K
2.2 K

2.2 K

Fig.7.1 Basic circuit as Two Port network

BRIEF THEORY:

(a) Determination of Z parameters and verification

In Z parameters of a two port network, the input and output voltages V1 and V2 can be
expressed in terms of input and output currents I1 and I2. Out of the four variables (i.e. V1, V2,
I1, I2) V1 and V2 are independent variables whereas I1 and I2 are independent variables. Thus
V1 =Z11 I1+Z12 I2 (7.1)

V2 =Z21 I1+Z22 I2 (7.2)

Here Z11, Z22, Z12 and Z21 are impedance or open circuit parameters of the two port network.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

PROCEDURE:

1. Connect the circuit as shown in Fig.7.1.


2. First open the output terminals and supply 5V to input terminals. Measure output voltage
and input current.
3. Secondly, open the input terminal and supply 5V to output terminals. Measure input
voltage and output current using multimeter.
4. Calculate the values of Z parameters using equations 7.1 and 7.2
5. Switch OFF the supply after taking the readings.

OBSERVATIONS:
Table 7.1

When input is open circuited (I1=0) When output is open circuited (I2=0)

V2 V1 I2 V1 V2 I1

FORMULAS USED FOR CALCULATIONS:

Sample Calculations:
The Z-parameters are defined by relaxing two of the variables (I1 & I2) i.e. I1=0 and I2=0
i. When output is open circuited, i.e. I2=0

ii. When input is open circuited, i.e. I1=0

(b) Determination of Y parameters and verification

In Y parameters of two-port, the input and output currents I1 and I2 can be expressed in terms of
input and output voltages V1 and V2. Out of four variables (i.e. I1, I2, V1, V2) I1 and I2
are dependent variables whereas V1 and V2 are independent variables.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

I1 =Y11 V1 + Y12 V2 (7.3)

I2 =Y21 V1+Y22 V2 (7.4)

Here Y11, Y22, Y12 and Y21 are admittance or short circuit parameters of the two port network.

Circuit Diagram: Refer Fig. 7.1

Procedure :

1. Connect the circuit as shown in figure and switch ON the experiment board.

2. First short the output terminals and supply 5V to input terminals. Measure output and
input current.

3. Secondly, short the input terminals and supply 5V to output terminals. Measure input and
output current using multimeter.

4. Calculate the values of Y parameters using Equations (7.3) and (7.4)

5. Switch OFF the supply after taking the readings.

Observation
Table (7.2)

When input is short circuited (V1=0) When output is short circuited (V2=0)

V2 I1 I2 V1 I2 I1

Sample Calculations:

The Y-parameters are defined by relaxing two of the variables (V1 & V2)
i.e. V1= 0 and V2 = 0

i. When output is short circuited, i.e. V2=0

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

ii. When input is short circuited, i.e. V1=0

(c) Determination of h-parameters (hybrid parameters) and verification

1
The h-parameters would find usage in electronic circuits, especially in constructing models for
transistors. A two-port network has two voltages and two currents. We may select two of the four
quantities as the independent variables and express the remaining two in terms of the chosen
independent variables.

In case of h-parameters, voltage of the input port and the current of the output port are expressed
in terms of the current of the input port and the voltage of the output port. Due to this reason,
these parameters are called as “hybrid” parameters.

V1 =h11 I1+h12 V2 (7.5)


I2 =h 21 I1+h 22 V2 (7.6)

Here h11, h22, h12 and h21 are hybrid parameters of the two port network.
Circuit Diagram: Refer the figure. (Fig. 7.1)
Procedure:
1. Connect the circuit as shown in figure and switch ON the experiment board.
2. First short the output terminals and supply 5V to input terminals. Measure output and
input current.
3. Secondly, open circuit the input port and supply 5V to output terminals. Measure input
voltage (V1) and output current (I2) using multimeter.
4. Calculate the values of h-parameters using Equations (7.5) and (7.6)
5. Switch OFF the supply after taking the readings.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

Observation
Table 7.3
When input is open circuited When output is short circuited (V2=0)
(I1=0)
V1 V2 I2 V1 I1 I2

Sample Calculations:
The h-parameters are defined by relaxing two of the variables (I1 & V2) i.e. I1= 0 and V2 = 0

i. When output is short circuited, i.e. V2=0


Forward Current gain
ii. When input is open circuited, i.e. I1=0
Output Admittance

(c) Determination of ABCD parameters of two port network

Parameters are widely used in analysis of power transmission engineering where they are termed
as generalized circuit parameters. ABCD parameters are also known as “Transmission line
Parameters”. In these parameters the voltage and current at the sending end terminals can be
expressed in terms of voltage and current at the receiving end. Thus

V1 =A V2+B(I2 ) (7.7)
I1 =C V2 +D (I2 ) (7.8)

Here A, B, C and D are transmission line parameter.


Circuit Diagram: Refer Figure. (Fig. 7.1)

Procedure:
1. Connect the circuit as shown in figure and switch ON the experiment board.
2. First open the output terminals and supply 5V to input terminals. Measure output voltage
and input current.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

3. Secondly, short the output port and supply 5V to input terminals. Measure input and
output currents using multimeter.
4. Calculate the values of ABCD parameters using Equations (7.7) and (7.8)
5. Switch OFF the supply after taking the readings.

Observation
Table 7.4

When output is open circuited (I2=0) When output is short circuited (V2=0)

V1 V2 I2 V1 I1 I2

Sample Calculations:
The ABCD parameters are defined by relaxing two of the variables (V2 & I2)
i.e. V2= 0 and I2=0
i. When output is open circuited, i.e. I2=0

Transfer Admittance
ii. When output is short circuited, i.e. V2=0
Reverse Current Gain
Here A & D are unitless while units of B & C are ohm (Ω) & mho (Ʊ).

Result:

Conclusion:

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

EXPERIMENT NO. 8

Interconnection of 2, two port networks in series- series interconnection.

AIM: Verification of parameters properties in interconnection of 2, two port networks in series-


series interconnection.

APPARATUS REQUIRED:

S. No Apparatus Name Specification Quantity

1 Resistors - As required

2 Inductor - As required

3 Capacitor - As required

4 Ammeter 0-200 mA 1

5 R.P.S 0-30V 1

6 Bread Board - 1
7 Connecting Wires - As required

THEORY:

The below Fig. 8.1 shows two-port networks connected in series. In a series connection, both the
networks carry the same input current. Their output currents are also equal.

Fig.8.1 Series connection

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

CIRCUIT DIAGRAM:
Two identical sections of the network shown in Fig. 8.2 are connected in series. Obtain Z-
parameters of the overall connection.

Fig. 8.2

CALCULATIONS:

PRECAUTION:

4. Check for proper connections before switching ON the supply.


5. Make sure of proper color coding of resistors.
6. The terminal of the resistance should be properly connected.

RESULT:

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

EXPERIMENT NO. 9

Interconnection of 2, two port networks in parallel- parallel interconnection.

AIM: Verification of parameters properties in interconnection of 2, two port networks in


parallel- parallel interconnection.

APPARATUS REQUIRED:

S. No Apparatus Name Specification Quantity

1 Resistors - As required

2 Inductor - As required

3 Capacitor - As required

4 Ammeter 0-200 mA 1

5 R.P.S 0-30V 1

6 Bread Board - 1
7 Connecting Wires - As required

THEORY:

The below Fig. 9.1 shows two-port networks connected in parallel. In a parallel connection, both
the networks carry the same input voltages. Their output voltages are also equal.

Fig.9.1 Parallel connection.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

CIRCUIT DIAGRAM:
Obtain Y-parameters for the following Fig. 9.2.

Fig. 9.2

CALCULATIONS:

PRECAUTION:

7. Check for proper connections before switching ON the supply.


8. Make sure of proper color coding of resistors.
9. The terminal of the resistance should be properly connected.

RESULT:

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

EXPERIMENT NO. 10

Interconnection of 2, two port networks in cascade connection.

AIM: Verification of parameters properties in interconnection of 2, two port networks in cascade


connection.

APPARATUS REQUIRED:

S. No Apparatus Name Specification Quantity

1 Resistors - As required

2 Inductor - As required

3 Capacitor - As required

4 Ammeter 0-200 mA 1

5 R.P.S 0-30V 1

6 Bread Board - 1
7 Connecting Wires - As required

THEORY:

The below Fig. 10.1 shows two-port networks connected in cascade. In a cascade connection, the
output port of the first network becomes the input port of the second network.

Fig.10.1 cascade connection.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

The above equation shows that the resultant ABCD matrix of the cascade connection is the
product of the individual ABCD matrices.

CIRCUIT DIAGRAM:
Two identical sections of the network shown in Fig. 10.2 are connected in cascade. Obtain the
transmission parameters of the overall connection.

Fig. 10.2
CALCULATIONS:

RESULT:

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

EXPERIMENT NO. 11

Low Pass and High Pass Filter

AIM: To study the frequency response of Low pass and High pass RC circuits and to find out
the cut off frequency.

APPARATUS REQUIRED:

S. No Apparatus Name Specification Quantity

1 AC Power source 0-30V 1

2 CRO 25 MHz 1

3 Function Generator 2MHz 1

4 Connecting wires - As required

5 Resistor 1 KΩ 1

6 Capacitor 0.1µF 1

THEORY:

The frequency response of a circuit is a measure of the output in comparison to the input, as a
function of frequency. The function used to characterize this is the transfer function, with its
magnitude or gain, typically expressed in dB, and the phase shift, expressed in radians or
degrees. The frequency response is important in the analysis and design of filters, tuners,
amplifiers, etc.

A filter is a network designed to pass signals with a specific frequency range (passband)
and reject or attenuate signals whose frequencies lie outside of this passband. The most common
filters are low pass filters, figure 11.1 (a), which pass low frequencies and reject high
frequencies, high pass filters, figure 11.2 (b), which pass high frequencies and reject low
frequencies

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

Figure 11.1. Low pass and High pass filter characteristics


CIRCUIT DIAGRAM:

Figure 11.2. Low pass and High pass filter circuit diagram

PROCEDURE:

1. For circuits (a) and (b) in Figure 8.2, R = 1 kΩ, C = 0.1 μF. Derive the transfer function.
2. Plot or sketch the magnitude vs. frequency and the phase vs. frequency curves in a linear or
log scale.
3. Indicate if the circuit is a low pass OR high pass
4. On breadboard, build circuit (a) in figure 11.2. Connect Ch1 to input and Ch2 to output so
that both the input and the output are displayed on the oscilloscope.
5. Set the input voltage to 5 . Vary the frequency from 100 Hz to 100 kHz. Plot the voltage vs.
frequency curve and the phase vs. frequency curve in either linear or log scale by selecting at
least ten frequency values and determining the amplitude and phase from the oscilloscope.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

OBSERVATIONS:

S. No. Voltage Frequency Phase

PRECAUTION:

1. Check for proper connections before switching ON the supply.


2. Make sure of proper color coding of resistors.
3. The terminal of the resistance should be properly connected.

RESULT:

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

EXPERIMENT NO. 12

Band Pass Filter

AIM: To study the frequency response of Band pass filter circuits and to find out the cut off
frequency.

APPARATUS REQUIRED:

S. No Apparatus Name Specification Quantity

1 AC Power source 0-30V 1

2 CRO 25 MHz 1

3 Function Generator 2MHz 1

4 Connecting wires - As required

5 Resistor 1 KΩ, 10 KΩ 1 each

6 Capacitor 0.1µF, 0.0056μF 1 each

THEORY:

The frequency response of a circuit is a measure of the output in comparison to the input, as a
function of frequency. The function used to characterize this is the transfer function, with its It
magnitude or gain, typically expressed in dB, and the phase shift, expressed in radians or
degrees. The frequency response is important in the analysis and design of filters, tuners,
amplifiers, etc.

A filter is a network designed to pass signals with a specific frequency range (passband)
and reject or attenuate signals whose frequencies lie outside of this passband. Band pass filter is
a class of filter which allows a band of frequency to pass.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

Figure 12.1. Band pass filter characteristics

CIRCUIT DIAGRAM:

Figure 12.2. Circuit diagram of band pass filter

PROCEDURE:

1. For circuit shown in figure 9.2, R1 = 1 kΩ, R2 = 10 kΩ, C1 = 0.01μF, C2 = 0.0056μF.


Derive the transfer function.
2. Plot or sketch the magnitude vs. frequency and the phase vs. frequency curves in a linear
or log scale.
3. On breadboard, build circuit shown in figure 12.2. Connect Ch1 to input and Ch2 to
output so that both the input and the output are displayed on the oscilloscope.
4. Set the input voltage to 5 . Vary the frequency from 100 Hz to 100 kHz. Plot the voltage
vs. frequency curve and the phase vs. frequency curve in either linear or log scale by

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

selecting at least ten frequency values and determining the amplitude and phase from the
oscilloscope.

OBSERVATIONS:

S. No. Voltage Frequency Phase

PRECAUTION:

1. Check for proper connections before switching ON the supply.


2. Make sure of proper color coding of resistors.
3. The terminal of the resistance should be properly connected.

RESULT:

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

EXPERIMENT NO. 13

Band Stop Filter

AIM: To study the frequency response of Band stop filter circuits and to find out the cut off
frequency.

APPARATUS REQUIRED:

S. No Apparatus Name Specification Quantity

1 AC Power source 0-30V 1

2 CRO 25 MHz 1

3 Function Generator 2MHz 1

4 Connecting wires - As required

5 Resistor 1 KΩ, 10 KΩ 1 each

6 Capacitor 0.1µF, 0.0056μF 1 each

THEORY:

The frequency response of a circuit is a measure of the output in comparison to the input, as a
function of frequency. The function used to characterize this is the transfer function, with its It
magnitude or gain, typically expressed in dB, and the phase shift, expressed in radians or
degrees. The frequency response is important in the analysis and design of filters, tuners,
amplifiers, etc.

A filter is a network designed to pass signals with a specific frequency range (passband)
and reject or attenuate signals whose frequencies lie outside of this passband. Band stop filter is a
class of filter which rejects a band of frequency.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

Figure 13.1. Frequency characteristics of band stop filter

CIRCUIT DIAGRAM:

Figure 13.2. Circuit diagram of band Stop filter

PROCEDURE:

1. For circuit shown in figure 10.2, R1 = 1 kΩ, R2 = 10 kΩ, C1 = 0.01μF, C2 = 0.0056μF.


Derive the transfer function.
2. Plot or sketch the magnitude vs. frequency and the phase vs. frequency curves in a linear
or log scale.

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JSS Academy of Technical Education – NOIDA
Networks Analysis & Synthesis Lab (BEE -451 Lab Manual (IV Semester) )

3. On breadboard, build circuit shown in figure 13.2. Connect Ch1 to input and Ch2 to
output so that both the input and the output are displayed on the oscilloscope.
4. Set the input voltage to 5 . Vary the frequency from 100 Hz to 100 kHz. Plot the voltage
vs. frequency curve and the phase vs. frequency curve in either linear or log scale by
selecting at least ten frequency values and determining the amplitude and phase from the
oscilloscope.

OBSERVATIONS:

S. No. Voltage Frequency Phase

PRECAUTION:

1. Check for proper connections before switching ON the supply.

2. Make sure of proper color coding of resistors.

3. The terminal of the resistance should be properly connected.

RESULT:

Electronics and Communication Engineering Page 43

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