FC41D

Reference Design

Wi-Fi&Bluetooth Module Series

Version: 1.0

Date: 2022-08-25

Status: Released
 Wi-Fi&Buetooth Module Series

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Copyright © Quectel Wireless Solutions Co., Ltd. 2022. All rights reserved.

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 Wi-Fi&Buetooth Module Series

About the Document

Revision History

Version Date Author Description

- 2022-07-15 Lisa LI Creation of the document

1.0 2022-08-25 Lisa LI First official release

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 Wi-Fi&Buetooth Module Series

Contents

About the Document ................................................................................................................................... 3

Contents ....................................................................................................................................................... 4

1 Reference Design ................................................................................................................................. 5

1.1. Introduction ................................................................................................................................ 5
1.2. Schematics ................................................................................................................................ 5

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 Wi-Fi&Buetooth Module Series

1 Reference Design

1.1. Introduction

This document provides the reference design of FC41D module, including the block diagram, power
design, module interfaces and other designs.

1.2. Schematics

The schematics illustrated in the following pages are provided for reference only.

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 6 5 4 3 2 1

Block Diagram
D D

Reset
ANT_WIFI/BT CEN GPIO

C
Wake up module
C WAKEUP_IN GPIO

FC41D Host
Host COM interface (optional)
SPI SPI

Host COM interface

Main UART UART

Download interface
Test points
B B

Debug log
DBG UART Test points

3.3 V 0.3 A
VBAT

A
A Quectel Wireless Solutions
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 6 5 4 3 2 1

Module Interfaces
D D

VBATTERY
U101
SGM2035C
BAT101 eg. 3.8 V 0R
3 IN OUT 4 VCC_3V3 [2,4]
R104
D104 C101 C102 C103 C109 FB 5

WS4.5DPV

82K ±1%
1 EN NC 6

R103
[3] PWR_EN

GND

GND
C104
47 μF 100 nF 1 μF NM

7
2.2 μF

47 K±1%
R102
C
C NOTE:
The power supply current for the module shall be not less than 0.3 A.

J101

U102

GND1 1
27 GND4 0R R108
ANT_WIFI/BT 2
GND2 3
26 D101
[4] DBG_TXD DBG_TXD L103

TEA10201V05A0
[4] DBG_RXD 25 DBG_RXD I2C_SCL 4
24 5 NM
GPIO4 I2C_SDA L101 L102
23 GPIO3 RESERVED 6
R105 NM NM
VOLTAGE_INPUT 22 7 C111
GPIO2 WAKEUP_IN WAKEUP_IN [3]
21 8
C110 ADC WAKEUP_OUT WAKEUP_OUT [3]
20 9 NM
R106

[3,4] MAIN_TXD MAIN_TXD CEN CEN [3,4]

[3,4] MAIN_RXD
19 MAIN_RXD GPIO1 10 NOTE 2
B NM
[3] SPI_CS 18 SPI_CS PWM 11 B
[3] SPI_CLK 17 12
VBAT SPI_CLK NET_STATUS NET_STATUS [4]
16 13
0R GND3 SPI_MISO SPI_MISO [3]
[2,4] VCC_3V3 15 VBAT SPI_MOSI 14
SPI_MOSI [3]
R107
FC41D
C105 C106 C107 C108

22 μF 1 μF 100 nF NM

NOTE:
1. VBAT trace is recommended to be wider than 0.3 mm. In principle, the longer the VBAT line is, the wider it should be.
2. Pull down CEN pin and then cut off VBAT to turn off the module to save power.
3. The maximum input voltage of ADC interface is 2.4 V.
A
A 4. ANT_WIFI/BT shall not be connected when using the PCB antenna or IPEX connector on the module. Quectel Wireless Solutions
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5. When using the PCB antenna, the module should be placed at the side of the motherboard and keep away from metal components, Lisa LI FC41D Reference Design

and the clearance of PCB antenna shall be kept as large as possible. SIZE VER
CHECKED BY A2 1.0
Michael DU SHEET 2 OF 4 DATE 2022/8/25

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 6 5 4 3 2 1

Host Interfaces
D D

U201

SPI_MISO 1
SPI_MISO_HOST [3]
SPI_MOSI 2
SPI_MOSI_HOST [3]
SPI_CLK 3 SPI_CLK_HOST [3]
SPI_CS 4 SPI_CS_HOST [3]
0R R202 0R R205
[3] TXD_HOST MAIN_RXD [2,4] [2,4] MAIN_TXD RXD_HOST [3]
UART_TXD 5 TXD_HOST [3]
UART_RXD 6 RXD_HOST [3] NOTE 1, 2

0R R209 C
GPIO_01 7 [3] SPI_MISO_HOST SPI_MISO [2]
C 8 [3] SPI_MOSI_HOST
0R R210
SPI_MOSI [2]
GPIO_02 0R R211
GPIO_03 9 WAKEUP_HOST [3] [3] SPI_CLK_HOST SPI_CLK [2]
10 0R R212
GPIO_04 WAKEUP_MODULE [3] [3] SPI_CS_HOST SPI_CS [2]
GPIO_05 11 ON/OFF/RST [3]
GPIO_06 12 PWR_EN [2]
GPIO_07 13
GPIO_08 14
GPIO_09 15
GPIO_10 16
GPIO_11 17
GPIO_12 18
GPIO_13 19
C202 C203 NM NM
20
GPIO_14 CEN [2,4] WAKEUP_HOST [3]
R214 R220
100 nF NM

DTC143ZE
VDD_EXT 21

DTC143ZE
VDD_EXT Q201 C201 Q204 C212
[3] ON/OFF/RST [2] WAKEUP_OUT
VCC 22 VBATTERY [2]
NM NM

C204 C205 C206 C207

B B
22 μF 100 nF NM NM

R224 NM
[3] WAKEUP_MODULE WAKEUP_IN [2] NOTE 3

R225

100K
NOTE:
1. The voltage domain of the host interface needs to be 3.3 V, the same as that of the module.
A
A 2. The MAIN_UART is used to transmit Wi-Fi & Bluetooth data package by default.
Quectel Wireless Solutions
DRAWN BY PROJECT TITLE
3. You can use the rising edge of this pin to wake the module up. Lisa LI FC41D Reference Design
SIZE VER
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 6 5 4 3 2 1

Other Designs
D D

Network Status Indication Download Interface Debug Interface C

C
VCC_3V3 [2]
J301

[2,3] CEN 1
D301 J103
2
3 [2] DBG_TXD 1
[2,3] MAIN_TXD
[2,3] MAIN_RXD 4 [2] DBG_RXD 2
D302 D303 D304 5 3
D305 D306
R301

2.2K

ESD9B5V-2/TR
ESD9B5V-2/TR

ESD9B5V-2/TR

ESD9B5V-2/TR

ESD9B5V-2/TR
Q301
DTC143ZE

[2] NET_STATUS

NOTE:
NOTE:
B Firmware upgrade steps: click the "burn" button of the B
The LED will light up when Wi-Fi is connected
software download tool, and connect the CEN to GND
at STA mode.
for two seconds, and then release CEN.

A
A Quectel Wireless Solutions
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Lisa LI FC41D Reference Design
SIZE VER
CHECKED BY A2 1.0
Michael DU SHEET 4 OF 4 DATE 2022/8/25

6 5 4 3 2 1