0% found this document useful (0 votes)
7 views25 pages

Module Iii - MC

Uploaded by

masithikbe92
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
7 views25 pages

Module Iii - MC

Uploaded by

masithikbe92
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 25

SIDDIQ-RRCE-CSE

SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
ATPCS ARGUMENT PASSING:

SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
SIDDIQ-RRCE-CSE
PORTABILITY ISSUES

Here is a summary of the issues you may encounter when porting C code to the ARM.
● The char type. On the ARM, char is unsigned rather than signed as for many other
processors. A common problem concerns loops that use a char loop counter i and the
continuation condition i ≥ 0, they become infinite loops. In this situation, armcc produces

a warning of unsigned comparison with zero. You should either use a compiler option to
make char signed or change loop counters to type int.
● The int type. Some older architectures use a 16-bit int, which may cause problems when

SIDDIQ-RRCE-CSE
moving to ARM’s 32-bit int type although this is rare nowadays. Note that expressions
are promoted to an int type before evaluation. Therefore if i = -0x1000, the expression i
== 0xF000 is true on a 16-bit machine but false on a 32- bit machine.
● Unaligned data pointers. Some processors support the loading of short and int typed
values from unaligned addresses. A C program may manipulate pointers directly so that
they become unaligned, for example, by casting a char * to an int *. ARM architectures
up to ARMv5TE do not support unaligned pointers. To detect them, run the program on
an ARM with an alignment checking trap. For example, you can configure the ARM720T
to data abort on an unaligned access.
● Endian assumptions. C code may make assumptions about the endianness of a memory
system, for example, by casting a char * to an int *. If you configure the ARM for the
same endianness the code is expecting, then there is no issue. Otherwise, you must
remove endian-dependent code sequences and replace them by endian-independent ones.
● Function prototyping. The armcc compiler passes arguments narrow, that is, reduced to
the range of the argument type. If functions are not prototyped correctly, then the function
may return the wrong answer. Other compilers that pass arguments wide may give the
correct answer even if the function prototype is incorrect. Always use ANSI prototypes.
● Use of bit-fields. The layout of bits within a bit-field is implementation and endian
dependent. If C code assumes that bits are laid out in a certain order, then the code is not
portable.
● Use of enumerations. Although enum is portable, different compilers allocate different
numbers of bytes to an enum. The gcc compiler will always allocate four bytes to an
enum type. The armcc compiler will only allocate one byte if the enum takes only eight-
bit values. Therefore you can’t cross-link code and libraries between different compilers if
you use enums in an API structure.

SIDDIQ-RRCE-CSE
● Inline assembly. Using inline assembly in C code reduces portability between
architectures. You should separate any inline assembly into small inlined functions
that can easily be replaced.
● The volatile keyword. Use the volatile keyword on the type definitions of ARM
memory-mapped peripheral locations. This keyword prevents the compiler from
optimizing away the memory access. It also ensures that the compiler generates a data
access of the correct type. For example, if you define a memory location as a volatile
short type, then the compiler will access it using 16-bit load and store instructions
LDRSH and STRH.

SIDDIQ-RRCE-CSE

You might also like