Understanding Fault Technical Report

NREL/TP-550-46698
Characteristics of Inverter-Based January 2010
Distributed Energy Resources

J. Keller and B. Kroposki

Understanding Fault Technical Report
NREL/TP-550-46698
Characteristics of Inverter-Based January 2010
Distributed Energy Resources
J. Keller and B. Kroposki
Prepared under Task No. DRS8.1050

National Renewable Energy Laboratory

1617 Cole Boulevard, Golden, Colorado 80401-3393
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NREL is a national laboratory of the U.S. Department of Energy
Office of Energy Efficiency and Renewable Energy
Operated by the Alliance for Sustainable Energy, LLC
Contract No. DE-AC36-08-GO28308
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Abstract and Keywords
One of the most important aspects of planning and operating an electrical power system is the
design of protection systems that handle fault conditions. Protection engineers design protection
systems to safely eliminate faults from the electric power system. One of the new technologies
recently introduced into the electric power system is distributed energy resources (DER).
Currently, inverter-based DER contribute very little to the power balance on all but a few utility
distribution systems. A significant increase in DER is expected to come on line in the near
future. As the penetration level of DER increases, the effect of DER may no longer be
considered minimal. As DER become prevalent in the distribution system, equipment rating
capability and coordination of protection systems merit a closer investigation. This report
discusses issues and provides solutions for dealing with fault current contributions from inverter-
based DER.

Keywords:
Distributed energy resources, distributed generation, inverter, fault, fault current, short circuit,
low-voltage ride through

iii
Table of Contents
Abstract and Keywords .................................................................................................................. iii
List of Figures ................................................................................................................................. v
List of Tables ................................................................................................................................... v
1 Introduction ............................................................................................................................. 1
2 Protection and Coordination Issues ........................................................................................ 3
2.1 Protective Relaying ......................................................................................................... 3
2.2 Relay Coordination ......................................................................................................... 5
2.3 DER Related Relaying .................................................................................................... 7
3 Short Circuit Analysis ............................................................................................................. 9
3.1 Synchronous Machines ................................................................................................. 13
3.2 Induction Machines....................................................................................................... 14
4 Short Circuit Current Analysis of Inverter-Based DER ....................................................... 16
4.1 Background on Power Electronics ................................................................................ 16
4.1.1 PE Devices ................................................................................................................ 16
4.1.2 Applications .............................................................................................................. 17
4.2 Prior Research on Inverter Based DER Fault Current .................................................. 18
4.3 Fault Characteristics of Inverter-Based DER ............................................................... 19
5 Testing Methods for Determining Fault Contributions ........................................................ 20
5.1 Testing Background ...................................................................................................... 20
5.2 Test Procedure .............................................................................................................. 20
5.3 NREL Experimental Setup ........................................................................................... 20
5.3.1 Test Procedure .......................................................................................................... 21
5.3.2 Test Results ............................................................................................................... 21
5.4 Inverter Manufacturer’s Results ................................................................................... 23
6 Low Voltage Ride-Through (LVRT) .................................................................................... 25
6.1 Fault Ride Through Requirements for Large Generators ............................................. 25
6.1.1 Federal Energy Regulatory Commission .................................................................. 25
6.1.2 American Wind Energy Association ........................................................................ 26
6.1.3 Western Electricity Coordinating Council ................................................................ 26
6.1.4 North American Electric Reliability Council ........................................................... 28
6.2 IEEE 1547 Requirements .............................................................................................. 30
6.2.1 German LVRT requirements for DER ...................................................................... 31
6.3 LVRT Testing Requirements ........................................................................................ 31
6.4 LVRT Summary............................................................................................................ 33
7 Computer Modeling Techniques........................................................................................... 34
7.1 Modeling and Simulation .............................................................................................. 34
7.2 Commercial Products .................................................................................................... 35
8 Conclusions and Future Recommendations .......................................................................... 38
8.1 Conclusions ................................................................................................................... 38
8.2 Future Recommendations ............................................................................................. 39
9 References ............................................................................................................................. 40

iv
List of Figures
Figure 1. DER Technologies ........................................................................................................ 2
Figure 2. Typical electric power system single-line diagram ...................................................... 3
Figure 3. Input and output control of a protective relay ............................................................... 4
Figure 4. Electromechanical relay (Glover/Sarma) ...................................................................... 5
Figure 5. Microprocessor relay .................................................................................................... 5
Figure 6. Example of a time current curve ................................................................................... 6
Figure 7. Typical single-line diagram .......................................................................................... 7
Figure 8. Circuit model for asymmetrical fault current.............................................................. 10
Figure 9. AC symmetrical short-circuit current ......................................................................... 11
Figure 10. Decaying DC offset short-circuit current.................................................................... 12
Figure 11. Total (DC and AC components) short-circuit asymmetrical current .......................... 13
Figure 12. Synchronous machine response to 3-phase fault (DC offset not shown) ................... 14
Figure 13. Induction machine response to 3-phase fault .............................................................. 15
Figure 14. DER system and PE interface block diagram (Kroposki et al. 2006) ......................... 16
Figure 15. Test circuit single-line diagram .................................................................................. 21
Figure 16. Pre-fault waveform of 1 kW inverter .......................................................................... 22
Figure 17. Fault current test result of 1 kW inverter .................................................................... 22
Figure 18. Manufacturer’s 500 KVA inverter output short circuit test results
between B-C phases .................................................................................................... 23
Figure 19. LVRT requirement per FERC Order No. 661 ............................................................ 26
Figure 20. WECC system performance criteria from Table W (WECC System Performance
Criteria, TPL – WECC – 1 – CR, 2008) ..................................................................... 27
Figure 21. 2005 WECC LVRT standard (Zavadil et al. 2005) .................................................... 27
Figure 22. 2009 proposed WECC LVRT standard ...................................................................... 28
Figure 23. NERC (RROs) members (IEEE Power and Energy Magazine 2005) ........................ 29
Figure 24. IEEE 1547 (Table 1) Interconnection system response to abnormal voltages ........... 30
Figure 25. IEEE 1547 Interconnection system response to abnormal voltages from IEEE 1547
(Table 1) ...................................................................................................................... 30
Figure 26. Germany’s new LVRT grid code................................................................................ 31
Figure 27. UL 1747 Table 68.1 Voltage and frequency limits for utility interaction .................. 32
Figure 28. Manufacturer testing inverter for voltage ride-through .............................................. 32

List of Tables
Table 1. 500 kVA Inverter Short Circuit Test Results.............................................................. 23
Table 2. Commercial Software Comparisons ........................................................................... 35

v
1 Introduction
One of the most important aspects of planning and operating electrical power systems is
the design of protection systems. Protection systems are designed to detect and remove
faults. A fault in an electrical power system is the unintentional conducting path (short
circuit) or blockage of current (open circuit). The short-circuit fault is typically the most
common and is usually implied when most people use the term fault (Grigsby 2001). We
have limited our discussion to the short-circuit fault variety for this technical report. A
fault occurs when one energized electrical component contacts another at a different
voltage. This allows the impedance between the two electrical components to drop to
near zero allowing current to flow along an undesired path from the one initially
intended. The short-circuit fault current can be orders of magnitude larger than the
normal operating current (IEEE 2001). The current from such an event can contain
tremendous destructive energy (heat and magnetic forces), that can damage electrical
equipment and pose safety concerns for both utility and non-utility personnel.

Common sources of faults on electrical distribution systems include the following (IEEE
2008):

• Insulation breakdown caused by system overvoltages from lighting strikes and

switching surges, improper manufacturing, improper installation, and aged or polluted
insulation.
• Mechanical issues such as animal contact, tree contact, vehicle collisions, wind,
snow, ice, contamination, vandalism, and major natural disasters.
• Thermal issues such as overcurrent and overvoltage.
Protection engineers are familiar with designing protection systems to safely clear short-
circuit faults from the electric power system. One of the technologies that has been
recently introduced into the electric power system is Distributed Energy Resources
(DER). DER are sources of power located at or near loads and interconnected with the
electrical distribution system. Typically, the individual DER unit ratings are less than
10MVA and include fossil-fuel, renewable resources and energy storage technologies
(Figure 1). DER are becoming more and more common on distribution systems and
present many challenges to protection engineers. Adding new sources of energy into the
electric power system will increase the amount of available fault current and therefore
influence protective devices that are required on the distribution system. This report
discusses issues and provides solutions to address fault current contributions from
inverter-based distributed energy resources.

1
Figure 1. DER Technologies

2
2 Protection and Coordination Issues
The purpose of the electrical power system is to deliver high-quality, safe, and reliable
electric power to homes, industrial plants, and commercial businesses alike. A typical
electrical power system is shown in Figure 2. Large generation stations are connected
through high-voltage transmission lines to substations. These substations contain
transformers that reduce the voltage levels for the subtransmission and distribution
systems. The electrical distribution system (EDS) in particular consists of substation
transformers, three-phase and single-phase distribution circuits, protection and switching
equipment, power factor improvement equipment, distribution transformers, and service
drops.

Protecting the EDS and coordinating the components are of utmost importance to an
electric utility. When adding DER into the EDS, the system impacts must be understood.

Figure 2. Typical electric power system single-line diagram

2.1 Protective Relaying

Protective relays are required on a distribution system in order to cause the quick removal
from service of any electrical equipment associated with the power system when a short-
circuit fault occurs or when the power system begins operating in abnormal conditions.
Protective relays are essentially the brains that determine when the appropriate circuit
breaker tripping action should take place. The mechanical device capable of

3
disconnecting the faulty element and physically isolating the electrical power system
from short circuit disturbances is called a circuit breaker.

Figure 3 describes the protective relaying input and output control procedure. The
protective relay receives information about the EDS (voltage, current, and frequency)
through current and voltage transformers. These transformers transform the measured
voltage and current value to a more appropriate power level to be utilized by the
protective relay. This information is processed by the protective relay and reacts to any
abnormal conditions detected. Each protective relay needs to be set or programmed for
the desired tripping time (i.e., time delay for relay coordination and system reliability
purposes). The decision to trip open or to close the circuit breaker is made by the relay
logic algorithms and must be programmed by a relay engineer.

Figure 3. Input and output control of a protective relay

Two basic types of protective relay devices are used in today’s electrical power system.

• Electromechanical relays were first introduced in the early 1900s. A typical

electromechanical relay is pictured in Figure 4. Electromechanical relays are either
magnetic attraction type or induction disc relaying type. Magnetic attraction relays
use a plunger or hinged armature operation. The magnetic attraction is proportional to
the current flowing through the sensing coil, In most cases, closing the contact
initiates a circuit breaker tripping action. The induction disc relay produces a circular
motion that is propostional to the coil current. Both designs have performed reliably
since their introduction over 100 years ago. Utilities, however, are starting to replace
electromechanical relays with new microprocessor-based relays.

4
 Figure 4. Electromechanical relay (Glover/Sarma)

• Microprocessor relays were first introduced in the 1980. Microprocessor relays bring
selectivity, speed, and reliability to protective relaying (a typical microprocessor
based relay is shown in Figure 5). They are also capabile of recording and storing
large data sets when system disturbances, such as faults, occur. Another important
feature of microprocessor-type relays is their ability to communicate with utility
operations personnel. This is typically performed via a Supervisory Control and Data
Acquisition (SCADA) system. This feature allows utilitity operators to determine the
location and type of fault that occurred on the power system without dispatching a
specialist, saving time and often improving reliability.

Figure 5. Microprocessor relay

2.2 Relay Coordination

Relay coordination involves coordinating studies which utilize time current curves
(TCC). These curves describe the time to trip characteristics based on the relay settings.
Figure 6 shows a typical TCC. The vertical axis represents the magnitude of the fault
current and the horizontal axis represents the time the relay will initiate a trip signal to
operate the circuit breaker. Two important TCC parameters to observe are the minimum
pickup time and the instantaneous trip time. The minimum pickup time setting will send a
trip signal to the circuit breaker for measured fault current magnitude at or above this
threshold. The instantaneous setting region will send a signal to the circuit breaker to trip
as soon as possible if the measured fault current magnitude is at this threshold. The
circuit breaker trip time decreases as the amount of fault current increases. It is between

5
these two set points that the protection engineer will adjust the shape of the TCC to meet
various protection coordination objectives.

Figure 6. Example of a time current curve

Figure 7 shows a small section of a typical electrical distribution single-line diagram.

Single-line diagrams are simplified drawings that show the major electrical equipment as
well as relays that are used in the EDS being studied. The diagrams are an essential part
of the protection engineer’s tools for understanding the behavior of the EDS and what
relays are utilized for coordination purposes.

6
 Figure 7. Typical single-line diagram

The goal of relay coordination is to increase the reliability of the system by isolating the
fault current source as fast as possible while maintaining power to the rest of the
distribution system. For example, if a fault occurred on the load side of the downstream
circuit breaker #1 shown in Figure 7, operators would want to clear that feeder circuit as
fast as possible while continuing to supply service to the remainder of the distribution
system. The upstream distribution circuit breaker #2 would only act as a secondary back-
up device and initiate a tripping signal if the downstream circuit breakers failed. Once the
circuit breaker receives a trip signal from the relay (which depends upon the circuit
breaker vintage and manufacture type) the typical fault clearing times can be anywhere
from 2 to 9 cycles.

2.3 DER Related Relaying

There are considerable differences in the performance under fault conditions among the
three basic types of DER: synchronous machines, induction machines, and inverter-based
sources. These differences are discussed in the remainder of this report with a focus on
the characteristics of inverter-based DER. DER, such as fuel cells, wind turbines, solar
photovoltaics (PV), and microturbines, often require inverters to interface with the utility
grid (Kramer 2009).

7
Currently, inverter-based DER provide minimal contribution to the power balance on all
but a few utility distribution systems (Begovic et al. 2001). However, a significant
increase in DER is expected to come on line in the near future. As the penetration level of
DER increases, the effect of DER may no longer be considered minimal. As DER
become prevalent in the distribution system, equipment rating capability and coordination
of protection systems merit a closer investigation (Kroposki 2008).

The fault contribution from a single, small DER unit is not significant; however, the total
contributions of many small units may alter the fault current level enough to cause
overcurrent protection miscoordination and nuisance fuse operation or hamper fault
detection (General Electric, 2003). A DER system may impact the fault coordination of a
system to the point that relay setting and fuse sizing changes are required. By adding a
fault source to the system, the overall fault current seen by the relay is reduced, which
effectively de-sensitizes it (Kroposki 2008; General Electric 2003).

The amount of DER on a specific distribution circuit is referred to as the penetration

level. Typically this is defined as the rated output power of the DER divided by the peak
load of the circuit. Some reports have shown that even at relatively low penetration levels
(10%), it may be important to analyze the impact this would have on system operation
(Baran and El-Markaby 2005). DER may have a major impact on feeder protection, but
the level at which this would occur depends on how the DER is distributed along the
feeder. Continued research in this area is desired for a complete understanding of what
this penetration level might be. For DER penetration levels above 10% (DER are heavily
dependent on supplying loads), voltage regulation can be a serious issue and may need to
be evaluated as well (General Electric 2003).

Higher fault current can also affect recloser (RC) operation. RCs are devices that act very
much like circuit breakers. However, RCs may be programmed to try and reestablish
circuit connection a few cycles after a fault has occurred. This action is warranted on the
distribution level because most faults are of the single line-to-ground type and typically
are temporary in nature and often last for only a few cycles. It is possible that the extra
fault current from the DER may expose RCs to mechanical and thermal stress that is
beyond their limits. Extra fault current may also impact fuse operation, as it may cause
the fuse to clear sooner or later than the protection engineer desired. This may cause RC-
fuse miscoordination and impact the feeder’s reliability considerably (Baran and El-
Markaby 2005).

A unique property of inverter-based DER is the power electronics interface. Power

electronics have the ability to control fault current contributions from DER systems. This
adjustability can thereby optimize the system protection coordination issues by
controlling fault current levels (Tang and Iravani 2005). Typically, inverter-based DER
are designed to act as ideal current sources. Therefore, they provide minimal fault current
contributions and have little effect on overcurrent protection and coordination strategies
for fuse and circuit breakers (General Electric 2003). However, this might not always be
true with increased DER penetration (10% or more) (General Electric 2003; Baran and
El-Markaby 2005).

8
3 Short Circuit Analysis
Short-circuit studies ensure that the wide range of electrical equipment used to generate,
transmit, and distribute electrical power is sufficiently sized to interrupt or withstand
short-circuit current. Electrical equipment and protective devices must be properly sized
and set for such events. However, short circuits on the EDS cannot be eliminated
completely. Instead, the overall goal is to mitigate and, to a certain extent, contain their
damaging effects (IEEE 1997). The first goal for short-circuit protection is to clear faults
quickly to prevent fires and explosions and further damage to utility equipment such as
transformers and cables (Short 2004). The second goal is to establish practices that
reduce the impact of faults and improve the following.

• Reliability by properly coordinating protective devices to isolate the smallest

possible portion of the system and affect the fewest customers.
• Power quality by reducing the duration of voltage sags. Coordination practices
affect the number and severity of momentary interruptions (Short 2004).
There are several types of faults that can occur on the EDS. A 3-phase fault occurs when
all three phases come into contact with each other and is the least common type of fault.
A single line-to-ground fault is the most common type of short circuit and occurs when
one phase of the transmitted power comes into contact with alternative current path or
ground. For example, a tree limb inadvertently falls across a power line. A line-to-line
fault occurs when two electrical phases come into contact with each other.

The 3-phase fault current typically provides the highest available fault current. However,
there are situations where this is not the case. For instance, if a single line-to-ground fault
occurs and there is an effective ground path for current to flow (zero-sequence network),
then several current sources could contribute to this fault and exceed the 3-phase fault
current. This will depend on how the fault current source or sources are connected to the
system (i.e. transformer connection delta or wye).

Under steady-state operation, the power generated by the source is equal to the power
being consumed by the load. The load impedance is the principal determinant of the
current magnitude (IEEE 2001). When an additional load (e.g. air conditioner) is turned
on, the total load impedance is reduced, resulting in an increase in current flowing in the
armature winding of the rotating machine. This increase in current will cause the
machine’s rotor to actually slow down due to the armature reactance. Due to this
increased load demand, the frequency of the power system will deviate slightly lower. In
order to maintain constant frequency (60 Hz in the United States) the generator turbine
must respond with additional torque (prime mover) to match this new power demand.

A fault in a typical EDS behaves very much like a resistive-inductive (RL) circuit (see
Figure 8) with the switch in the closed position. Closing the switch simulates a faulted
condition. Bypassing the predominantly resistive load, an extremely low impedance path
(a large load has been added to the circuit) has been created to ground, causing the
generator to supply a higher level of current. The fault current is limited by the machine’s
internal impedance and the transmission impedance path (R+jXL).

9
 Figure 8. Circuit model for asymmetrical fault current

In order to explain the fault current behavior of such an event, we need solve for the
current when the switch is closed (see Figure 8). Writing a Kirchhoff’s Voltage Law
(KVL) equation around the circuit we get Equation 1.

di
VS = Ri + L
dt (1)

Where R is circuit resistance, i is the current, and L is the circuit inductance. The
inductance L can be determined using

XL = ω L (2)

where, ω is angular frequency. Solving the differential equation for the symmetrical or
alternating-current (AC) steady-state fault current we get Equation 3.
t
VS −( )
iac = (1 − e T )
R (3)

where,

L X
T= =
R ωR (4)

10
 Figure 9. AC symmetrical short-circuit current

Figure 9 shows the AC symmetrical fault current for a synchronous generator. The AC
symmetrical fault current is characterized by the magnetic flux trapped in the stator
windings (mostly inductance) of the rotating machine and cannot change instantaneously.
This is why synchronous machines under fault conditions feature different flux variation
patterns compared to induction machines. The flux dynamics dictate that the fault current
decays with time until a steady-state value is reached.

Equation 3 describes the temporary direct-current (DC) offset fault current.

t
−( )
idc = I 0 e T
(5)

Equations 4 and 5 describe the time constant (how fast it will decay) and the reactance as
the product of the angular frequency and the inductance. A detailed solution can be found
in, IEEE Red Book, Std 141-1993.

11
 Figure 10. Decaying DC offset short-circuit current

The DC fault component is characterized by the fact that inductors and capacitors store
energy. This energy decays exponentially with time and is released during a short circuit.
The contribution from the stored energy during a fault decays rapidly as seen in Figure
10.

The total fault current or the asymmetrical fault current solution includes the AC current
plus the DC offset current as shown in Equation 6.

VS VS −( Tt )
iasym = iac + idc = + ( I 0 − )e
R R (6)

A representation response of current versus time that includes both DC and AC

contributions to a short circuit is given in Figure 11.

12
 Figure 11. Total (DC and AC components) short-circuit asymmetrical current

In today’s electric power system, synchronous generators and induction motors are the
main sources of short circuit currents and they respond differently under transient (i.e.,
fault) conditions.

3.1 Synchronous Machines

If a short circuit is applied at the terminal of a synchronous machine, the current will start
out very high and decay to a steady-state value. Synchronous machines generally deliver
about six times the rated current for several cycles before decaying to between 400% and
200% of rated current (see Figure 12, DC offset removed) (Kroposki 2008; Baran and El-
Markaby, 2005). In a synchronous machine the field current is supplied by an external
DC source. This external source will continue to supply voltage to the field windings of
the generator. The prime mover continues to drive the rotor that produces the required
induced voltage in the stator winding which in turn supplies a continuous fault current.
The steady-state short-circuit current value will persist unless interrupted by a switching
device such as a circuit breaker.

As short circuit current continues flowing in the circuit, the machine’s impedance
increases due to the increase in winding temperature. This helps the AC envelope to
decay faster. The industry has established three reactance variables called subtransient,
transient, and synchronous reactance (IEEE 1993).

X''d = subtransient reactance; determines current during first cycle after fault occur. This
condition lasts for approximately 0.1 seconds.

13
X'd = transient reactance; assumed to determine current after several cycles. This
condition lasts from about 0.5 to 2 seconds.

Xd = synchronous reactance; this is the value that determines the current flow after
steady-state condition is reached.

Most manufacturers include two values for the direct axis subtransient reactance. The
X''dv is at rated voltage, saturated, and smaller than X''di which is at rated current,
unsaturated, and larger. During a short-circuit event the generator may become saturated.
Therefore, for conservatism, the X''dv value is used when calculating fault currents (IEEE
1993).

Figure 12. Synchronous machine response to 3-phase fault (DC offset not shown)

The characteristic of this decaying envelope also depends upon the machine’s magnetic
field. The magnetic energy stored in the generator windings cannot change
instantaneously but decays over time.

3.2 Induction Machines

If a short-circuit is applied at the terminal of an induction machine, the current will start
out very high before decaying completely. The induction machines deliver about six
times rated current during this time (see Figure 13) (Kroposki 2008; IEEE 2008; IEEE
1993). This fault characteristic is generated by inertia driving the motor in the presence of
the field flux produced by induction from the stator rather than by a DC field winding
(synchronous machine). This flux decays on the loss of source voltage caused by a fault
at the machine terminals. Because field excitation is not maintained, there is no steady-
state value of fault current and the current decays to zero.(IEEE 1993).

14
The values of transient and synchronous reactance approach infinity under steady-state
fault conditions. Therefore, the induction motors are assigned only a subtransient value of
reactance. This value varies upward from the locked rotor reactance to account for the
decay of the motor current contribution to the fault. For fault calculations, an induction
generator can be treated the same as induction motor. Wound-rotor induction motors
normally operating with their rotor rings short-circuited will contribute short-circuit
current in the same manner as a squirrel-cage induction motor (IEEE 1993).

Figure 13. Induction machine response to 3-phase fault

15
4 Short Circuit Current Analysis of Inverter-Based DER
4.1 Background on Power Electronics
Today, power electronics (PE) play a significant role in DER systems because they make
utility grid interconnection possible for a wide variety of energy sources. The
fundamental building blocks of power electronics are semiconductor-based switching
devices such as transistors and thyristors. In power applications, these electronic switches
are most commonly used to create or convert voltage and current waveforms. For DER
applications, the most common power electronics systems are inverters and converters.
Benefits of power electronic switches include switching speed, package size, and the
ability to be finely controlled by other electronic systems and software. Proper design and
use of PE-based systems can be approached in a modular fashion by targeting overall
system needs. (Kroposki et al. 2006)

PE interfaces can improve power quality by improving harmonics and providing

extremely fast switching times for sensitive loads (e.g., computers). PE can also provide
utilities with reactive power control and voltage regulation at the DER connection point
(Kroposki et al. 2006).

PE inverters are based on three fundamental technology areas (Kroposki 2008):

• Power semiconductor devices

• Microprocessor and digital signal processor technologies
• Control and communications algorithms.
PE interfaces typically contain some level of metering and control functionality. This
ensures that the DER system can operate as designed. Figure 14 shows a block diagram
of the DER system and PE interface for a variety of applications.

Figure 14. DER system and PE interface block diagram (Kroposki et al. 2006)

4.1.1 PE Devices
PE devices are the individual electrical devices that turn on and off in a controlled way to
regulate the flow of electricity. There are several types of PE devices that have specific
properties. These include:

16
 • Diodes
A diode is a two-terminal PE device that can conduct current in only one direction
and block voltage in the reverse direction. The diode is typically used in circuits
in which unidirectional current flow is required and reverse voltage levels must be
blocked. Diodes exhibit a negative temperature coefficient, which makes them
difficult to parallel when higher current levels are required (Kroposki et al. 2006).
• Thyristors
Thyristors have the highest power handling capabilities—including high-voltage
(115 kV or greater) transmission levels—of all semiconductor devices. Thyristors
act like a diode with gate control signal that initiates a change in conduction state
if the unit is forward-biased. Thyristors have slower switching frequency than
other modern devices by orders of magnitude (Kroposki et al. 2006).
• Insulated gate bipolar transistors
PE systems today rely on this type of switching the most. Insulated gate bipolar
transistors (IGBTs) control power flow in the switch by gate voltage and can
switch at high frequency. They are typically available on distribution systems of 3
kW and higher. The switching frequency is lower than metal-oxide-
semiconductor field effect transistors but orders of magnitude faster than
thyristors (Kroposki et al. 2006). IGBT inverters have limited capability to supply
fault currents. When the inverter controls detect something wrong, they shut down
immediately (Dugan et al. 2002).
• Metal-oxide-semiconductor field effect transistor
The metal-oxide-semiconductor field effect transistor (MOSFET) is a gate voltage
controllable switch. Usually found in low-voltage (<500 V) and low-power
systems, MOSFETs are capable of the highest switching frequencies—a feature
that is highly desired when the amounts of magnetic materials in a circuit are
being minimized. Unlike thyristors, MOSFETs can quickly start and stop forward
conduction even with a constant forward voltage applied. This makes them highly
useful in switch mode power supply applications in which DC power is being
converted to another magnitude or to AC. By their nature, MOSFETs have large
conduction losses at high voltages, which make them uncompetitive with other
types of devices in higher-power systems. Also, because of the nature of their
construction, MOSFETs allow uncontrolled (and inefficient) reverse current to
flow when a reverse potential is applied. This feature is due to their “body diode”
and is usually accounted for by manufacturers during packaging. MOSFETs have
a positive temperature coefficient, making them relatively easy to parallel
(Kroposki et al. 2006).
4.1.2 Applications
There are a variety of PE applications that are used to convert electricity from one form
to another or control the flow of electricity. These include:

PE are used in a variety of applications to convert electricity from one form to another or
to control the flow of electricity (Kramer 2008). Some examples of these applications are
as follows:

17
• AC-to-DC rectifiers provide control of DC voltage from an uncontrolled AC source
or utility (such as a microturbine, variable frequency drive (VFD), or small permanent
magnet generator (PMG) wind turbine).
• DC-to-DC converters are almost always found in renewable-to-battery applications.
They take uncontrolled, unregulated input DC voltage and groom it to a specific load
application. DC-to-DC converters are found in photovoltaic battery charging systems.

• DC-to-AC inverters regulate AC supply from DC input. They are found in standalone
AC power applications as well as utility-connected DER systems.
• Solid-state breakers have the potential to standardize and greatly simplify the
installation of grid-connected DER technologies and could hold the key to real grid
modernization. Solid-state breakers replace SF6, air, oil, and breakers with a
semiconductor switch. They provide much faster switching speeds along with
advanced sensing and controls that can be used to eliminate fault current
contributions, thus making DER coordination negligible (Kroposki et al. 2006).

4.2 Prior Research on Inverter Based DER Fault Current

To validate the inverter-based DER fault current contribution numbers, a literature search
was conducted to see if this information was published. Although there are very few
references that show actual fault currents from inverter-based DER, there are a number of
papers that have some discussion on this topic. Several inverter-based fault current
contribution research documents contain a “rule of thumb” of one to two times an
inverter’s full load current for one cycle or less (Kroposki 2008; Dugan et al. 2002;
Barker and de Mello 2000; IEEE 2000; IEEE 1994; Begovic et al. 2001).

In 1985 and 1986, New England Electric installed 30, 2-kW PV static power converters
on one phase at the end of a 13.8-kV feeder in Gardner, Massachusetts. The utility
performed extensive testing to determine if the static power converter could reliably
detect island conditions and faults with and without a utility source. During the
experiment, inverters were shown to contribute a small, short current transient during
faults. This transient was less than 200% rated peak inverter current and lasted less than
200 microseconds. The inverter shut down within 0.5 cycle of the fault and did not affect
normal feeder protection systems (IEEE 1994).

In the 1990 EPRI report covering the Gardner, Massachusetts, study, the findings were
similar. The fault current provided by the inverters was limited; maximum observed fault
current was no more than 150% of rated converter current. The final conclusion of the
EPRI report was that the 37% penetration of PV at Gardner was achieved with no
observable problems in any of the four areas studied (steady-state slow transients such as
cloud transients; PV response under fast transients such as unintentional islanding, faults,
and lighting surges; PV effects on system harmonics; and impact on distribution system
of a high penetration of PV). At relatively high penetration levels the PV systems did not
adversely affect distribution system operations.

18
The GE study DG Power Quality, Protection, and Reliability Case Studies found that, for
DER penetration levels of 40% (DER is heavily dependent on supplying loads), voltage
regulation can be a serious problem (GE 2003). The sudden loss of DER, particularly as a
result of false tripping during voltage or frequency events, can lead to unacceptably low
voltages in parts of the system. Since GE assumed that inverter-based DER did not
contribute significantly to fault currents, the DER did not adversely affect coordination
strategies for fuse and circuit breakers. However, studies also indicate that this might not
always be true if the DER is connected at a point where the utility source impedance is
unusually high (weak system). These results show that at higher penetration levels it may
be beneficial to have inverters ride-though fault conditions. This will be further examined
in Section 6.

4.3 Fault Characteristics of Inverter-Based DER

Inverters do not dynamically behave the same as synchronous or induction machines.
Inverters do not have a rotating mass component; therefore, they do not develop inertia to
carry fault current based on an electro-magnetic characteristic. Power electronic inverters
have a much faster decaying envelope for fault currents because the devices lack
predominately inductive characteristics that are associated with rotating machines. These
characteristics dictate the time constants involved with the circuit. Inverters also can be
controlled in a manner unlike rotating machines because they can be programmed to vary
the length of time it takes them to respond to fault conditions. This will also impact the
fault current characteristics of the inverter.

The inverter interface between the DER and the utility system connection can use a
voltage control scheme or a current control scheme. The DC link capacitor between the
DC/AC converter and the DER unit holds the voltage near constant during transient
conditions. The voltage control scheme has higher initial current overshoot, while the
current control scheme has a much slower increase and decreases back to steady-state
values. The fault contribution will be higher during the transient period (i.e., the first 5–
10 cycles) if the DER is under the voltage control scheme (Baran and El-Markaby 2005).

The potential exists for cutting-edge PE interface systems to orchestrate topologies with
fast, sub-cycle semiconductor switches in a manner that mitigates negative consequences
of DER systems (Kroposki et al. 2006). In order to determine the short-circuit current
characteristic of an inverter, testing should be conducted. These test results can be used to
develop DER inverter models that can be used in distribution models.

19
5 Testing Methods for Determining Fault Contributions
5.1 Testing Background
Since understanding the fault current characteristics of inverter based DER will be
important in understanding their impact on the distribution grid, accurate characteristics
should be known. Currently the industry has set a “rule of thumb” of 2 times rated current
for the amount of fault current contributed by inverter-based DER. In order to evaluate
the rule of thumb, testing was conducted at NREL and inverter manufacturer facilities to
determine if these values are accurate for current inverter technology.

5.2 Test Procedure

The testing procedure in this section is designed to characterize the inverter’s response
when subjected to an output faulted condition. The testing method used for this
experiment is based on Underwriter Laboratory UL 1741 Section 47.3 as described
below:

• The DC battery circuit terminal and the AC output circuit terminal of a unit are to be
shorted separately. The shorting is to be from line to neutral (when applicable) and
from line to line.
• When shorting the unit, the source (DC input or AC output/utility) is to be
disconnected by a relay or similar device.
• Measure the maximum inverter peak output fault current and power factor
immediately after the short is applied for 2 seconds.
• The short circuit test is to be performed a total of four times. Each iteration shall be
performed at a different portion of the line cycle.
• For a unit with multi-phase output, the test is to be performed with shorts applied
from phase to phase and from phase to neutral or ground. If the output circuitry of the
product is essentially symmetrical, the test iterations may be split between the phases.
If the output circuitry is not essentially symmetrical, the four test iterations shall be
performed on the non-similar phases.
• For a unit intended for use with external isolation transformers, the short is to be
applied before and after the external transformer.
• The location of the applied short in the test circuit shall not direct the output short
circuit test current through any ground fuse.
5.3 NREL Experimental Setup
The UL test procedure and equipment set-up was utilized for this inverter short-circuit
experiment. The test circuit in Figure 15 is designed to limit the fault current coming
from the grid source by using a fuse in series with the utility source.

20
 Figure 15. Test circuit single-line diagram

To conduct the short-circuit test, a 1 kW, 1-phase, DC input: 47-92V (used 85 V in

experiment), AC output: 120 V, 8 amperes rated continuous current inverter was used.
The following electrical equipment was used during the inverter testing:
• Grid simulator: 15 kW constant voltage source, 120 V, 60 Hz (max fault current is
300 amperes constant voltage source).
• DC Power Source ratings: 16-17 kW, 0-20 A, 0-60 Vdc, output is 120 Vac.
• AC load banks: 3 kW, 30A, 90A max, 50 – 500 V maximum.
When the inverters are connected to the utility, the inverter is run in current control mode
which does not allow the inverters to control voltage. Voltage is regulated by the utility
grid simulators at the point of connection.

5.3.1 Test Procedure

The following short-circuit test procedure outlined below was recommended by UL. See
Figure 15 for the following test procedure.

1. Close switches 1 and 2.

2. Set AC load similar to inverter output (1kW). This will limit the current coming
from the grid to less than the fuse low current rating (20A).
3. Open switch 1.
4. Set fast and accurate storage oscilloscope for estimated current level.
5. Close switch 3 to simulate fault, for approximately 2 seconds.
5.3.2 Test Results
The 60 Hz, steady-state inverter current and voltage waveforms are displayed in Figure
16. Figure 16 is a recorded snapshot of the inverter AC voltage and current waveform
before a single-phase fault was applied across the AC side of the 1 kW. The blue colored
sinusoidal waveform represents the inverter AC voltage and the red represents the
inverter AC current sinusoidal waveform. During steady-state conditions, the 1kW

21
inverter produces a maximum peak current of 11.9 A (8.4 A RMS) at peak voltage 171.1
V (121V RMS).

Figure 16. Pre-fault waveform of 1 kW inverter

The inverter is then short-circuited and the inverter fault current magnitude and duration
are shown in Figure 17 below. The maximum measured peak fault current is 42.7
amperes which is approximately 5 times the steady-state pre-fault peak current. This is
about twice the rule of thumb that is stated in the literature. The duration of the fault
(from t1 to t2) lasts for only 1.6 ms or 0.1 cycle. The measured fault time is much quicker
than the fault current times stated in the literature.

Figure 17. Fault current test result of 1 kW inverter

22
5.4 Inverter Manufacturer’s Results
Similar testing was conducted at an inverter manufacturer’s facility using a larger
inverter. The fault current waveform from a 500 KVA 3-phase grid-tied inverter that has
been subjected to a bolted 3-phase fault is shown in Figure 18. The purple trace is the
recorded inverter AC current. The yellow trace represents the trigger. A trigger is the
command that sends a signal to the contactor to close and short-circuit the phases. The
difference between the start of the trigger signal and the actual short-circuit event is due
to the contactor closing time.

Figure 18. Manufacturer’s 500 KVA inverter output short circuit test results
between B-C phases

Digital snap-shots traces were captured by a power analyzer during each short-circuit
current event and the fault current between two electrical phase, A-B, A-C, and B-C were
recorded. The maximum fault current peak and duration time are summarized below in
Table 1. Each phase combination was faulted according to standard UL 1741.

Table 1. 500 kVA Inverter Short Circuit Test Results

Test Between B-C Phases
Number I max Duration
1 3.14 kA 1.1 ms
2 2.5 kA 1.25 ms
3 2.52 kA 1.75 ms
4 3 kA 1.2 ms
Between A-C Phases
I max Duration
1 2.56 kA 4.25 ms

23
 2 3.92 kA 1.25 ms
3 3.82 kA 1.5 ms
4 3.66 kA 1.2 ms
5 3.78 kA 1.2 ms
Between A-B Phases
I max Duration
1 3.72kA 1.25 ms
2 3.68 kA 1.45 ms
3 2.44 kA 1.65 ms
4 3.76 kA 1.45 ms
5 2.66 1.35ms

The manufacture inverter fault current is approximately 2 to 3 times the rated peak output
current with a duration time of approximately 1.1 to 4.25 ms. The results from the
manufacturer’s 500 KVA 3-phase inverter and NREL’s 1 kW 1-phase inverter testing
results are similar with respect to the fault duration times. Both inverters test results
suggest that inverters designed to meet IEEE 1547 and UL 1741 produce fault currents
anywhere between 2 to 5 times the rated current for 1 to 4.25ms. Depending on the
inverter type, single-phase or a 3-phase. The single-phase inverter NREL tested results in
a slightly higher fault current 4-5 times rated peak current. The larger 3-phase
manufacture 500 kVA inverter was around 2-3 times rated peak current. The values for
the single-phase type inverters are different than those found in the published literature,
but are still significantly less than the fault current contributions of a machine-based
DER.

24
6 Low Voltage Ride-Through (LVRT)
Most faults on the EDS are temporary in nature (i.e. a lighting strike). The power system
is designed to open the line circuit in an attempt to clear the fault and then automatically
reclose the line to reconnect the circuit once the fault has cleared. There is a delicate
balance between disconnecting for permanent faults and having the ability to “ride
through” temporary faults.

With the increase of DER penetration levels, electrical grid operators will need to
maintain control of the overall power generation connected to the grid. If DER is required
to disconnect for all fault conditions (per IEEE-2008), this will lead to severe voltage and
dynamic stability concerns at high penetration levels. Typically, when faults occur on the
transmission system, a short voltage sag will occur. During this short time, conventional
synchronous generators are able to ride through such disturbances (before tripping off-
line). To address this concern, grid operators require that any generator (including wind)
needs to have ride-through fault capability. This is known as “low-voltage ride through”
(LVRT). LVRT requirements stipulate that generation facilities need to stay connected
through a temporary fault scenario to provide post-fault voltage support. In addition,
generation facilities need to stay connected to the distribution or transmission system to
help maintain grid stability.

The electric power delivery policies that govern the interconnection of power systems in
the United States and Canada involve multiple organizations, including transmission
owners, load serving entities, and regional transmission organizations, share in the
responsibility for maintaining the reliability of the bulk power system. This effort
maximizes the stability, reliability, and security of the electric power network.

6.1 Fault Ride Through Requirements for Large Generators

6.1.1 Federal Energy Regulatory Commission
The Federal Energy Regulatory Commission (FERC) of the U.S. federal government
administers the Federal Power Act (FPA) as amended by the Energy Policy Act of 1992.
The core of the act ensures that transmission providers offer wholesale transmission
service at rates that are just, reasonable, and not unduly discriminatory.

In July of 2003 FERC initiated Order No. 2003 responding to non-uniformity in

interconnection practices regarding new generators. Industry players such as the
American Wind Energy Association (AWEA) and the Western Electricity Coordinating
Council (WECC) proposed interconnection standards and guidelines for all new
generators greater than 20 MW. No distinction was made between conventional
synchronous or variable speed machines with power electronic inverters. It was in March
of 2004 that FERC recognized the differences in technologies and how they affected
interconnection to the electric grid and developed an Appendix G, Order No. 661 in
2005.

FERC Orders No. 661 and 661-A, Interconnection for Wind Energy, include standardized
interconnection agreements for wind generation above 20 MW. This Order requires
transmission providers to append new provisions to the standard agreement for

25
interconnecting large generating facilities, which are required under their open-access
transmission tariffs, in order to address technical requirements and procedures for
integrating large wind power facilities into their transmission systems. A key provision of
the Order is that wind generating facilities must remain operational during voltage
disturbances on the grid. Large wind plants must, if needed, also meet the same technical
criteria for providing reactive power to the grid as required of conventional large
generating facilities (Zavadil et al. 2005).

6.1.2 American Wind Energy Association

In a May 2004 petitions, the American Wind Energy Association (AWEA) initiated
requirements that uniquely characterized wind power plant requirements. The major
petition covered a number of issues but one in particular was LVRT. AWEA
recommended adoption of an LVRT standard developed by a German grid operator
(E.ON Netz). The standard was developed assuming significant levels of wind generation
capacity. FERC Order No. 661 adopted the standard. A description of how the LVRT
behaves is given in Figure 19. This requires that the generator remain on-line for voltages
as low as 15% of nominal voltage for 0.625 seconds (Zavadil et al. 2005).

Figure 19. LVRT requirement per FERC Order No. 661

6.1.3 Western Electricity Coordinating Council

The Western Electricity Coordinating Council (WECC) initiated its own LVRT standard
and guidelines. The proposal required that all generating units in the WECC organization
remain on-line or tied to the system for three-phase faults with normal clearing and single
line-to-ground faults with delayed clearing and tolerates the post-fault transient
characteristic specified in Figure 20 (Zavadil et al. 2005). This standard does not apply to
individual units or to a site where the sum of the installed capabilities of all generators is
less than 10 MVA, unless it can be proven that reliability concerns exist.

26
Figure 20. WECC system performance criteria from Table W (WECC System Performance
Criteria, TPL – WECC – 1 – CR, 2008)

In April 2005 WECC officially issued a LVRT standard for wind plant as shown in
Figure 21. Currently a new WECC Criteria, PRC-024-WECC-1-CR, (Figure 22) has been
going through the WECC review process to change the existing WECC LVRT standard.
The reason for this new standard is to bring the WECC LVRT standard in line with the
current FERC Order No. 661A.

Figure 21. 2005 WECC LVRT standard (Zavadil et al. 2005)

27
 Figure 22. 2009 proposed WECC LVRT standard

6.1.4 North American Electric Reliability Council

The North American Electric Reliability Council (NERC) was formed in response to the
blackouts in the northeastern United States in the 1960s to establish policies and
standards for ensuring the reliability of the power system (Zavadil et al. 2005). NERC
standards and guidelines for system reliability are implemented by the ten regional
reliability organizations (RROs) (Figure 23). The interconnected nature of the bulk
system demands close coordination and cooperation between these individual entities.

28
 Figure 23. NERC (RROs) members (IEEE Power and Energy Magazine 2005)

In 2005, NERC established a wind integration task force to address planning and
reliability issues associated with wind generators interconnected to the electric power
grid. Subsequent to FERC Order No. 661, NERC filed a request for rehearing on the
following two aspects.

• The LVRT requirement in FERC Order No. 661 Figure 19 should be modified to
incorporate wind plants, like other generating facilities, be required to ride through a
“normally cleared single line-to-ground fault or three-phase fault on the transmission
line connected to a (wind) plant switchyard or substation.” This would have the effect
that a wind plant be able to stay connected to the grid if the voltage at the high
voltage side of the substation transformer were reduced to zero for a period up to
about 0.15 second (Zavadil et al. 2005).
• NERC asserts “shifting the burden to transmission providers of justifying on a case-
by-case basis what most regard as good utility practice is unwise.” (Zavadil et al.
2005)
NERC and AWEA were ordered by FERC to convene and resolve the issue associated
with FERC Order No. 661.

29
6.2 IEEE 1547 Requirements
Currently, most utilities have adopted IEEE 1547 for interconnecting distributed
resources on the distribution system. IEEE 1547 covers interconnection of all types of
DER up to 10MVA at the point of common coupling (PCC) with the utility, Figure 24
gives Table 1 from IEEE 1547, which stipulates default clearing times for system
disturbances with abnormal voltages.

Voltage range Clearing time(s)b

(% of base voltagea)
V<50 0.16
50 ≤ V<88 2.00
110<V<120 1.00
V ≥ 120 0.16
a
Base voltages are the normal system voltages stated in ANSI C84.1-1995, Table 1.
b
DER ≤ 30 kW, maximum clearing times; DER>30 kW, default clearing times.

Figure 24. IEEE 1547 (Table 1) Interconnection system response to abnormal voltages

The information from Figure 24 above is displayed graphically in Figure 25 below. When
the voltage levels stays within the blue area, the DER may remain parallel with the
utility. When the voltage level falls outside the blue and into the red, the DER must
cease-to-energize the PCC within the allowed time limit. Also note that these are cease-
to-energize times only and are the maximum times based on voltage levels. The DER is
not required to stay on line if the voltage limits are reached. Typically manufacturers will
design their interconnection system to cease-to-energize the utility well within the limits
to pass certification tests.

Figure 25. IEEE 1547 Interconnection system response to abnormal voltages from IEEE
1547 (Table 1)

30
6.2.1 German LVRT requirements for DER
In 2008, Germany released a new fault current ride through grid code for DER
interconnected at the medium voltage level with minimum voltage characteristics
outlined in Figure 26. The nominal voltage per-unit is displayed on the vertical axis. The
horizontal axis represents time in milliseconds. The generators are not allowed to
disconnect when the voltage is above Boundary Line 1. If the voltage drops below
Boundary Line 2 and below the Boundary Line 1, generating units shall pass through the
fault without disconnecting from the system. If the voltage falls below the blue line, there
is no need to stay connected to the grid (Piwko et al. 2009). This is the first time that
LVRT requirements have been implemented on DER interconnected at distribution
voltage levels. Germany has a much higher level of penetration of DER in their EDS and
is using this method to address issues related to system stability with high levels of DER.

Figure 26. Germany’s new LVRT grid code

6.3 LVRT Testing Requirements

The utility voltage and frequency variation test under UL 1741 Section 68 requires
production line testing for each specified condition, Figure 27. The UL Table 68.1,
shown in Figure 27 below, is used to verify the inverter’s ability to comply within the
specified time. The targeted test conditions range from A through F. These voltage
conditions are very similar to those specified in IEEE Table 1, shown in Figure 25 above.
The difference is in the maximum voltage and time of disconnection from the utility. The
standard UL 1741 has a time of disconnect of 0.33 seconds for voltages greater than
137% rated voltage. The IEEE 1547 standard has a disconnect time of 0.16 seconds for
voltages greater than 120% rated voltage.

31
 Figure 27. UL 1747 Table 68.1 Voltage and frequency limits for utility interaction
Example inverter test results for voltage ride-through capability is shown in Figure 28.
The figure shows the results of testing a 1 MW inverter. The yellow trace represents the
trigger that initiates the short-circuit event. Again, the difference between the start of the
trigger signal and the actual short-circuit event is due to the contactor closing time. The
time delay between the start of the trigger signal and the actual short circuit event is due
to the contactor closing time. The light blue trace represents the line voltage and the
purple trace represents the inverter AC fault current. Typically, the inverter manufacturer
will perform a short-circuit test by using a contactor device that will close and create the
short-circuit event. The green trace represents the actual fault current flowing through the
contactor device used to fault the circuit.

Figure 28. Manufacturer testing inverter for voltage ride-through

32
In Figure 28, the fault continues propagating for approximately 7 cycles and at a
magnitude of approximately 1.2 times steady-state current before shutting down. This is
within the WECC fault duration time of 0.15 seconds or 9 cycles. This example shows
that inverter-based DER can provide low-voltage ride though capability.

It should be noted that the fault clearing time response shown in Figure 28 could be
adjusted as desired either to conform with interconnection standards or for fault clearing
coordination.

6.4 LVRT Summary

The present status of the LVRT grid codes is still ongoing. Recently, WECC underwent a
review process to change the existing WECC LVRT Standard, approved in April 2005, as
a regional criterion to match what is listed in FERC Order 661A. The Planning
Coordination Committee and Reliability Subcommittee are questioning the value of
continuing with this process. The Planning committee remanded the LVRT Criterion
(PRC-024-WECC-1) back to the Reliability Subcommittee. After reviewing the
comments submitted to Planning Committee, the Reliability Subcommittee concluded
there is no acceptable solution for modifying the current approved WECC LVRT
Standard to conform to FERC Order 661A (WECC, 2009).

The WECC LVRT Standard is applicable to all generation types. It conflicts with the
FERC Order 661A, which requires that wind generators must ride-through voltage dips to
zero volts on the high side transformer. Currently, NERC PRC-024 is being written to be
applicable to all generation.

The new German Grid code applies some of the LVRT requirements to medium voltage
connected DER. This is a significant change from existing standards that required DER to
disconnect from the utility quickly and remain off line for a specified time period. As
penetration levels of DER increase in the United States, it may become necessary to
review and update IEEE 1547 to provide for LVRT of DER.

33
7 Computer Modeling Techniques
In today’s complex and increasingly demanding electrical power system, sophisticated
software programs are required to accurately model the electrical infrastructure.
Performing hand calculations at this level is not practical and nearly impossible. Software
programs available today typically concentrate on either the transmission or the
distribution side of the electrical power system; however, some software programs have
the capability of combining these different parts of the electrical power system.
Distribution system analysis has been traditionally perceived as modeling small, radially
connected systems with simple power-flow methods. Despite their seemingly simple
structure, distribution systems are considerably more complex than transmission systems
because of the unbalanced nature of these systems and the often large number of modeled
elements.

7.1 Modeling and Simulation

Due to shortcomings of any single software modeling tool, a utility may find it necessary
to create many different models maintained and used by different departments within the
utility. Protection may build and maintain a separate model from operations; operations
may build and maintain a separate model from planning, and so on. At the same time,
multiple data collection systems throughout the utility such as billing, outage
management systems, Geographic Information Systems (GIS), and Supervisory Control
and Data Acquisition (SCADA) systems may be gathering and storing vast amounts of
data without a clearly defined relationship with each other or the distribution system
models.

As utilities find new applications for data from their various collection systems,
distribution simulation environments are expanding to provide non-traditional analyses
based on these data. Furthermore, by expanding the capabilities of any single model to
perform protection, operation, and planning analyses, utilities are able to maintain a more
accurate model. Table 2 provides a representative list of commercially available software
packages and their applications.

34
 Table 2. Commercial software comparisons*

SimPowerSystems
PowerFactory
SKM-Dapper
PowerWorld

CYMEDIST
PSS Sincal

SynerGEE

PSCAD
ASPEN

PSS/E
DEW

PSLF
Steady-state Performance

Balanced Power Flow x x x X x x

Unbalanced Power Flow x x x x x x x x

Voltage Drop x x x x x x x x

Flicker Analysis x x x x x

Power Quality Analysis x x x x x x

Fault Analysis

Short circuit analysis x x x x x x x x x x

Protection and Coordination x x x x x x x

Dynamic Performance

Rotor Angle Stability x x x x x x

Voltage Stability x x x x x x

* Known software capabilities as of October 2009.

7.2 Commercial Products

• ASPEN: Advanced Systems for Power Engineering (ASPEN) used primarily to
determine equipment ratings, fault current levels, and protection coordination on the
transmission level network.
• CYMEDIST: CYMDIST performs power systems analysis on balanced or
unbalanced three-phase, two-phase and single-phase systems that are operated in
radial, looped or meshed configurations. The module includes voltage drop and
power flow analysis, fault calculations and, protective device coordination.
• SKM-Dapper: DAPPER performs traditional short circuit analysis with an integrated
set of modules. The module includes design and analysis including load flow and
voltage drop calculations, motor starting, demand and design load analysis, feeder,
raceway and transformer sizing.
• DEW: DEW has an open architecture and utilizes an Intergraded System Models
(ISM). The architecture and ISM provide the developer with a mechanism to directly

35
 use the results of existing (relay) analyses, model parameters, and external data to
create custom calculations, analyses, and reports.
• PowerFactory: PowerFactory offers a research version that allows the user to create
custom models and control strategies as Matlab or programmed functions.
• PowerWorld: PowerWorld is a visualization tool used to analyze the system
performance under different power demand scenarios. Transmission planners, power
marketers, and system operators typically use the software.
• PSCad: PSCad offers the ability to create custom components as well as custom
control algorithms.
• PSLF: GE Positive Sequence Load Flow Software (PSLF) is a full-scale program
designed to perform load flow, dynamic simulation, and short circuit analysis.
Typically used by power system engineers for simulating the transfer of large blocks
of power across a transmission grid.
• PSS Sincal: PSS SINCAL software package offers time and frequency domain
solutions for stability and harmonics respectively. Also includes planning and
analysis of utility and industrial networks.
• PSS/E: The Power System Simulator for Engineering or PSS/E, essentially has the
same system capability as PSLF a software program. Again, this package is typically
used by electrical transmission planners performing load flow, dynamic simulation,
and short circuit analysis for obtaining a reliable power system.
• SimPowerSystems: Built on the Matlab solution engine, SimPowerSystems offers
the flexibility to create custom algorithms, interfaces, and components.
• SynerGEE: SynerGEE performs power system analysis using detailed load modeling
on radial, looped and mesh network systems comprised on multiple voltages.
The primary analyses used by distribution engineers are steady-state power-flow, and
short circuit. Presently, these analyses are performed using many different methods. It
would be beneficial to the utility industry to have uniformity in distribution system
analysis so comparisons can be made across platforms. The IEEE Distribution System
Analysis Subcommittee has developed a number of “test feeders” for benchmarking
distribution system analysis programs (Kersting 2006).

A short circuit study is essential for determining parameters used in relay settings.
Combining short circuit analysis with dynamics analysis can contribute greatly to the
understanding of how DER will interact with a utility protection system. The time-
dependant behavior of the protective devices is represented along with the dynamic
characteristics of the machine and inverters. At present, no such tools are readily
available without resorting to an electromagnetic transient computer program. This is one
area for continuing research in the development of DER-related engineering tools (Dugan
et al. 2002).

There is a need for accurate short circuit models to assess DER fault contribution during
both subtransient (first cycle) and transient (3–10 cycles) periods. Extending the

36
conventional fault analysis to include inverter-based DER is challenging because it
requires more detailed modeling than the models used to represent AC generators (Baran
and El-Markaby 2005). Conventional fault current analysis has been done using Zbus
matrix algorithms. With the addition of DER, this may be very complicated to perform
because of the difficulty of estimating the inverter impedance (IEEE 2008). If the internal
impedance of an inverter could be determined then it would be possible to accurately
model the inverters fault characteristics using power system modeling software.

37
8 Conclusions and Future Recommendations
8.1 Conclusions
This report discusses several key issues regarding the development and challenges of
integrating inverter-based DER into the existing electrical utility distribution system with
a focus on short-circuit current capability. It is important to emphasize the different
characteristics of fault current contributions from various DER sources. Inverter-based
fault contributions behave differently than traditional power sources such as synchronous
and induction generators and motors connected to electrical distribution systems.

Currently, inverter-based DER provides insignificant or minimal contribution to the

power balance on most utility distribution systems. A significant increase in DER is
expected to come on-line in the near future. As the penetration level of DER increases,
the effect of DER may no longer be considered minimal. The electrical equipment
ratings, capability, and coordination of the protection systems will indeed merit a closer
investigation (Kroposki 2008; Nimpitiwan 2007).

The current industry’s practice regarding fault current level assessment for setting
protective relays has been to apply a “rule of thumb” of 2 times rated continuous current
for DER. This seems to be the standard practice at low levels of DER penetration. Tests
of 2 grid tied inverter systems at NREL suggest that the fault current is typically higher,
but for much shorter time periods (2-4 times rated current for 0.06 – 0.25 cycles). This
time period is typically within the subtransient reactance values for synchronous
generators and trip times for circuit breakers, and therefore can possibly be ignored. What
effect this may have on the protective relays at higher levels of DER penetration is not
well understood and warrants continued research in this area.

A unique property of a PE interface is the ability to program in the fault characteristics

from the inverter, thereby allowing negligible impacts on protection coordination
(Kroposki et al. 2006; General Electric 2003). In the future, inverter based systems may
be developed that will further optimize system coordination by having a controllable fault
current level (Tang and Iravani 2005). Past research has indicated that PE can optimally
regulate and limit DER fault current, improve power quality, and provide the utility with
reactive power control and voltage regulation at the DER connection point. Continued
testing of actual inverter fault characteristics is needed to develop information that could
be used in modeling and fault analysis programs.

The LVRT standards are continually being developed and should introduce other areas to
consider regarding protective relay coordination settings. These LVRT implications come
from the fact that the inverter-based DER has to remain on-line (connected to the grid or
distribution system) for a period of time before tripping off. This allows the DER (mainly
wind turbines in this case) to help support the voltage and stabilize the power grid during
transient faults. Low voltage ride-through test of an inverter showed that it could produce
1.2 times peak current for a period of approximately 7 cycles. This confirms the adequacy
of inverter-based DER fault current-ride-through capability but it is not clear what effect
this might have on the distribution system protection scheme.

38
Most commercially available software simulation environments are designed with
traditionally synchronous generation in mind. A paradigm shift needs to take place
regarding new renewable inverter-based renewable energy coming on-line in the near
future. New inverter-based DER control modules (e.g. PV) capable of using
commercially available software packages will need to be developed. Developed
software models must be validated through hardware testing. Fast, robust, accurate
inverter based DER models will allow utility planning engineers to safely and reliably
provide continued service to the consumer.

8.2 Future Recommendations

• Develop validated models for inverter short-circuit and LVRT characteristics. Based
upon NREL and manufacturer inverter short circuit test results, research should be
expanded to include larger 3-phase inverters characterizing the response to different
types of faults. Including, 3-phase, single line-to-ground, and phase-to-phase faults.
This expanded short-circuit testing type will be beneficial and more applicable to the
utility type scale. This will help in validating the DER software modules being
developed.
• Expand fault current software model parameters for use with protective device
coordination studies. It will be necessary to obtain accurate short circuit models to
assess DER fault contribution during both subtransient (first cycle) and transient (3–
10 cycles) periods. Extending the conventional fault analysis to include inverter-
based DER is challenging because it requires more detailed modeling than the models
used to represent AC generators.
• Perform inverter-based DER testing and computer simulation to determine the
penetration levels at which inverter-based DER will impact the utilities distribution
system. This percentage will be instrumental in determining the protective relaying
settings as well as the stability of the distribution system.
• It would be beneficial to the utility industry to have uniformity in distribution system
analysis so comparisons can be made across platforms. Combining short circuit
analysis with dynamics analysis can contribute greatly to the understanding of how
DER will interact with a utility protection system. At present, no such tools are
readily available. This is one area for continuing research in the development of
DER-related engineering tools.
• In order to study system stability issues for high penetration levels of PV, an
electrical control model needs to be developed. Utilizing a new set of differential
equations to characterize the dynamic behavior during a system disturbance is
essential for the electrical power industry. Incorporating this development into a
usable software control model that can be imported across multiple software
platforms, such as PSLF and PSS/E is essential.
• Determine the LVRT capability of inverter-based DER and defining how protective
relay coordination will be effected during such events.
• Update existing interconnection standards to allow the use of LVRT parameters for
DER.

39
9 References
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This report discusses issues and provides solutions for dealing with fault current contributions from inverter-based
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