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Gujarat Technological University

The document is an exam for a VLSI CAD course containing 5 questions about topics like routing algorithms, placement algorithms, floorplanning techniques and their comparisons. It asks students to define terms, explain concepts, compare algorithms and discuss methods.

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Ramesh Mallai
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7 views1 page

Gujarat Technological University

The document is an exam for a VLSI CAD course containing 5 questions about topics like routing algorithms, placement algorithms, floorplanning techniques and their comparisons. It asks students to define terms, explain concepts, compare algorithms and discuss methods.

Uploaded by

Ramesh Mallai
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Seat No.: ________ Enrolment No.

___________

GUJARAT TECHNOLOGICAL UNIVERSITY


ME – SEMESTER-1 (NEW) EXAMINATION – WINTER 2016

Subject Code: 2714202 Date:06/01/2017


Subject Name: Foundation of VLSI CAD
Time: 2:30 pm to 5:00 pm Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.

Q.1 (a) Define the followings: 07


(i) Space Complexity (ii) Time Complexity (iii) Hard Problem
(iv) Polynomial Time (v) Cell (vi) Net (vii) Pin
(b) Compare KL an FM algorithm. 07
Q.2 (a) Explain Wire length estimation techniques in detail. 07
(b) Define Routing Regions and its different representations. 07
OR
(b) Compare Floorplan v/s Placement 07
Q.3 (a) Explain with example: Soft Block, Hard Block, Dead Space and Bounds on 07
Aspect Ratio.
(b) Explain with suitable example: Minimize Maximum Cut Algorithm. 07
OR
Q.3 (a) What do you mean by Maze Router and Line Search Method? Explain with 07
suitable diagram Lee Algorithm.
(b) What is polish expression? Explain with an example how it can be useful in 07
Floorplan.
Q.4 (a) Explain Mikami-Tabuchi’s Algorithm. 07
(b) Discuss the methods to reduce running time of Lee Algorithm. 07
OR
Q.4 (a) Discuss in detail Simulated Annealing Algorithm and its importance in VLSI. 07
(b) What is difference between Shortest Path and Desired Path.? How to find more 07
desirable path?
Q.5 (a) Discuss in brief: Channel Routing, Problem Definition and its objectives. 07
(b) Explain: Hadlock’s Algorithm. 07
OR
Q.5 (a) Define Classification of Placement Algorithm and explain Bisection Placement 07
Procedure.
(b) Explain with suitable example: Minimize Maximum Density Algorithm. 07

*************

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