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Week 1 - Assignment

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0% found this document useful (0 votes)
8 views2 pages

Week 1 - Assignment

Uploaded by

cs.harimohan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Week 1: Assignment - 1

Due date: 2023-08-09, 23:59 IST.


Your last recorded submission was on 2023-08-08, 14:33 IST
1 point
In a typical execution cycle, which one of the following sequences accurately depicts the
steps involved?

Instruction fetch → Operand fetch → Instruction decode → Execute → Result store

Instruction decode → Instruction fetch -> Operand fetch → Execute → Result store

Instruction fetch → Instruction decode → Operand fetch → Execute → Result store

Operand fetch → Instruction fetch → Instruction decode → Execute → Result store

1 point
Which one of the following is the feature of the Little Endian scheme?

The least significant byte is stored at the smallest address


The most significant byte is stored at the smallest address
The least significant byte is stored at the largest address
The most significant byte is stored at any address.
1 point
In terms of processor memory interaction, what is the role of the Program Counter?

It contains the address of the instruction currently being executed


It contains the address of the next instruction to be fetched
It contains the data to be written into or read from memory
It contains the result of a computation
1 point
CISC architecture attempts to minimize the number of instructions per program but at the
cost of:

Using a larger memory


Using a wider bus to carry an instruction from memory
Decrease in the average number of cycles per instruction
Increase in the average number of cycles per instruction
1 point
A processor has 8 general-purpose registers. It uses a 24-bit instruction format. If the opcode
field occupies 6 bits followed by the register field that stores a register address, how many
bits are left for other fields in the instruction?

14 bits
8 bits
10 bits
15 bits
1 point
Consider the following operations done on a Stack Machine Architecture:

Push D
Push C
Push B
Mult
Add
Pop A
If the values in memory locations B, C, and D, are 6, 2, and 4, respectively. What will
be stored in memory location A after the execution of the above program?

14
16
26
12
A program has 30% Load instructions, 20% Store instructions, 40% ALU instructions, and
10% Branch instructions. On a processor each Load, Store, ALU and Branch instructions take
4, 3, 1 and 2 cycles, respectively. What is the average CPI (Cycles Per Instruction) on the
processor for this program?
Answer 2.4
2 points
A new Graphics Processing Unit (GPU) is added to a system, which speeds up the execution
of graphics-related instructions by 6 times. If a program has 50% graphics-related
instructions, what is the overall speedup gained while running the program on the system
with the GPU compared to running it on the system without the GPU?
Answer 3.5

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