Accesing IO
Accesing IO
Figure 5.2 illustrates the hardware required to connect an I/O device to the bus.
The address decoder enables the device to recognize its address when this
address appears on the address lines. The data register holds the data being
transferred to or from the processor. The status register contains information
relevant to the operation of the I/O device. Both the data and status registers are
connected to the data bus and assigned unique addresses. The address decoder,
the data and status registers, and the control circuitry required to coordinate I/O
transfers constitute the device's interface circuit.
I/O devices operate at speeds that are vastly different from that of the processor.
When a human operator is entering characters at a keyboard, the processor is
capable of executing millions of instructions between successive character
entries. An instruction that reads a character from the keyboard should be
executed only when a character is available in the input buffer of the keyboard
interface. An input character is read only once.
For an input device such as a keyboard, a status flag, SIN, is included in the
interface circuit as part of the status register. This flag is set to 1 when a
character is entered at the keyboard and cleared to 0 once this character is read
by the processor. Hence, by checking the SIN flag, the software can ensure that it
is always reading valid data. This is often accomplished in a program loop that
repeatedly reads the status register and checks the state of SIN. When SIN
becomes equal to 1, the program reads the input data register. A similar
procedure can be used to control output operations using an output status flag,
SOUT.