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Computer Instruction 1

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7 views7 pages

Computer Instruction 1

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athwin
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© © All Rights Reserved
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Computer instruction:

> The basic computer has 3 instruction code formats each


format has 16-bits.

>Instruction code formats with reference to its operand.

>The operation code(opcode)Part of the instructions contains


3-bit and remaining 13-bits
Depends on the operation code encounter.

i. Memory - reference instruction:

It uses 12-bit to specify an address,1-bit to specify the


addressing mode I.

1. I is ‘0’ for Direct address.


2. I is ‘1’ for Indirect address.

15 14 12 11 0
I Op code Address

(op code=000 through 110)

Eg: AND,ADD,LPD,STA,BUN,BSA,etc.

AND - AND memory word to AC.


ADD -ADD memory word to AC.
LDA -Load memory word to AC.
STA -Store content of AC in memory.
BUN -Branch unconditionally.
BSA -Branch and save return address.
ISZ -Increment and skip it zero.
ii) register - reference instruction:
> It is recognized by the operation code 111 with a ‘0’ in the
left most bit(bit 15) of the instruction.

>It specifies an operation on a test of the AC register.

>So, An operand from memory is not needed.

>The other 12-bits are used to specify the operation or test to


be executed.

15 12 11 0
0111 Register operation

(opcode=111,I=0)

Eg : CLA,CMA,CLE,INC,HLT etc.

CLA -clear AC
CLE - clear E.
CMA - complement AC.
CME - complement E.
CIR - circulate right AC and E.
INC -Increment AC.
HLT - Halt computer.

CIL :Circulate the accumulator left,E goes in the low order


and two high order bit bumped out goes in E.
iii) Input-output instruction :

>It does not need a reference to memory and is recognized by


the operation code 111
With a ‘1’ in the left most bit of the instruction.

>The remaining 12-bits are used to specify the type of I/p and
o/p operation (or) test performed.

15 12 11 0

1111 I/o Operation

(op code=111,I=1)

Eg: INP,OUT,SKI,SKO,ION,IOF.

INP - I/P character to AC.


OUT - O/P character from AC.
SKI - Skip on I/p flag.
SKO - Skip on o/p flag.
ION -I Interrupt ON.
IOF - Interrupt OFF.
 Instruction set completeness:

>A computer should have a set of instructions so that the user


can construct machine language programs to evaluate any
function.

>The set of instruction are said to be complete if the computer


includes a sufficient no. of instruction
In each of the following categories.

 O- Arithmetic,logic and shift instruction.


 O- Data instructions(for moving information to and from
memory and processor registers).
 O- Program control or branch.
 O- I/P and O/P instruction.

 There is one arithmetic instruction instruction ,ADD and two


related instruction ,complement AC(CMA) and increment
AC (INC) with there 3 instruction we can add and
subtraction binary number.

When negative numbers are in signed -2’s complement


representation.

>The circulate instruction,CIR and CIL can be used for


arithmetic shifts as well as any other type of
Shift desired.

>These are 3 logic operation:AND,complement AC(CMA), and


clear AC(CLA).The AND and complement provide a NAND
operation.

>Moving information from memory to AC is accomplished with


the load AC (LDA) instruction.
Storing information from AC into memory is done with store
AC(STA) instruction.

>The branch instruction BUN,BSA AND ISZ,together with the


4 Skip instructions,provide capabilities for program control and
checking of status condition.

>The i/p (INP) and o/p (out) instruction cause information to be


transfers between the computer
and external devices.

Instruction cycle:
It is the time required by the CPU to execute one signal
instruction.

>The basic computer each instruction cycle consist of the


following Phase:

i. Fetch an instruction from memory.

ii. Decode the instruction.

iii. Read the address from memory if the instruction has an


indirect address.

iv. Execute the instruction upon,the completion of step-4 the


control goes back to step-1 to fetch,decode and execute the
next instruction.
Start

Sc 0

T0
MR PC

T1

IR M[AR],PC PC+1

T2

Decode opcode in IR(12-14)

AR IR[0-1] , I IR(15)

(Register or I/O ) = 1 = 0 (memeory reference)

(Indirect) 1 (Direct) 0

(I/O)=1 0 (register) T3
Nothing
T3
AR m[AR]

T3 T3
Execute register -
reference instruction
Execute memory -
Execute reference instruction
instruction
I/o instruction SC 0
Sc 0 Sc 0
- Initially,the program counter (PC) is loaded with the address of
the 1st instruction in the program.
- The sequence counter (SC) is cleared to 0, providing a decoded
timing signal To.

- To provide the data Path for the transfer of PC to AR,we must


apply timing signal To.

- Transfer the content of memory location of AR to IR by


enabling the LD I/p of IR & increment PC by enabling the INR
I/p of PC.

::: After each clock pulse,SC is incremented by 1,so that the


timing signal go though a sequence T0,T1,T2 & so on.

- During time T3,the control unit determine the type of


instruction that was read from the memory.

- Decoder O/P D7=1,if operation code = 111,then instruction


must be a register -reference or I/O type.

-If D7=0 operation code must be =00 through 110,


Specifying a memory-reference instruction.

- control then inspect the value of the 1st bit of the instruction:
0 0

i. If D7 I T3 - Memory -reference instruction with a


direct address [Nothing] .
0 1
ii. If D7 I T3 - [AR m[AR]] memory-reference

1 0

iii. If D7 I T3 - register - reference instruction.

1 1
iv. If D7 I T3 - Input -Output instruction.

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