UNIT – II EMBEDDED COMPUTING PLATFORM AND DESIGN

PART – A
1. What is the bus protocol e specially, the four-cycle handshake? (Apr/May’14)
Protocols are the set of rules and conditions for the data communication. The basic building block of
most bus protocols is the four-cycle handshake. Handshake sure that when two devices want to
communicate. One is ready to transmit and other is ready to receive. The handshake uses a pair of wires
dedicated to the handshake; such as enq (meaning enquiry) and ack (meaning acknowledge).Extra wires
are used for the data transmitted during handshake.
2. What is a data flow graph? (Apr/May’14)
A data flow graph is a model of a program with no conditions. In a high level programming language, a
code segment with no conditions and one entry point and exit point.
3. What are CPU buses? (Nov/Dec’13), (May/Jun’13)
Data bus, Address bus, Control bus, System bus.
4. List out the various compilation techniques. (Nov/Dec’13)
There are three types of compilation techniques: Analysis and optimization of execution time, Power
energy and program size Program validation and testing.
5. State the basic principles of basic compilation techniques. (May/Jun’13)
1.Compilation combines translation and optimization 2.The high level language program is translated
into lower level form of instructions; optimizations try to generate better instruction
sequences3.Compilation=Translation+ optimization.
6. Name any two techniques used to optimize execution time of program. (Nov/Dec’12)
Instruction level optimization and Machine independent optimization.
7. What does a linker do? (Nov/Dec’12)
A linker allows a program to be stitched together out of several smaller pieces. The linker operates on the
object files created by the assembler and modifies the assemble code to make the necessary links between
files.
8. What are the four types of data transfer in USB? (May/Jun’12)
Control transfer, Interrupt transfer, Bulk transfer, Isochronous transfer (sequence of data).
9. Give the limitation of polling techniques. (May/Jun’12)
It is wasteful of the processors time; a sit need lessly checks the status of all devices all the time. It is in
recently slow, as it checks the status of all input/output devices before it comes back to check any given
one again. Priority of the device cannot be determined frequently.
10. What do you mean by Control Bus in CPU? (Nov/Dec’14)
Control bus is one of the buses of the CPU. It is used to pass on the control signals to the all the
functional blocks of the CPU as well as the peripheral devices interfaced with the CPU.
11. Can latches be used to construct input ports? Justify (Nov/Dec’14)
Latches can be used as input ports for devices operating at low speed. One of the inputs to the latch will
be the externally given by the interfaced device. The other input can be the enable which can be from the
CPU.
12. Mention the two ways used for performing input and output operations.
Using input and output, instructions, Memory mapped I/O
13. Define polling.
The speed of the CPU is faster than the speed of the i/o devices so checking the i/o device whether it
finishes its operation by reading its status register is called polling.
14. Define DMA.
DMA stands for direct memory access. It is a bus operation that allows reads and writes not controlled by
the CPU. A DMA transfer is controlled by a DMA controller, which requests control of the bus from the
CPU. After gaining controller, the DMA controller performs read and write operations directly between
the devices and the memory.
15. Mention the registers present in the DMA controller.
Starting address register, Length register, Status register
16. What is meant by absolute addresses?
The assembler assumes that the starting address of the assembly language program has been specified by
the programmer is known as absolute addresses.
17. Define aspect ratio of memory. (Apr/May’11)
The height / width ratio of the memory is known as aspect ratio. The best aspect ratio depends on the
amount of memory required.
18. What is difference between program location counter and program counter?
The program location counter makes exactly one pass through the program counter makes many passes
over code in a loop.
19. What is meant by symbol table?
Symbol table is built during the first pass of assembler which contains the names of each symbol and its
address is stored in a table. The symbol table is built by scanning from the first instruction to the last.
20. Define compilation.
Compilation combines translation and optimization. The high level language program is translated into
the lower level form of instructions; optimizations try to generate better instruction sequences.
21. What is meant by Boot-block flash?
Boot block flash is to keep the boot-up code in a protected block but it allows updates to other memory
blocks on the device.
22. Write note on assembler / interpreters for embedded systems.
Assemblers translate high level language into machine language one by one translation. Interpreter
constantly runs and interprets source code as a set of directives.
23. Define compiler and cross compiler
Compiler is software it translates high level language into machine code or machine language. A cross
compiler is a kind of a compiler that runs on one type of machine but generates code for another machine.
After compilation, the executable code is downloaded to the embedded system by a serial link or perhaps
burned in a PROM and plugged in.
24. What is meant by testing?
Testing is the process of finding the errors and correcting error. Testing ensures that whether the system
will work based on constraints of design. Types: block box testing and clear box testing.
25. What is the function of I/O device?
Each I/O device monitors the CPU’s address bus and responds to any of the CPU access of device
assigned address space, connecting the data to a desirable devices hardware register.

PART – B
1.How would you explain the various bus structures used in Embedded Systems.
Bus Protocols:
four-cycle handshake
← Device 1 raises its output to signal an enquiry, which tells device 2 that it should get
ready to listen for data.
← When device 2 is ready to receive, it raises its output to signal an acknowledgment. At this
point, devices 1 and 2 can transmit or receive.
← Once the data transfer is complete, device 2 lowers its output, signaling that it has re-
ceived the data.
After seeing that ack has been released, device 1 lowers its output.

The major components follow:

←Clock provides synchronization to the bus components,
←R/W is true when the bus is reading and false when the bus is writing,
←Address is an a-bit bundle of signals that transmits the address for an access,
←Data is an n-bit bundle of signals that can carry data to or from the CPU, and
←Data ready signals when the values on the data bundle are valid.

The four-cycle handshake.

A typical microprocessor bus.

DMA:

Direct memory access (DMA) is a bus operation that allows reads and writes not
controlled by the CPU. A DMA transfer is controlled by a DMA controller, which requests
control of the bus from the CPU.
2.List the different types of Memory devices and elaborate in detail
((Nov/Dec’13)(Apr/May ‘14)

Memory Device Organization:

← As a 64M *4-bit array, a single memory access obtains an 8-bit data item, with a maximum of
226 different addresses.
← As a 32 M* 8-bit array, a single memory access obtains a 1-bit data item, with a maximum of
223 different addresses.

Random-Access Memories:
Random-access memories can be both read and written. They are called random access because,
unlike magnetic disks, addresses can be read in any order.

Dynamic RAM (DRAM).

Synchronous DRAMs (SDRAMs)

Timing diagram for a read on a synchronous DRAM.

← Read-Only Memories:
← Read-only memories (ROMs) are preprogrammed with fixed data.
← factory-programmed ROM (sometimes called mask-programmed ROM) and field-pro-
grammable ROM.
 ←
←
←
←
←
←
←
←
←
←
←
←
←
←
← Field-programmable ROMs, on the other hand, can be programmed in the lab. Flash
memory is the dominant form of field-programmable ROM and is electrically erasable.
←
← A common application is to keep the boot-up code in a protected block but allow updates
to other memory blocks on the device. As a result, this form of flash is commonly known
as boot-block flash.
←
3.How would you describe the IO devices used in embedded systems? (Nov/Dec’12)
Timers and Counters:
← Timers and counters are distinguished from one another largely by their use, not their
logic. Both are built from adder logic with registers to hold the current value, with an in-
crement input that adds one to the current register value.
 Internals of a counter/timer.

A watchdog timer is an I/O device that is used for internal operation of a system

watchdog timer
A/D and D/A Converters
← Analog/digital conversion requires sampling the analog input before converting it to digi-
tal form. A control signal causes the A/D converter to take a sample and digitize it.
←
← D/A conversion is relatively simple, so the D/A converter interface generally includes
only the data value. The input value is continuously converted to analog form.
LEDs

Displays
← A single-digit display typically consists of seven segments; each segment may be either
an LED or a liquid crystal display (LCD) element.
←

An n-digit display.
← A frame buffer is a RAM that is attached to the system bus
← The pixels in the frame buffer are generally written to the display in raster order

Touchscreens
 ← Types of touch screens are resistive and capacitive.
← A resistive touch screen uses a two-dimensional voltmeter to sense position.
← The touch screen consists of two conductive sheets separated by spacer balls.

Cross section of a resistive touchscreen.

4. (i) Demonstrate how component interfacing is done? (Apr/May’14)

Memory Interfacing
construct a memory of a given width (32 bits, 64 bits, etc.) by placing RAMs in parallel.
Most busses won’t send address signals in row and column form.
Device Interfacing
Some I/O devices are designed to interface directly to a particular bus, forming glueless
interfaces. But glue logic is required when a device is connected to a bus for which it is not
designed.
(ii) Illustrate the development environment of an embedded system with suitable diagram?
A PC or workstation known as a host .
The hardware on which the code will finally run is known as the target.
The host and target are frequently connected by a USB link, but a higher-speed link such
as Ethernet can also be used
 Connecting a host and a target system.
The host should be able to do the following:
load programs into the target,
start and stop program execution on the target, and
examine memory and CPU registers.

5. With a suitable example, explain how debugging is carried out using debuggers & compliers?
(Apr/May’13)
The serial port found on most evaluation boards is one of the most important debugging tools.
Very important debugging tool is the breakpoint. Implementing breakpoints does not re-
quire using exceptions or external devices.
Debugging Challenges
Logical errors in software can be hard to track down, but errors in real-time code can cre-
ate problems that are even harder to diagnose.
Real-time programs are required to finish their work within a certain amount of time; if
they run too long, they can create very unexpected behavior.
The exact results of missing real-time deadlines depend on the detailed characteristics of
the I/O devices and the nature of the timing violation.
In-circuit emulators, logic analyzers, and even LEDs can be useful tools in checking the
execution time of real-time code to determine whether it in fact meets its deadline.

6. (i) With an example explain how Logic analyzer, In circuit Emulator and Co simulator are
used as debugging tools
In-circuit emulator used to debug the software of an embedded system
The programmer uses the emulator to load programs into the embedded system, run
them, step through them slowly, and view and change data used by the system's software.
The ICE allows the software element to be run and tested on the hardware on which it is
to run, but still allows programmer conveniences to help isolate faulty code, such as source-level
debugging
A logic analyzer can monitor busses and high speed digital lines.
O High speed
O Useful for designs with an external memory bus
O Can utilize a bus disassembler
The advantage of a logic analyzer is that it
•can run at full speed tracking the application.
•With an external memory bus, the analyzer can trace program flow in its trace buffer.
•Some analyzers have software disassembly tools that decipher the bus activity and create
a log of instructions, register reads and writes, and time stamps.
The drawbacks for the Logic Analyzer are that
•it is expensive,
•cannot set breakpoints and
 •requires quite a bit of set up.
Co-Simulator
• Functional (untimed) simulation allows one to:
– check functional (partial) correctness, by generating inputs and observing outputs
– debug the design, by easy access to internal states
• High-level (timed) co-simulation allows one to check:
– feasibility analysis for specification
– hardware/software partitioning
– architecture selection (CPU, scheduler, ...)
• Cannot be used to validate the final implementation
– need a much more detailed model of HW and SW architecture

(ii) Compose model of programs and Program design? (Apr/May’13)

Model of programs
Data Flow Graphs:
A data flow graph is a model of a program with no conditionals. In a high-level
programming language, a code segment with no conditionals
w= a+b;
x = a-c;
y = x+d;
x = a+c;
z = y+e;
A basic block in C
w = a+b;
x = a-c;
y = x1+d;
x2= a+c;
z = y+e;
The basic block in single-assignment form.
 An extended data flow graph for our sample basic block.
Program design
Components for Embedded Programs:
The state machine, the circular buffer, and the queue. State machines are well suited to
reactive systems such as user interfaces; circular buffers and queues are useful in digital signal
processing.
State Machines
a finite-state machine style of describing the reactive system’s behavior.

Stream-Oriented Programming and Circular Buffers

7. (i) Discuss briefly about Assembly and Linking.(Nov/Dec’13)

Program generation from compilation through loading.

 The assembler’s job is to translate symbolic assembly language statements into bit-
level representations of instructions known as object code.
The program may be built from many files, the final steps in determining the
addresses of instructions and data are performed by the linker, which produces an executable
binary file.
The program that brings the program into memory for execution is called a loader.
Assemblers
The first pass scans the code to determine the address of each label.
The second pass assembles the instructions using the label values computed in the first pass.
The name of each symbol and its address is stored in a symbol table that is built during the
first pass. The symbol table is built by scanning from the first instruction to the last.

Symbol table processing during assembly.

Linking:
A linker allows a program to be stitched together out of several smaller pieces.
The linker operates on the object files created by the assembler and modifies the assembled
code to make the necessary links between files.
The place in the file where a label is defined is known as an entry point.
The place in the file where the label is used is called an external reference.

External references and entry points.

(ii)What are program Validation and testing? (Apr/May ‘13)

 Black-box methods generate tests without looking at the internal structure of the program.
Clear-box (also known as white-box) methods generate tests based on the program structure.
Clear-box
Provide the program with inputs that exercise the test we are interested in.
Execute the program to perform the test.
Examine the outputs to determine whether the test was successful.
Black-Box Testing:
Black-box tests are generated without knowledge of the code being tested..
Random tests form one category of black-box test. Random values are generated with a
given distribution.
The expected values are computed independently of the system, and then the test inputs
are applied.

Regression tests form an extremely important category of tests. When tests are created
during earlier stages in the system design or for previous versions of the system, those tests
should be saved to apply to the later versions of the system.

8. (i) Describe about Basic compilation techniques (Apr/May ‘14’15)

The high-level language program is parsed to break it into statements and expressions.
Some compilers may then perform higher-level optimizations that can be viewed as
modifying the high-level language program input without reference to instructions.

The compilation process.

Instruction-level optimizations are aimed at generating code.

They may work directly on real instructions or on a pseudo-instruction format that is
later mapped onto the instructions of the target CPU.
This level of optimization also helps modularize the compiler by allowing code
generation to create simpler code that is later optimized.
(ii) Explain the debugging process (Apr/May ‘14)
The serial port found on most evaluation boards is one of the most important debugging tools.
Very important debugging tool is the breakpoint. Implementing breakpoints does not re-
quire using exceptions or external devices.
Debugging Challenges
Logical errors in software can be hard to track down, but errors in real-time code can cre-
ate problems that are even harder to diagnose.
Real-time programs are required to finish their work within a certain amount of time; if
they run too long, they can create very unexpected behavior.
The exact results of missing real-time deadlines depend on the detailed characteristics of
the I/O devices and the nature of the timing violation.
In-circuit emulators, logic analyzers, and even LEDs can be useful tools in checking the
execution time of real-time code to determine whether it in fact meets its deadline.

9. (i) Show in detail about the Program level energy, power analysis and optimization
The memory footprint of a program is determined by the size of its data and instructions. Both must be
considered to minimize program size.
Data provide an excellent opportunity for minimizing size because the data are most highly de-
pendent on programming style.

Buffers should be sized carefully rather than defining a data array to a large size that the pro-
gram will never attain.

Data buffers can often be reused at several different points in the program.

Minimizing the size of the instruction text of a program requires a mix of high-level program
transformations and careful instruction selection.

Architectures that have variable-size instruction lengths are coding to minimize program size,
which may require assembly language coding of key program segments.

(ii) Write about clear box testing?

Clear-box
The control/data flow graph extracted from a program’s source code is an important tool
in developing clear-box tests for the program.
In order to execute and evaluate these tests, we must be able to control variables in the
program and observe the results of computations, much as in manufacturing testing.
Need to modify the program to make it more testable. By adding new inputs and
outputs, we can usually substantially reduce the effort required to find and execute the test.
Provide the program with inputs that exercise the test we are interested in.
 Execute the program to perform the test.
Examine the outputs to determine whether the test was successful.

10.(i) Describe need for ICE, JTAG for embedded system development. (Apr/May’15)
In-circuit emulator used to debug the software of an embedded system
The programmer uses the emulator to load programs into the embedded system, run
them, step through them slowly, and view and change data used by the system's software.
The ICE allows the software element to be run and tested on the hardware on which it is
to run, but still allows programmer conveniences to help isolate faulty code, such as source-level
debugging
An advanced multi-core JTAG development tool used for testing, programming and
debugging of embedded systems.
It connects to any host system via a USB or an Ethernet port.
The connection to the Target system is achieved using the target JTAG port.
A custom developed controller, JTAGJet Engine, is used to facilitate the JTAG port
functions

(ii) What is the advantage of vectored addressing of stack?

 Instead of pipelining just the instructions, they also pipeline the data itself.
 Instead of constantly having to decode instructions and then fetch the data needed
to complete them, the processor reads a single instruction from memory,
 And it is simply implied in the definition of the instruction itself that the
instruction will operate again on another item of data, at an address one increment
larger than the last. This allows for significant savings in decoding time.