MI

Winter 2021
Q-1 (b) explain pins of 8o85 microprocessor.

Q-2(a) Differnetiate 8085 and 8086 microprocessor.

8085 microprocessor 8086 microprocessor

The data bus is 8 bits. The data bus is 16 bits.

The address bus is 16 bits. The address bus is 20 bits.

The memory capacity is 64 KB. Also,

8085 Can Perform Operation Up to The memory capacity is 1 MB. Also,
2 i.e. 256 numbers. A number greater
8
8086 Can Perform operations up to
than this is to be taken multiple times 216 i.e. 65,536 numbers.
in an 8-bit data bus.

The input/output port addresses are 8 The input/output port addresses are
bits. 16 bits.

The operating frequency is 5 MHz, 8

The operating frequency is 3.2 MHz.
MHz, and 10 MHz.
 8085 microprocessor 8086 microprocessor

8086 MP has Two Modes Of

Operation. 1. Minimum Mode =
8085 MP has a Single Mode Of
Single CPU PROCESSOR 2.
Operation.
Maximum Mode = Multiple CPU
PROCESSOR.

It does not have multiplication and It has multiplication and division

division instructions. instructions.

It supports pipe-lining as it has two

It does not support pipelining. independent units Execution Unit
(EU) and Bus Interface Unit (BIU).

It does not support an instruction

It supports an instruction queue.
queue.

Memory space is not segmented. Memory space is segmented.

It consists of 9 flags(Overflow Flag,

It consists of 5 flags(Sign Flag, Zero Direction Flag, Interrupt Flag, Trap
Flag, Auxiliary Carry Flag, Parity Flag, Flag, Sign Flag, Zero Flag, Auxiliary
and Carry Flag). Carry Flag, Parity Flag, and Carry
Flag).

It is a comparatively High-cost
It is a low-cost Microprocessor
Microprocessor.

Q-2(b) Draw timing diagram of MOV M,D.

Q-2(c) Write an 8085 assembly language program to
arrange the following numbers in ascending order: 29H,
47H, 06H, 03H, 17H.
Q-2(c) Write an 8085 assembly language program to
arrange the following numbers in descending order: 29H,
47H, 06H, 03H, 17H.
Q-3(a)Explain subroutine with example
Q-3(b) explain following instruction with no of bytes,
machine cycles and T-states required for execution:
(i) SHLD
The SHLD instruction is used in assembly language programming for certain
microprocessors, including the Intel 8080 and its derivatives. Here's an explanation
along with the associated machine cycles and T states required for its execution:
 1. Function: SHLD stands for "Store H and L Direct." This instruction is used to store
the contents of the H and L registers (16-bit data) into a specific memory address.
The address where the data is stored is specified by the operand following the
instruction. After execution, the contents of the H register are stored in the
memory location specified by the operand, and the contents of the L register are
stored in the next memory location.
2. Number of Bytes: The SHLD instruction typically takes 3 bytes of memory to
store the opcode and the 16-bit address operand.
3. Machine Cycles: The number of machine cycles required for execution of the
SHLD instruction depends on the specific processor and its clock speed. In
general, the SHLD instruction typically takes 16 machine cycles to execute.
4. T States (Timing States): Timing states represent the smallest unit of time in the
processor's execution cycle. The number of T states required for the SHLD
instruction also varies depending on the processor. For example, in the Intel 8080
microprocessor, the SHLD instruction typically takes 16 T states to execute.

So, to summarize:

• Number of Bytes: 3 bytes

• Machine Cycles: 16 cycles
• T States: Typically 16 T states

Again, please note that these values can vary depending on the specific microprocessor
architecture and clock speed. Always refer to the processor's datasheet or technical
documentation for precise timing information.

(ii) RAL
RAL stands for Rotate Accumulator Left through Carry. It is an
instruction used in assembly language programming for certain
microprocessors, particularly those from the Intel 8080 family.

Here's a breakdown of what RAL does and the associated machine

cycles and T states required for its execution:
1. **Function**: RAL instruction rotates the bits in the accumulator
register to the left (towards higher bit positions) through the carry
flag. The bit that gets shifted out of the most significant bit position
is placed into the carry flag, and the previous value of the carry flag
is shifted into the least significant bit position of the accumulator.

2. **Number of Bytes**: The RAL instruction typically takes 1 byte

of memory to store the opcode.

3. **Machine Cycles**: The number of machine cycles required for

execution of the RAL instruction depends on the specific processor
and its clock speed. In general, the RAL instruction typically takes 1
machine cycle to execute.

4. **T States (Timing States)**: Timing states represent the

smallest unit of time in the processor's execution cycle. The number
of T states required for the RAL instruction also varies depending on
the processor. For example, in the Intel 8080 microprocessor, RAL
instruction typically takes 4 T states to execute.

So, to summarize:

- **Number of Bytes**: 1 byte

- **Machine Cycles**: 1 cycle

- **T States**: Typically 4 T states

Please note that these values can vary depending on the specific
microprocessor architecture and clock speed. Always refer to the
processor's datasheet or technical documentation for precise timing
information.

Q-3(c) ten 8 bit values are stored from memory

location 5000H onwards write an 8085 assembly
language program to add POSITIVE values or
addresses starts from 5100H and NEGATIVE values
on addresses starts from 5200H
ORG 0000H ; Start of program

LXI H, 5100H ; Load HL with the starting address for positive

values (5100H)

LXI D, 5200H ; Load DE with the starting address for negative

values (5200H)

MVI C, 0AH ; Initialize loop counter with the total number of

values (10)

NEXT: MOV A, M ; Load positive value into accumulator from

memory

CPI 80H ; Check if the value is positive (80H is the most

significant bit for a signed 8-bit value)
 JNC ADD_POS ; Jump to ADD_POS if positive

INX D ; Move to next memory location for negative value

DCR C ; Decrement the loop counter

JNZ NEXT ; Jump back to NEXT if loop counter is not zero

JMP END_PROG ; Jump to END_PROG if all values are

processed

ADD_POS:ADD M ; Add positive value to accumulator

INX H ; Move to next memory location for positive value

DCR C ; Decrement the loop counter

JNZ NEXT ; Jump back to NEXT if loop counter is not zero

JMP END_PROG ; Jump to END_PROG if all values are

processed

END_PROG:MOV M, A ; Store the result in memory location 5300H

HLT ; Halt the program execution

END ; End of program

• The program starts by loading the HL register pair with the starting address for
positive values (5100H) and the DE register pair with the starting address for
negative values (5200H).
• It then initializes the loop counter using register C with the value 0AH,
representing the total number of values to be processed.
• The program iterates through each memory location, checking if the value is
positive or negative based on the most significant bit (MSB). If it's positive, it
adds the value to the accumulator. If it's negative, it skips to the next memory
location.
• After processing all values, the result is stored in memory location 5300H.
• Finally, the program halts its execution.

Q-3 (a) what is interrupt? List hardware interrupt

8085
Q-3(b) explain following instructions with number of
bytes machine cycles and T States required for
execution

(i) CALL
The CALL instruction is used in assembly language programming to implement
subroutines or functions. It is typically found in microprocessor architectures like the
Intel 8085. The CALL instruction is used to transfer control from the main program to a
subroutine or a specific memory address. After executing the subroutine, the control is
transferred back to the instruction following the CALL instruction.

Here's an explanation of the CALL instruction along with the associated machine cycles
and T states required for its execution:

1. Function: CALL instruction is used to transfer control to a subroutine or a specific

memory address. It works by pushing the address of the next instruction onto the
stack (usually the address immediately following the CALL instruction) and then
jumping to the specified address.
2. Number of Bytes: The CALL instruction typically takes 3 bytes of memory to
store the opcode and the 16-bit address operand.
3. Machine Cycles: The number of machine cycles required for execution of the
CALL instruction depends on the specific processor and its clock speed. In
general, the CALL instruction typically takes 6 machine cycles to execute.
4. T States (Timing States): Timing states represent the smallest unit of time in the
processor's execution cycle. The number of T states required for the CALL
 instruction also varies depending on the processor. For example, in the Intel 8085
microprocessor, the CALL instruction typically takes 18 T states to execute.

So, to summarize:

• Number of Bytes: 3 bytes

• Machine Cycles: 6 cycles
• T States: Typically 18 T states

Please note that these values can vary depending on the specific microprocessor
architecture and clock speed. Always refer to the processor's datasheet or technical
documentation for precise timing information.

(ii) CPI
The CPI (Compare Immediate) instruction is used in assembly language programming to
compare the contents of the accumulator register with an immediate 8-bit data value. It
is commonly found in microprocessor architectures such as the Intel 8085.

Here's an explanation of the CPI instruction along with the associated machine cycles
and T states required for its execution:

1. Function: The CPI instruction compares the contents of the accumulator register
with an immediate 8-bit data value provided as part of the instruction. It sets or
clears various condition flags in the flag register based on the result of the
comparison. Commonly used flags include the zero flag (Z), carry flag (CY), and
sign flag (S).
2. Number of Bytes: The CPI instruction typically takes 2 bytes of memory to store
the opcode and the immediate 8-bit data value.
3. Machine Cycles: The number of machine cycles required for execution of the CPI
instruction depends on the specific processor and its clock speed. In general, the
CPI instruction typically takes 2 machine cycles to execute.
4. T States (Timing States): Timing states represent the smallest unit of time in the
processor's execution cycle. The number of T states required for the CPI
instruction also varies depending on the processor. For example, in the Intel 8085
microprocessor, the CPI instruction typically takes 7 T states to execute.

So, to summarize:
 • Number of Bytes: 2 bytes
• Machine Cycles: 2 cycles
• T States: Typically 7 T states

Please note that these values can vary depending on the specific microprocessor
architecture and clock speed. Always refer to the processor's datasheet or technical
documentation for precise timing information.

Q-3(c)Ten 8 bit values are stored from memory location

3000H onwards write an 8085 assembly language
program to find the largest value and stored in on the
location 4000H

LXI H, 3000H ; Load HL with the starting address (3000H)

MVI D, 00H ; Initialize register D to store the largest value

MVI E, 10H ; Initialize register E with the count of values (10)

MOV A, M ; Load first value into accumulator

INX H ; Move to next memory location

DCR E ; Decrement the counter

COMPARE:MOV B, M ; Move the next value into register B

CMP B ; Compare the value with the one stored in accumulator

JNC NOT_GREATER; If B is not greater than A, jump to

NOT_GREATER

MOV A, B ; Update accumulator with the greater value

NOT_GREATER:DCR E ; Decrement the counter

JNZ LOOP ; If E is not zero, continue looping

STORE: MOV M, A ; Store the largest value in memory location

4000H

HLT ; Halt the program execution

LOOP: INX H ; Move to the next memory location

MOV A, M ; Load the value into the accumulator

DCR E ; Decrement the counter

JNZ COMPARE ; If E is not zero, compare the next value

JMP STORE ; If all values are compared, store the largest value

END ; End of program

• The program starts by loading the HL register pair with the starting address (3000H)
where the values are stored.
• It initializes registers D and E. Register D will hold the largest value found, and register E
will serve as a loop counter.
• The program then loads the first value into the accumulator and increments the memory
pointer.
• It enters a loop where it compares each subsequent value with the one stored in the
accumulator. If a value is greater, it updates the accumulator with that value.
• After comparing all values, it stores the largest value found in memory location 4000H.
• Finally, the program halts its execution.

Q-4(a) What will be the value in accumulator, for the

given 8085 program below?
MVI C,7FH
MVI B, 3EH
MOV A, B
RLC
RLC
ANI 7FH
HLT
To determine the final value in the accumulator after executing the
given 8085 program, let's break down each instruction:

1. `MVI C, 7FH`: This instruction loads the value 7FH (0111 1111 in
binary) into register C.

2. `MVI B, 3EH`: This instruction loads the value 3EH (0011 1110 in
binary) into register B.

3. `MOV A, B`: This instruction copies the contents of register B into

the accumulator.

- Accumulator (before): 0011 1110 (3EH)

4. `RLC`: This instruction rotates the contents of the accumulator left

through carry.

- Accumulator (after): 0111 1100 (7CH), Carry = 1

5. `RLC`: This instruction again rotates the contents of the accumulator

left through carry.
 - Accumulator (after): 1111 1001 (F9H), Carry = 1

6. `ANI 7FH`: This instruction performs a logical AND operation

between the accumulator and the immediate value 7FH (0111 1111 in
binary).

- Accumulator (after): 0111 1001 (79H)

7. `HLT`: This instruction halts the execution.

So, the final value in the accumulator after executing the program is
0111 1001 (79H).

Q-4(b) Consider the following 8085 assembly language

instructions:
LXI D, 1234H
NEXT: DCX D
MOV A, E
ORA D
JNZ NEXT
What amount of delay is generated if the crystal
frequency is 4 MHz?
To calculate the delay generated by the given 8085 assembly language
instructions, we need to consider the number of clock cycles each
instruction takes to execute and then convert that into time using the
crystal frequency.

Let's break down the instructions:

1. `LXI D, 1234H`: This instruction loads the 16-bit immediate value

1234H into register pair D.

- Clock cycles: 10

2. `NEXT: DCX D`: This instruction decrements register pair D.

- Clock cycles: 6

3. `MOV A, E`: This instruction copies the contents of register E into

the accumulator.

- Clock cycles: 5

4. `ORA D`: This instruction performs a logical OR operation between

the accumulator and the contents of register D.

- Clock cycles: 4

5. `JNZ NEXT`: This instruction jumps to the label NEXT if the Zero
flag is not set.

- Clock cycles: 10 (if jump occurs), 7 (if jump does not occur)
Now, let's calculate the total delay:

- The loop consists of instructions 2, 3, and 4, which take 6 + 5 + 4 = 15

clock cycles.

- If the jump occurs (meaning the Zero flag is not set), it will take an
additional 10 clock cycles.

- If the jump does not occur (meaning the Zero flag is set), it will take
an additional 7 clock cycles.

Given a crystal frequency of 4 MHz, the duration of each clock cycle is

1/4x106 seconds.

So, the delay generated will be:

- For the loop without the jump: 15x1/4x106 seconds

- For the loop with the jump:(15 + 10)x1/4x106 seconds

You can calculate these values to get the delay in seconds or you can
convert it to other time units based on your requirements.

Q-4(a) What will be the value in accumulator, for the

given 8085 program below?
MVI A, 07H
RLC
MOV B,A
RLC
RLC
RLC
ORA B
HLT
Let's go through each instruction step by step:

1. `MVI A, 07H`: This instruction loads the immediate value 07H into
the accumulator.

- Accumulator (before): 0000 0111 (07H)

2. `RLC`: This instruction rotates the contents of the accumulator left

through carry.

- Accumulator (after): 0000 1110 (0EH), Carry = 0

3. `MOV B, A`: This instruction copies the contents of the accumulator

into register B.

- Register B: 0000 1110 (0EH)

4. `RLC`: This instruction rotates the contents of the accumulator left
through carry.

- Accumulator (after): 0001 1100 (1CH), Carry = 0

5. `RLC`: This instruction rotates the contents of the accumulator left

through carry.

- Accumulator (after): 0011 1000 (38H), Carry = 0

6. `RLC`: This instruction rotates the contents of the accumulator left

through carry.

- Accumulator (after): 0111 0000 (70H), Carry = 0

7. `ORA B`: This instruction performs a logical OR operation between

the accumulator and the contents of register B.

- Accumulator (after): 0111 1110 (7EH)

8. `HLT`: This instruction halts the execution.

So, the final value in the accumulator after executing the program is
0111 1110 (7EH).
Q-4(b) Write an 8085 assembly language program to
convert a two-digit BCD number into its equivalent
hexadecimal number.
MVI A, 00H ; Initialize accumulator to store the converted
hexadecimal number

MOV B, A ; Initialize register B to store tens place

MOV C, A ; Initialize register C to store units place

; Input: Load the two-digit BCD number into register pair DE

; (Assuming the BCD number is already stored in memory location

8000H)

LXI D, 8000H ; Load the memory address where the BCD number
is stored

MOV A, M ; Load the tens place BCD digit into accumulator

ANI 0FH ; Mask out the upper nibble (tens place)

MOV B, A ; Store the tens place BCD digit in register B

INX D ; Move to the next memory location (units place)

MOV A, M ; Load the units place BCD digit into accumulator

ANI 0FH ; Mask out the upper nibble (units place)

MOV C, A ; Store the units place BCD digit in register C

; Convert tens place BCD digit to hexadecimal

MOV A, B ; Load tens place BCD digit into accumulator

 ADD 06H ; Add 6 to each BCD digit greater than or equal to
10

DAA ; Adjust accumulator to correct BCD representation

MOV B, A ; Store the converted tens place digit in register B

; Convert units place BCD digit to hexadecimal

MOV A, C ; Load units place BCD digit into accumulator

ADD 06H ; Add 6 to each BCD digit greater than or equal to

10

DAA ; Adjust accumulator to correct BCD representation

MOV C, A ; Store the converted units place digit in register C

; Combine the converted tens and units place digits to form the
hexadecimal number

MOV A, B ; Move tens place digit to accumulator

DAD C ; Add units place digit to the accumulator

MOV B, A ; Store the combined hexadecimal number in register

B

; Output: Store the hexadecimal number in memory location 8002H

LXI D, 8002H ; Load the memory address where the hexadecimal

number will be stored

MOV M, B ; Store the hexadecimal number in memory

 HLT ; Halt the execution
This program assumes that the two-digit BCD number is stored in memory locations
8000H (tens place) and 8001H (units place), and it stores the converted hexadecimal
number in memory location 8002H. Adjust memory addresses as needed based on
your specific requirements.

Q-4(c) Define the followings: Machine Cycle, T-state,

JC, CMP, RET, SBB, STC
1. **Machine Cycle**:

- In the context of microprocessors, a machine cycle refers to the

time required to complete one basic operation such as memory read or
write, I/O read or write, or execution of an instruction. It consists of a
series of clock cycles and is the fundamental unit of time measurement
in the execution of instructions by a microprocessor.

2. **T-state**:

- A T-state, or timing state, is the basic unit of time in a

microprocessor's operation. It corresponds to one clock cycle. Each
machine cycle consists of several T-states. T-states are used to
measure the duration of operations within the microprocessor.

3. **JC**:

- JC stands for "Jump if Carry." It's a conditional jump instruction

used in assembly language programming. It checks the Carry flag (CF)
and transfers control to a specified address if the Carry flag is set (i.e.,
if the last arithmetic operation resulted in a carry).

4. **CMP**:

- CMP stands for "Compare." It's an arithmetic instruction used in

assembly language programming to compare the contents of two
operands without altering them. Typically, it subtracts the second
operand from the first and updates the flags register accordingly, but
it doesn't store the result. It's often used in conjunction with
conditional jump instructions for decision-making.

5. **RET**:

- RET stands for "Return." It's an instruction used in assembly

language programming to return from a subroutine or a function call. It
transfers program control back to the instruction following the
subroutine call. It's often used at the end of subroutines to return to
the main program.

6. **SBB**:

- SBB stands for "Subtract with Borrow." It's an arithmetic

instruction used in assembly language programming to subtract the
contents of the second operand from the first operand along with the
value of the Carry flag (CF) and store the result in the first operand.
It's useful for multi-byte subtraction operations where borrowing may
occur from higher-order bytes.

7. **STC**:

- STC stands for "Set Carry." It's an instruction used in assembly

language programming to set the Carry flag (CF) in the flags register to
1. It's often used to prepare for subsequent arithmetic operations,
especially when performing multi-byte addition or subtraction
operations.
 Summer-22

Q-1(b)(1)Explains pins 8085: INTR

The Interrupt Request (INTR) pin is used to request the microprocessor
to stop its current operation and service an interrupt request from an
external device.

Q-2(a) Explain the following instructions 1. LHLD 3.

DAA
1. **LHLD (Load H and L Direct)**:

- LHLD is an instruction used in the 8085 assembly language to load a

16-bit memory address into the HL register pair directly.

- Syntax: LHLD address

- Example: LHLD 2000H

- Functionality: This instruction loads the contents of the memory

location specified by the 16-bit address into the HL register pair. It
takes four machine cycles to execute.

3. **DAA (Decimal Adjust Accumulator)**:

- DAA is an instruction used in the 8085 assembly language to adjust

the contents of the accumulator to form two valid packed decimal digits
after an addition operation in BCD (Binary Coded Decimal) arithmetic.
 - Syntax: DAA

- Functionality: This instruction adjusts the contents of the

accumulator after an addition operation to ensure that the result is in
BCD format. It corrects the binary result in the accumulator to
represent a valid BCD digit if necessary. It takes one machine cycle to
execute.

Q-2(b) Explain demultiplexing of data and address bus

of 8085.
Q-3(a) Explain the concept of stack.
Q-3(b) Write an 8085 program to copy block of ten
numbers starting from location 2050h to locations
starting from 3050h.
LXI H, 2050H ; Load source address (2050h) into HL register pair

LXI D, 3050H ; Load destination address (3050h) into DE register

pair

MVI C, 0AH ; Load counter with value 10 (number of elements to

copy)

COPY_LOOP:

MOV A, M ; Load the content of memory location pointed by HL

into accumulator
 MOV M, A ; Store the content of accumulator into memory
location pointed by DE

INX H ; Increment source address

INX D ; Increment destination address

DCR C ; Decrement counter

JNZ COPY_LOOP ; Jump back to COPY_LOOP if counter is not zero

HLT ; Halt the program

Q-4(a) State the difference between PUSH and POP

instruction
In assembly language programming, PUSH and POP are instructions
commonly used for managing data on the hardware stack. Here's the
difference between them:

1. **PUSH**: The PUSH instruction is used to add data onto the stack.
It first decrements the stack pointer (ESP in x86 architecture) to
reserve space for the new data, and then copies the specified data onto
the stack. In other words, PUSH "pushes" a value onto the stack.

2. **POP**: The POP instruction, on the other hand, is used to retrieve

data from the stack. It copies the value from the top of the stack to
the specified destination operand and then increments the stack
pointer. This effectively "pops" the topmost value from the stack.
In summary, PUSH adds data onto the stack, while POP retrieves data
from the stack. They are complementary instructions often used
together in stack-based operations.

Q-4(b) Explain the generation of control signals in 8085.

Q-4(b) Explain 8085 bus organization

Q-4(c) Write a program to count continuously in

hexadecimal from FFH to 00H in a system with a clock
period of 0.5 μs. Use register C to set up 1 millisecond
delay between each count and display the number at the
output port1.

ORG 0000H ; Start of program memory

MOV C, 0A0H ; Initialize the count to FFH

OUT 01H, C ; Output the initial count

LOOP:

MOV A, C ; Move the count to accumulator A

INC A ; Increment the count

CJNE A, 0, SKIP ; If not overflow, skip next instruction

MOV A, 0A0H ; Reset count to FFH if overflow

SKIP:

MOV C, A ; Move the updated count back to register C

DELAY:

MOV R7, #150 ; 1 ms delay counter (150 cycles for 1 ms delay)

DELAY_LOOP:

DJNZ R7, DELAY_LOOP ; Decrement delay counter

SJMP LOOP ; Jump back to the main loop

END ; End of program

```

This program continuously counts in hexadecimal from FFH to 00H with

a 1 millisecond delay between each count. It uses register C to hold the
count and output the count to port 1. The delay loop is set up to provide
a delay of approximately 1 millisecond based on a clock period of 0.5 μs.
You may need to adjust the delay loop count depending on the specific
clock frequency of your microcontroller.

Q-5(a) How many memory locations can be addressed by

microprocessor with 14 address lines? Also specify how
many address lines are required for 2KB memory.
The number of memory locations that can be addressed by a
microprocessor with n address lines is given by 2n.

1. For a microprocessor with 14 address lines:

214 = 16,384 memory locations can be addressed.

2. To address a 2KB memory (where 1 KB = 1024 bytes):

211 = 2048 memory locations are required because 2KB is equal to 211
bytes.

Therefore, 11 address lines are required to address a 2KB memory.

Q-5(b) Load the hexadecimal numbers 56H and A9H in
registers D and E respectively and add them. If sum is
greater than FFH, display 01H at output PORT0;
otherwise display sum.

ORG 0000H ; Start of program memory

MOV D, 056H ; Load hexadecimal number 56H into register D

MOV E, 0A9H ; Load hexadecimal number A9H into register E

ADD D, E ; Add the contents of registers D and E

MOV A, D ; Move the result to accumulator A

CJNE A, 0FFH, DISPLAY_SUM ; Compare with FFH

MOV A, #01H ; If sum is greater than FFH, load 01H into accumulator
A

JMP OUTPUT ; Jump to output

DISPLAY_SUM:

MOV A, D ; Move the sum to accumulator A

OUTPUT:

OUT 00H, A ; Output the result to PORT0

END ; End of program

```

This program loads the hexadecimal numbers 56H and A9H into
registers D and E, respectively. Then, it adds them together. If the sum
is greater than FFH, it outputs 01H to PORT0; otherwise, it outputs the
sum.

Q-5(a) Explain the given pins of 8086. 1. ALE 2. DEN

3.MN/MX

1. **ALE (Address Latch Enable)**:

- ALE is an output signal generated by the microprocessor during the

first clock cycle of a machine cycle.

- It indicates the availability of valid address information on the

address bus.

- ALE is used to latch the address present on the address bus into
external latches, such as those used by memory or I/O devices.

- It is typically used in conjunction with the 8282 latch IC or similar

components.
2. **DEN (Data Enable)**:

- DEN is an output signal generated by the microprocessor during the

second clock cycle of a machine cycle.

- It indicates the availability of valid data on the data bus.

- DEN is used to enable the data buffers or latches connected to the

data bus.

- It ensures that the data is stable and can be read by external devices
connected to the microprocessor.

3. **MN/MX (Minimum/Maximum Mode)**:

- MN/MX is an input signal used to select the operating mode of the

microprocessor.

- When MN/MX is HIGH, the microprocessor operates in Minimum

Mode.

- In Minimum Mode, the microprocessor communicates with external

devices directly through the address bus, data bus, and control bus.

- When MN/MX is LOW, the microprocessor operates in Maximum

Mode.

- In Maximum Mode, the microprocessor is interfaced with a

coprocessor, such as the 8087 floating-point coprocessor or other
coprocessors.

- Maximum Mode allows the microprocessor to work with multiple

coprocessors and provides more control signals for bus arbitration and
communication.
 - The selection of the mode is typically determined by the system
design and the presence of additional coprocessors.

Q-5(b) Explain the modes of operation of 8086

microprocessor.
The Intel 8086 microprocessor, a 16-bit processor introduced in 1978,
operates in two modes: Minimum Mode and Maximum Mode. These modes
dictate how the processor interacts with the system bus and other
peripherals. Let's delve into each mode:

1. **Minimum Mode**:

- In Minimum Mode, the 8086 processor communicates directly with

memory and I/O devices.

- Key features:

- Direct communication: The processor directly controls the address

bus, data bus, and control signals without any external assistance.

- Single master: The 8086 acts as the master on the bus, meaning it
initiates and controls all data transfers.

- Single processor: Only one processor is present in the system.

- Simplicity: Minimum Mode is simpler to implement compared to

Maximum Mode.

- Minimum Mode is typically used in simpler systems where only one

8086 processor is present, and there are no additional coprocessors.
2. **Maximum Mode**:

- In Maximum Mode, the 8086 processor is used in a multi-processor

configuration or with coprocessors.

- Key features:

- Coprocessor support: Maximum Mode provides additional signals and

features to support coprocessors like the 8087 for floating-point
arithmetic or other coprocessors for specialized tasks.

- Bus arbitration: Maximum Mode includes signals for bus arbitration

to handle multiple processors accessing the system bus.

- Enhanced control: Maximum Mode allows more control over the

system bus, enabling efficient communication between the processor and
other peripherals.

- More complex: Maximum Mode requires additional hardware

support and is more complex to implement compared to Minimum Mode.

- Maximum Mode is typically used in more complex systems where

multiple processors or coprocessors need to communicate efficiently,
such as in high-performance servers or workstations.

In summary, the choice between Minimum Mode and Maximum Mode

depends on the complexity of the system, the presence of additional
processors or coprocessors, and the requirements for bus arbitration
and communication.