Icc2lib 201706
Icc2lib 201706
Library Preparation
User Guide
Version M-2016.12-SP4, June 2017
Copyright Notice and Proprietary Information
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Copyright © 1998-2013 Free Software Foundation, Inc. This file is part of Bison, the GNU Compiler Compiler.
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Preamble
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Nothing in this License shall be construed as excluding or limiting any implied license or other defenses to infringement
that may otherwise be available to you under applicable patent law.
Each version is given a distinguishing version number. If the Program specifies that a certain numbered version of the
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published by the Free Software Foundation.
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Later license versions may give you additional or different permissions. However, no additional obligations are
imposed on any author or copyright holder as a result of your choosing to follow a later version.
15. Disclaimer of Warranty.
THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT
WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE
THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING,
BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.
SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
REPAIR OR CORRECTION.
To do so, attach the following notices to the program. It is safest to attach them to the start of each source file to most
effectively state the exclusion of warranty; and each file should have at least the "copyright" line and a pointer to where
the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software: you can redistribute it and/or modify it under the terms of the
GNU General Public License as published by the Free Software Foundation, either version 3 of
the License, or (at your option) any later version.
This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without
even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License along with this program. If
not, see <http://www.gnu.org/licenses/>.
Also add information on how to contact you by electronic and paper mail.
If the program does terminal interaction, make it output a short notice like this when it starts in an interactive mode:
<program> Copyright (C) <year> <name of author>
This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. This is free software,
and you are welcome to redistribute it under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate parts of the General Public License.
Of course, your program's commands might be different; for a GUI interface, you would use an "about box".
You should also get your employer (if you work as a programmer) or school, if any, to sign a "copyright disclaimer" for
the program, if necessary. For more information on this, and how to apply and follow the GNU GPL, see <http://
www.gnu.org/licenses/>.
The GNU General Public License does not permit incorporating your program into proprietary programs. If your
program is a subroutine library, you may consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General Public License instead of this License. But first,
please read <http://www.gnu.org/philosophy/why-not-lgpl.html>.
As a special exception, you may create a larger work that contains part or all of the Bison parser skeleton and
distribute that work under terms of your choice, so long as that work isn't itself a parser generator using the
skeleton or a modified version thereof as a parser skeleton. Alternatively, if you modify or redistribute the parser
skeleton itself, you may (at your option) remove this special exception, which will cause the skeleton and the
resulting Bison output files to be licensed under the GNU General Public License without this special exception.
This special exception was added by the Free Software Foundation in version 2.2 of Bison.
Flex 2.5.37
Project homepage: http://flex.sourceforge.net/
Project license:
Flex carries the copyright used for BSD software, slightly modified because it originated at the Lawrence Berkeley (not
Livermore!) Laboratory, which operates under a contract with the Department of Energy:
Copyright © 2001, 2002, 2003, 2004, 2005, 2006, 2007 The Flex Project.
Copyright © 1990, 1997 The Regents of the University of California.
All rights reserved. This code is derived from software contributed to Berkeley by Vern Paxson.
The United States Government has rights in this work pursuant to contract no. DE-AC03-76SF00098 between the
United States Department of Energy and the University of California.
THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE.
This basically says "do whatever you please with this software except remove this notice or take advantage of the
University's (or the flex authors') name".
Note that the "flex.skl" scanner skeleton carries no copyright notice.
You are free to do whatever you please with scanners generated using flex; for them, you are not even bound by the
above copyright.
THE ACCOMPANYING SOFTWARE PROGRAM IS PROVIDED UNDER THE TERMS AND CONDITIONS OF THIS
LICENSE AGREEMENT ("AGREEMENT"). PLEASE REVIEW THIS AGREEMENT CAREFULLY. ANY USE,
REPRODUCTION, MODIFICATION OR DISTRIBUTION OF THE PROGRAM CONSTITUTES ACCEPTANCE OF
THIS AGREEMENT. IF YOU ARE AGREEING TO THIS LICENSE ON BEHALF OF A COMPANY, YOU REPRESENT
THAT YOU ARE AUTHORIZED TO BIND THE COMPANY TO THIS AGREEMENT.
Cadence Design Systems, Inc. (“Cadence”) is licensing the software program (“Program”) provided hereunder under
an open source arrangement. The licensee hereunder may use, copy and modify the Program only pursuant to this
Agreement. While Cadence encourages any and all improvements or other modifications made to the Program to be
contributed to the community source and thereby made available to others under the same terms and conditions as
included in this Agreement, this is not required. However, any error corrections made to the Program must be
contributed to the community source.
1.1 "Contribution" means the submission of the Original Program by Cadence and the submission of any
modifications, improvements, additions, corrections or other changes to the Program, including source code,
object code, application program interface definitions and formats, and documentation, made by any Contributor
where such changes and/or additions to the Program originate from and are distributed by that particular
Contributor. Each Contributor acknowledges and agrees that no guarantee is provided that a Contribution shall be
included within the Program as distributed by any Recipient. A Contribution must be made by a Contributor if; (1)
such Contribution is an error correction to the Program, or (2) the Contributor commercially distributes the
Program with such Contribution, in which case the Contribution must be made within thirty (30) days of the
commercial distribution of the Program. “Commercially distributes” as used herein shall mean distribution of the
Program by a Contributor in consideration for revenue received. A Contribution 'originates' from a Contributor if it
was added to the Program by such Contributor itself or anyone acting on such Contributor's behalf. Contributions
do not include additions to the Program which: (i) are separate modules of software or data distributed in
conjunction with the Program under their own license agreement, and (ii) are not derivative works of the Program.
1.2 "Contributor" means Cadence and any other entity that distributes the Program.
1.3 "Licensed Patents" mean patent claims licensable by any Contributor which are necessarily infringed by the use or
sale of its Contribution alone or when combined with the Program.
1.4 "Original Program" means the original version of the software accompanying this Agreement as released by
Cadence, including source code, object code, application program interface definitions and formats, and
documentation, if any.
1.5 "Program" means the Original Program and Contributions.
1.6 "Recipient" means anyone who receives the Program under this Agreement, including all Contributors.
2. GRANT OF RIGHTS
2.1 Subject to the terms and conditions of this Agreement, each Contributor hereby grants each Recipient a non-
exclusive, worldwide, royalty-free copyright license to reproduce, prepare derivative works of, publicly display,
publicly perform, distribute and sublicense the Contribution of such Contributor, in source code and object code
format.
2.2 Subject to the terms and conditions of this Agreement, each Contributor hereby grants each Recipient a non-
exclusive, worldwide, royalty-free patent license under Licensed Patents to make, use, sell, offer to sell, import
and otherwise transfer the Contribution of such Contributor, if any, in source code and object code format along
with any documentation. This patent license shall apply to the combination of the Contribution and the Program if,
at the time the Contribution is added by the Contributor, such addition of the Contribution causes such
combination to be covered by the Licensed Patents. The patent license shall not apply to any other combinations
which include the Contribution.
2.3 Subject to the terms and conditions of this Agreement, Cadence hereby grants each Recipient a non-exclusive,
worldwide, royalty-free trademark license, to use the Cadence trademarks “LEF”, or “DEF”, in accordance with
Cadence’s marking policies, in connection with the license grants hereunder provided, however, that use of the
Cadence trademarks in connection with Recipient’s distribution of the Program is only permitted for the unmodified
Program.
2.4 Recipient understands that although each Contributor grants the licenses to its Contributions set forth herein, no
assurances are provided by any Contributor that the Program does not infringe the patent or other intellectual
property rights of any other entity. Each Contributor disclaims any liability to Recipient for claims brought by any
other entity based on infringement of intellectual property rights or otherwise. As a condition to exercising the
rights and licenses granted hereunder, each Recipient hereby assumes sole responsibility to secure any other
intellectual property rights needed, if any. For example, if a third party patent license is required to allow Recipient
to distribute the Program, it is Recipient's responsibility to acquire that license before distributing the Program.
2.5 Each Contributor represents that to its knowledge it has sufficient copyright rights in its Contribution, if any, to
grant the copyright license set forth in this Agreement. Except as expressly stated in Sections 2.1, 2.2 and 2.3
above, Recipient receives no rights or licenses to the intellectual property of any Contributor under this
Agreement, whether expressly, by implication, estoppel or otherwise. All rights in the Program not expressly
granted under this Agreement are reserved.
3.1 A Contributor may choose to distribute the Program in object code form under its own license agreement, provided
that: (a) it complies with the terms and conditions of this Agreement; and (b) the terms and conditions of its license
agreement: (i) effectively disclaims on behalf of all Contributors all warranties and conditions, express and implied,
including warranties or conditions of title and non-infringement, and implied warranties or conditions of
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mcpp 2.7.2
Project homepage: http://sourceforge.net/projects/mcpp/
Project license:
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To do so, attach the following notices to the program. It is safest to attach them to the start of each source file to most
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Copyright (C) <year> <name of author>
This program is free software; you can redistribute it and/or modify it under the terms of the
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This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without
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Also add information on how to contact you by electronic and paper mail.
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The hypothetical commands `show w' and `show c' should show the appropriate parts of the General Public License.
Of course, the commands you use may be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your school, if any, to sign a "copyright disclaimer"
for the program, if necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program Gnomovision' (which makes
passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
Runtime Exception:
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be covered by the GNU General Public License.
TCL/TK 8.5.12
Project homepage: https://www.tcl.tk/
Project license: https://www.tcl.tk/software/tcltk/license.html
This software is copyrighted by the Regents of the University of California, Sun Microsystems, Inc., Scriptics
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zlib 12.5.3
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xxi
IC Compiler™ II
IC Compiler™ II Library
Library Preparation
Preparation User
User Guide
Guide Version M-2016.12-SP4
M-2016.12-SP4
Contents xxii
IC Compiler™ II Library Preparation User Guide Version M-2016.12-SP4
Chapter 1: Contents
Contents xxiii
1-xxiii
IC Compiler™ II
IC Compiler™ II Library
Library Preparation
Preparation User
User Guide
Guide Version M-2016.12-SP4
M-2016.12-SP4
Contents xxiv
IC Compiler™ II Library Preparation User Guide Version M-2016.12-SP4
Chapter 1: Contents
Contents xxv
1-xxv
IC Compiler™ II
IC Compiler™ II Library
Library Preparation
Preparation User
User Guide
Guide Version M-2016.12-SP4
M-2016.12-SP4
Contents xxvi
Preface
This preface includes the following topics:
• About This Guide
• Customer Support
xxvii
IC Compiler™ II
IC Compiler™ II Library
Library Preparation
Preparation User
User Guide
Guide Version M-2016.12-SP4
M-2016.12-SP4
Audience
This user guide is for engineers who use the IC Compiler II Library Manager tool to prepare
libraries for use with the IC Compiler II tool.
To use the IC Compiler II Library Manager tool, you need to be familiar with the following:
• Logical and physical design principles
• The Linux or UNIX operating system
• The tool command language (Tcl)
Related Publications
For additional information about the IC Compiler II Library Manager tool, see the
®
documentation on the Synopsys SolvNet online support site at the following address:
https://solvnet.synopsys.com/DocsOnWeb
You might also want to see the documentation for the following related Synopsys products:
• Library Compiler™
• IC Compiler™ II
Release Notes
Information about new features, enhancements, changes, known limitations, and resolved
Synopsys Technical Action Requests (STARs) is available in the IC Compiler II Release
Notes on the SolvNet site.
To see the IC Compiler II Release Notes,
1. Go to the SolvNet Download Center located at the following address:
https://solvnet.synopsys.com/DownloadCenter
2. Select IC Compiler II, and then select a release in the list that appears.
Preface
About This Guide xxviii
IC Compiler™ II Library Preparation User Guide Version M-2016.12-SP4
Conventions
The following conventions are used in Synopsys documentation.
Convention Description
Preface 1: Preface
Chapter
About This Guide 1-xxix
xxix
IC Compiler™ II
IC Compiler™ II Library
Library Preparation
Preparation User
User Guide
Guide Version M-2016.12-SP4
M-2016.12-SP4
Customer Support
Customer support is available through SolvNet online customer support and through
contacting the Synopsys Technical Support Center.
Accessing SolvNet
The SolvNet site includes a knowledge base of technical articles and answers to frequently
asked questions about Synopsys tools. The SolvNet site also gives you access to a wide
range of Synopsys online services including software downloads, documentation, and
technical support.
To access the SolvNet site, go to the following address:
https://solvnet.synopsys.com
If prompted, enter your user name and password. If you do not have a Synopsys user name
and password, follow the instructions to sign up for an account.
If you need help using the SolvNet site, click HELP in the top-right menu bar.
Preface
Customer Support xxx
1
Working With the IC Compiler II Library
Manager Tool 1
You use the IC Compiler II Library Manager tool to build a reference library for use with the
IC Compiler II implementation tool. To learn how to use the library manager, see the
following topics:
• Library Preparation Terminology
• Library Preparation Flow
• User Interfaces
• Entering icc2_lm_shell Commands
• Using Application Options
• Using Variables
• Viewing Man Pages
• Using Tcl Scripts
• Setup Files
• Using the Command Log File
1-1
IC Compiler™ II
IC Compiler™ II Library
Library Preparation
Preparation User
User Guide
Guide Version M-2016.12-SP4
M-2016.12-SP4
Reference Library
Reference libraries for the IC Compiler II tool use the new data model (NDM) format. These
reference libraries are unified libraries that contain the logical and physical information for a
specific technology and one or more of its library cells. Each library cell is represented as a
single object with multiple views that contain various types of information about the cell. A
library cell can have the following views:
• Timing view
The timing view contains the timing, power, and functional information for a cell. It should
contain timing and power information for all necessary characterization points (voltage
and temperature) for a given process setting. The data for each characterization point is
stored in a pane.
The IC Compiler II tool uses the timing view to perform static timing analysis, power
analysis, and optimization.
• Layout view
The layout view contains the physical shape information for a cell, not including
connectivity and pins.
The library manager uses the layout view to create the design view from GDSII or Open
Artwork System Interchange Standard (OASIS) source libraries, and the IC Compiler II
tool uses it for mask generation.
• Design view
The design view contains the physical shape information for a cell, including connectivity
and pins.
The library manager uses the design view to create the frame view.
• Frame view
The frame view contains the information needed to perform placement and routing, such
as the block boundary, pins, via regions, and routing blockages.
The IC Compiler II tool uses the frame view to perform placement and routing.
Figure 1-1 shows a conceptual view of a reference library. The views shown in green are the
views used by the IC Compiler II tool.
Figure 1-1 Conceptual View of a Reference Library
You create a reference library by loading the logical and physical models from the following
sources:
• The technology file
The technology file contains information about the routing layers and routing rules for a
specific technology.
The IC Compiler II tool uses the same technology file as the IC Compiler tool. For
information about the technology file syntax, see the Synopsys Technology File and
Routing Rules Reference Manual.
• The logic libraries
The source files for the logic libraries are Liberty libraries in compiled (.db) format. These
files contain the timing, power, and functionality information for the library cells (standard
cells or macro cells). Each file represents a characterization point for a specific process,
voltage, and temperature.
Note:
This book assumes that the logic libraries use the power and ground (PG) pin syntax.
For information about using older logic libraries that use the rail_connection
attribute to define the PG pin connections or do not define the PG pins, see Appendix
C, “Using Non-PG Logic Libraries.”
• The physical libraries
The source files for the physical libraries are Library Exchange Format (LEF) files, GDSII
files, OASIS files, existing reference libraries in NDM format, or the FRAM views
exported from the IC Compiler tool. These files contain the physical shape data for the
library cells.
• TLUPlus files (optional)
The TLUPlus files contain the RC coefficients for a specific technology. The TLUPlus
models enable accurate RC extraction results by including the effects of width, space,
density, and temperature on the resistance and capacitance.
You can store the TLUPlus information either in the reference library or in the design
library. For information about storing TLUPlus information in a design library, see the
IC Compiler II Implementation User Guide.
A reference library contains all of the required information, both logical and physical, for a
set of cells for a technology. The IC Compiler II tool does not directly use the source files
used to generate a reference library.
See Also
• Preparing Reference Libraries
Technology Library
A technology library is a reference library that contains only the information from the
technology file and TLUPlus files. It does not contain any library cells.
See Also
• Reference Library
Frame-Only Library
A frame-only library is an intermediate library that contains only physical information (frame,
design, and layout views) for the library cells. This type of reference library is used only as
an input to generate a reference library; it cannot be used outside of the library manager.
See Also
• Reference Library
Aggregate Library
An aggregate library combines multiple reference libraries into a single reference library with
a defined search order for the included reference libraries. When you refer to a cell in an
aggregate library, the tool uses the defined search order to find the first occurrence of the
cell. You can use an aggregate library to group related reference libraries for easier
maintenance and distribution.
See Also
• Creating an Aggregate Library
Library Workspace
A library workspace is the in-memory representation of a reference library while it is being
built. You use a library workspace to create a new reference library, modify an existing
reference library, or create an aggregate reference library. You load the source files into the
library workspace, validate the contents, and then commit the workspace to save it as a
reference library.
There are two types of library workspaces:
• Root workspace
This is the main library workspace. Only a single root workspace can be open at one
time. If you are creating a single reference library, you work only with a root workspace.
• Subworkspaces
Subworkspaces are used in the exploration flow to partition source data into multiple
reference libraries. Each subworkspace generates a single reference library.
See Also
• Creating a Library Workspace
Pane
A pane is the representation of the timing and power data for a cell. In general, a pane
represents the data at a single characterization point (temperature and voltage) for a given
process setting. In some cases, the data for multiple characterization points at the same
process setting can be merged into a single pane, which is called a scaling group.
If you are not using scaling groups, the timing view of a cell contains a pane for each logic
library that contains that cell. Each pane is indexed by its voltage and temperature values.
See Also
• Scaling Group
Breakpoints
In a logic library, a timing arc is represented as a lookup table. The index values specified in
the lookup table are referred to as the breakpoints for the timing arc. During timing analysis,
the tool uses interpolation to determine the timing values for points between the specified
breakpoints.
See Also
• Timing Arc Checks
Scaling Group
For a given process, you might have multiple logic libraries that represent different
characterization points (voltage and temperature). By default, timing analysis is performed
only at these characterization points. If the characterization points for a set of logic libraries
form a complete grid, you can create a scaling group, which merges the characterization
points into a single pane. A pane that represents a single logic library uses the indexes
specified in the logic library for the timing arc, typically input slew and output capacitance. A
pane that represents a scaling group has indexes for voltage, temperature, or both, in
addition to the indexes specified in the logic library. These higher-dimension delay tables
enable very efficient delay calculations in the IC Compiler II tool. In addition, they enable
interpolation between the voltage and temperature values of the characterization points,
which enables efficient multivoltage analysis and optimization.
The characterization points form a complete grid when data exists for each temperature and
voltage combination. Figure 1-2 shows an example of a complete grid and an incomplete
grid. The figure on the left represents a complete grid that consists of four logic libraries for
a process. The figure on the right represents an incomplete grid that consists of three logic
libraries for a process. The grid is incomplete because the characterization point at 1.0V and
0°C is missing.
Figure 1-2 Grid Representation of Characterization Points
See Also
• Creating Scaling Groups
Antenna Properties
MOS transistor gate oxides are easily damaged by electrostatic discharge, especially during
the manufacturing process. The static charge collected on lower-level wires during
multilevel metalization processing can destroy gate oxides and ruin the chip. This issue is
called the “antenna problem.”
To protect the MOS device from being damaged, the area of the metal connected to a gate
oxide during a given metal mask stage must be limited to a certain value. When the metal
area exceeds this value, a reverse-biased diode can be used to provide a discharge path to
protect the gate oxide at a cell input.
The diffusion areas of output pins provide protection for gate oxides at input pins. However,
at intermediate stages of the manufacturing process, unconnected metal wires extending
from the input pins can cause antenna problems to occur. For many process technologies,
antenna properties specify the maximum ratio of antenna area (the metal area of dangling
connections) to gate area (the gate area of input pins). This ratio can be a constant value or
a value derived by an antenna equation.
See Also
• Automatic Antenna Property Extraction Using the IC Validator Tool
• Defining Antenna Properties on Standard Cells
• Defining Antenna Properties on Hard Macro Cells
For detailed information about the library preparation flow, see “Preparing Reference
Libraries.”
User Interfaces
The IC Compiler II Library Manager tool operates in the X windows environment on UNIX or
Linux. It provides a flexible working environment with both a shell command-line interface
and a graphical user interface (GUI).
• The shell command-line interface, icc2_lm_shell, is a text-only environment in which you
enter commands at the command-line prompt. It is typically used for scripts, batch mode,
and push-button operations and is always available during a library manager session.
• The GUI provides a wizard to perform library preparation, as well as tools for viewing and
editing the cells in your library. The look and feel of the library manager GUI is consistent
with the look and feel of other Synopsys GUIs.
The library manager uses the tool command language (Tcl). Using Tcl, you can extend the
icc2_lm_shell command language by writing reusable procedures and scripts (see the
Using Tcl With Synopsys Tools manual).
You can start or exit a session in either icc2_lm_shell or the GUI, and you can open or close
the GUI at any time during a session. The following topics describe how to start and exit the
tool using the command-line interface:
• Starting the Command-Line Interface
• Exiting the IC Compiler II Library Manager Tool
See Also
• Working With the Library Manager GUI
You can include other options when you start icc2_lm_shell. For example,
❍ -file script_file_name to execute a script
See Also
• Starting the Tool in the GUI
• Using the Command Log File
• Setup Files
• Using Tcl Scripts
See Also
• Exiting the Tool From the GUI
When entering a command, an option, or a file name, you can minimize your typing by
pressing the Tab key. If you have typed enough characters to specify a unique name, the
IC Compiler II library manager completes the remaining characters. If the characters you
typed can be used for more than one name, the library manager lists the qualifying names,
from which you can select by using the arrow keys and the Enter key.
If you need to reuse a command from the output for a command-line interface, you can copy
and paste the portion by selecting it, moving the pointer to the icc2_lm_shell command line,
and clicking with the middle mouse button.
When you run a command, the library manager echoes the command output (including
processing messages and any warnings or error messages) in icc2_lm_shell and, if the GUI
is open, in the console log view. By default, the output scrolls. To prevent scrolling, enable
page mode by setting the sh_enable_page_mode variable to true.
See Also
• Using Tcl Scripts
where category is the name of the tool feature affected by the application option. Some
application option categories have subcategories to further refine the area affected by the
application option.
You use the following commands to work with application options:
• set_app_options: Sets one or more application options.
• reset_app_options: Resets one or more application options so that they have no value
For more information about working with application options, see the IC Compiler II Data
Model User Guide.
Using Variables
In general, the library manager modifies default behavior by using application options rather
than application variables; however it does support user-defined Tcl variables, as well as a
minimal number of application variables, such as the search_path variable.
See Also
• Defining the Search Path
• Using Application Options
To display the man page for an icc2_lm_shell application option, enter the man command
followed by the option name. You can also view the following types of summary pages for
application options:
• Category summaries
To view a man page the summarizes all of the application options for a specific category,
enter the man command followed by category_options. For example, to see the man
page that summarizes all library manager application options, use the following
command:
icc2_lm_shell> man lm_options
• Subcategory summaries
To view a man page the summarizes all of the application options for a specific
subcategory, enter the man command followed by category.subcategory_options. For
example, to see the man page that summarizes all signoff antenna extraction application
options, use the following command:
icc2_lm_shell> man signoff.antenna_options
• Command summaries
To view a man page the summarizes all of the application options for a specific
command, enter the man command followed by command_options. For example, to see
the man page that summarizes all application options that affect the read_db command,
use the following command:
icc2_lm_shell> man read_db_options
If you enter the man command on the icc2_lm_shell command line, the man page is
displayed in the shell and in the console log view if the GUI is open. If you enter this
command on the console command line in the GUI, the man page is displayed in the GUI
man page viewer.
See Also
• IC Compiler II Graphical User Interface User Guide
See Also
• Starting the Command-Line Interface
• Using Tcl With Synopsys Tools
Setup Files
A setup file is a special Tcl script that the tool automatically executes at startup. It can
contain commands that perform basic tasks, such as initializing application options.
The setup file for the library manager is named .synopsys_icc2_lm.setup. The tool looks for
this file both in your home directory and in the project directory (the current working directory
in which you start the tool). The file is read in the following order:
1. The .synopsys_icc2_lm.setup file in your home directory
Typically the settings in this file define your working environment.
2. The .synopsys_icc2_lm.setup file in the project directory
Typically the settings in this file affect the processing of a specific library.
See Also
• User Interfaces
• Using Application Options
• Using Variables
• Using Tcl Scripts
See Also
• Setup Files
2-1
IC Compiler™ II
IC Compiler™ II Library
Library Preparation
Preparation User
User Guide
Guide Version M-2016.12-SP4
M-2016.12-SP4
physical-only library typically contains cells such as filler cells, tap cells, flip-chip pad
cells, endcap cells, and decoupling capacitor cells.
The group of files used for this flow includes all of the logic and physical library files;
however, the generated reference library includes only those cells that exist only in the
physical library files.
Note:
You must read at least one logic library when using the physical-only flow; otherwise,
workspace validation fails and you cannot save the reference library. To build a library
of cells using only physical libraries, use the frame-only flow.
• Exploration flow
Use this flow to automatically analyze the library source files and generate a script that
you can use to create a reference library.
• Edit flow
Use this flow to modify the physical data for cells in an existing reference library.
• Aggregate flow
Use this flow to combine multiple separate reference libraries into a single reference
library.
Figure 2-1 shows the results of using the normal and physical-only flows on a library
workspace that contains two .db files, each of which contains a different characterization
point for the same set of cells, and one LEF file.
See Also
• Reference Library
• Technology Library
See Also
• Reference Library
To build a technology library, you follow the same flow, but omit steps four through seven,
which involve the source files for the library cells.
After a reference library is built, it does not need to be rebuilt unless one of the source library
files changes or a new version of the IC Compiler II tool requires an updated library.
See Also
• Using the Exploration Flow
• Modifying a Reference Library
• Creating an Aggregate Library
For example, to use the normal flow to create a reference library named myreflib, use the
following command to create the library workspace:
icc2_lm_shell> create_workspace myreflib
See Also
• Library Workspace
• Analyzing the Library Source Files
• Using the Exploration Flow
• Modifying a Reference Library
• Creating an Aggregate Library
Normal normal
Technology-only normal
Frame-only frame
Physical-only physical_only
Exploration exploration
Verification verification
Edit edit
Aggregate aggregate
For example, to use the normal flow to create a reference library named myreflib, use the
following command:
icc2_lm_shell> create_workspace myreflib
To use the physical-only flow to create a reference library named myreflib_po, use the
following command:
icc2_lm_shell> create_workspace -flow physical_only myreflib_po
To create a workspace for the exploration flow, use the following command:
icc2_lm_shell> create_workspace -flow exploration myreflib_explore
Note:
Unless you are using the exploration flow, you can have only one library workspace open
at a time. To remove the current library workspace from memory without committing it to
a saved reference library, use the remove_workspace command.
See Also
• Library Workspace
• Analyzing the Library Source Files
• Using the Exploration Flow
• Verifying Reference Libraries
• Modifying a Reference Library
• Creating an Aggregate Library
the tool retrieves the number, it divides the number by the scale factor. For example, if the
scale factor is 1000, the tool stores a value of 0.0032 as 3 (0.0032 * 1000 = 3.2, which
rounds to 3). The tool retrieves this value as 0.003 (3 / 1000).
If the scale factor is not large enough, the precision of specified coordinates might be
affected. For example, assume that you create a net shape with the following command:
icc2_shell> create_shape -shape_type rect -layer M1 \
-boundary {{0.500 0.500} {0.5053 0.5053}}
With a scale factor of 1000, the bounding box is stored as {500 500} {505 505}, instead of
{5000 5000} {5053 5053}. With a scale factor of 10000, the bounding box is stored as {5000
5000} {5053 5053}.
The scale factor for a library workspace must be a multiple of both the length precision of the
technology file associated with the workspace and the scale factor of the physical libraries
loaded into the workspace.
The default scale factor is 10000, which means that each database unit represents 1
Angstrom. However, the recommended scale factor is the technology length precision as
specified by the lengthPrecision attribute in the technology file. To use the technology
length precision as the scale factor, set the lib.setting.use_tech_scale_factor
application option to true before running the create_workspace command.
icc2_lm_shell> set_app_options \
-name lib.setting.use_tech_scale_factor -value true
If neither the default scale factor nor the technology length precision is appropriate for your
library, you can explicitly specify the scale factor by using the -scale_factor option with
the create_workspace command.
To determine the scale factor for an existing reference library, query its scale_factor
attribute.
• To load a technology file into an existing library workspace, use the read_tech_file
command.
For example, to load the my.tf technology file into the current library workspace, use the
following command:
icc2_lm_shell> read_tech_file my.tf
• To associate a technology library with a library workspace when you create the
workspace, use the -use_technology_lib option with the create_workspace
command.
For example, to use the normal flow to create a reference library named myreflib that
gets its technology data from the mytech.ndm technology library, use the following
command:
icc2_lm_shell> create_workspace -use_technology_lib mytech.ndm \
myreflib
• To associate a technology library with an existing library workspace, use the read_ndm
command to read the technology library into the library workspace.
For example, to associate the mytech.ndm technology library with the current library
workspace, use the following command:
icc2_lm_shell> read_ndm mytech.ndm
See Also
• Creating a Library Workspace
• “Technology Data Access” in the IC Compiler II Data Model User Guide
To specify that it can be flipped about both the x- and y-axis and can be rotated 90
degrees, use the following command:
icc2_lm_shell> set_attribute [get_site_defs unit] symmetry {X Y R90}
In general, the LEF file defines these site attributes, and the library manager automatically
sets them when you read the LEF file. If you load the physical information by reading a
GDSII or OASIS file or if the LEF file does not define these attributes, use the
set_attribute command to set them manually.
In general, the LEF file defines these layer attributes, and the library manager automatically
sets them when you read the LEF file. If you load the physical information by reading a
GDSII or OASIS file or if the LEF file does not define these attributes, use the
set_attribute command to set them manually.
represented in multiple logic libraries, you must load all of these logic libraries into a single
library workspace.
Warning:
If multiple reference libraries contain a library cell with the same name, the tool uses the
data from the first reference library in which it finds the cell, and it ignores that cell’s data
in all other reference libraries. This phenomenon is referred to as cell shadowing.
Before loading logic libraries into the library workspace, ensure that they have been
validated with the Library Compiler check_library command. Note that you must have a
Library Compiler license to run this command.
To load logic libraries into the library workspace, use the read_db command.
For example, to load the db1_pvt1.db file, use the following command:
icc2_lm_shell> read_db db1_pvt1.db
To load all the .db files in the current directory, use the following command:
icc2_lm_shell> read_db [glob *.db]
If you specify the files with a relative path or with no path, the tool uses the search path
defined with the search_path variable to locate the files.
When you load a logic library into a library workspace, the library manager performs the
following tasks:
• Creates timing views in the library workspace for each of the blocks in the library source
file
• Saves the logic library attribute settings for the library, library cells, and library cell pins in
the library workspace
If you load more than one logic library into a workspace, the first logic library that you read
is considered the base library. The tool uses the base library for many consistency checks
among the logic libraries loaded for a workspace. If an attribute is defined in more than one
logic library, the tool uses the value from the first logic library in which the attribute is defined.
By default, the tool processes all of the cells defined in the library source file. To process a
subset of the cells, filter the cells as described in Specifying Which Blocks to Process.
By default, the generated reference library contains the timing views generated from all of
the logic libraries loaded into the library workspace. To filter the logic libraries based on your
design operating corners, use the set_pvt_configuration command, as described in
Filtering Logic Libraries Based on Operating Corners.
See Also
• Pane
• Defining the Search Path
• Identifying the Process Associated With a Logic Library
If two or more libraries have the same process label, process number, voltage values, and
temperature values, the tool uses only the pane generated for the first library, and ignores
the rest. To prevent panes from being ignored, assign a unique process identifier to each
pane. To set the process number or process label after loading a logic library, use the
set_process command.
For example, to read the db1.db logic library and set a process label of PVT1 on the
generated pane, use the following command:
icc2_lm_shell> read_db -process_label PVT1 db1.db
To set a process label of PVT2 on the generated pane after reading the logic library, use the
following command:
icc2_lm_shell> set_process -libraries {db1} -label PVT2
For example, to create a PVT configuration rule that allows any process setting, voltages of
0.65 or 1.32 volts, and a temperature of 25 degrees, use the following command:
icc2_lm_shell> set_pvt_configuration -add \
-voltages {0.65 1.32} -temperatures {25}
Note that this command does not affect loading of the logic libraries. It affects only which
logic libraries are actually used by the reference library. If you change the PVT configuration,
the library manager adjusts the logic library usage appropriately.
To see the logic libraries loaded into the library workspace, use the get_libs command. To
see which logic libraries are actually used by the library workspace based on the PVT
configuration, use the report_workspace command.
To load extracted timing models into the library workspace to create timing views, use the
read_db command to load the models in .db format.
You must use the -mode_label option with these commands to specify the mode
associated with the timing arcs and generated clocks defined in the model.
For example, to read the .db file for the model1 extracted timing model, use the following
command:
icc2_lm_shell> read_db -mode_label functional model1.db
If you specify the model files with a relative path or with no path, the tool uses the search
path defined with the search_path variable to locate the files.
If you specify the LEF file with a relative path or with no path, the library manager uses the
search path defined with the search_path variable to locate the file.
By default, the read_lef command
• Processes all of the cells defined in the library source file
To process a subset of the cells, filter the cells, as described in Specifying Which Blocks
to Process.
• Creates a design view for each processed block
By default, if a block already has a physical representation in the library workspace, the
tool creates a design view with a new name. To change this default behavior, either use
the -merge_action option to change the behavior for all blocks or use a block mapping
file to specify the behavior for specific blocks. For details, see Handling Duplicate Blocks
in the Physical Libraries.
By default, the read_lef command derives the block boundary from the OVERLAP layer
in the LEF file, if it exists. If it does not exist, the command derives the rectangular block
boundary from the SIZE statement in the LEF file. To derive the rectangular cell
boundary from the SIZE statement even if the OVERLAP layer exists, use the
-cell_boundary by_cell_size option.
If a block has PROPERTY definitions in the LEF file, the read_lef command saves the
properties as user-defined attributes of the block. By default, the command saves all the
block properties; to save only specific block properties, specify the property names with
the -properties option.
When the library manager reads a LEF file, it stores certain settings as attributes on the
blocks or block objects. To use the LEF file only to update the attribute settings on the
existing blocks in the library workspace, and not to create design views, use the
-merge_action attributes_only option.
• Fails if the LEF file contains layer or site information that conflicts with the technology file
For information about resolving site definition conflicts, see Resolving Site Definition
Conflicts When Reading LEF Files.
See Also
• Defining the Search Path
• Validating the LEF File
• Determining the Block Types When Reading LEF Files
• Determining the Electrical Equivalence for PG Terminals When Reading LEF Files
• Preparing Standard Cells
Table 2-2 LEF CLASS Property to IC Compiler II design_type Attribute Mapping (Continued)
Determining the Electrical Equivalence for PG Terminals When Reading LEF Files
By default, the read_lef command does not calculate the electrical equivalence (EEQ)
setting for the PG terminals. To calculate the EEQ setting for the PG terminals, use the
-create_eeq_setting_for_block_and_pad option. By default, when the library manager
calculates the EEQ setting, it considers the direction of the PG port. To ignore the port
direction, use the -ignore_pg_direction_for_eeq option.
• If the files contain sites with the same names, but different definitions, you can enable the
tool to automatically rename conflicting site names by setting the
file.lef.auto_rename_conflict_sites application option to true before running
the read_lef command.
When you enable this option, the tool uses the following naming convention to rename
the conflicting site names:
lef_file_name.site_name[_n]
The numeric suffix is added only if required to make the site name unique.
If you specify a library source file with a relative path or with no path, the library manager
uses the search path defined with the search_path variable to locate the file.
For example, to read the myphys.gds file, use the following command:
icc2_lm_shell> read_gds myphys.gds
When the tool reads a library source file in GDSII or OASIS format, it assumes that all of the
blocks are standard cells and all of the pins are signal pins. It generates a layout view for
each block in the file. If it finds a duplicate block, it creates a layout view with a new name.
The tool then performs connectivity analysis to determine the pins and connectivity
information and generates a design view for each block.
The following topics describe how to modify the behavior of the read_gds and read_oasis
commands:
• Resolving Layer Differences
• Specifying Which Blocks to Process
• Handling Duplicate Blocks in the Physical Libraries
• Specifying the Site Definitions When Reading GDSII or OASIS Files
• Adjusting Standard Cell Boundaries
• Identifying Power and Ground Pins
When you load a layer mapping file into the library workspace, it is used by both the
read_gds and read_oasis commands.
• -ignore_missing_layers
In this case, the command loads only those layers defined in the technology file and
ignores all other layers defined in the library source file.
You can also set these options in the layer mapping file, as described in Layer Mapping File
Syntax. If you specify these options both on the command line and in the layer mapping file,
the settings in the layer mapping file override the command-line settings.
Figure 2-3 Boundary for Standard Cell With Shared Power and Ground Pins
2. Edit the layout views as described in the IC Compiler II Graphical User Interface User
Guide.
3. Perform connectivity analysis by running the trace_connectivity command.
Tracing method Cell types for which this is the -trace_option -layer
default tracing method Keyword Keyword
Trace the connectivity only on Library cells, pad cells, corner same_layer same
the same layer as the pin text.2 cells, pad spacer cells, cover
cells, flip-chip pads, flip-chip
drivers, physical-only cells, well
tap cells, end cap cells, diode
cells, filler cells, and metal fill
1. If a macro cell has rectilinear pins, you must explicitly set the -trace_option option to same_layer; the
pins-only method always extracts rectangular pins.
2. To reduce runtime, limit the number of geometries traced by setting the -trace_connectivity_limit option
or enable all-layer tracing only for specific pins by using the -trace_all_layers_for option.
where
• metal_layer and text_layer are the layer names in the technology file
• data_type, which is optional, is the data type number in the technology file
where
• object_type specifies the types of objects to which the mapping applies
Valid values are data (all non-text objects), text, and all. The default is all.
• tf_layer is the layer number in the technology file, which is a required argument
• tf_purpose is the purpose number in the technology file
Valid values are either an integer value or the drawing keyword.
• use_type is the usage of the geometries in the design
Valid values are power, ground, signal, clock, boundary,
hard_placement_blockage, soft_placement_blockage, routing_blockage, and
area_fill.
• stream_layer is the layer number in the GDSII or OASIS file, which is a required
argument
• stream_data_type is the data type in the GDSII or OASIS file
To include comment lines in the layer mapping file, start the line with a semicolon (;).
The layer mapping file also supports the following optional statements to further control how
the read_gds or read_oasis command loads the library source files:
read_always true|false [-mapped_only] [-ignore_missing_layers]
blockage_as_zero_spacing true|false
cell_prop_attribute attribute_value
net_prop_attribute attribute_value
pin_prop_attribute attribute_value
Table 2-4 describes how these statements affect the behavior of the read_gds and
read_oasis commands. You can also specify most of these settings on the command line.
If you set an option both on the command line and in the layer mapping file, the setting in the
layer mapping file takes precedence.
read_always true -read_always true The command loads all layers defined
in the library source file. If the library
source file contains layers that are not
defined in the technology file, the
command creates new layers.
This is the default behavior.
read_always false -read_always false The command loads only those layers
-mapped_only -mapped_layers_only specified in the layer mapping file and
ignores all other layers defined in the
library source file.
read_always false -read_always false The command loads only those layers
-ignore_missing_layers -ignore_missing_layers defined in the technology file and
ignores all other layers defined in the
library source file.
The following example shows a layer mapping file. The comments describe how the
statements affect the behavior of the read_gds and read_oasis commands.
Example 2-2 Layer Mapping File
; Disable new layer creation
read_always false
; Map GDSII or OASIS layer 10 with data type 2 to power net shapes
; on technology file layer 56 with a purpose of 4
data 56:4:power 10:2
When you load frame views from a reference library, the library manager verifies that the
frame views in the reference library are consistent with any existing frame views in the
library workspace and issues a warning message if it finds inconsistencies.
Each time you run the command, you can specify only a single library file to load; to load
multiple libraries, you must run the command multiple times. In addition, this command
loads only reference libraries; you cannot use this command to load aggregate libraries.
You can specify the library file with an absolute path, a relative path, or no path. If you
specify the file with a relative path or with no path, the library manager uses the search path
to find the file.
For example, to load the physical data for blocks with the empty label from the myblock.ndm
design library into the current library workspace, use the following command:
icc2_lm_shell> read_ndm myblock.ndm
To load the physical data for blocks with a label of mylabel from the myblock.ndm design
library into the current library workspace, use the following command:
icc2_lm_shell> read_ndm -label mylabel myblock.ndm
Note:
The generated library does not contain labels, regardless of the options used with the
read_ndm command.
When you load frame views from a design library, the library manager verifies that the frame
views in the design library are consistent with any existing frame views in the library
workspace and issues a warning message if it finds inconsistencies.
Each time you run the command, you can specify only a single library file to load; to load
multiple libraries, you must run the command multiple times.
You can specify the library file with an absolute path, a relative path, or no path. If you
specify the file with a relative path or with no path, the library manager uses the search path
to find the file.
The IC Compiler tool writes out a set of files into a new directory named icc2_frame. The
generated files include the technology files and a tar file that contains the FRAM views
converted to LEF format.
2. In the IC Compiler II Library Manager tool, create a frame-only library workspace by
using the create_workspace -flow frame command.
For example, to create a library workspace using the technology data exported from the
IC Compiler tool for the my_reflib reference library, use the following command:
icc2_lm_shell> create_workspace -flow frame \
-technology /path/icc2_frame/data/TF/my_reflib.tf my_workspace
3. Import the converted FRAM views generated by the IC Compiler tool into the library
workspace by using the import_icc_fram command.
For example, to import the converted FRAM views exported from the IC Compiler tool for
the my_reflib reference library, use the following command:
icc2_lm_shell> import_icc_fram \
/path/icc2_frame/data/LEF/my_reflib.tar.gz
Note:
You cannot mix imported Milkyway FRAM data with other physical data, such as LEF,
GDSII, or OASIS data. If you use imported Milkyway FRAM data, all physical data in
the library workspace must come from imported Milkyway FRAM data.
4. Validate the workspace, as described in Validating the Workspace.
5. Commit the workspace, as described in Committing the Workspace.
See Also
• Building Reference Libraries
• Loading Physical Data from a Reference Library
• Add the block with a new name by using the -merge_action add option, which is the
default
• Specify the handling for specific blocks in a block mapping file by using the -block_map
file_name option
The settings in the block mapping file override the -merge_action setting. For
information about the block mapping file syntax, see Block Mapping File Syntax.
Note:
The read_lef command supports only the block_name and rw_type arguments; it
ignores all other arguments.
The arguments are defined as follows:
• block_name is the name of the block, which is required
You can use regular expressions to specify the block names; the read_lef, read_gds,
and read_oasis commands use glob-style pattern matching to identify the blocks.
When you use a block mapping file with the read_gds or read_oasis command, any
blocks that do not match a pattern in the block mapping file are loaded into the library
workspace as standard cells.
• rw_type specifies how to load the block into the library workspace
This argument overrides the default behavior specified by the -trace_option option of
the read_gds or read_oasis command for the specified blocks. Valid values for this
argument are
❍ add
Creates a physical representation for the block; if a physical representation already
exists for the block, it creates a physical representation with a new name.
❍ ignore
Does not create a physical representation for the block. The read_gds and
read_oasis commands ignore this setting if the block is a subblock of a hierarchical
block.
❍ overwrite
Creates a new physical representation that replaces the existing physical
representation for the block.
❍ update
Updates the existing physical representation for the block by merging the new data
with the existing data.
❍ retain
Keeps the instance but does not create the reference library cell.
To include comment lines in the block mapping file, start the line with a semicolon (;).
The following example shows a block mapping file. The comments describe how the
statements affect the behavior of the read_gds and read_oasis commands.
Example 2-3 Block Mapping File
; Load all blocks with CORE in their name as macro cells
*CORE*:add macro
; Flatten all blocks with MEM in their name two levels deep
*MEM*:flatten:2
; Ignore the rest of the blocks, they will be loaded only when they
; happen to be in a *CORE* block’s hierarchy
*:ignore
To create a scaling group, use the create_scaling_group command to specify the logic
libraries in the scaling group. The create_scaling_group command verifies that the
specified libraries meet the requirements; if they do not meet the requirements, the
command fails and issues an error message. When you run the check_workspace
command, the tool performs further validation of the scaling groups (for details, see Scaling
Group Checks).
For example, assume that you load four logic libraries with a process label of TYP: one at
1.0V and 0°C (typ_pvt1.db), one at 1.0V and 125°C (typ_pvt2.db), one at 0.8V and 0°C
(typ_pvt3.db), and one at 0.8V and 125°C (typ_pvt4.db). To create a scaling group using
these logic libraries, use the following command:
icc2_lm_shell> create_scaling_group \
[get_libs {typ_pvt1 typ_pvt2 typ_pvt3 typ_pvt4}]
In the reference library, the scaling group is represented as a single pane that covers the
whole range of voltages and temperatures.
You can define any number of scaling groups, but a logic library can appear in only one
scaling group. A reference library can contain some logic libraries in scaling groups, and
others standalone.
See Also
• Scaling Group
• Breakpoints
• Loading the Logic Libraries
via_layers
tf_via_layer_name1 ITF_via_layer_name1
...
tf_via_layer_namen ITF_via_layer_namen
To include comments in the layer mapping file, start the line with an asterisk (*) or pound
sign (#).
After you read in a TLUPlus file, it is identified by its parasitic technology model name. By
default, the parasitic technology model name is the base name of the specified TLUPlus file;
however, you can specify a different name by using the -name option.
For example, to read in a TLUPlus file named my.tlup using a layer mapping file named
my.layermap and store it in the workspace with a parasitic technology model name of para1,
use the following command:
icc2_lm_shell> read_parasitic_tech -tlup my.tlup \
-layermap my.layermap -name para1
In general, the LEF file defines these attributes, and the library manager automatically sets
them when you read the LEF file. If you load the I/O cells by reading a GDSII or OASIS file
or if the LEF file does not define these attributes, use the set_attribute command to set
them manually.
To report the site definitions in the technology file, use the report_site_defs
command.
In general, the LEF file defines these attributes, and the library manager automatically sets
them when you read the LEF file. If you load the standard cells by reading a GDSII or OASIS
file or if the LEF file does not define these attributes, use the set_attribute command to
set them manually.
See Also
• Resolving Site Definition Conflicts When Reading LEF Files
• Specifying the Site Definitions When Reading GDSII or OASIS Files
• Defining Antenna Properties on Standard Cells
Preparing Macros
To enable antenna checking on hard macro cells, use one of the following methods to
annotate hierarchical antenna properties on their ports:
• Automatically extract the antenna properties by enabling IC Validator antenna extraction
during the check_workspace command, as described in Automatic Antenna Property
Extraction Using the IC Validator Tool.
• Manually annotate the antenna properties on the hard macro ports by using the
set_port_antenna_property command, as described in Defining Antenna Properties
on Hard Macro Cells.
Make sure that the version of the IC Validator executable that you specify is compatible
with the IC Compiler II version that you are using.
For more information about the IC Validator tool, see the IC Validator documentation,
which is available on SolvNet.
• Set the signoff.antenna.enabled application option to true.
• Set signoff.antenna application options to control the extraction behavior.
For a summary of these options, see Antenna Extraction Application Options.
For example,
icc2_lm_shell> report_workspace
...Checked? No
...DB/Liberty files:
1. /usr/LIBRARIES/DB/my_ff0p95v125c.db
2. /usr/LIBRARIES/DB/my_ff0p95vn40c.db
3. /usr/LIBRARIES/DB/my_ff1p16v125c.db
4. /usr/LIBRARIES/DB/my_ff1p16vn40c.db
In many cases, the library manager can automatically fix the issues detected by these
checks.
Note:
The checks performed by the check_workspace command validate the consistency of
the library source files loaded into the workspace; however, the workspace might not
contain all of the information required by the IC Compiler II tool for placement and
routing. For information about completing the information, see the following topics:
❍ Completing the Technology Data
❍ Completing the Physical Cell Information
To generate a reference library from a library workspace, the workspace must pass these
checks. However, in some cases you can generate a reference library using incomplete or
inconsistent source libraries by defining a mismatch configuration, as described in Allowing
Incomplete or Inconsistent Library Data. Reference libraries created with a nondefault
mismatch configuration are not valid for implementation and can be used only for preroute
feasibility analysis; these types of libraries are referred to as prototype libraries.
You can view the messages issued by the check_workspace command in the message
browser, as described in Using the Message Browser Window.
To generate more detailed messages during the validation, use the -details option with
the check_workspace command to specify one or more of the following categories:
arcs_progress, breakpoint_comparisons, combine_physical, leakage_progress,
physical_only_cells, scaling_group_info, or all.
Note:
Using the -details option can result in a very large log file. In general, you should run
the check_workspace command with the -details option only to debug a specific
issue.
Library Checks
The check_workspace command performs the following library checks:
• The library workspace contains at least one physical library.
• Each library logic loaded into the workspace has a unique characterization point
(process, voltage, and temperature).
PG Rail Checks
This topic describes the PG rail checks for logic libraries that use the PG-pin syntax. For
information about PG rail checks for older logic libraries that do not use the PG-pin syntax,
see Using Non-PG Logic Libraries.
Note:
You cannot mix logic libraries with and without PG-pin syntax in a library workspace.
Logic libraries that use the PG-pin syntax define the PG pin connections by using
library-level voltage_map attributes and cell-level pg_pin groups. The voltage_map
attributes define the power rail names. The pg_pin groups define the PG pin connections
for a cell; they use the voltage_name attribute to assign one of the defined power rails to
each PG pin. The signal pins of a cell are associated with the PG rails by using the pin-level
related_power_pin and related_ground_pin attributes. Example 2-4 shows the use of
these attributes to define the power connections in a .lib logic library file.
Example 2-4 Logic Library Example With voltage_map Attributes
library (my_lib) {
...
voltage_map(VDD085, 0.85);
voltage_map(VDD105, 1.05);
voltage_map(VDD120, 1.20);
...
cell(LS_085_105) {
pg_pin (VDDH) {
voltage_name : VDD105;
pg_type : primary_power;
}
pg_pin (VDDL) {
voltage_name : VDD085;
pg_type : primary_power;
}
...
pin (in) {
direction : input;
related_power_pin : VDDL;
related_ground_pin : VSS;
...
}
pin (out) {
direction : output;
related_power_pin : VDDH;
related_ground_pin : VSS;
...
}
...
} /* end cell group*/
...
} /* end library group*/
The check_workspace command verifies that each logic library has the same number of
rails and that the rails have the same names and types. However, the tool ignores rails that
are defined in a voltage_map attribute but not used.
If the rail order differs, the tool automatically updates the order using the information from
the base library.
By default, if a rail name differs between the logic libraries, the tool issues an LM-043 error.
If the mismatch is caused only by rail names and positions, and not rail type differences, you
can use the rename_rail command to make the rail names match. For example, assume
logic library A has a voltage_map setting of (VDD1.0, 1.0) and logic library B has a
voltage_map setting of (VDD1.1, 1.1). You could use the rename_rail command to align
these rails, as shown in the following example:
icc2_lm_shell> rename_rail -library A -from VDD1.0 -to VDD
icc2_lm_shell> rename_rail -library B -from VDD1.1 -to VDD
Cell Checks
To learn about the cell checks performed by the check_workspace commands, see the
following topics:
• Missing Cell Checks
• Logic Function Check
• Cell Attribute Checks
By default, if a cell with the same name in different logic libraries has different values for any
of these attributes, the tool issues a warning message and stores the attribute value from the
base library in the reference library. You can resolve conflicts by using the set_attribute
command to change the attribute values.
To require a cell to have the same value for these attributes in all logic libraries, set the
lib.logic_model.require_same_opt_attrs application option to true.
Pin Checks
To learn about the pin checks performed by the check_workspace commands, see the
following topics:
• Missing Pin Checks
• Pin Definition Checks
To create a reference library, you must manually fix any other types of errors in the source
libraries. If the pins are not actually missing, but the pin names differ between libraries, you
can fix this issue by using the set_attribute command to update the name attribute for the
pins.
To create a prototype library that includes placeholder pins for the missing pins, define a
mismatch configuration, as described in Allowing Incomplete or Inconsistent Library Data.
Note:
Changing a pin from a signal pin to a PG pin might cause the tool to remove timing
arcs for that pin.
You can use the set_attribute command only to change a signal pin to a PG
pin; you cannot change a PG pin to a signal pin.
❍ A pin is defined as a PG pin in all logic libraries, but the pg_type attribute differs
To fix this issue, you can use the set_attribute command to change the pg_type
attribute of the pin.
To create a prototype library that uses the pin type from the base library in the case of
mismatches, define a mismatch configuration, as described in Allowing Incomplete or
Inconsistent Library Data.
Note:
The mismatch configuration can only change a signal pin to a PG pin; it cannot
change a PG pin to a signal pin.
• PG pin connection
If the rail name specified for the voltage_name attribute in a pg_pin group is not defined
in a library-level voltage_map attribute or the voltage_name attribute for a PG pin differs
between libraries, the tool issues an error message. To fix this error, you can use the
set_attribute command to change the rail_name attribute. To see the rail names
defined for a library workspace, use the report_workspace -panes command.
• Related PG pin
Signal pins have a related power pin and a related ground pin; power pins can have a
related bias pin. Typically, these relationships are defined in the logic libraries.
If the logic libraries do not define these relationships, either because they do not define
the PG pins (and the PG pins are inherited from the physical library) or they define the
PG pins, but not the relationships, the check_workspace command tries to derive these
relationships as follows:
❍ If a cell has a single power pin and a single ground pin, the tool automatically derives
the related PG pin information.
❍ If a cell has multiple power pins, you must guide the tool to derive the related PG pin
information.
To guide the tool, use the set_attribute command to set the
related_power_pin_hint and related_ground_pin_hint attributes on the pins
with the missing information.
icc2_lm_shell> set_attribute [get_lib_pins lib/cell/pin] \
related_power_pin_hint PGpin_name
If the related PG pin information for a pin exists but is incorrect, you can correct it by
using the set_attribute command to set the related_power_pin_name,
related_ground_pin_name, or related_bias_pin_name attribute. For example,
icc2_lm_shell> set_attribute [get_lib_pins lib/cell/pin] \
related_power_pin_name PGpin_name
Note:
You can ignore missing power and ground relationships during the workspace
validation by setting the lib.workspace.allow_missing_related_pg_pins
application option to true before running the check_workspace command. However,
the missing information might affect analysis performed by the IC Compiler II tool.
• Pin order
For each cell, the tool determines the pin order in each logic and physical library that
contains the cell, and verifies that it is the same in each library.
In a logic library, the tool determines the pin order from the logic function, followed by
other non-signal pins, such as internal pins, power pins, ground pins, p-well pins, and
n-well pins. In a physical library, the pin order is determined by the order in which they
are specified.
Note:
Although the tool can resolve many pin ordering issues, these issues might be
caused by out-of-date libraries. If the tool reports pin ordering issues, you should
verify that you are using the correct set of libraries before continuing.
If the pin order differs between a logic library and the base library, the result depends on
whether the mismatched pins contribute to the logic function.
❍ If so, the tool issues an error message and does not load the affected cell. You must
manually correct this problem to continue with library preparation.
❍ If not, the tool reorders the pins to match the order in the base library.
If the pin order differs between a physical library and the base library, the tool
automatically updates the pin order using the information from the base library.
If the tool cannot resolve the mismatches, it issues the following message in addition to
messages providing information about the timing arc mismatch.
Error: Could not fix all missing arcs (LM-025)
In the messages, the tool represents a timing arc using the following format:
cell from_pin to_pin [related_pin] sense [object_name] [{w:when_cond}]
[MIN] [{m:modes}] [DUPn]
The cell, from pin, to pin, and arc sense are always specified. The other fields are reported
only when relevant. The related pin is reported only when the delay table is dependent on a
related capacitance. If the library specifies a name for the timing group, that name is
reported in the object_name field. The when_cond field is reported for state-dependent
timing arcs and conditional timing checks. The MIN keyword indicates a minimum delay arc
and the DUP keyword indicates a duplicate arc.
For example, a negative-unate timing arc from pin A to pin Z on the NAND3 cell is
represented as “NAND3 A Z negative_unate”.
To pass workspace validation, you must either fix the errors, provide guidance to the tool
about how to handle them, or remove the cell with mismatched timing arcs from all logic
libraries.
If the tool finds missing or extra timing arcs for a cell in a logic library, as compared to those
in the base library, it issues a warning.
To add arcs that are not defined in the base library, but are defined in another logic library,
rerun the check_workspace command with the -allow_missing option. The arcs are
added only if the nodes in the timing graph are the same as in the base library.
Note:
If you choose to override these errors with the -allow_missing option, the reference
library will have missing data for the cell in some panes.
To remove cells with mismatched timing arcs from the logic libraries, use the
remove_lib_cell command. You must remove the cell from all logic libraries; otherwise,
this results in a missing cell error, which is described in Missing Cell Checks.
For detailed messages during the timing arc checks, specify the arcs_progress keyword
with the -details option. For detailed messages during the breakpoint comparisons,
specify the breakpoint_comparisons keyword with the -details option.
Note:
Using the -details option can result in a very large log file. In general, you should run
the check_workspace command with the -details option only to debug a specific
issue.
If a threshold value is not the same among all the logic libraries in a scaling group, the
tool issues an error message and you cannot commit the workspace.
For detailed messages during the scaling group checks, specify the scaling_group_info
keyword with the -details option.
Leakage-Power Checks
For each cell with the same name in different logic libraries, the check_workspace
command verifies that it has the same leakage-power information, as defined in the
cell_leakage_power attribute and the leakage_power group.
If the tool finds missing or extra leakage-power information for a cell in a logic library, as
compared to those in the base library, it issues a warning. To get detailed information about
the missing leakage-power information, use the -details leakage_progress option when
you run the check_workspace command. In the messages, the tool represents
leakage-power information using the following format:
cell [related_power_pin] [{w:when_condition}]
To add leakage-power information that is not defined in the base library, but is defined in
another logic library, rerun the check_workspace command with the -allow_missing
option.
Note:
If you choose to override this error with the -allow_missing option, the reference library
will have missing data for the cell in some panes.
If the when statement in the leakage_power group is not identical between logic libraries,
the tool checks the logic equivalence of the conditions.
If the conditions are logically equivalent, the tool uses the condition from the base library. If
the conditions are not logically equivalent, the tool issues an error message and you cannot
commit the workspace.
this relaxed verification are called prototype libraries; they can be used only for preroute
feasibility analysis.
The library manager provides two predefined mismatch configurations:
• default (the default)
This is the default behavior of the workspace validation and must be used to generate
reference libraries that can be used throughout the implementation flow.
• auto_fix
This mismatch configuration enables the check_workspace command to repair the
mismatches for all of the supported error types, which are shown in Table 2-5.
Table 2-5 Mismatch Configuration Error Types
lib_missing_logical_port Logic library cell is missing a signal port that exists in the
base logic library or physical library.
Supported repairs:
• create_placeholder_logic_ Creates a placeholder port on the logic library cell.
lib_port
lib_missing_physical_reference A cell exists in the logic libraries, but not in any physical
Supported repairs: libraries.
• create_placeholder_physical
_lib_cell Creates a placeholder physical cell that has the same
dimensions as the LEF unit site and the same number of
ports as the cell in the logic libraries, but no real physical
information.
lib_missing_rail_pg Logic library cell is missing a signal port that exists in the
base logic library or physical library.
Supported repairs:
• create_pg_for_rail Creates a placeholder port on the logic library cell.
lib_port_direction A library cell pin has a different direction than in the base
library.
Supported repairs: Uses the pin direction from the base library in the case of
• change_lib_port_direction signal pin mismatches. Uses the pin direction from the
physical library in the case of PG pin mismatches.
Note:
The library manager fixes many types of pin direction
mismatches by default. For details, see Pin Definition
Checks.
lib_port_type A library cell pin has a different type than in the base
library.
Supported repairs: Uses the pin type from the base library in the case of
• change_lib_port_type signal pin mismatches. Uses the pin type from the
physical library in the case of PG pin mismatches.
Note:
The library manager fixes many types of pin type
mismatches by default. For details, see Pin Definition
Checks.
If these predefined configurations do not meet your needs, you can define your own
configuration, as described in Creating a Mismatch Configuration.
To set a mismatch configuration, use the set_current_mismatch_config command, as
described in Setting a Mismatch Configuration. To see the mismatches that were identified
and fixed during the check_workspace command, use the report_design_mismatch
command after validating the workspace.
For example, the following commands create a user-defined mismatch configuration named
user_def that repairs missing physical library cells.
icc2_lm_shell> create_mismatch_config user_def
icc2_lm_shell> set_attribute \
[get_mismatch_types lib_missing_physical_reference] \
action(user_def) repair
icc2_lm_shell> set_attribute \
[get_mismatch_types lib_missing_physical_reference] \
current_repair(user_def) create_placeholder_physical_lib_cell
See Also
• Setting a Mismatch Configuration
• Reporting Mismatch Configurations
See Also
• Creating a Mismatch Configuration
• Reporting Mismatch Configurations
Command Report
In the following example, the tool reports the details of the current mismatch configuration,
including the mismatch error types and repair strategies. The report includes mismatch error
types that apply to both the library manager and the implementation tool; only the error types
with a category of library apply to the library preparation process.
icc2_lm_shell> report_mismatch_configs
****************************************
Report : Reporting Mismatch Configs
****************************************
Config : default
-------------------------------------------------------------------------
------------
Mismatch-Type Category Action Allowed Actions
Strategy Available Strategies
-------------------------------------------------------------------------
------------
lib_missing_physical_reference
library error {repair error accept }
null
{create_placeholder_physical_lib_cell }
lib_missing_logical_port
library error {repair error accept }
null {create_placeholder_logic_lib_port
}
lib_missing_physical_port
library error {repair error accept }
null {create_placeholder_physical_lib_po
rt }
lib_port_type library accept {accept }
change_lib_port_type
{change_lib_port_type }
lib_port_direction
library accept {accept }
change_lib_port_direction
{change_lib_port_direction }
lib_port_name_synonym
library ignore {repair accept ignore }
null {record_lib_port_name_synonym }
...
lib_cell_name_case
library ignore {repair accept ignore }
null
{record_lib_cell_name_case_insensitivity }
lib_port_name_case
library ignore {repair accept ignore }
null {record_lib_port_name_case_insensit
ivity }
lib_missing_rail_pg
library ignore {repair accept ignore }
null {create_pg_for_rail }
...
1
See Also
• Creating a Mismatch Configuration
• Setting a Mismatch Configuration
See Also
• Building Reference Libraries
• Frame View Generation Application Options
Note that this option also changes the name of the reference library.
• -version version_string
This option saves the reference library using the schema revision for an older tool
version. To see the available version strings, use the report_versions command.
By default, the command fails if the specified reference library already exists. To overwrite
an existing reference library, use the -force option. For example,
icc2_lm_shell> commit_workspace -output myreflib.ndm
Error: File 'myreflib.ndm' already exists (FILE-009)
icc2_lm_shell> commit_workspace -force -output myreflib.ndm
The views saved in the generated reference library depend on the library preparation flow
you enabled and the settings of the related application options.
• For the normal and ETM library preparation flows, the timing and frame views are saved
• For the frame-only and physical-only library preparation flows, only the frame views are
saved
You can have only a single workspace in memory at one time. After you commit a
workspace, it is removed from memory so that you can prepare another reference library.
See Also
• Library Preparation Flows
❍ Generate a library preparation script and source it to create the reference library, as
described in Using a Library Preparation Script.
To reduce the runtime of the exploration flow, use the fast exploration flow, as described in
Using the Fast Exploration Flow.
See Also
• Creating Scaling Groups
• Performing Automated Library Analysis
This command partitions the library source files into subworkspaces based on the names of
the library cells. It analyzes the logic libraries to identify both single-cell and multiple-cell
logic libraries. The group_libs command checks only the library cell names; it does not
check the pins, function, or timing arcs of the library cells.
For each subworkspace, the group_libs command adds the physical libraries that include
at least the same set of cells. If the physical libraries contain cells that are not in any of the
logic libraries, the group_libs command also creates a physical-only subworkspace.
By default, the group_libs command
• Checks for cell shadowing across subworkspaces, and fixes any detected issues
Cell shadowing occurs when a library cell with the same name exists in multiple
reference libraries. In this case, the tool uses the data from the first reference library in
which it finds the cell, and it ignores that cell’s data in all other reference libraries.
By default, the group_libs command adjusts the grouping such that each cell exists in
only one generated reference library, which includes all the PVT panes for the cell. To
disable these fixes, set the lib.workspace.group_libs_fix_cell_shadowing
application option to false.
• Tries to put as many macro cells as possible into a single subworkspace
When using this strategy, the command groups all macro cells with the same set of
characterization points into a single subworkspace. This strategy creates the smallest
number of subworkspaces.
To create subworkspaces that each contain a single macro cell with all of its
characterization points, set the
lib.workspace.group_libs_macro_grouping_strategy application option to
single_cell_per_lib before running the group_libs command. Using this strategy
can generate a large number of subworkspaces.
• Assigns a name of <root_workspace>_physical_only to the physical-only subworkspace,
if there is one
To specify a name for the physical-only subworkspace, set the
lib.workspace.group_libs_physical_only_name application option.
The default behavior of this command depends on the current workspace. If the current
workspace is the root workspace, it generates a script for each subworkspace. If the
current workspace is a subworkspace, it generates a script only for that workspace. To
generate a script for specific workspaces, specify the workspaces as an argument to the
command. For example, to generate a Tcl script only for the my_lib workspace, use the
following command:
icc2_lm_shell> write_workspace -file libgen.tcl my_lib
You should review the generated script files, and modify as necessary to ensure that it
meets your needs before using it to perform your library preparation.
2. Remove the existing root workspace, which also removes all of its subworkspaces, by
using the remove_workspace command.
icc2_lm_shell> remove_workspace
If the check_workspace command reports any issues, you must resolve the issues and
rerun the script. For information about resolving the issues, see Validating the
Workspace. In addition, you might need to modify the generated script to resolve some
issues.
See Also
• Performing Automated Library Analysis
• Using a Library Preparation Script
The reference library opened in the verification workspace is referred to as the base
library.
2. Compare the logical information in a logic library source file to the reference library in the
library workspace by using the compare_db command.
icc2_lm_shell> compare_db -process_label myprocess mylib.db
The reference library opened in the verification workspace is referred to as the base
library.
2. Compare the frame views in another reference library to the reference library in the
library workspace by using the compare_ndm command.
icc2_lm_shell> compare_ndm mylib2.ndm
3. Modify the reference library by performing one or more of the following tasks:
❍ Load new technology data, as described in Loading the Technology Data.
❍ Modify the technology data, as described in Completing the Technology Data.
❍ Load physical library source files into the library workspace, as described in Loading
the Physical Libraries.
❍ Load a reference library into the library workspace by using the read_ndm command,
as described in Loading Physical Data from a Reference Library.
Note:
When you load a reference library into an edit workspace, only the physical
information is loaded; the timing information is not used.
❍ Modify physical cell attributes.
In general, you can modify physical cell attributes by using the set_attribute
command. For examples of this technique, see Completing the Physical Cell
Information.
❍ Define antenna properties, as described in Defining Antenna Properties on Standard
Cells and Defining Antenna Properties on Hard Macro Cells.
❍ Edit the layout for one or more cells, as described in the IC Compiler II Graphical User
Interface User Guide.
4. Validate the contents of the library workspace by using the check_workspace command,
as described in Validating the Workspace.
When you validate the library workspace, the tool checks only the modified physical
data. By default, the tool generates updated frame views only for cells with modified
design views. To generate a frame view for a cell whose design view is unchanged, set
the frame_update attribute on the cell to true before running the check_workspace
command.
If you want to use the same frame generation options that were used when the reference
library was created, use the write_frame_options command to generate a Tcl script
with the application option settings, and source this script before running the
check_workspace command.
For example, the following script updates the technology file for an existing reference library
named existing.ndm and regenerates the frame views for all of the design views using the
same application option settings that were used to generate the reference library:
write_frame_options -library existing.ndm -output frame_options.tcl
create_workspace –flow edit existing.ndm
read_tech_file new_tech.tf
set_attribute [get_lib_cells */*/design] frame_update true
source frame_options.tcl
check_workspace
commit_workspace -force -output existing.ndm
3. Validate the contents of the library workspace by using the check_workspace command,
as described in Validating the Workspace.
4. Commit the library workspace to disk by using the commit_workspace command, as
described in Committing the Workspace.
Attribute Description
Note:
If this attribute is not specified for a pin, the IC Compiler II tool uses
the setting of the route.detail.default_gate_size application
option.
antenna_area These attributes define the antenna area of an input pin. The
antenna_area attribute defines the antenna polygon area. The
antenna_side_area
antenna_side_area attribute defines the antenna sidewall area.
The attribute values use the following syntax:
{layer_name area_value}
Note:
If these attributes are not specified for a pin, the IC Compiler II tool
uses the pin shapes to compute the antenna area.
Attribute Description
diff_area This attribute defines the diode protection value of an output pin.
The attribute value uses the following syntax:
{layer_name area_value}
Note:
If this attribute is not specified for a pin, the IC Compiler II tool uses
the setting of the route.detail.default_diode_protection
application option.
is_diode This attribute specifies whether a pin is a diode that can be used by
the IC Compiler II tool to fix antenna violations.
For example,
icc2_lm_shell> set_attribute mylib/hm1/z diff_area \
{M1 0 M2 0 M3 0 M4 0.0595}
2. Use the set_port_antenna_property command to set the gate area, antenna area,
and antenna ratio properties on the hard macro input ports. This command has the
following syntax:
set_port_antenna_property -port port -data property_settings_list
In the property_settings_list argument, specify the properties for one or more layers
using the following syntax:
{ {metalLayer layer_name gate_size area_value mode1_area mode1_data
mode2_ratio mode2_data mode3_area mode3_data mode4_area mode4_data
mode5_ratio mode5_data mode6_area mode6_data} ... }
where
❍ layer_name is the name of the metal layer in the technology file
❍ mode1_data is the area of the specified metal layer when the connectivity is traced up
to that metal layer
❍ mode2_data is the maximum internal ratio of the area of the metal layer below the
specified metal layer when the connectivity is traced up to the specified metal layer
❍ mode3_data is the total metal area
❍ mode4_data is the sidewall area of the specified metal layer when the connectivity is
traced up to the specified metal layer
❍ mode5_data is the maximum internal ratio of the sidewall area of the metal layer
below the specified metal layer when the connectivity is traced up to the specified
metal layer
❍ mode6_data is the total metal sidewall area
The library manager also supports a simplified syntax that excludes the property names:
{ {layer_name area_value mode1_data mode2_data mode3_data
mode4_data mode5_data mode6_data} ... }
For example, you can use either of the following commands to set the antenna properties
on the a pin of the hm1 hard macro cell:
icc2_lm_shell> set_port_antenna_property -port mylib/hm1/a -data \
{ {metalLayer M1 gate_size 0.3436 mode1_area 6.664
mode2_ratio 2.05346 mode3_area 12.708 mode4_area 17.5392
mode5_ratio 7.04044 mode6_area 12.682}
{metalLayer V1 gate_size 0.3436 mode1_area 6.664
mode2_ratio 2.05346 mode3_area 12.708 mode4_area 17.5392
mode5_ratio 7.04044 mode6_area 12.682} }
or
icc2_lm_shell> set_port_antenna_property -port mylib/hm1/a -data \
{ {M1 0.3436 6.664 2.05346 12.708 17.5392 7.04044 12.682}
{V1 0.3436 6.664 2.05346 12.708 17.5392 7.04044 12.682} }
Note:
For the layer below the pin layer, set the hierarchical antenna properties to 0. Also, if
the gate_size value for a metal layer is zero, such as for an output pin, the
mode2_ratio and mode5_ratio values for that layer must be 0.
3. Load the reference libraries into the library workspace, as described in Opening a
Reference Library.
All of the reference libraries in the library workspace become part of the aggregate
library. To remove libraries from the workspace, use the remove_lib command.
4. Validate the contents of the library workspace, as described in Validating the Workspace.
5. Set the search order, as described in Setting the Search Order.
6. Commit the library workspace to disk, as described in Committing the Workspace.
See Also
• Aggregate Library
• Modifying an Aggregate Library
See Also
• Creating an Aggregate Library
Each time you run the command, you can specify only a single reference library file to open;
to open multiple reference libraries, you must run the command multiple times.
You can specify the reference library file with an absolute path, a relative path, or no path. If
you specify the file with a relative path or with no path, the tool uses the search path to find
the file.
See Also
• Defining the Search Path
Querying Libraries
To list the libraries loaded into memory, use the get_libs command.
icc2_lm_shell> get_libs
{myreflib myreflib_lvt myreflib_hvt}
If you have opened an aggregate library, the get_libs command returns the reference
libraries within the aggregate library. The reference library names are prefixed with the
aggregate library name.
icc2_lm_shell> get_libs
{AGG1|reflib1 AGG1|reflib2}
You can specify a pattern to restrict the set of libraries. For example, to include only the low
threshold voltage libraries, enter the following command:
icc2_lm_shell> get_libs *lvt
{myreflib_lvt}
Reporting Libraries
To report information about a reference library, use the report_lib command. You must
specify the name of an open reference library as an argument. You can run this command
both before and after committing the library workspace.
By default, this command provides information about the library, such as the number of cells,
the power rails, the characterization points (panes), and the operating condition definitions.
Use the following options to report additional information about the reference library:
• -antenna
Reports the library cells that are missing antenna properties and the affected pins.
• -parasitic_tech
Reports the TLUPlus files loaded into the library, if any.
• -physical
Reports the physical characteristics of the reference library.
The reported information includes the site definitions, the layer definitions, the source file
names, the number of each type of cell view (timing, layout, design, and frame) in the
library, the number of each design type in the library, details about each library cell, the
number of each type of library cell pin (ground, power, and signal) in the library, and
details about the pins for each library cell.
• -placement_constraints
Reports missing or improper placement constraints.
Reported issues include improper site definitions and library cells that do not have any
shapes on the placement layers defined in the technology file, such as implant and
diffusion layers. By default, the report includes a maximum of 10 cells with violations. To
report all cells with violations, use the -verbose option.
• -routability
Reports library issues that could impact the routability.
Reported issues include library cell pins that do not have either a via region or access
edges, irregular cut shapes or routing blockages, frame views that are converted from
IC Compiler FRAM views, improper frame generation settings, frame views with many
obstructions, shorted pins, routing ports without geometry information, ports whose
is_secondary_pg or is_diode attribute differs between the timing view and the frame
view, and fully blocked terminals.
To report details about the cell objects, such as the number of terminals, shapes, and
routing blockages, and to report both fully and partially blocked terminals, use the
-verbose option.
• -timing_arcs
Reports the timing arcs for the library cells.
• -wire_tracks
Reports library issues related to the wire tracks.
Reported issues include cells with off-track or missing via regions and layers without a
preferred direction. By default, the report includes the name and layer for each violating
library cell pin, as well as the issue causing the violation. To report additional details for
the violating library cell pins such as the contact code and bounding box, use the
-verbose option.
By default, the library manager determines the wire tracks from the library being
reported. If the wire track information is stored in a technology library, use the
-technology_lib option to specify the library.
• -wire_track_colors
Reports library issues related to wire track coloring.
Reported issues include tracks without color information, terminals without color
information, and terminals on a track with the incorrect color.
• -min_pin_layer layer
Reports terminals on layers lower than the specified pin layer.
Power rails:
Pane count: 2
Pane 0:
Process label: (none)
Process number: 1
Voltage rail count: 3
Voltage for rail 0 (<default>): 1.08
Voltage for rail 1 (V): 1.08
Voltage for rail 2 (VL): 1.08
Temperature: 125
Thresholds:
r/f InputDelay: 0.5/0.5 r/f OutputDelay: 0.5/0.5
l/h RiseTrans: 0.1/0.9 h/l FallTrans: 0.9/0.1
TransDerate: 1
Operating Conditions:
To report the frame view properties for one or more library cells, use the
report_frame_properties command. You can run this command only after committing
the library workspace. You must use the -library option to specify the name of an open
reference library and the -output option to specify the name of the output file.
icc2_lm_shell> open_lib myreflib
icc2_lm_shell> report_frame_properties -library [current_lib] \
-output frame.txt
By default, the command reports the frame view properties for all cells in the reference
library. To report the frame view properties for a specific cell, use the -block option to
specify the cell name. Note that when you use this option, you must explicitly specify the
frame view of the cell.
Example 2-6 shows an example frame properties report, which was generated by the
following command:
icc2_lm_shell> report_frame_properties -library [current_lib] \
-output frame.txt -block myreflib/AND2/frame
****************************************
**********************
Design : AND2
**********************
Total number of row: 1.
See Also
• Frame View Generation Application Options
Note:
To reduce runtime when you load physical libraries in the physical-only flow, the tool
loads only the cell names, and not detailed information for the cells. The tool loads the
detailed information during workspace validation. This means that after loading the
physical libraries, you can query the library cell names, but you cannot query other
information such as pins, attributes, and shapes until after workspace validation.
If you need to examine the cells in detail before workspace validation, load the physical
library in the normal flow.
For example, to report on the AND2 cell in the myreflib reference library, use the
following command:
icc2_lm_shell> report_lib_cells -objects myreflib/AND2
****************************************
Report : lib_cell
****************************************
You can customize the report by using the -columns option to specify the information to
report. The following column names are valid for this report: area, design_type,
dont_touch, full_name, is_combinational, is_isolation, is_level_shifter,
is_memory_cell, is_sequential, is_three_state, name, pad_cell, pin_count,
valid_purposes, and view_name. To display all of the available information, specify
-columns all.
• To report information about one or more library cell pins, use the report_lib_pins
command. You must use the -objects option to specify the library cell pins.
Use the following format to specify the library cell pins: library_name/cell_name/
pin_name. You must specify the library name, the cell name, and the pin name. You can
specify a pattern, including wildcards for the library name, cell name, and pin name.
By default, the report includes the full name and direction for the specified pins.
For example, to report on all the pins of the AND2 cell in the myreflib reference library,
use the following command:
icc2_lm_shell> report_lib_pins -objects myreflib/AND2/*
****************************************
Report : lib_pin
****************************************
full_name direction
------------------------- --------
myreflib/AND2/IN1 in
myreflib/AND2/IN2 in
myreflib/AND2/OUT out
1
You can customize the report by using the -columns option to specify the information to
report. The following column names are valid for this report: direction,
disable_timing, full_name, function, is_async_pin, is_clock_pin,
is_data_pin, is_pad, is_preset_pin, is_three_state,
is_three_state_enable_pin, is_three_state_output_pin, name, pin_number,
port_type, rail_name, signal_type, and three_state_function. To display all of
the available information, specify -columns all.
• To report information about one or more timing arcs, use the report_lib_timing_arcs
command. You must use the -objects option to specify the library timing arcs.
The easiest way to specify the timing arcs is to use the get_lib_timing_arcs
command and use the -of_objects option to specify the library cell for which you want
to report the timing arcs.
By default, the report includes the from pin, to pin, sense, when condition, and SDF
condition for the specified timing arcs.
For example, to report on all the timing arcs of the AND4 cell in the myreflib reference
library, use the following command:
icc2_lm_shell> report_lib_timing_arcs \
-objects [get_lib_timing_arcs -of_objects myreflib/AND2]
****************************************
Report : lib_timing_arc
****************************************
You can customize the report by using the -columns option to specify the information to
report. The following column names are valid for this report: from, from_lib_pin,
is_disabled, is_user_disabled, sdf_cond, sense, to, to_lib_pin, and when. To
display all of the available information, specify -columns all.
Format Command
LEF write_lef
Format Command
GDSII write_gds
OASIS write_oasis
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AppendixA:A:Library
Chapter LibraryManager
ManagerApplication
ApplicationOptions
Options
Library Manager Application Options A-3
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AppendixA:A:Library
Chapter LibraryManager
ManagerApplication
ApplicationOptions
Options
LEF Input Application Options A-5
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Library Preparation
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AppendixA:A:Library
Chapter LibraryManager
ManagerApplication
ApplicationOptions
Options
GDSII and OASIS Input Application Options A-7
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AppendixA:A:Library
Chapter LibraryManager
ManagerApplication
ApplicationOptions
Options
Frame View Generation Application Options A-9
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IC Compiler™ II Library
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AppendixA:A:Library
Chapter LibraryManager
ManagerApplication
ApplicationOptions
Options
Frame View Generation Application Options A-11
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AppendixA:A:Library
Chapter LibraryManager
ManagerApplication
ApplicationOptions
Options
Frame View Generation Application Options A-13
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Preparation User
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AppendixA:A:Library
Chapter LibraryManager
ManagerApplication
ApplicationOptions
Options
Antenna Extraction Application Options A-15
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AppendixA:A:Library
Chapter LibraryManager
ManagerApplication
ApplicationOptions
Options
Antenna Extraction Application Options A-17
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AppendixA:A:Library
Chapter LibraryManager
ManagerApplication
ApplicationOptions
Options
Graphical User Interface Application Options A-19
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You can include other options when you start the GUI. For example,
❍ -f script_file_name to execute a script
See Also
• Starting the Command-Line Interface
If you want to execute a script before opening the GUI, use the -file option. For example,
icc2_lm_shell> gui_start -file my_gui_setup.tcl
Note:
The GUI uses the DISPLAY environment variable to determine the display location.
Before opening the GUI, ensure that this variable is set to the name of your UNIX or
Linux system display.
When you open the library manager GUI, it
1. Runs the commands in the .synopsys_icc2_lm_gui/setup.tcl setup files
The tool first runs the setup files in your home directory followed by the files in the project
directory (the current working directory in which you start the tool).
2. Runs the script specified by the -file option.
3. Opens a main window
❍ If a library workspace or reference library is open, it opens the library browser in the
main window.
The library browser is a hierarchical representation of the library workspace or
reference library.
❍ if a library workspace or reference library is not open, it opens the library preparation
wizard in the main window.
AppendixB:B:Working
Chapter WorkingWith
Withthe
theLibrary
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ManagerGUI
GUI
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See Also
• Exiting the IC Compiler II Library Manager Tool
The following topics describe how to use the wizard to perform these tasks:
• Creating a Reference Library
• Modifying a Reference Library
• Viewing a Reference Library
AppendixB:B:Working
Chapter WorkingWith
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9. Validate the workspace by selecting Check Workspace and then clicking OK in the
Check Workspace dialog box.
The workspace must pass validation before you can create a reference library. For
details about workspace validation, see Validating the Workspace.
10.Create the reference library by selecting Commit Workspace and then clicking OK in the
Commit Workspace dialog box.
AppendixB:B:Working
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3. If you want to update the technology data for the reference library, specify the technology
data source in the Technology text box.
You can specify either a technology file, which must have a file extension of .tf, or a
technology library, which must have a file extension of .ndm. You can either enter the file
path or click to browse for it.
3. If you want to edit the reference library, select “Open reference library for edit.”
4. Click OK.
The library browser opens with the selected reference library.
See Also
• Using the Library Browser
AppendixB:B:Working
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Menus
Library
browser
Console
Command line
(part of console)
Status bar
To sort the blocks displayed in the library browser, click the caret (^) in the browser header.
To filter the blocks, enter a string in the search box. As you type, the library browser updates
to show only blocks that contain the text you entered. Click the X to the right side of the text
box to clear the filter.
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To open a block in a block window to view or modify its layout, select a physical view (frame,
design, or layout) of the block, right-click, and choose Open Layout View. For information
about using the block window, see the IC Compiler II Graphical User Interface User Guide.
To see detailed information about the library cells, display the library browser cell
information.
• To display information for a specific cell, select one of its views and choose Cell
Information from the context-sensitive menu.
• To display information for all cells in the library, click the “Cell info” button, which is
located at the bottom right of the library browser.
Figure B-9 shows these features in the library browser. Figure B-10 shows an example cell
information report.
Figure B-9 Displaying Cell Information in the Library Browser
See Also
• “Using the Message Browser” topic in the IC Compiler II Graphical User Interface User
Guide
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PG Rail Checks
For logic libraries that do not use the PG-pin syntax, the power rails and pins are derived
from the library-level power_supply group and cell-level rail_connection attributes. The
power_rail attributes in the power_supply group define the power rail names. The
rail_connection attributes on a cell associate these power rails with the cell’s power pins.
The signal pins of a cell are associated with the PG rails by using the pin-level
input_signal_level and output_signal_level attributes. Example C-1 shows the use
of these attributes to define the power connections in a .lib logic library file.
Example C-1 Library Example With power_supply Group
library (my_lib) {
...
power_supply () {
default_power_rail : VDD085;
power_rail (VDD085, 0.85);
power_rail (VDD105, 1.05);
power_rail (VDD120, 1.20);
}
...
cell (LS_085_105) {
is_level_shifter : true;
rail_connection (VDDH, VDD105) ;
rail_connection (VDDL, VDD085) ;
...
pin (in) {
direction : input;
input_signal_level : VDDL;
...
}
pin (out) {
direction : output;
output_signal_level : VDDH;
...
}
...
} /* end cell group*/
...
} /* end library group*/
The tool verifies that each logic library has the same number of rails and they have the same
names; however, if a rail is defined in a power_supply group but is not used, the tool ignores
mismatches involving that rail and does not include the rail definition in the generated
reference library.
If the rail order differs, the tool automatically updates the order using the information from
the base library.
By default, if a rail name differs between the logic libraries, the tool issues an LM-043 error.
If the mismatch is caused only by rail names and positions, and not rail type differences, you
can use the rename_rail command to make the rail names match. For example, assume
logic library A has a power_rail setting of (VDD1.0, 1.0) and logic library B has a
power_rail setting of (VDD1.1, 1.1). You could use the rename_rail command to align
these rails, as shown in the following example:
icc2_lm_shell> rename_rail -library A -from VDD1.0 -to VDD
icc2_lm_shell> rename_rail -library B -from VDD1.1 -to VDD
You can also use the rename_rail command to correct the situation where the
rail_connection attribute for a cell uses the same PG pin name across libraries, but the
rail name differs.
PG Pin Connections
If the rail name specified for a rail_connection attribute is not defined in the library-level
power_supply group, the tool issues an error message. To fix this error, use the
set_attribute command to change the rail_connection attribute to a valid rail name.
To see the rail names defined for a library workspace, use the report_workspace -panes
command.
AppendixC:C:Using
Chapter UsingNon-PG
Non-PGLogic
LogicLibraries
Libraries
PG Pin Connections C-3
IC Compiler™ II
IC Compiler™ II Library
Library Preparation
Preparation User
User Guide
Guide Version M-2016.12-SP4
M-2016.12-SP4