Scribd
Upload
81 views3 pages

AXI Vs AHB

Uploaded by

karthikp207
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
81 views3 pages

AXI Vs AHB

Uploaded by

karthikp207
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 3

AHB vs AXI

AHB is Advanced High-performance Bus and AXI is AXI. Both the ABH and AXI are Bus
masters, which are different in many aspects.

When the Advanced High-performance Bus is a single channel Bus, the AXI is a multi- channel
Bus. The AHB is also a shared Bus whereas the AXI is a read/write optimized bus.

In AHB, each of the bus masters will connect to a single-channel shared bus. On the other hand,
the bus master in AXI will connect to a Read data channel, Read address channel, Write data
channel, Write address channel and Write response channel.

Another difference that is noticed is that the Bus latencies in AHB start lower than the AXI. The
AHB starts at 16Byte transactions where as the AXI starts at 64 Byte transactions.

It can also be seen that the AHB Bus utilization is higher than AXI utilization. Moreover, The
AXI uses around 50 per cent more power, which means that AHB has an edge over it.

AXI is the third generation of Advanced Microprocessor Bus Architecture interface. Some of the
features of AXI include separate address/control and data phases, burst based transactions with
start address issued, support for unaligned data transfers using byte strobes, easy addition of
register stages to provide timing closure and issuing of multiple outstanding addresses. The AXI,
which suits high speed sub-micrometer interconnect, mainly targets high clock frequency system
designs and high performance. Some of the features of Advanced High-performance Bus
includes single edge clock protocol, several bus masters, split transactions, pipelined operations,
burst transfers, non-tristate implementation and large bus-widths.

Summary
1. AHB is Advanced High-performance Bus and AXI is AXI.
2. When the Advanced High-performance Bus is a single channel Bus, the AXI is a multi-
channel Bus.
3. In AHB, each of the bus masters will connect to a single-channel shared bus. On the other
hand, the bus master in AXI will connect to a Read data channel, Read address channel, Write
data channel, Write address channel and Write response channel.
4. The AHB is also a shared Bus whereas the AXI is a read/write optimized bus.
5. Bus latencies in AHB starts lower than the AXI.
6. The AXI uses around 50 per cent more power, which means AHB has an edge over it.
7. AHB Bus utilization is higher than AXI utilization
Both AXI (AXI) and AHB (Advanced High-Performance Bus) are part of the AMBA (Advanced
Microcontroller Bus Architecture) Bus which are targeted towards High Performance, High
Bandwidth, and High-Frequency System Design but due to some extra features in AXI as
compared to AHB makes it more usable protocol in ASIC Verification and on-chip
communication.

1] AXI is a multi-channel bus with 5 independent channels like Write address channel, Read
address channel, Write data channel, Read data channel, Write response channel (Read Response
is sent along with the Read data) while AHB is a single channel bus.

2] Because of the proper ordering model, AXI supports for multiple outstanding transactions
while AHB support for Single outstanding transaction per bus master.

3] AXI support for out of order transaction completion with masters having different ID tag is
allowed to complete in any order while AHB does not support any out of order transaction
completion.

4] The minimum address space assigned for a single slave in AXI is 4 kb while the address space
assigned for a slave in AHB is 1 kb.

5] AXI support Full-duplex mode of communication because of multiple and independent


channels while AHB does not support Full-duplex mode.

6] AXI support system low power acknowledgement with the introduction of low power request
signal csysack which enable AXI to operate in low power mode while AHB doesn't support low
power request acknowledgement.

7] Since each channel is independent in AXI, there is no requirement to have a fixed relationship
between the channel concerning data transfer which makes it easier to add Register slices and
because of this AXI can operate in a higher frequency of operation as compared to AHB.

8] The features like unaligned data transfer using strobe and byte invariance are supported in
AXI while AHB wouldn't support any of these features.

9] QOS and Write Data Interleaving are supported in AXI while no QOS and Write Data
interleaving features are supported in AHB.
10] There are additional Signalling mechanism like AxRegion (Single Interface on a slave to be
used for multiple logical interfaces) , AxUser (User Defined Signalling Mechanism) are present
in AXI as compared to AHB.

11] Early Burst termination feature is absent in AXI but is present in AHB.

12] Semaphore mode of Operation is present in AXI with the help of Exclusive Access support
while this is absent in AHB.

You might also like