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Digital Mid55

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24 views9 pages

Digital Mid55

Uploaded by

armzagg44
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Name....................................................................................... Student ID.................................... Section.......

1. Answer the following questions (10 Points)


1.1 Consider the logic function:

f ( w, x, y, z )  xy z  x y z  wxy  wx y  wxy

a) Draw a circuit that implement f (w, x, y, z) using ‘NOT’, ‘AND’ and ‘OR’
gates.
b) Draw a circuit that implement f (w, x, y, z) using NAND gates ONLY.
c) Draw a truth table of f (w, x, y, z) .

010113025 Digital Circuits and Logic Design - 2/55 Midterm - 21.01.56 1


Name....................................................................................... Student ID.................................... Section.......

1.2 Consider the timing diagram in figure 1.2


a) Draw a truth table of f ( x1 , x 2 , x3 ) .
b) Determine the logic function f ( x1 , x 2 , x3 ) in a form of sum-of-product (SOP) .
c) Determine the logic function f ( x1 , x 2 , x3 ) in a form of product-of-sum (POS) .

x1 1
0

x2 1
0

x3 1
0

f 1
0

Time

figure 1.2

010113025 Digital Circuits and Logic Design - 2/55 Midterm - 21.01.56 2


Name....................................................................................... Student ID.................................... Section.......

2. Find the minimum sum-of-products (SOP) using QM method of the following logic function (10
Points)

f (a, b, c, d )   m(2,3,7,9,11,13)   D(1,10,15)

010113025 Digital Circuits and Logic Design - 2/55 Midterm - 21.01.56 3


Name....................................................................................... Student ID.................................... Section.......

3. Answer the following questions (10 Points)

3.1 Convert the decimal numbers in the table below to 8-bits binary representation code ( Put
“N/A” where the number can not be coverted ).

Decimal Unsigned Binary Signed Magnitude 2’s Compliment BCD


8
25
127
-33
-100
-135

3.2 Draw a 4-bit Full Adder Block Diagram Which composed of a 1-bit Full Adder in the figure 3.2
below.
- inputs are x0, x1, x2, x3, y0, y1, y2, y3 and Cin.
- Outputs are s0, s1, s2, s3 and Cout.

x y

Cout FA Cin

s
Figure 3.2 1-bit Full Adder

010113025 Digital Circuits and Logic Design - 2/55 Midterm - 21.01.56 4


Name....................................................................................... Student ID.................................... Section.......

4. Consider the following circuit (10 Points)

a) Determine the logic function of x, y and z.


b) Draw a Truth Table.
c) Write the logic function of x, y and z in the form of Product of maxterms .
d) Draw an equivalent circuit using NOR gates ONLY.

010113025 Digital Circuits and Logic Design - 2/55 Midterm - 21.01.56 5


Name....................................................................................... Student ID.................................... Section.......

(
5.1 Consider the Boolean function f x1 , x2 , x3 , x4   m 1,2,3,5,6,7,10,11,14 ) ( )
Do the following:
a) Minimize the Boolean function using Karnaugh Map method. (3 Points)
b) Draw a logic diagram of the minimized Boolean function. (2 Points)

5.2 Consider the Boolean function f ( x1 , x2 , x3 , x4 )   M ( 0,1, 4,5,8,9,12,15 ) Do


the following:
a) Minimize the Boolean function using Karnaugh Map method. (3 Points)
b) Draw a logic diagram of the minimized Boolean function. (2 Points)

010113025 Digital Circuits and Logic Design - 2/55 Midterm - 21.01.56 6


Name....................................................................................... Student ID.................................... Section.......

010113025 Digital Circuits and Logic Design - 2/55 Midterm - 21.01.56 7


Name....................................................................................... Student ID.................................... Section.......

6.1 From the Boolean function f ( x1 , x2 , x3 )  x1 x3  x2 x3 . Use the Shannon’s expansion


method to analyze the designation by choosing Shannon decomposition of x1, x2 or x3 and find
out the most optimum case. (5 points)

6.2 Write a VHDL code of the following circuit diagram (5 Points)

010113025 Digital Circuits and Logic Design - 2/55 Midterm - 21.01.56 8


Name....................................................................................... Student ID.................................... Section.......

010113025 Digital Circuits and Logic Design - 2/55 Midterm - 21.01.56 9

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