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CAP EndSem Unit 6

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16 views6 pages

CAP EndSem Unit 6

Uploaded by

Apurva Jarwal
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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UNIT 6

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Control Unit:-
is the part of the computer’s central processing unit (CPU), which directs the
operation of the processor. It was included as part of the Von Neumann
Architecture by John von Neumann. It is the responsibility of the Control Unit to
tell the computer’s memory, arithmetic/logic unit and input and output devices
how to respond to the instructions that have been sent to the processor. It
fetches internal instructions of the programs from the main memory to the
processor instruction register, and based on this register contents, the control
unit generates a control signal that supervises the execution of these
instructions.
A control unit works by receiving input information to which it converts into
control signals, which are then sent to the central processor. The computer’s
processor then tells the attached hardware what operations to perform. The
functions that a control unit performs are dependent on the type of CPU
because the architecture of CPU varies from manufacturer to manufacturer.
Examples of devices that require a CU are:
 Control Processing Units(CPUs)
 Graphics Processing Units(GPUs)

Functions of the Control Unit –


1. It coordinates the sequence of data movements into, out of, and between a
processor’s many sub-units.
2. It interprets instructions.
3. It controls data flow inside the processor.
4. It receives external instructions or commands to which it converts to
sequence of control signals.
5. It controls many execution units(i.e. ALU, data buffers and registers)
contained within a CPU.
6. It also handles multiple tasks, such as fetching, decoding, execution
handling and storing results.
Types of Control Unit –
There are two types of control units: Hardwired control unit and
Microprogrammable control unit.

1. Hardwired Control Unit –


In the Hardwired control unit, the control signals that are important for
instruction execution control are generated by specially designed hardware
logical circuits, in which we can not modify the signal generation method
without physical change of the circuit structure. The operation code of an
instruction contains the basic data for control signal generation. In the
instruction decoder, the operation code is decoded. The instruction decoder
constitutes a set of many decoders that decode different fields of the
instruction opcode.

• There are four techniques for design of hardwired control unit


1) State Table method
• Classical method of sequential design
• Minimizes hardware
• Constructs a state transition table
• Every generation of states has a set of control signals
2) Delay element method
• Control signals follow a proper sequence
• A specific time delay between two groups of control signals
• TO ensure synchronization D-flip flops are controlled by a common clock
signals
3) Sequence Counter method
• It uses counter for timing purposes
4) PLA method
• It uses programmable logic array.
• PLA is logic device containing programmable AND gates followed by
programmable OR gates, while ROM has fixed AND gates and
programmable OR gates.
• PLA can be used as Decoder, Counter and BUS interface also.
2. Microprogrammable control unit –

The fundamental difference between these unit structures and the structure
of the hardwired control unit is the existence of the control store that is used
for storing words containing encoded control signals mandatory for
instruction execution.
In microprogrammed control units, subsequent instruction words are fetched
into the instruction register in a normal way. However, the operation code of
each instruction is not directly decoded to enable immediate control signal
generation but it comprises the initial address of a microprogram contained
in the control store.
• In microprogrammed control unit micro instructions are stored in a special
memory called control memory
• Implemented using programming approach
• Sequences is carried out by executing a program consisting of micro
instructions.

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Instruction Pipeline
Pipeline processing can occur not only in the data stream but in the instruction stream
as well.

Most of the digital computers with complex instructions require instruction pipeline to
carry out operations like fetch, decode and execute instructions.

In general, the computer needs to process each instruction with the following sequence
of steps.

1. Fetch instruction from memory.


2. Decode the instruction.
3. Calculate the effective address.
4. Fetch the operands from memory.
5. Execute the instruction.

Each step is executed in a particular segment, and there are times when different
segments may take different times to operate on the incoming information. Moreover,
there are times when two or more segments may require memory access at the same
time, causing one segment to wait until another is finished with the memory.

The organization of an instruction pipeline will be more efficient if the instruction cycle
is divided into segments of equal duration. One of the most common examples of this
type of organization is a Four-segment instruction pipeline.

A four-segment instruction pipeline combines two or more different segments and


makes it as a single one. For instance, the decoding of the instruction can be combined
with the calculation of the effective address into one segment.

The following block diagram shows a typical example of a four-segment instruction


pipeline. The instruction cycle is completed in four segments.

Segment 1:

The instruction fetch segment can be implemented using first in, first out (FIFO) buffer.

Segment 2:
The instruction fetched from memory is decoded in the second segment, and eventually,
the effective address is calculated in a separate arithmetic circuit.

Segment 3:

An operand from memory is fetched in the third segment.

Segment 4:

The instructions are finally executed in the last segment of the pipeline organization.

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