MidSem SetA Soln
MidSem SetA Soln
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6
VDD
RL
VB V0
RS
vi
Fig. 2. Question 2
a) : Find the quiescent drain and source voltage of M1 , and the quiescent current through
M1 . [3]
7
b) : Sketch the incremental Norton’s equivalent network for the circuit clearly showing the
short circuit current and the output resistance. [4]
d) : If vi = Vp sin(ω0 t), find the maximum Vp for which M1 remains in saturation and
away from cutoff regions of operation (using the quiescent + small signal model). [5]
9
e) : Now assume, RS = 0. Find the quiescent drain and source voltages of M1 , and the
quiescent current through M1 . [4]
10
f) : Sketch the incremental Norton’s equivalent network for the circuit under the condition
of the previous part (i.e. Rs = 0) and find the small signal gain v0 /vi . [4+2]
11
3) : Fig. 3 shows a transistor biased using a constant current source I0 . Assume I0 = 800 µA,
R = 10 kΩ, Rs = 10 kΩ, RL = 100 kΩ, and W/L = 2.
VDD
I0
Rout
Rin VD
VL
C1 R C2
RS VG RL
V1
vi =Vpsin(ωt)
Fig. 3. Question 3
b) : Find the incremental input impedance Rin . Assume that C1 and C2 are shorted for the
frequency of operation. Note that Rs is a part of the source and should not be considered for
input resistance calculation. [3]
13
c) : Find the incremental output impedance Rout . Assume that C1 and C2 are shorted for
the frequency of operation. Note that RL is a part of the load and should not be considered for
output resistance calculation. [3]
14
e) : For this part assume RL = ∞. Find the maximum Vp for which the transistor remains in
saturation and above cutoff (using the quiescent + small signal model) across the full time-period
of the input. [4]
16