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MidSem SetA Soln

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Naman Yadav
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0% found this document useful (0 votes)
14 views14 pages

MidSem SetA Soln

Uploaded by

Naman Yadav
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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SetA

los = X20*4, 8(3-1)


80o tA

OB 5-(%ooguAd5k) =3V
wC

XAoou AX200LuA7 ,x2


40afus
9m
CC wsk35k) wsK)

9-. (Ro 11R)


K = Koous
9ma x28op2. x Sa0pLA

6o ( us e) a
=
() w
C
w5K)
Vo Jw, FoRA

V I+ Jo(otR)
Vo w pL
Vi
ITwpth))
C CRoTRL)

w 20s K
2elagl-

+
20oK

f Voa 4= 3 - AUi

3 aV > 20 +V -|
V'
fr Clgl: LoT Vi <o.sv
9 U- R
e 9m U
It (4oo)(a5k)
I+gR

*f (v«)-(tve)=
0.5V
C i acShut = VC V
6

NAME (in capital) Roll No:

2) : Consider the circuit in Fig. 2. VDD = 5V , VB = 3V , W/L = 20, RS = 0.5kΩ, RL = 1kΩ.

VDD

RL

VB V0
RS
vi

Fig. 2. Question 2

a) : Find the quiescent drain and source voltage of M1 , and the quiescent current through
M1 . [3]
7

b) : Sketch the incremental Norton’s equivalent network for the circuit clearly showing the
short circuit current and the output resistance. [4]

c) : Find v0 /vi . [2]


8

d) : If vi = Vp sin(ω0 t), find the maximum Vp for which M1 remains in saturation and
away from cutoff regions of operation (using the quiescent + small signal model). [5]
9

e) : Now assume, RS = 0. Find the quiescent drain and source voltages of M1 , and the
quiescent current through M1 . [4]
10

f) : Sketch the incremental Norton’s equivalent network for the circuit under the condition
of the previous part (i.e. Rs = 0) and find the small signal gain v0 /vi . [4+2]
11

NAME (in capital) Roll No:

3) : Fig. 3 shows a transistor biased using a constant current source I0 . Assume I0 = 800 µA,
R = 10 kΩ, Rs = 10 kΩ, RL = 100 kΩ, and W/L = 2.

VDD

I0
Rout
Rin VD
VL
C1 R C2
RS VG RL
V1
vi =Vpsin(ωt)

Fig. 3. Question 3

a) : Find the quiescent voltages at V1 , VG , VD and VL . [4]


12

b) : Find the incremental input impedance Rin . Assume that C1 and C2 are shorted for the
frequency of operation. Note that Rs is a part of the source and should not be considered for
input resistance calculation. [3]
13

c) : Find the incremental output impedance Rout . Assume that C1 and C2 are shorted for
the frequency of operation. Note that RL is a part of the load and should not be considered for
output resistance calculation. [3]
14

d) : Find the small-signal gain v0 /vi . [4].


15

e) : For this part assume RL = ∞. Find the maximum Vp for which the transistor remains in
saturation and above cutoff (using the quiescent + small signal model) across the full time-period
of the input. [4]
16

f) : What is the small-signal gain if gm of M1 is ∞? [2].

g) : What is the small-signal gain between vi and vg is gm of M1 is ∞? [2]

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