Central Processing Unit

Central Processing Unit
The part of the computer that performs the bulk of data processing operations is called the Central Processing
Unit (CPU) and is the central component of a digital computer. Its purpose is to interpret instruction cycles
received from memory and perform arithmetic, logic and control operations with data stored in internal
register, memory words and I/O interface units. A CPU is usually divided into two parts namely:
i. Processor unit (Register Unit and Arithmetic Logic Unit) and
ii. Control unit.
Processor Unit:
The processor unit consists of arithmetic unit, logic unit, a number of registers and internal buses that provides
data path for transfer of information between register and arithmetic logic unit. The block diagram of
processor unit is shown in figure below where all registers are connected through common buses. The
registers communicate each other not only for direct data transfer but also while performing various micro-
operations.
Here two sets of multiplexers select register which perform input data for ALU. A decoder selects destination
register by enabling its load input. The function select in ALU determines the particular operation that to be
performed.
For an example to perform the operation: R3 R1 + R2
1. MUX A selector (SELA): to place the content of R1 into bus A.
2. MUX B selector (SELB): to place the content of R2 into bus B.
3. ALU operation selector (OPR): to provide arithmetic addition A + B.
4. Decoder destination selector (SELD): to transfer the content of the output bus into R3.
Registers
Memory Address Register (MAR)

 Stores the address of the cell the CPU is going to execute.
Memory Buffer Register (MBR)
 Contains instruction or data just read from the memory.
 Or data that is about to be written in the memory.
Instruction Register (IR)
 Holds the instruction just fetched from the main memory.
Arithmetic Logic Unit- ALU
It performs all arithmetic operations and Boolean logical operations.
Control unit:
The control unit is the heart of CPU. It consists of a program counter, instruction register, timing and control
logic. The control logic may be either hardwired or micro-programmed. If it is a hardwired, register decodes
and a set of gates are connected to provide the logic that determines the action required to execute various
instructions
The control unit decides what the instructions mean and directs the necessary data to be moved from memory
to ALU. Control unit must communicate with both ALU and main memory and coordinates all activities of
processor unit, peripheral devices and storage devices.
It can be characterized on the basis of design and implementation by:
 Defining basic elements of the processor

 Describing the micro-operation that processor performs
 Determining the function that the control unit must perform to cause the micro-operations to be
performed.
 Control unit must have inputs that allow determining the state of system and outputs that allow controlling
the behavior of system.
 The inputs to control unit are:
 Flag: flags are headed to determine the status of processor and outcome of previous ALU operation.
 Clock: All micro-operations are performed within each clock pulse. This clock pulse is also called as
processor cycle time or clock cycle time.
 Instruction Register: The op-code of instruction determines which micro-operation to perform during
execution cycle.
 Control signal from control bus: The control bus portion of system bus provides interrupt,
acknowledgement signals to control unit.
 The outputs from control unit are:
 Control signal within processor: These signals causes data transfer between registers, activate ALU
functions.
 Control signal to control bus: These are signals to memory and I/O module. All these control signals
are applied directly as binary inputs to individual logic gate.
The Instruction Cycle

Basic instruction cycle contains the following sub-cycles.
 Fetch - read next instruction from memory into CPU

 Execute - Interpret the opcode and perform the indicated operation
 Interrupt - if interrupts are enabled and one has occurred, save the current process state and service the
interrupt
Instruction Format
The computer can be used to perform a specific task, only by specifying the necessary steps to complete the
task. The collection of such ordered steps forms a ‘program’ of a computer. These ordered steps are the
instructions. Computer instructions are stored in central memory locations and are executed sequentially one
at a time. The control reads an instruction from a specific address in memory and executes it. It then continues
by reading the next instruction in sequence and executes it until the completion of the program.
A computer usually has a variety of Instruction Code Formats. It is the function of the control unit within the
CPU to interpret each instruction code and provide the necessary control functions needed to process the
instruction. An n bit instruction that k bits in the address field and m bits in the operation code field come
addressed 2k location directly and specify 2m different operation.
 The bits of the instruction are divided into groups called fields.
 The most common fields in instruction formats are:
o An Operation code field that specifies the operation to be performed.

o An Address field that designates a memory address or a processor register.
o A Mode field that specifies the way the operand or the effective address is determined.
 Types of Instruction
 Computers may have instructions of several different lengths containing varying number of
addresses.
 The number of address fields in the instruction format of a computer depends on the internal
organization of its registers.
 Most computers fall into one of 3 types of CPU organizations:
 Single accumulator organization:- All the operations are performed with an

accumulator register. The instruction format in this type of computer uses one address
field. For example: ADD X, where X is the address of the operands .
 General register organization:- The instruction format in this type of computer needs
three register address fields. For example: ADD R1,R2,R3
 Stack organization:- The instruction in a stack computer consists of an operation code
with no address field. This operation has the effect of popping the 2 top numbers from the
stack, operating the numbers and pushing the sum into the stack. For example: ADD
 Addressing Modes
 Specifies a rule for interpreting or modifying the address field of the instruction before the
operand is actually referenced.
 Computers use addressing mode techniques for the purpose of accommodating the following
purposes:-
• To give programming versatility to the user by providing such facilities as pointers to
memory, counters for loop control, indexing of data and various other purposes.
• To reduce the number of bits in the addressing field of the instructions.
 Other computers use a single binary for operation & Address mode.
 The mode field is used to locate the operand.
 Address field may designate a memory address or a processor register.
 There are 2 modes that need no address field at all (Implied & immediate modes).
Effective address (EA):

 The effective address is defined to be the memory address obtained from the computation dictated by
the given addressing mode.
 The effective address is the address of the operand in a computational-type instruction.
The most well known addressing mode are:

 Implied Addressing Mode.
 Immediate Addressing Mode
 Register Addressing Mode
 Register Indirect Addressing Mode
 Auto-increment or Auto-decrement Addressing Mode
 Direct Addressing Mode
 Indirect Addressing Mode
 Displacement Address Addressing Mode
 Relative Addressing Mode
 Index Addressing Mode
 Stack Addressing Mode

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Central Processing Unit

Memory Address Register (MAR)

Arithmetic Logic Unit- ALU

It performs all arithmetic operations and Boolean logical operations.

It can be characterized on the basis of design and implementation by:

 Defining basic elements of the processor

 The inputs to control unit are:

 The outputs from control unit are:

The Instruction Cycle

 Fetch - read next instruction from memory into CPU

o An Operation code field that specifies the operation to be performed.

 Single accumulator organization:- All the operations are performed with an

Effective address (EA):

The most well known addressing mode are:

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