Digital Pulse Processing

in Nuclear physics
 Traditional chain: example
charge sensitive preamplifiers

PEAK SENSING ENERGY

ADC
Charge Sensitive
Preamplifier
Trigger, Coincidence
DETECTOR

LOGIC POSITION,
SHAPING UNIT IDENTIF.
AMPLIFIER
DISCRIMINATOR
Fast Out

TIMING
TDC

SHAPING TIME,
THRESHOLDS COUNTING
GAIN SCALER

TIME Q = ENERGY

DETECTOR
• Typically used with
semiconductor detectors (Si, Ge)
DECAY TIME
RISE TIME

PREAMPLIFIER • The preamp. output signal is

PEAK AMPLITUDE = ENERGY rather slow (typ. decay time =
50us)
SHAPING AMPLIFIER

TIMING AMPLIFIER • Very high energy resolution

(good S/N ratio)
ZERO CROSSING

CFD
This delay doesn’t depend
on the pulse amplitude
CFD OUTPUT
Digitizers（flash ADC） vs Oscilloscopes
• The principle of operation of a waveform digitizer is the same as the
digital oscilloscope: when the trigger occurs, a certain number of
samples is saved into one memory buffer (acquisition window) Memory Buffer
TIME STAMP
• However, there are important differences: S[0]
S[1]
• no dead-time between triggers (Multi Event Memory) S[2]
S[3]
• multi-board synchronization for system scalability
• high bandwidth data readout links S[n-1]
• on-line data processing (FPGA or DSP)

ACQUISITION WINDOW

Sampling Clock
TRIGGER
Time
PRE POST TRIGGER
Benefits of the digital approach
• One single board can do the job of several analog modules
• Full information preserved: A/D conversion as early as possible, data
reduction as late as possible
• Reduction in size, cabling, power consumption and cost per channel
• High reliability and reproducibility
• Flexibility (different digital algorithms can be designed and loaded at
any time into the same hardware)

DIGITIZER COMPUTER
DETECTOR
ENERGY

IN TIMING

A/D SAMPLES
DPP COUNTING INTERF
SHAPE

VERY HIGH DATA

THROUGHPUT
Evolution of DAQ >20000cps

~ 5000cps

Digital

~ 800cps VME • NSCL DDAS DAQ

- iThemba LABS DAQ
• GRITINA DAQ （ASIC）
• HiRA DAQ （ASIC）
• …

CAMAC 7
 Digitization

Analog: Digital:
Continuous function V of Discrete function Vk of discrete
continuous variable time t: sampling variables tk with k= integer:
V(t) Vk=V(tk)
 Periodic (Uniform) Sampling
1)Sampling is a continuous to discrete-time conversion

7
6
5
4
3
2
1
0
-3 -2 -1 0 1 2 3 4

Most common sampling is periodic

Ccustomary in DSP
! " = ! "$% − ∞ < n < +∞ ( ): for continuous variables
[ ]: for discrete variables

Ts is the sampling period in second

fs = 1/Ts is the sampling frequency in Hz

Sampling frequency in radian-per-second Ws=2pfs rad/sec

 Sampling Theorem: Aliasing Error

Continuous, sinusoidal signal frequency f sampled at frequency fs (fs < f)

Aliasing: 混淆，混叠

Aliasing misrepresents the frequency as a lower frequency f < 0.5fs

the aliasing error: If fs<f, another frequency component with the same set of
samples as the original signal appears in the sampled signals. Thus, the frequency
component can be mistaken for the lower frequency component.
 Sampling theorem
A continuous-time signal x(t) with frequencies no higher than fmax(Hz) can be
reconstructed exactly from its sample x[n]=x(nTs), if samples are taken at a rate
fs=1/Ts that is greater than 2fmax
• Consider a band-limited signal x(t) with Fourier Transform X(!)
#(&) X(()

• Sampling x(t) is equivalent to multiply it by train of impulses:

#(&)

¥
#$(&) xs (t ) = x(t ) å d (t - nTs )
n =-¥

⨂
 !(#) X(%)

Ts
¥
xs (t ) = x(t ) å d (t - nTs )
n =-¥

• to reconstruct the original signal x(t), we can use an ideal lowpass filter(LPF)
on the sampled spectrum
Example X(")
fmax=5 Hz

-5 5 f (Hz)

LPF: low pass filter

x(t) can be easily

recovered by LPF
fs=20 Hz

x(t) can be
recovered
fs=10 Hz by sharp LPF

x(t) can not

be recovered
fs=5 Hz
If fs< 2fmax sampling is irreversible due to aliasing error.

reconstructing the original signal x(t) is only possible if the shaded

parts do not overlap. This means that fs must be more than TWICE that
of fBW(=fmax).

fs=2fBW is generally known as the Nyquist Frequency 尼奎斯特频率

The minimum sampling rate that must be exceeded is known as the
Nyquist Rate

Note:
in practice the sampling frequency is usually >5x the signal bandwidth

Semiconductor(Ge,Si+CSP) : fs >60 MHz(energy)

Plastic scintillator(PMT) : fs >500MHz(timing)
 Anti-aliasing Filter

The bandwidth of any real life analog signal is infinite.

fBW→ ∞

After sampling with fs:

After reconstruction:
Use low-pass filter to restrict bandwidth of input signal to satisfy Nyquist
criterion, fs > fBW. Then reconstruction can be done without distortion or
corruption to lower frequencies

Typical ADC configuration: The input signal is first amplified or attenuated

in order to have an optimal match with the input range of the AD converter.
A proper antialiasing filter is then applied before the sampling.
Output Amplitude Low pass filter

Frequency

Effects of low pass filter

 • Uses the 2N resistors to form a ladder
FLASH ADC
voltage divider, which divides the
reference voltage into 2N equal intervals.
Vin
• Use sthe2N-1 comparators to determine
in which of these 2N voltage intervals the
input voltage Vi lies.

• The Combinational logic then

translates the information provided by the
output of the comparators

• This ADC does not require a clocks so

the conversion time is essentially set by
the settling time of the comparators and
the propagation time of the combinational
logic.

Very Fast (Fastest)

 Quantization

S/H

Sample-and-hold (S/H): ADC

The only information retained is the instantaneous
value of the signal when the periodic sampling
takes place.

The ADC converts the voltage to the

nearest integer number.
12bit digitizer:
0-4.095V -> 0-4095
LSB (Least Significant Bit) = 1 mV
 Quantization error

-
maximum quantization error: ±1⁄2 LSB
!D：SD of quantization noise ~0.29LSB
!6 : SD of random noise in the analog signal

The total noise on the digitized signal != !89 + !;9

When faced with the decision of how many bits are needed in a system, ask two questions:
(1) How much noise is already present in the analog signal?
(2) How much noise can be tolerated in the digital signal?
An analog signal that varies less than ±1⁄2 LSB can become stuck on the same
quantization level during digitization. Dithering is a common technique for
improving the digitization of slowly varying signals.

SD of added noise
2/3 LSB

Dithering improves this situation by adding a small

amount of random noise to the analog signal.
The added noise causes the digitized signal to toggle
between adjacent quantization levels, providing more
information about the original signal.
 Sampling ADCs
• Bit resolution: 8-14
• Integral non-linearity
The maximum deviation from this ideal linear behavior.
A typical absolute value is 0.2−1 LSB.
• Dynamic range: ~2V
• Digitized speed: 40MSPS-1GSPS

• tradeoff: speed/resolution

Higher sampling rate

-> lower resolution

Typical values for high-speed ADCs are 1−2 bits below the “physical” number of bits.
ENOB(Effective number of bits )= 10~11 bits for 12-bit ADC.
 Digital signal processing

The aim of the Digital Pulse Processing is to make a “all in digital” version of
analog modules such as Shaping Amplifiers, Discriminators, QDCs, Peak
Sensing ADCs, TDCs, Scalers, Coincidence Units, etc.

Algorithms: Trigger filter, energy filter, time filter etc.

 Field-Programmable Gate Array (FPGA)
•FPGAs are an array of programmable logic cells interconnected by a network
of wires and configurable switches.
•A FPGA has a large number of these cells available to form multipliers, adders,
accumulators and so forth in complex digital circuits.
•FPGAs can be infinitely reprogrammed in-circuit in only a small fraction of a
second.
Implement your design using VHDL or Verilog
Inside the FPGA
 Digital Filters
shaper – modification of signal shape(time domain)
Filter – modification of signal bandwidth(frequency domain)
Shaper=Filter
• Analog filters
- Electronic components are cheap.
- Large dynamic range in amplitude and frequency.
- Real-time.
- Low stability of resistors, capacitors and inductors due to temperature.
- Difficult to get the components accuracy as calculated by the formula.

• Digital filters:
- Better performance than analog filters
- Digital filters are programmable.
- The characteristics of DSP filters are predictable.
- Unlike analog filters, the performance of digital filters is not dependent on the environment,
such as temperature or voltage
- In general, complex digital filters can be implemented at lower cost than complex analog
filters.
 The Moving Average as a Filter
The moving average is often used for smoothing data in the presence of noise. It is
actually one of the most common filters in signal processing.
The moving average of length N can be defined as

The filter is usually implemented recursively, in a very efficient way.

This recursive implementation will be much faster than convolution. Each new value of y can
be computed with only two additions, instead of the N additions that would be necessary for a
straightforward implementation of the definition.
Trapezoidal Filter -Energy

Moving average Moving average

Analog（RC-(CR)6） • the digital shaper has less pile-up (even

with the same FWHM duration).

• the pile-up timing for the digital system is

very clear: due to the pulse symmetry, there
is no pile-up after a fixed time.
Trapezoidal Filter Algorithm

L=3 G=2

S1 S2 S1 S2

S1 S2 S1 S2
L=3 G=2

S1 S2 S1 S2

S1 S2 S1 S2
S1 S2 S1 S2

S1 S2 S1 S2
Preamplifier decay time and Baseline
With a RC-type preamplifier, the slope of the preamplifier is rarely zero.
Every step decays exponentially back to the DC level of the preamplifier.

Statistical fluctuation in Q
Fluctuation in the baseline
Baseline Correction
The baseline offset can be corrected by calculating the average baseline at the start of
the trace (e.g. over first 100 samples) and subtracting that average from the raw signal:
Pole-Zero Correction
Using the decay constant τ, the baselines can be mapped back to the DC level.
This allows precise determination of energy, even if the pulse sits on the falling slope of a
previous pulse.
Offset due to decay time:

!−#
!

Trapezodial Filter
Exponential pulses with different rise time and the corresponding trapezoidal pulse shapes
The digital spectroscopy can offer similar or even better energy resolution especially for very
high count rates, compare to conventual techniques.

HPGe

4 kcps 8 kcps
Trigger Filter
• trigger data acquisition
• determine the time window of wave caputure
- time window before/after trigger
Self-trigger for oscilloscopes:
the trigger is generated as soon as the input signal crosses that threshold.
- False triggers from base-line fluctuation or pile-up can cause loss of important events

The digital filters are able to reject the noise, cancel the baseline and to do shape and
timing analysis for this purpose.
 Slow filter(Large L and G)

fast filter(small L and G)

timestamp
Trigger Modes(CAEN)

External Trigger
External VETO
Digital timing measurements
Trigger filter(default): leading edge discrimination with interrelation

CFD filter：
Trace[k]: sample of trigger filter
D: time delay
F: fraction
L:The running averaging of length
for noise reduction
Total error on digital Constant Fraction timing (f =0.2) performed by
various digital sampling systems
 Fast timing with Digital CFD

12-bit 500MHz flashADC

http://www.xia.com/Papers/P500_TNS.pdf
Pile-up Rejection
Full digital acquisition chain

waveform : 500Hz of 1us long traces(12bit) at 100MSPS,

Data stream： ~100kB/second/channel=360MB/hour/channel！

timestamp

Digital system is implicitly synchronized. Any correlation can be measured

with precision only given by the accuracy of the clock
 g-n Discrimination: test results

Reproduction, transfer, distribution of part or all of the contents in this document in any form without prior written permission of CAEN S.p.A. is prohibited
Pulse Shape Discrimination in Silicon
 To DSP or not to DSP?
Use DSP for …
resolution & throughput optimisation
variable detector pulse shapes

Use analogue signal processing for …

fast shaping
systems not sensitive to, or with fixed, detector pulse shapes
high density (low area, low power) applications

Expect …
ADCs with higher precision, speed & density
lower power & cost

more powerful FPGAs

an expanding range of applications