DIGITAL ELECTRONICS 1 CIT-253

PRACTICAL NO. 08: CONSTRUCTING A COMBINATIONAL LOGIC CIRCUIT

OBJECTIVE INPUTS OUTPUT

A B Y
To construct a combinational logic circuit from a given truth table. 0 0 1
0 1 1
APPARATUS
1 0 0
1 1 1
Digital trainer, Connecting wires, truth table, 74LS32IC, 74LS04IC, and
their pin configurations.
BOOLEAN EXPRESSION Key = A
0 1 2 Y=A'+B
A' 1
̅ 𝐵̅ + 𝐴.
𝑌 = 𝐴. ̅ 𝐵 + 𝐴. 𝐵 A'+B 3
2
̅ 𝐵̅ + 𝐵(𝐴̅ + 𝐴)
=> 𝑌 = 𝐴. 1
̅ 𝐵̅ + 𝐵(𝐼)
=> 𝑌 = 𝐴. Key = B
̅ 𝐵̅ + 𝐵
=> 𝑌 = 𝐴.
=> 𝑌 = 𝐴̅ + 𝐵 Y
VCC VCC
Key = A NOT OR
PROCEDURE 0 1A
1Y
VCC
6A
1
2
1A
1B
VCC
4B
14
13
2A 6Y 3 1Y 4A 12
Key = B 2Y 5A 4 2A 4Y 11
3A 5Y 5 2B 3B 10
1. Derive the Boolean expression from the truth 0 3Y
GND
4A
4Y
6
7
2Y
GND
3A
3Y
9
8

table using the SOP method. 74LS04D 74LS32D

2. Set up the lab with the required apparatus:
a. Digital Trainer, connecting wires, 74LS32IC, and 74LS04IC.
3. Connect the trainer kit to an AC power supply.
4. Identify the pins of the 74LS32IC and 74LS04IC from their pin configuration diagrams.
5. Fix both ICs on the trainer’s breadboard.
6. Connect the ground to pin 7 and VCC 5V to pin 14 of both ICs through connecting wires.
7. Use a NOT gate to invert the first input variables before applying them to the OR gate.
8. Connect the inputs of one logic gate (i.e., pin 1) to the logic switch of the trainer (i.e., S1), and
its output (i.e., pin 2) to the first input of the OR gate (i.e., pin 1) through connecting wires.
9. Connect the second input of the OR gate (i.e., pin 2) to the logic switch of the trainer (i.e., S2)
through connecting wires. INPUTS OUTPUT
10. For output indication, connect the output pin SW1 Output of SW2 LED
(i.e., pin 3) of the IC to one of the LEDs (logic (Pin1) NOT (Pin2) (Pin2) (ON/OFF)
indicator) of the trainer (i.e., L0) through as input of
connecting wires. AND (Pin1)
11. Apply various input combinations and 0 1 0
observe the output for each one. 0 1 1
12. Verify the given truth table for each 1 0 0
input/output combination. 1 0 1
13. Switch off the AC power supply.
 DIGITAL ELECTRONICS 2 CIT-253

RESULT

A logic circuit has been successfully constructed from the truth table and verified.
PRECAUTIONS

VCC and ground pins must not be interchanged while making connections. Otherwise, the chip will
be damaged.

*****END*****

PRACTICAL NO. 09: VERIFYING THE UNIVERSAL PROPERTY OF A NAND GATE

(74LS00IC) NAND Y Key = A 1
3
OBJECTIVE 1 2

To realize why a NAND gate is known as the universal gate by implementing:

➢ NOT using NAND Input Output
➢ AND using NAND SW0 LED
➢ OR using NAND (Pin1) (ON/OFF)
APPARATUS 0
1
Digital trainer, Connecting wires, 74LS00IC, and its pin configuration. Not Gate

THEORY
Key = A Y1
A NOT gate can be made from the NAND gate by connecting 1 1 4
3 6
2 5
all inputs together. 0 NAND NAND
Key = B

̅̅̅̅̅̅
𝐘 = (𝐀 ̅)
∙ 𝐀) = (𝐀
INPUTS OUTPUT
SW1 SW0 LED
(Pin2) (Pin1) (ON/OFF)
An AND gate can be made from two NAND gates. A NAND 0 0
gate is used to invert the output of the first NAND gate to 0 1
form the AND function. 1 0
1 1
𝐘 = ̅̅̅̅̅̅
𝐀∙𝐁=𝐀∙𝐁 AND Gate
An OR gate can be made from three NAND gates. The two NAND gates are used to invert the input
variables before they are applied to the third NAND gate to
Key = A 1 NAND Y2
form the OR function. 1 3
2 9
8
𝐘 = ̅̅̅̅̅̅
̅̅̅̅
𝐀∙𝐁 ̅=𝐀
̿+𝐁
̿ =𝐀+𝐁
0
4
6
10

5 NAND
Key = B NAND
 DIGITAL ELECTRONICS 3 CIT-253

PROCEDURE

1. Verify that NAND gates can be used to produce any logic function.
2. Set up the lab with the required apparatus: Digital Trainer, connecting wires, and 74LS00IC.
3. Connect the trainer kit to an AC power supply.
4. Identify the pins of the 74LS00IC from the pin INPUTS OUTPUT
configuration diagram. SW1 SW0 LED
5. Fix the 74LS00IC on the breadboard of the trainer. (Pin2) (Pin1) (ON/OFF)
6. Connect the ground to pin 7 and VCC 5V to pin 14 of 0 0
the IC through connecting wires. 0 1
7. To verify NAND as NOT gate: 1 0
a. Short the inputs of any one logic gate (i.e., pin 1 1
1 & 2) and connect them to the logic sources. OR Gate
b. Connect the output (i.e., pin 3) to the logic indicator through connecting wires.
8. To verify NAND as AND gate:
a. Use two gates of the IC. Connect the inputs of the
first logic gate (i.e., pin 1 & 2) to the logic sources. Y
b. Connect the output (i.e., pin 3) to the shorted pins VCC
Key = A
of the second logic gate (i.e., pin 4 & 5). 0 1A VCC
1B 4A
c. Connect the output of the second gate (i.e., pin 6) to 1Y 4B
2A 4Y
2B 3A
the logic indicator. 2Y 3B
GND 3Y
9. To verify NAND as OR gate:
74LS00D
a. Use three gates of the IC. Short the inputs of both
gates (i.e., pin 1 & 2 are short, and pin 4 & 5 are short) and connect them to the logic
sources.
b. Connect the outputs (i.e., pin 3 & pin 6) as inputs to
the third logic gate (i.e., pin 9 & 10). Y1
c. Connect the output of the third gate (i.e., pin 8) to VCC
Key = A
the logic indicator. 1 1A VCC
1B 4A
10. Apply various input combinations and observe output for 1
1Y 4B
2A 4Y
2B 3A
each one. Key = B 2Y 3B
GND 3Y
11. Verify the truth table of the AND, OR, and NOT gates
74LS00D
separately for each input/output combination.
12. Switch off the AC power supply.
VCC
RESULT Key = A
0 1A VCC
1B 4A
It is realized that NAND gates can be used to produce any 1Y 4B Y2
2A 4Y
1 2B 3A
logic function. 2Y 3B
Key = B GND 3Y

PRECAUTIONS 74LS00D

VCC and ground pins must not be interchanged while making connections. Otherwise, the chip will
be damaged.
 DIGITAL ELECTRONICS 4 CIT-253

*****END*****

PRACTICAL NO. 10: VERIFYING THE UNIVERSAL PROPERTY OF A NOR GATE (74LS02IC)

OBJECTIVE
Key = A Y1
2
0 NOR 1
To demonstrate why a NOR gate is known as the universal gate by 3

implementing:
Input Output
➢ NOT using NOR
SW0 LED
➢ AND using NOR
(Pin1) (ON/OFF)
➢ OR using NOR
0
APPARATUS 1

Digital trainer, Connecting wires, 74LS02IC, and its pin

configuration. Y
VCC
Key = A
1Y VCC
0 1A 4Y
THEORY 1B 4B
2Y 4A
2A 3Y
A NOT gate can be made from a NOR gate by connecting all 2B 3B
GND 3A
inputs together.
74LS02D
𝑌 = ̅̅̅̅̅̅̅̅
𝐴 + 𝐴 = 𝐴̅
Key = A Y2
An OR gate can be made from two NOR gates. A NOR gate is 0
2 5
NOR 1 NOR 4
used to invert the output of the first NOR gate to form the OR 3 6
1
function.
Key = B

𝑌 = ̅̅̅̅̅̅̅̅
𝐴+𝐵 =𝐴+𝐵 INPUTS OUTPUT
SW1 SW0 LED
An AND gate can be made from three NOR gates. The two NOR
(Pin2) (Pin1) (ON/OFF)
gates are used to invert the input variables before they are
0 0
applied to the third NOR gate to form the AND function.
0 1
𝑌 = ̅̅̅̅̅̅̅̅
𝐴̅ + 𝐵̅ = 𝐴̿. 𝐵̿ = 𝐴. 𝐵 1 0
1 1
PROCEDURE
OR Gate
1. Verify that NOR gates can be used to produce any logic function.
 DIGITAL ELECTRONICS 5 CIT-253

2. Set up the lab with the required apparatus: Digital

VCC
Trainer, connecting wires, and 74LS02IC. Y1
Key = A
3. Connect the trainer kit to an AC power supply. 0
1Y VCC
1A 4Y
4. Identify the pins of the 74LS02IC from the pin 1B 4B
2Y 4A
configuration diagram. 2A 3Y
1 2B 3B
5. Fix the 74LS02IC on the breadboard of the trainer. GND 3A
6. Connect the ground to pin 7 and VCC 5V to pin 14 of the Key = B
74LS02D
IC through connecting wires.
7. To verify NOR as NOT gate:
a. Short the inputs of any one logic gate (i.e., pin 2
Key = A 2 Y3
& 3) and connect them to the logic sources. 1
1 3
NOR 8
b. Connect the output (i.e., pin 1) to the logic NOR 10
5 9
indicator through connecting wires. 1
6
NOR 4

8. To verify NOR as OR gate: Key = B

a. Use two gates of the IC. Connect the inputs of the first logic gate (i.e., pin 2 & 3) to the
logic sources. INPUTS OUTPUT
b. Connect the output (i.e., pin 1) to the shorted SW1 SW0 LED
pins of the second logic gates (i.e., pin 5 & 6). (Pin2) (Pin1) (ON/OFF)
c. Connect the output of the second gate (i.e., pin 0 0
4) to the logic indicator. 0 1
9. To verify NOR as AND gate: 1 0
a. Use three gates of the IC. Short the inputs of both
1 1
gates (i.e., pin 2 & 3 are short, and pin 5 & 6 are
AND Gate
short) and connect them to the logic sources.
b. Connect the outputs (i.e., pin 1 & pin 4) as inputs
VCC
to the third logic gate (i.e., pin 8 & 9).
Key = A
c. Connect the output of the third gate (i.e., pin 10) 1Y VCC
1 1A 4Y Y2
to the logic indicator. 1B 4B
2Y 4A
10. Apply various input combinations and observe the 1 2A 3Y
2B 3B
output for each one. Key = B GND 3A

11. Verify the truth table of the AND, OR, and NOT gates 74LS02D
separately for each input/output combination.
12. Switch off the AC power supply.
RESULT

It is realized that NOR gates can be used to produce any logic function.
PRECAUTIONS:

➢ VCC and ground pins must not be interchanged while making connections. Otherwise, the chip
will be damaged.
➢ The pin configuration for the NOR gate is different from other gates.
 DIGITAL ELECTRONICS 6 CIT-253

*****END*****

PRACTICAL NO. 11: VERIFYING DE MORGAN'S FIRST THEOREM

OBJECTIVE
Key = A
Y=(A+B)'
0
To verify De Morgan’s first theorem 2
1
3
THEORY 0 NOR
Key = B
The complement of a sum of variables is equal to the product of the complements of the individual
variables. Key = A NOT
0 1 2 Y=A'.B'
̅̅̅̅̅̅̅̅
𝐴 + 𝐵 = 𝐴̅ ∙ 𝐵̅ 1
3
2
1 2
APPARATUS 0 AND
Key = B NOT
Digital trainer, Connecting wires, 74LS04IC, 74LS00IC, and 74LS02IC, and their pin configurations.
PROCEDURE
Y
1. Verify De Morgan’s first theorems. VCC
Key = A NOR
2. Set up the apparatus: 0 1Y VCC
1A 4Y
a. Digital Trainer, connecting wires, and ICs. 1B 4B
3. Connect the trainer kit to an AC power supply. Key = B 2Y 4A
2A 3Y
4. Identify the pins of the ICs - 74LS00IC (Negative- 0 2B 3B
GND 3A
AND), 74LS02IC (Negative-OR), and 74LS04IC.
74LS02D
5. Fix all the ICs on the trainer’s breadboard.
6. Connect the ground to pin 7 and VCC 5V to pin 14 of
VCC VCC
all the ICs through connecting wires. Key = A Y2
0
7. To verify De-Morgan’s first theorem: 1A VCC
1Y 6A
1A VCC
1B 4B
8. For L.H.S (Left Hand Side): Key = B 2A 6Y 1Y 4A
2Y 5A 2A 4Y
1 3A 5Y 2B 3B
a. Connect the inputs of any one logic gate of 3Y 4A 2Y 3A
GND 4Y GND 3Y
the NOR IC (i.e., pin 2 & 3) to the logic 74LS04D 74LS08D
sources.
b. Connect its output (i.e., pin 1) to the logic indicator through connecting wires.
c. Observe and verify the truth table of the NOR gate for each input/output combination
of the L.H.S (i.e., ̅̅̅̅̅̅̅̅
𝐴 + 𝐵 ). INPUTS OUTPUT of 1st Theorem
9. For R.H.S (Right Hand Side): ̅̅̅̅̅̅̅̅
𝑨+𝑩 ̅∙𝑩
𝑨 ̅
a. Connect the inputs of any one logic gate SW1 SW0 LED(On/Off) LED(On/Off)
of the Negative-AND IC (i.e., pin 2 & 3) to 0 0
the logic sources. 0 1
b. Connect its output (i.e., pin 1) to the 1 0
logic indicator through connecting 1 1
wires. De Morgan’s first theorems
 DIGITAL ELECTRONICS 7 CIT-253

c. Observe and verify the truth table of the Negative-AND gate for each input/output
combination for the R.H.S (i.e., 𝐴̅ ∙ 𝐵̅ ).
̅̅̅̅̅̅̅̅
10. From both truth tables, De-Morgan’s first theorem has been proved: 𝐴 + 𝐵 = 𝐴̅ ∙ 𝐵̅
11. Repeat the process for all other logic gates.
12. Switch off the AC power supply.
RESULT

De Morgan’s first theorem has been verified: ̅̅̅̅̅̅̅̅

𝐴 + 𝐵 = 𝐴̅ ∙ 𝐵̅
PRECAUTIONS

➢ VCC and ground pins must not be interchanged while making connections. Otherwise, the chip
will be damaged.
➢ The pin configuration for the NOR gate is different from other gates.
*****END*****

PRACTICAL NO. 12: TO VERIFYING DE MORGAN’S SECOND THEOREM

OBJECTIVE
Key = A
Y=(A.B)'
0
To verify De Morgan’s second theorem 1
3
2
NAND
1
THEORY
Key = B
The complement of a product of variables is equal to the sum of the complements of the individual
variables.
̅̅̅̅̅̅
𝐴 ∙ 𝐵 = 𝐴̅ + 𝐵̅
Y VCC
APPARATUS Key = A
1A VCC
0 1B 4A
1Y 4B
Digital trainer, Connecting wires, 74LS04IC, 74LS00IC, and 74LS02IC, 1
2A 4Y
2B 3A
2Y 3B
and their pin configurations. Key = B GND 3Y

74LS00D
PROCEDURE

1. Verify De Morgan’s second theorems. VCC VCC

Key = A Y2
2. Set up the apparatus: Digital Trainer, connecting 0 1A VCC 1A VCC
wires, and ICs. Key = B
1Y 6A
2A 6Y
1B 4B
1Y 4A
2Y 5A 2A 4Y
3. Connect the trainer kit to an AC power supply. 1 3A 5Y 2B 3B
3Y 4A 2Y 3A
4. Identify the pins of the 74LS00IC (Negative-AND), GND 4Y GND 3Y

74LS02IC (Negative-OR), and 74LS04IC from their 74LS04D 74LS32D

pin configuration diagrams.
 DIGITAL ELECTRONICS 8 CIT-253

5. Fix all the four ICs on the trainer’s breadboard.

6. Connect the ground to pin 7 and VCC 5V to pin 14 Key = A
1 Y=A'+B'
of all the ICs through connecting wires. 0 NOT 2
1
OR 3
7. To verify De-Morgan’s second theorem: 3
2
1 NOT 4
8. For L.H.S (Left Hand Side): Key = B
a. Connect the inputs of any one logic gate of
the NAND IC (i.e., pin 1 & 2) to the logic sources.
b. Connect its output (i.e., pin 3) to the logic indicator through connecting wires.
c. Observe and verify the truth table of the NAND gate for each input/output
combination of the L.H.S (i.e., ̅̅̅̅̅̅
𝐴 ∙ 𝐵 ).
9. For R.H.S (Right Hand Side):
a. Connect the inputs of any one logic gate of the Negative-OR IC (i.e., pin 1 & 2) to the
logic sources.
b. Connect its output (i.e., pin 3) to the logic indicator through connecting wires.
a. Observe and verify the truth table of
the Negative-OR gate for each INPUTS OUTPUT of 2nd Theorem
input/output combination for the ̅̅̅̅̅̅
𝑨∙𝑩 ̅+𝑩
𝑨 ̅
SW1 SW0
R.H.S (i.e., 𝐴̅ + 𝐵̅ ). LED(On/Off) LED(On/Off)
10. From both truth tables, De-Morgan’s second 0 0
theorem has been proved: ̅̅̅̅̅̅𝐴 ∙ 𝐵 = 𝐴̅ + 𝐵̅ . 0 1
1 0
11. Repeat the process for all other logic gates.
1 1
12. Switch off the AC power supply.
RESULT

De Morgan’s second theorem has been verified: ̅̅̅̅̅̅

𝐴 ∙ 𝐵 = 𝐴̅ + 𝐵̅.
PRECAUTIONS

➢ VCC and ground pins must not be interchanged while making connections. Otherwise, the chip
will be damaged.
➢ The pin configuration for the NOR gate is different from other gates.
*****END*****