1.

Open MPLAB X

2. Select File > New Project (or click )

3. Select Standalone Project and click Next

4. Select the XC32 compiler and click Next

5. Name the project

6. Select a save location you can always access

7. Click Finish

8. Right-click Source Files under project name

9. Select New > Other…

10. Select C and C Source File, then click Next

11. Name the source file and click Finish

12. Make sure to include plib.h

Pin Pin Name Description
No.

1 MCLR/VPP/RE3 MCLR: Master Clear(RESET) Input, VPP:programming voltage input, RE3: I/O pin of PORTE, PIN 3

2 RA0/AN0 RA0: I/O pin of PORTA, PIN 0, AN0: Analog input 0

3 RA1/AN1 RA1: I/O pin of PORTA, PIN 1, AN1: Analog input 1

4 RA2/AN2/VREF-/CVREF RA2: I/O pin of PORTA, PIN 2, AN2: Analog input 2, VREF-: A/D reference voltage (low) input
CVREF: Analog comparator reference output

5 RA3/AN3/VREF+ RA3: I/O pin of PORTA, PIN 3, AN3: Analog input3, VREF+: A/D reference voltage (high) input
6 RA4/T0CKI/C1OUT/RCV RA4: I/O pin of PORTA, PIN 4, T0CKI: Timer0 external clock input, C1OUT: Comparator 1 output
RCV:External USB transceiver RCV input

7 RA5/AN4/SS/HLVDIN/C2OUT RA5: I/O pin of PORTA, PIN 5, AN4: Analog input 4, SS: SPI slave select input, HLDVIN:
High/Low-Voltage Detect input, C2OUT: Comparator 2 output

8 RE0/AN5/CK1SPP RE0: I/O pin of PORTE, PIN 0, AN5: Analog input 5, CK1SPP: SPP clock 1 output

9 RE1/AN6/CK2SPP RE1: I/O pin of PORTE, PIN 1, AN6: Analog input 6, CK2SPP: SPP clock 2 output

10 RE2/AN7/OESPP RE2: I/O pin of PORTE, PIN 2, AN6: Analog input 7, OESPP : SPP Enabled output

11 VDD Positive Power Supply (+5V)

12 VSS Ground

13 OSC1/CLKI OSC1:Oscillator pin 1, CLKI: External clock source input

14 OSC2/CLKO/RA6 OSC2: Oscillator pin 2, CLKO: clock source output, RA6: I/O pin of PORTA, PIN 6

15 RC0/T1OSO/T13CKI RC0: I/O pin of PORTC, PIN 0, T1OSO :Timer1 oscillator output, T13CKI: Timer1/Timer3 external
clock input

16 RC1/T1OSI/CCP2/UOE RC1: I/O pin of PORTC, PIN 1, T1OSI: Timer1 oscillator input, CCP2:Capture 2 input/Compare 2
output/PWM2 output, UOE: External USB transceiver OE output

17 RC2/CCP1/P1A RC2: I/O pin of PORTC, PIN 2, CCP1: Capture 1 input/Compare 1 output/PWM1 output.
P1A :Enhanced CCP1 PWM output, channel A

18 VUSB VUSB:Internal USB 3.3V voltage regulator output

19 RD0/SPP0 RD0: I/O pin of PORTD, PIN 0, SPP0: Streaming Parallel Port data

20 RD1/SPP1 RD1: I/O pin of PORTD, PIN 1, SPP1: Streaming Parallel Port data

21 RD2/SPP2 RD2: I/O pin of PORTD, PIN 2, SPP2: Streaming Parallel Port data

22 RD3/SPP3 RD3: I/O pin of PORTD, PIN 3, SPP3: Streaming Parallel Port data

23 RC4/D-/VM RC4: I/O pin of PORTC, PIN 4, D-: USB differential minus line (input/output), VM: External USB
transceiver VM input

24 RC5/D+/VP RC5: I/O pin of PORTC, PIN 5, D+: USB differential plus line (input/output). VP: External USB
transceiver VP input

25 RC6/TX/CK RC6: I/O pin of PORTC, PIN 6, TX: EUSART asynchronous transmit, CK: EUSART synchronous
clock (see RX/DT).

26 RC7/RX/DT/SDO RC7: I/O pin of PORTC, PIN 7, RX: EUSART asynchronous receive, DT: EUSART synchronous data
(see TX/CK). SDO: SPI data out

27 RD4/SPP4 RD4: I/O pin of PORTD, PIN 4, SPP4: Streaming Parallel Port data

28 RD5/SPP5/P1B RD5: I/O pin of PORTD, PIN 5, SPP5: Streaming Parallel Port data, P1B: Enhanced CCP1 PWM
 output, channel B

29 RD6/SPP6/P1C RD6: I/O pin of PORTD, PIN 6, SPP6: Streaming Parallel Port data, P1C: Enhanced CCP1 PWM
output, channel C

30 RD7/SPP7/P1D RD7: I/O pin of PORTD, PIN 7, SPP7: Streaming Parallel Port data, P1D: Enhanced CCP1 PWM
output, channel D

31 VSS Ground

32 VDD Positive Power Supply (+5V)

33 RB0/AN12/INT0/FLT0/SDI/SDA RB0: I/O pin of PORTB, PIN 0, AN12: Analog input 12, INT0: External interrupt 0, FLT0: Enhanced
PWM Fault input (ECCP1 module), SDI: SPI data in, SDA: I2C data I/O

34 RB1/AN10/INT1/SCK/SCL RB1: I/O pin of PORTB, PIN 1, AN10: Analog input 10, INT1: External interrupt 1, SCK:
Synchronous serial clock input/output for SPI mode, SCL: Synchronous serial clock input/output
for I2C mode

35 RB2/AN8/INT2/VMO RB2: I/O pin of PORTB, PIN 2, AN8: Analog input 8, INT2: External interrupt 2, VMO: External
USB transceiver VMO output

36 RB3/AN9/CCP2/VPO RB3: I/O pin of PORTB, PIN 3, AN9: Analog input 9, CCP2: Capture 2 input/Compare 2
output/PWM2 output, VPO: External USB transceiver VPO output

37 RB4/AN11/KBI0/CSSPP RB4: I/O pin of PORTB, PIN 4, AN11: Analog input 11, KBI0: Interrupt-on-change pin
CSSPP: SPP chip select control output

38 RB5/KBI1/PGM RB5: I/O pin of PORTB, PIN 5, KBI1: Interrupt-on-change pin, PGM: Low-Voltage ICSP
Programming enable pin

39 RB6/KBI2/PGC RB6: I/O pin of PORTB, PIN 6, KBI2: Interrupt-on-change pin, PGC: In-Circuit Debugger and ICSP
programming clock pin.

40 RB7/KBI3/PGD RB7: I/O pin of PORTB, PIN 7, KBI3: Interrupt-on-change pin, PGD: In-Circuit Debugger and ICSP
programming data pin.

PIC18F4550 has 16 bit Instruction Set Architecture, (ISA) which provides a degree of freedom to programmers with various data types , registers ,
instructions, memory architecture, addressing modes, interrupt and IO operations. PIC18F4550 also has an Extended Instruction Set as a special
feature; it’s an optional extension to the PIC18 instruction set.

Memory Specifications: A PIC18F4550 has 256 bytes of EEPROM (Electrically Erasable and Programmable Read Only Memory), 2KB of SRAM (Static
RAM) and 32KB of flash memory which in return proves another degree of freedom to programmers.

Communication Protocol: PIC18F4550 is remarked as advanced, as it uses well sophisticated protocols for communications. The modern protocols
like USB, SPI, EUSART, are well supported in PIC18F4550. These technologies integrate with Nano Watt Technology (as mentioned before) to
produce PIC18F4550, a well equipped, low power consuming microcontroller.

A Dedicated ICD/ICSP Port allows the programmers to code and debug easily.

 Enhanced flash program and the 1KB Dual Access RAM for USB are used for buffering.
 PIC18F4550 consists of up to 13 channels for analog to digital converter. The converter accuracy amounts to 10-bit to convert analog
to digital signal relatively.
  PIC18F4550 is compatible to work with different internal and external clock sources. It comes with four built-in timers or an external
oscillator can be interfaced for clocking.
 The frequency limit for a PIC18F4550 is from 31 KHz to 48 MHz respectively.
 The microcontroller PIC18F4550 comes with ADC comparators and other such peripherals as an in-built feature.

USB SPEEDS and USB Registers in PIC18f4550

PIC18F4550 supports USB functionality that it comes with a USB2.0 hardware inbuilt which can operate in two USB standard speeds.

USB Speed supported by pic18f4550

 Full speed 12 MBit per second

 Low speed 1.2 MBit per second

The entire USB configuration is handled with UCFG register (USB CONFIGURATION REGISTER) which helps in defining the mode, or in which USB-
speed the microcontroller should perform. You can find more details about various USB Operation registers in PIC18F4550
like UCON, UCFG, USTAT, UADDR etc. from PIC18F4550 datasheet.

PORTS

40 pins of PIC18F4550 are divided into 5 ports. Out of which, 35 pins are Input-Output pins which can be configured for general Input or Output
by setting registers associated with them. Please Refer the Pinout diagram above for a clear idea about location of these pins on the
microcontroller.

Ports Number of pins Pin Name

PORTA 7 RA0-RA6
PORTB 8 RB0-RB7
PORTC 7 RC0-RC2, RC4-RC7 (Check the Pinout Diagram)
PORTD 7 RD0-RD7
PORTE 4 RE0-RE3

Registers Associated with Ports in PIC18F4550

Each port in pic18f4450 is associated with three 8 bit registers for IO operations.

1. TRISX (8 bit)
2. LATx (8 bit)
3. PORTx (8 bit)

TRISx : where X is the name of the ports either of A, B, C, D, E. For example TRISA, TRISB etc.This register assigns the direction of the pins (Input or
Output). For example “TRISB = 0xF0”, will set all the pins in port B to Output.

LATX: The latch registers reds and modifies the write operation on the value of I/O pin and stored the output data that is to be passed on to the
external hardware.

PORTX: Reads the device level, stores the Input level of the pins and reads and registers the input signal from the external device if the pin is
configured as Input.

A C18 compiler with Mplab ide or Mplab X with XC8 Compiler must be good to getting started with programming a PIC18F4550. A free version of
Software ide (Mplab and Mplab x) can be downloaded from microchip's website for getting started with pic18f4550. However other IDE software’s
such as MikroC can also used for programming a pic18f4550
#include <p18f4550.h>
#include <delays.h>

#define LD1 LATBbits.LATB7

#define LD2 LATBbits.LATB6

#define _XTAL_FREQ 20000000UL // This one is just for __delay_ms

#pragma config PLLDIV = 5 // PLL Prescaler Selection bits (Divide by 5 (20 MHz
oscillator input))
#pragma config CPUDIV = OSC2_PLL3 // System Clock Postscaler Selection bits ([Primary
Oscillator Src: /2][96 MHz PLL Src: /3])
#pragma config USBDIV = 2
#pragma config FOSC = HSPLL_HS // Oscillator Selection bits (HS oscillator, PLL
enabled (HSPLL))

// Everything is Off After this to make sure things do not go wrong

#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock
Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit
(Oscillator Switchover mode disabled)
#pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOR = OFF // Brown-out Reset Enable bits (Brown-out Reset
disabled in hardware and software)
#pragma config BORV = 3 // Brown-out Reset Voltage bits (Minimum setting)
#pragma config VREGEN = OFF // USB Voltage Regulator Enable bit (USB voltage
regulator disabled)
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is
placed on the SWDTEN bit))
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
#pragma config CCP2MX = OFF // CCP2 MUX bit (CCP2 input/output is multiplexed with
RB3)
#pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are
configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF // Low-Power Timer 1 Oscillator Enable bit (Timer1
configured for higher power operation)
#pragma config MCLRE = OFF // MCLR Pin Enable bit (RE3 input pin enabled; MCLR
pin disabled)
#pragma config STVREN = OFF // Stack Full/Underflow Reset Enable bit (Stack
full/underflow will not cause Reset)
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP
disabled)
#pragma config ICPRT = OFF // Dedicated In-Circuit Debug/Programming Port
(ICPORT) Enable bit (ICPORT disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction
set extension and Indexed Addressing mode disabled (Legacy mode))
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) is
not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) is
not code-protected)
#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) is
not code-protected)
#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) is
not code-protected)
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-
0007FFh) is not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM is not
code-protected)
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) is
not write-protected)
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) is
not write-protected)
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) is
not write-protected)
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) is
not write-protected)
#pragma config WRTC = OFF // Configuration Register Write Protection bit
(Configuration registers (300000-3000FFh) are not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block
(000000-0007FFh) is not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM is
not write-protected)
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh)
is not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh)
is not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh)
is not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh)
is not protected from table reads executed in other blocks)
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block
(000000-0007FFh) is not protected from table reads executed in other blocks)

void main(void)
{

TRISBbits.TRISB6 = 0; // Setting output

TRISBbits.TRISB7 = 0; // Output

while(1)
{
LD1=1;
LD2=0;

for ( int x=0; x<=10; x++ )

{
__delay_ms(20); // 20x10 200ms

}
LD1=0;
LD2=1;

for ( int x=0; x<=10; x++ )

{
__delay_ms(20);

}
}
}