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Computer Architecture

This document presents the teaching guide for the Computer Architecture subject taught in the Double Degree in Computer Engineering and Mathematics. The subject is taught in the second year and fourth semester, has 6 ECTS credits and is mandatory. It covers topics such as classifications of parallel architectures, parallel programming, architectures with instruction- and thread-level parallelism, and specific-purpose architectures. The goal is for students
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0% found this document useful (0 votes)
18 views6 pages

Computer Architecture

This document presents the teaching guide for the Computer Architecture subject taught in the Double Degree in Computer Engineering and Mathematics. The subject is taught in the second year and fourth semester, has 6 ECTS credits and is mandatory. It covers topics such as classifications of parallel architectures, parallel programming, architectures with instruction- and thread-level parallelism, and specific-purpose architectures. The goal is for students
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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TEACHING GUIDE OF THE SIGNATURE

COMPUTER ARCHITECTURE

MODULE SUBJECT COURSE SEMESTER CREDITS GUY


Computer Structure and
Branch specific training 2nd 4th 6 Mandatory
Architecture

FULL CONTACT ADDRESS FOR


TUTORING (Postal address, telephone,
TEACHERS) email, etc.)
Dept. Architecture Technology Computers
ETS Engineering Computer Science Telecommunications
Responsible teachers: C/Daniel Saucedo Aranda s/n 18071-Granada
Mancia Anguita López
More details can be consulted in the ugr directory
Julio Ortega Lopera
http://directorio.ugr.es/ and on the teaching platform
Theory teachers: https://swad.ugr.es/?CrsCod=5941 in
Julio Ortega Lopera Users->Teachers files (login required)

Practice teachers: TUTORING SCHEDULE


Francisco Manuel Ortuño Guzman
It can be consulted on the degrees website
More information https://swad.ugr.es/?CrsCod=5941 (Users->List of teachers)
http://grados.ugr.es/informaticaymatematicas/pages/
infoacademic a/profesorado/*/29 and on the teaching platform
https://swad.ugr.es/?CrsCod=5941 en
Users->Tutorial schedule (login required)

OTHER DEGREES WHICH COULD BE


GRADE IN WHICH IT IS TAUGHT
OFFERED
Double Degree in Computer Engineering and Mathematics

PREREQUISITES AND/OR RECOMMENDATIONS (if applicable)


It is recommended to improve the content and acquire skills of basic training subjects, particularly Computer Technology and Organization.

BRIEF DESCRIPTION OF CONTENTS (ACORDING TO THE DEGREE VERIFICATION


REPORT)
Structure and classification of parallel architectures (processors, multiprocessors, multicomputers and distributed systems). Classifying the
parallelism of an application. ILP architectures. Efficient ILP programming (basic code optimization mechanisms and algorithms).
Multithreaded processors, multicores and multiprocessors. Parallel programming. Benefit evaluation.

University INFORMATION ON DEGREES FROM THE UGR


from http://grados.ugr.es
Granada
GENERAL AND SPECIFIC COMPETENCES

Page 1
Subject Specific Competencies:

• R1. Ability to design, develop, select and evaluate computer applications and systems, ensuring their reliability, security and quality,
in accordance with ethical principles and current legislation and regulations.
• R4. Ability to prepare the technical specifications for a computer installation that meets current standards and regulations.
• R8. Ability to analyze, design, build and maintain applications in a robust, secure and efficient way, choosing the paradigm and the
most suitable programming languages.

• R9. Ability to know, understand and evaluate the structure and architecture of computers, as well as the basic components that
make them up.
• R14. Knowledge and application of the fundamental principles and basic techniques of parallel, concurrent, distributed and real-time
programming.
Title Specific Competencies:

• E1. Ability to conceive, write, organize, plan, develop and sign projects in the field of computer engineering whose purpose, in
accordance with the knowledge acquired, is the conception, development or exploitation of computer systems, services and
applications.
• E2. Ability to direct the activities that are the subject of projects in the field of computing in accordance with the knowledge acquired.
• E3. Ability to design, develop, evaluate and ensure the accessibility, ergonomics, usability and security of systems, services and
computer applications, as well as the information they manage.

• E4. Ability to define, evaluate and select hardware and software platforms for the development and execution of computer systems,
services and applications.
• E5. Ability to conceive, develop and maintain computer systems, services and applications using software engineering methods as
an instrument for quality assurance
• E6. Ability to conceive and develop centralized or distributed computer systems or architectures integrating hardware, software and
networks.
• E7. Ability to know, understand and apply the necessary legislation during the development of the profession of Technical Computer
Engineer and manage mandatory specifications, regulations and standards.
• E8. Knowledge of basic subjects and technologies, which enable them to learn and develop new methods and technologies, as well
as those that provide them with great versatility to adapt to new situations.
• E9. Ability to solve problems with initiative, decision making, autonomy and creativity. Ability to know how to communicate and
transmit the knowledge, skills and abilities of the profession of Technical Computer Engineer.
• E10. Knowledge to carry out measurements, calculations, valuations, appraisals, appraisals, studies, reports, task planning and
other similar computer work.
• E11. Ability to analyze and assess the social and environmental impact of technical solutions, understanding the ethical and
professional responsibility of the activity of the Technical Computer Engineer.
• E12. Knowledge and application of basic elements of economics and human resources management, project organization and
planning, as well as legislation, regulation and standardization in the field of computer projects, in accordance with the knowledge
acquired.
Transversal or General Competencies:

• T1. Analysis and synthesis capacity: Find, analyze, criticize (critical reasoning), relate, structure and synthesize information from
various sources, as well as integrate ideas and knowledge.
• T2. Organization and planning capacity as well as information management capacity
• T3. Oral and written communication skills in the academic and professional field with special emphasis on writing documentation
technique
• T4. capacity to solve problems
• T5. Ability to make decisions based on objective criteria (available experimental, scientific or simulation data) as well as the ability to
logically argue and justify said decisions, knowing how to accept other points of view
• T6. Capacity for the use and application of ICT in the academic and professional field.
• T7. Communication skills in a foreign language, particularly in English.
• T8. Capacity for teamwork.

University INFORMATION ON DEGREES FROM THE UGR


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• T9. Capacity for autonomous learning as well as initiative and entrepreneurial spirit
• T10. Motivation for quality and continuous improvement, acting with rigor, responsibility and professional ethics.

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• T11. Ability to adapt to technologies and future environments by updating professional skills.
• T12. Ability to innovate and generate new ideas.
• T13. Sensitivity towards environmental issues
• T14. Respect for fundamental rights and equality between men and women
• T15. Ability to project the knowledge, skills and abilities acquired to promote a society based on the values of freedom, justice,
equality and pluralism

OBJECTIVES (EXPRESSED AS EXPECTED RESULTS OF TEACHING)


• Explain the different classifications of parallel architectures.

them.
• Distinguish between parallel processing and distributed processing, and associate them with the architectures used to implement

• Relate the parallelism implicit in an application with the architectures that take advantage of it.
• Address the analysis and design of an ILP core.
• Describe what a compiler and programmer do to take advantage of an ILP architecture. Implement code that takes advantage of the
ILP architecture. Distinguish between the features of the processor, those of the compiler and those of the program that the computer
executes.
• Explain the concepts of benefit gain and Amdahl's law.
• Describe the structure and organization of multithreaded, multicore, and multiprocessor architectures.
• Explain what a compiler does to take advantage of a multicore, multiprocessor architecture.
• Express an algorithm appropriately so that it can run on multicores and multiprocessors. Write code that takes advantage of multicore
and multiprocessor architecture.
• Explain the need to maintain coherence between caches and between cache and main memory. Address the analysis and design of
coherence maintenance protocols in multicores and multiprocessors.
• Distinguish between different types of memory consistency models. Explain the influence of the memory consistency model on the
performance of a computer.
• Implement code that takes advantage of the memory consistency model and synchronization machine instructions. Implement basic
synchronization mechanisms.

DETAILED AGENDA OF THE SUBJECT

THEORETICAL AGENDA:

Topic 1. Parallel architectures: classification and performance


Parallel computing and distributed computing
Classifications of parallel architectures and systems Classifications of implicit parallelism in an application
Benefit evaluation

Topic 2. Parallel programming


Parallel programming modes
Parallel programming tools
Communication/synchronization alternatives
Parallel programming styles/paradigms
Structures of parallel programs or algorithms
Parallelization process
Benefit evaluation

Theme 3. Architectures with Thread Level Parallelism (TLP)


TLP architectures
Coherence in the memory system in multiprocessors

University INFORMATION ON DEGREES FROM THE UGR


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Page 3
Memory system consistency
Synchronization

Theme 4. Architectures with instruction level parallelism (ILP)


Superscalar architectures
VLIW architectures

Topic 5. Specific Purpose Architectures


SIMD architectures
GPU architectures ( Graphics Processing Unit )

PRACTICAL AGENDA:

Block 0 (seminar and practice): Programming environment: Eclipse and Torque


Block 1 (seminar and practice): Parallel programming I: OpenMP Directives
Block 2 (seminar and practice): Parallel programming II: OpenMP Clauses
Block 3 (seminar and practice): Parallel programming III: Interaction with the environment in OpenMP
Block 4 (seminar and practice): Code optimization in ILP architectures

BIBLIOGRAPHY
FUNDAMENTAL BIBLIOGRAPHY:

• J. Ortega, M. Anguita, A. Prieto. Computer Architecture . Thomson, 2005. ESIIT/C.1 ORT arch
• T. Rauber, G. Ründer. Parallel Programming: for Multicore and Cluster Systems . Springer 2010. Available online (UGR library):
http://dx.doi.org/10.1007/978-3-642-04818-0

Practices:

• b. Chapman, G. Jost and R. van der Pas, Using OpenMP: Portable Shared Memory Parallel Programming. Cambridge, Mass.: MIT
Press, 2008, pp. 353. ESIIT/D.1 CHA usi

FURTHER READING:

• b. Wilkinson, Parallelprogramming : techniques and applications using networked workstations and parallel computers , 2005, ESIIT/D.1
WIL par
• Sima and T. Fountain, and P. Kacsuk. Advanced Computer Architectures: ADesign Space Approach . Addison Wesley, 1997. ESIIT/C.1
SIM adv

Practices:

• R. Gerber, A. J.C. Bik, K. b. Smith and X. Tian. The Software Optimization Cookbook. High Performance Recipes for the IA-
32Platforms . Intel Press, 2006. ESIIT/C.1 SOF sof
• TO. Fogg. ”How to Optimize for the Pentium family of microprocessors”, 2004. Available online: http://cr.yp.to/2005-590/fog.pdf

sof
R. Gerber. The Software Optimization Cookbook. High Performance Recipes for the IntelArchitecture . Intel Press, 2002. ESIIT/C.1 GER

Exercises:

• Ortega, J.; González, J Computer Engineering Problems. One hundred solved problems of parallel processors Ed. Copicentro Granada,
2008. ESIIT/C.1 ORT pro

Page 4

University INFORMATION ON DEGREES FROM THE UGR


from http://grados.ugr.es
Granada
RECOMMENDED LINKS

• Intel processors: http://ark.intel.com/Default.aspx

• AMD processors: http://www.amd.com/


• Power Processors: http://www.power.org/home
• Eclipse: http://www.eclipse.org
• TORQUE: http://www.adaptivecomputing.com/products/torque.php
• OpenMP: http://openmp.org/wp/
TEACHING METHODOLOGY

• Master lesson (Theoretical-expository classes) (large group) Content in ECTS: 30 contact hours (1.2 ECTS)
Skills: R1, R4, R8, R9, R14, E1, E4, T3, T14.
• Practical activities (Practical laboratory classes) (small group)
Content in ECTS: 15 contact hours (0.6 ECTS)
Competitions: R8, R14, T1, T3, T4, T8, T9, T14
• Seminars (small group)
Content in ECTS: 10 contact hours (0.4 ECTS)
Competitions: R8, R14, E1, T1, T8, T14
• Individual non-face-to-face activities (Study and autonomous work)
Content in ECTS: 45 non-contact hours (1.8 ECTS)
Skills: R1, R4, R8, R9, R14, E1, E4, T1, T3, T4, T7, T9, T14
• Non-face-to-face group activities (Study and group work)
Content in ECTS: 45 non-contact hours (1.8 ECTS)
Skills: R1, R4, R8, R9, R14, E1, E4, T1, T3, T4, T7, T8, T9, T14
• Academic tutoring (small group)
Content in ECTS: 5 contact hours (0.2 ECTS)
Competitions: R8, R14, T1, T3, T4, T8, T9, T14

EVALUATION (EVALUATION INSTRUMENTS, EVALUATION CRITERIA AND


PERCENTAGE OF THE FINAL GRADE, ETC.)
The final grade that will appear in the Minutes will be a number between 0 and 10 with precision of one decimal (art. 5 of the R. D
1125/2003). To officially pass a subject you must obtain a minimum score of 5 (art. 5 of the R. D 1125/2003).

Formation activities Weighing


Theoretical part 60%
Practical part/seminars 40%

• Theory (maximum 6 points, 60% of the maximum 10 points). Written test on the date set by the Center within the exam period (final
exam).
• Practices/Seminars (maximum 4 points, 40% of the maximum 10 points). It will be evaluated through deliveries and defenses during
the semester and a written exam to be taken together with the final exam on the date set by the Center.
To pass the subject you must obtain a minimum score in both the theoretical part and the part of 40% of the maximum score.

ADDITIONAL INFORMATION

Page 5

University INFORMATION ON DEGREES FROM THE UGR


from http://grados.ugr.es
Granada
Teaching platform (subject material, organization of practice groups, exam calls and deliveries to teachers): SWAD System,
http://swad.ugr.es

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University INFORMATION ON DEGREES FROM THE UGR


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