Samara University

College of Engineering and Technology

Computer Science
Microprocessor and Assembly Language(CoSc 3025)

Chapter 4

Assembly Language Instruction set

1
 Outline

Data movement instructions

Arithmetic and Logic Instructions

Program Control Instructions

2
CHAPTER OBJECTIVES
Upon completion of this chapter, you will be able to:

 Explain the operation of each data movement instruction with applicable

addressing modes.
 Select the appropriate assembly language instruction to accomplish a specific data
movement task
 Use arithmetic and logic instructions to accomplish simple binary, BCD, and
ASCII arithmetic.
 Use AND, OR, and Exclusive-OR to accomplish binary bit manipulation.
 Use the shift and rotate instructions
 Use both conditional and unconditional jump instructions to control the flow of a
program.
 Use both conditional and unconditional loop instructions to control the flow of a
program.
 Use the call and return instructions to include procedures in the program structure.
 Use machine control instructions (Flag Control) to modify the flag bits.
 Use the string instructions to reduce the size of the program.
 Explain the operation of the interrupts and interrupt control Instructions
3
I. Data Movement Instructions

4
 Data movement instructions

 This chapter concentrates on the data movement instructions. The data

movement instructions include MOV, MOVSX, MOVZX, PUSH, POP,
BSWAP, XCHG, XLAT, IN, OUT, LEA, LDS, LES, LFS, LGS, LSS, LAHF,
SAHF, and the string instructions MOVS, LODS, STOS, INS and OUTS.
 Data movement instructions transfer data between registers, a register and
memory, a register and the stack, memory and the stack, the accumulator and
I/O, and the flags and the stack. Memory-to-memory transfers are allowed only
with the MOVS instruction
 It may be necessary to interpret machine language programs generated by an
assembler.
 Opcode: Selects the operation (addition, subtraction, etc.,) performed by the
microprocessor.
 Either 1 or 2 bytes long for most instructions

8-bit 8-bit 8-bit

OPC O D E O PE RAN D
1 byte 1 to 2 byte
5
 MOV
 MOV Des, Src
 Src : operand can be register, memory location or immediate operand.
 Des: can be register or memory operand.
 Both Src and Des cannot be memory location at the same time.
 Example:
072CH 18H AD5FCH
MOV CX, 037AH AH AL 072BH A3H AD5FBH
MOV AL, BL 7EH AD5FAH
55 02 072AH
MOV BX, [0301H] 0729H 69H AD5F9H

AAH AD5F8H
0728H
2EH AD5F7H
Example: DS=ACDEH, 0727H
00H AD5F6H
0726H
SI=0724H MOV AX, [SI] 55H AD5F5H
 Physical Address
0725H
02H AD5F4H
0724H
= ACEDx10H + 0724H 0723H
72H AD5F3H

= AD5F4H, AD5F5H 0722H

11H AD5F2H

AX=5502H
6
 PUSH and POP
PUSH and POP Instructions
 Both are important to store and retrieve data from the
LIFO structure (stack).
 PUSH Operand
 It pushes the operand into top of stack.
 Example:
PUSH BX
 POP Des
 It pops the operand from top of stack to Des.
 Example:
POPAX

7
 PUSH
 In 8088 and 8086 PUSH always transfer 2 bytes of data to the
stack.
 It has the following syntax:
PUSH src
 Src: could be any 2 byte register or memory location or
immediate value.
 How does PUSH executes?
 Simply when we push 2 bytes of data to the stack, the most
significant byte is stored in stack segment pointed to by SP-
1, and the least significant to location pointed by SP-2, see
the following example

8
 PUSH…
 PUSH AX
 SS:[SP-1] ← AH, 1st(most significant) byte.
 SS:[SP-2] ← AL, 2nd(least significant) byte.
 After PUSH operation, SP ← SP – 2
Example:
Let AX=31F2H, SP=100H, SS=2000H,
CX=FFFFH, BX=413AH
SS:SP-2 =2000:00FEH F2
AX
SS:SP-1 =2000:00FFH
31 F2 31
SS:SP =2000:0100H

Most Significant Byte

Least Significant Byte
9
 PUSH…
 The effect of the PUSH AX instruction on SP and stack
memory locations 37FFH and 37FEH. AX=6AB3H

Stack segment
6AB3 6AB3

03800
037FF
EAX 6AB3 6A B3
037FE

ESP 07FE
6AB3
03000
CS
DS
0300
SS +
10
 POP
 How does POP executes?
 POP : performs the inverse operation of PUSH
 POP : removes data from stack and place it into target 16-
bit register.
POP BX
 BL ← SS:[SP]
 BH ← SS:[SP+1]
 after POP operation, SP← SP+2
 POP CS ; is not a valid instruction

11
 POP…
 The POP BX instruction, showing how data are removed
from the stack.
POP BX

12
 LEA
 LEA stands for load effective address.
 LEA Register, Src
 It loads a 16-bit register with the offset address of the data
specified by the Src.
 LEA AX, NUMB
 AX ← operand offset address MUMB

Example:
 LEA BX, [DI] loads offset address specified by [DI]
(contents of DI) into BX register
 MOV BX, [DI] loads the data stored at the memory
location addressed by [DI] into BX register
 MOV BX, DI = LEA BX, [DI]
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 LDS
 LDS Des, Src
 It loads 32-bit pointer from memory source to destination
register and DS.
 The offset is placed in the destination register and the segment
is placed in DS.
 To use this instruction the word at the lower memory address
must contain the offset and the word at the higher address must
contain the segment.
 Example:
 LDS BX, [DI]
 If DS= 1000H, DI = 1000H
 The LDS BX, [DI] instruction loads register BX from
addresses 11000H and 11001H and register DS from locations
11002H and 11003H. This instruction is shown at the point just
14
before DS changes to 3000H and BX changes to 127AH
LDS…

15
 LES
 LES Des, Src
 It loads 32-bit pointer from memory source to destination register and ES.
 The offset is placed in the destination register and the segment is placed in
ES.
 To use this instruction the word at the lower memory address must contain
the offset and the word at the higher address must contain the segment.
 This instruction is very similar to LDS except that it initializes ES instead of
DS.
Example:
 LES BX, [DI]
 If ES= 1000H, DI = 1000H
 The LES BX, [DI] instruction loads register BX from addresses 11000H and
11001H and register ES from locations 11002H and 11003H. This
instruction is shown at the point just before ES changes to 3000H and BX
changes to 127AH.

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LES…

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 LAHF, SAHF, PUSHF, POPF
LAHF:
It transfer the lower byte of flag register to AH.
AH ← FLAG (Lower 8-bit)
SAHF:
It transfer the contents of AH to lower byte of flag
register.
FLAG (Lower 8-bit) ← AH
PUSHF:
Pushes flag register to top of stack.
POPF:
Prof. FPayeoz Fp. Ms. El-tSohusye stack top to flag
register. 18
 XCHG
XCHG Des, Src
This instruction exchanges Src with Des.
It Exchanges contents of a register with any other register
or memory location.
It can not exchange segment registers.
It can not exchange two memory locations directly.
Use any addressing mode except immediate.
Example:
XCHG DX, AX(exchanges the contents of DX with AX)
Let DX= 3000H, AX = 1000H
After Execution this Instruction DX= 1000H, AX = 3000H
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 XLAT(Translate)
This instruction Converts the contents of the AL register
into a number stored in a memory table.
It performs the direct table lookup technique often used to
convert one code to another.
An XLAT instruction first adds the contents of AL to BX to
form a memory address within the data segment.
It copies the contents of this address into AL.
It is only instruction that adds an 8-bit to a 16-bit number
Example:
AL ← DS:[BX + AL]

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 XLAT(Translate)…
The operation of the XLAT instruction at the point just
before
6DH Pirosf. Flaoyeaz Fd. Me.dEl-Sionusyto AL.

21
 IN and OUT
 IN Accumulator, Port Address
This instruction transfers the operand from specified port to
accumulator register.
IN AX, 0028 H
An IN instruction transfers data from an external I/O
device into AL or AX
 OUT Port Address, Accumulator
This instruction transfers the operand from accumulator to
specified port.
OUT 0028 H, AX
An OUT transfers data from AL or AX to an external I/O
device.
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 IN and OUT…
 IN & OUT instructions perform I/O operations. Contents of AL or
AX are transferred only between I/O device and microprocessor.
 Two forms of I/O device (port) addressing: Fixed-port addressing
allows data transfer between AL, or AX using an 8-bit I/O port
address.
 Port number follows the instruction’s opcode. IN AX, 0028 H
 OUT 0028 H, AX
 Variable-port addressing allows data transfers between AL or AX and
a 16-bit port address. The I/O port number is stored in register DX,
which can be changed (varied) during the execution of a program.
 MOV DX, 0028H IN AX, DX
 OUT DX, AX

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 IN and OUT…
 The signals found in the microprocessor-based system for an OUT
19H, AX instruction.

24
IN and OUT…

25
II. Arithmetic and Logic
Instructions

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 Addition(ADD and ADC)

The bulk of the arithmetic instructions found in any

microprocessor include addition, subtraction, and
comparison

More than 32,000 variations of the ADD instruction in the

instruction set

The only types of addition not allowed are memory-to

memory and segment registers

The segment registers can only be moved, pushed, or

popped 27
 Addition(ADD and ADC)…
 Examples:
i) ADD AL,BL ; AL=AL+BL
ii) ADD CX,DI ; CX=CX+DI
iii) ADD CL,44H ; CL=CL+44H
iv) ADD BX,245FH ; BX=BX+245FH
v) ADD [BX],AL ; AL adds to the byte contents of the data segment memory location
addressed by BX with the sum stored in the same memory location
vi) ADD CL,[BP] ;The byte contents of the stack segment memory location addressed
by BP add to CL with the sum stored in CL
vii) ADD CL,TEMP ;The byte contents of data segment memory location TEMP add to
CL with the sum stored in CL
viii) ADC AL,AH ; AL=AL+AH+carry
ix) ADC CX,BX ; CX=CX+BX+carry
 [An addition-with-carry) instruction (ADC) adds the bit in the carry flag (C) to the operand data]
 Increment Addition: (Increment addition adds 1 to a register or a memory location)
 INC BL; BL=BL+1
 INC SP ; SP=SP+1
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 Subtraction
i. SUB CL,BL ; CL=CL-BL
ii. SUB AX,SP ; AX=AX-SP
iii. SUB DH,6FH ; DH=DH-6FH
iv. SUB AH,TEMP ; subtracts the byte contents of memory
location TEMP from AH and store the difference in AH
 Decrement(DEC):
i. DEC BH ; BH=BH-1
ii. DEC CX ; CX=CX-1
 Subtraction with Borrow:
i. SBB AH,AL ; AH=AH-AL-Carry
ii. SBB CL,2 ; CL=CL-2-Carry

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 Comparison(CMP)
The comparison instruction (CMP) is a subtraction that changes only the flag bits; the
destination operand never changes. A comparison is useful for checking the entire
contents of a register or a memory location against another value. A CMP is normally
followed by a conditional jump instruction, which test the condition of the flag bits
i. CMP CL,BL ; CL-BL
ii. CMP AX,SP ; AX-SP
iii. CMP [DI],CH ; CH subtracts from the byte contents of the data
segment memory location addressed by DI
Example 5-12:
CMP AL,10H ; compare AL against 10H
JAE SUBER ; if AL is 10H or above jump to location SUBER
Normally used:
 JA(Jump Above)
 JB(Jump Below)
 JAE(Jump Above or Equal)
 JBE(Jump Below or Equal) 30
 Multiplication
Only modern microprocessor contain multiplication and division instruction. Earlier 8-
bit microprocessor could not multiply or divide without the use of a program that
multiplied or divided by using a series of shifts and addition or subtractions. Because
microprocessor manufacturers were aware of this inadequacy, they incorporated
multiplication and division instructions into the instruction sets of the newer
microprocessors CMP CL,BL ; CL-BL
i. CMP AX,SP ; AX-SP
ii. CMP [DI],CH ; CH subtracts from the byte contents of the data
segment memory location addressed by DI
Note:
i) Multiplication is performed on bytes or words
ii) The product after a multiplication is always a double-width product. If two 8-bit
numbers are multiplied they generate a 16-bit product. If two 16-bit numbers are
multiplied, they generate a 32- bit product
iii) Some flag bits [overflow (O) and carry (C) ] change when the multiply instruction
executes and produce predictable outcomes

31
 Multiplication(8-bit Multiplication)
The multiplication instruction contains one operand because it always multiplies the
operand times the contents of ALCMP AX,SP ; AX-SP
i) MUL CL ; AL is multiplied by CL and the unsigned product is in AX
ii) IMUL DH ; AL is multiplied by DH and the signed product is in AX
Example 5-13
Write a short instruction to multiply the content of BL and CL. Load BL with 5, CL
with 10. Store the result in DX register
MOV BL,5 ;load data
MOV CL,10
MOV AL,CL ;position data
MUL BL ;multiply , result is in AX
MOV DX,AX ;hence move AX to DX
Use IMUL instead of MUL for signed 8-bit multiplication

32
 Multiplication(16-bit Multiplication)
 AX contains the multiplicand instead of AL
 The 32-bit product appears in DX-AX instead of AX
 DX register contains the Most Significant 16 bits of the
product
 AX contains the Least Significant 16 bits
i) MUL CX ; AX is multiplied by CX and the unsigned
product is in DX-AX
ii) IMUL DI ; AX is multiplied by DI and the signed product
is in DX-AX
Note:
8086/8088 microprocessors can not perform immediate
multiplication
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 Division
 Division occurs on 8-or 16-bit numbers
 The dividend is always a double-width dividend that is
divided by the operand
 This means that an 8-bit division divides a 16-bit number by
an 8-bit number; a 16-bit division divides a 32-bit number
by a 16-bit number
 None of the flag bits change predictably for a division. A
division can result in two different types of errors
1) One is an attempt to divide by zero
2) Other is a divide overflow
For Example:
If AX=3000 is divided by 2, answer = 1500, which does not fit
34
into AL
 Division(8-bit Division)
 An 8-bit division uses the AX register to store the dividend that is divided by the
contents of any 8-bit register or memory location
 The quotient moves into AL after division with AH containing a whole number
remainder
 Zero-extension is needed in 8-bit division
i) DIV CL ; AX is divided by CL; the unsigned quotient is in AL and the remainder is in
AH
ii) IDIV BL ; AX is divided by BL; the signed quotient is in AL and the signed
remainder is in AH
Example 5-14
Divide number NUMB by number NUMB1. Store the quotient at ANSQ and remainder
at ANSR
 MOV AL,NUMB ; get NUMB
 MOV AH,0 ; zero-extend
 DIV NUMB1 ; divide by NUMB1
 MOV ANSQ,AL ; save quotient
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 MOV ANSR,AH ; save remainder
 Division(16-bit Division)
 DIV CX ; DX-AX is divided by CX and the unsigned
quotient is in AX and unsigned remainder is in DX
Example 5-15:
-100 is in AX. Divide by +9 in CX register
Solution:
MOV AX, -100 ; load -100
MOV CX, 9 ; load +9
CWD ; CWD convert word to double word
(i.e -100 in AX is converted to -100 in DX-AX)
IDIV CX ;quotient -11 will be in AX and remainder -1 in DX

36
 BCD Arithmetic
DAA: Decimal Adjust after Addition

DAS: Decimal Adjust after Subtraction

 DAA follows BCD addition i.e ADD or ADC

 DAS follows BCD subtraction

 The adjustment instructions function only with the AL

register after BCD addition and subtraction

 DAS instruction functions as does the DAA instruction,

except that it follows a subtraction instead of an addition
37
 ACII Arithmetic
The ASCII arithmetic function with ASCII-coded numbers.

There are four instructions used with ASCII arithmetic

operations

i) AAA (ASCII adjust after addition)

ii) AAD(ASCII adjust before Division)

iii) AAM(ASCII adjust after Multiplication)

iv) AAS(ASCII adjust after Subtraction)

These instructions use register AX as the source and as the
destination. 38
 AAA,AAD,AAM & AAS
Example 5-10:ASCII addition in 8086
MOV AX,31H ;load ASCII ’ 1’
ADD AX,39H ;load ASCII ’ 9’
AAA ; AX will contain 10
ADD AX,3030H ; answer to ACII if we wish to display
Explanation:
If 31H and 39H are added , result is 6AH. The ASCII addition (1+9)
should produce a two-digit ASCII result equivalent to a decimal 10,
which is a 31H and 30H in ASCII code
If the AAA instruction is executed after the addition, the AX register
will contain 0100H
Although this is not ASCII code, it can be converted to ASCII code by
adding 3030H to AX which generates 3130H
39
 AAA,AAD,AAM & AAS
AAD Instruction:
Example 5-21:Divide 72 in unpacked BCD by 9
MOV BL,9 ;load divisor
MOV AX,72H ;load dividend
AAD ; adjust
DIV BL ; divide
AAM Instruction:
It is followed after Multiplication
Example 5-22:
MOV AL,5 ;load multiplicand
MOV CL,3 ;load multiplier
MUL CL ;multiply
AAM ; adjust
AAS Instruction: AAS instruction adjusts the AX register after ASCII Subtraction
40
 Basic Logic Instructions
AND:
i) AND AL,BL ; AL=AL and BL
ii) AND CX,DX ; CX=CX and DX
iii) AND CL,33H ; CL=CL and 33H
OR:
i) OR AH,BL ; AH=AH or BL
ii) OR SI,DX ; SI=SI or DX
iii) OR SP,990DH ; SP=Sp or 990DH
XOR:
i) XOR CH,DL ; CH=CH xor DL
ii) XOR DI,BX ; DI=DI xor BX
iii) XOR AH,0EEH ; AH=AH xor EEH
41
 Basic Logic Instructions…
TEST:
The TEST instruction performs the AND operation. The
difference is that the AND instruction changes the
destination operand, whereas the TEST instruction does not.
i) TEST DL,DH ; DL is ANDed with DH
ii) TEST CX,BX ; CX is ANDed with BX

NOT and NEG:

i) NOT CH ; CH is one’s complemented
ii) NEG CH ; CH is two’s complemented
iii) NEG AX ; AX is two’s complemented
42
 Shift and Rotate Instructions
Shift:
Shift instructions position or move numbers to the left or right within a register or
memory location. The microprocessors instruction set contains four different shift
operations. Two are logical shifts and two are arithmetic shifts
i) SHL AX,1 ; AX is logically shifted left 1 place
ii) SHR BX,12 ; BX is logically shifted right 12 places
iii) SAR SI,2 ; SI is arithmetically shifted right 2 places
iv) SAL DATA1,CL ; The contents of data segment memory location DATA1 are
arithmetically shifted left the number of spaces specified by CL
Note:
 The arithmetic left shift and logical left shift are identical
 The arithmetic right shift and logical right shift are different because the arithmetic
right shift copies the sign-bit through the number, whereas the logical right shift
copies a 0 through the number
 Segment register cannot be shifted
43
(Please see example 5-31 for an example to see how to multiply AX by 10, 18, or 5 )
 Shift and Rotate Instructions…

This figure shows

 The operation
and direction of
shift instruction

44
 Shift and Rotate Instructions…
Rotate:
Rotate instructions position binary data by rotating the
information in a register or memory location, either
from one end to another or through the carry

i) ROL SI,14 ; SI rotates left 14 places

ii) RCR AH,CL ; AH rotates right through carry the
number of places specified by CL

45
 Shift and Rotate Instructions…

This figure
shows
 The
operation
and
direction of
each rotate
in rotate
instruction

46
III. Program Control Instructions

47
 Flag-Control Instructions

 Controlling the program flow is a very important thing, this is where

your program can make decisions according to certain conditions.
 The microprocessor has a set of flags that either monitors the state of
executing instructions or controls options available in its operation
 They are CLC, STC,CMC, CLD, STD, CLI, STI

Mnemonic Meaning Operation Flags affected

STC Set carry flag (CF) ‹― 1 CF
CLC Clear carry flag (CF) ‹― 0 CF
CMC Complement carry flag (CF) ‹― (CF) CF

CLD Clear direction flag (DF) ‹― 0 DF

STD Set direction flag (DF) ‹― 1 DF
CLI Clear interrupt flag (IF) ‹― 0 IF
STI Set interrupt flag (IF) ‹― 1 IF

48
 Jump group instructions
 Allows programmer to skip program sections and branch to any part of memory for
the next instruction. (see the illustration below)
 LOOP and conditional LOOP are also forms of the jump instruction

Branch/alternate route

Starting Point Destination

The main route

49
 Unconditional Jump

 JMP Des:
 This instruction is used for unconditional jump from one place to
another.
 There are three types of unconditional jump(JMP) instruction:
1. Short Jump
2. Near Jump
3. Far Jump
 Short and near jumps are intra-segment jumps(the jump which are
always between statements in the same code segment)
 Far jump is inter-segment jump or jumps which can transfer control to
a statement in a different code segment.

50
 Unconditional Jump

1. Short Jump
 This instruction is used for unconditional jump from one place to
another.
 Called relative jumps because they can be moved, with related
software, to any location in the current code segment without a
change.
 jump address is not stored with the opcode
 a distance, or displacement, follows the opcode
 The short jump displacement is a distance represented by a
1byte(8bit) signed number whose value ranges between +127 and
–128 or the range of short jump is 256 byte(28 )

51
 Unconditional Jump

1. Short Jump

 The displacement is added to

instruction pointer (IP) to
generate the jump address
within the current code
segment
 The instruction branches to
this new address for the next
instruction in the program

52
 Unconditional Jump
2. Near Jump

 The near jump is similar to the short jump, except that the

distance is farther

 A near jump passes control to an instruction in the current code

segment located within ±32K bytes or 64KB(216/1024)range

from the near jump instruction.

53
 Unconditional Jump
3. Far Jump
 A far jump instruction obtains
a new segment and offset
address to accomplish the
jump
 The far jump instruction
sometimes appears with the
FAR PTR directives
 Another way to obtain a far
jump is to define a label as a
far label. A label is far only if it
is external to the current code
segment or procedure (i.e the
compiler sets it automatically)
 Example:
 JMP 0127: A300
 Jump to CSX10+IP = A300X10+0127 = A3127 54
 Conditional Jump

 Jxx Des (Conditional jump):

 Unlike JMP instruction that does an unconditional jump, there
are instructions that do a conditional jumps( jump only when
some conditions are in act)
 Conditional jump are always short jumps
 General syntax of conditional jump
<conditional jump instruction> <label>
Example JC label
 These instructions are divided in Four groups
Jumps based on equality between operands or the value of CX
Jumps based on specific flag values
Jumps based on comparisons of unsigned operands
Jumps based on comparisons of signed operands 55
 Conditional Jump…
 Conditional Jumps Based on Equality
Mnemonic Description
JE Jump if equal(left operand = right operand)
JNE Jump if not equal
JCXZ Jump if CX=0
JECXZ Jump if ECX =0
 Conditional Jumps Based on Specific Flag Values
Flags/Registers
Mnemonic Description
JZ Jump if zero ZF=1
JNZ Jump if not zero ZF=0
JC Jump if carry CF=1
JNC Jump if not carry CF=0
JO Jump if overflow OF=1
JNO Jump if not overflow OF=0
JS Jump if signed SF=1
JNS Jump if not signed SF=0
JP Jump if parity (even) PF=1
JNP Jump if not parity (odd) PF=0 56
 Conditional Jump…
 Conditional Jumps Based on Unsigned Comparisons
Mnemonic Description
JA Jump if above(if left operand > right operand)
JNBE Jump if not below or equal (same as JA)
JAE Jump if above or equal( if left Op> right Op
JNB Jump if not below(same as JAE)
JB Jump if below (if left Op < rightOp)
JNAE Jump if not above or equal (same as JB)
JBE Jump if below or equal(if leftOp < rightOp)
JNA Jump if not above (same as JBE)
 Conditional Jumps Based on Signed Comparisons
Mnemonic Description
JG Jump if greater(if leftOp > right Op)
JNLE Jump if not less than or equal(same as JG)
JGE Jump if greater than or equal(if leftOp> rightOp)
JNL Jump if not less(same as JGE)
JL Jump if less(if leftOp < rightOp)
JNGE Jump if not greater than or equal (same as JL)
JLE Jump if less than or equal (if leftOp < right Op)
JNG Jump if not greater (same as JLE)
57
 LOOP

LOOP is a combination of a decrement CX and the JNZ

conditional jump.
In 8086 - 80286 LOOP decrements CX.
if CX != 0, it jumps to the address indicated by the label
If CX becomes 0, the next sequential instruction executes
In 80386 and above, LOOP decrements either CX or ECX,
depending upon instruction mode.
In 16-bit instruction mode, LOOP uses CX; in the 32-bit mode,
LOOP uses ECX.
default is changed by the LOOPW (using CX) and LOOPD
(using ECX) instructions 80386 - Core2
In 64-bit mode, the loop counter is in RCX. and is 64 bits wide
There is no direct move from segment register to segment
register instruction.

58
 Conditional LOOPs
LOOP instruction also has conditional forms: LOOPE and LOOPNE
LOOPE (loop while equal) instruction jumps if CX != 0 while an equal
condition exists.
will exit loop if the condition is not equal or the
CX register decrements to 0
LOOPNE (loop while not equal) jumps if CX != 0 while a not-equal condition
exists.
will exit loop if the condition is equal or the CX register decrements to 0
In 80386 - Core2 processors, conditional LOOP can use CX or ECX as the
counter.
LOOPEW/LOOPED or LOOPNEW/LOOPNED override the instruction
mode if needed
Under 64-bit operation, the loop counter uses RCX and is 64 bits in width
Alternates exist for LOOPE and LOOPNE.
LOOPE same as LOOPZ
LOOPNE instruction is the same as LOOPNZ
In most programs, only the LOOPE and LOOPNE apply.

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 CONTROLLING THE FLOW OF THE PROGRAM
Easier to use assembly language statements .IF, .ELSE, .ELSEIF, and .ENDIF to control
the flow of the program than to use the correct conditional jump statement.
these statements always indicate a special assembly language command to MASM
Control flow assembly language statements beginning with a period available to
MASM version 6.xx, and not to earlier versions.
Other statements developed include .REPEAT–.UNTIL and .WHILE–.ENDW.
the dot commands do not function using the Visual C++ inline assembler
Never use uppercase for assembly language commands with the inline assembler.
some of them are reserved by C++ and will cause problems
WHILE Loops
Used with a condition to begin the loop.
the .ENDW statement ends the loop
The .BREAK and .CONTINUE statements are available for use with the while loop.
 .BREAK is often followed by .IF to select the break condition as in .BREAK .IF AL == 0DH
.CONTINUE can be used to allow a DO–.WHILE loop to continue if a certain condition is met
The .BREAK and .CONTINUE commands function the same manner in C++.
REPEAT-UNTIL Loops
A series of instructions is repeated until some condition occurs.
The .REPEAT statement defines the start of the loop.
end is defined with the .UNTIL statement, which contains a condition
An .UNTILCXZ instruction uses the LOOP instruction to check CX for a repeat loop.
.UNTILCXZ uses the CX register as a counter to repeat a loop a fixed number of times
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 PROCEDURES
A procedure is a group of instructions that usually performs one task.
subroutine, method, or function is an important part of any system’s architecture
A procedure is a reusable section of the software stored in memory once, used as
often as necessary.
saves memory space and makes it easier to develop software
Disadvantage of procedure is time it takes the computer to link to, and return from it.
CALL links to the procedure; the RET (return) instruction returns from the procedure
CALL pushes the address of the instruction following the CALL (return address) on the stack.
the stack stores the return address when a procedure is called during a program
RET instruction removes an address from the stack so the program returns to the instruction
following the CALL.
A procedure begins with the PROC directive and ends with the ENDP directive.
each directive appears with the procedure name
PROC is followed by the type of procedure:
NEAR or FAR
In MASM version 6.x, the NEAR or FAR type can be followed by the USES statement.
USES allows any number of registers to be automatically pushed to the stack and popped from
the stack within the procedure
Procedures that are to be used by all software (global) should be written as far procedures.
Procedures that are used by a given task (local) are normally defined as near procedures.
Most procedures are near procedures.
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 INTRODUCTION TO INTERRUPTS
An interrupt is a hardware-generated CALL
externally derived from a hardware signal
Or a software-generated CALL
internally derived from the execution of an instruction or by some
other internal event
at times an internal interrupt is called an exception
Either type interrupts the program by calling an interrupt service
procedure (ISP) or interrupt handler.
Three different interrupt instructions available:
INT, INTO, and INT 3
 Two instructions control the INTR pin.
The set interrupt flag instruction (STI) places 1 in the I flag bit.
which enables the INTR pin
The clear interrupt flag instruction (CLI) places a 0 into the I flag
bit.
Which disables the INTR pin
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 MACHINE CONTROL AND MISCELLANEOUS
INSTRUCTIONS
Controlling the Carry Flag Bit
The carry flag (C) propagates the carry or borrow in multiple-word/doubleword
addition and subtraction.
can indicate errors in assembly language procedures
Three instructions control the contents of the carry flag:
STC (set carry), CLC (clear carry), and CMC (complement carry)
WAIT
If the WAIT instruction executes while the BUSY pin = 1, nothing happens and the next
instruction executes.
pin inputs a busy condition when at a logic 0 level
if BUSY pin = 0 the microprocessor waits forthe pin to return to a logic 1

HLT
Stops the execution of software.
There are three ways to exit a halt:
by interrupt; a hardware reset, or DMA operation
NOP
When the microprocessor encounters a NOP, it takes a short time to execute.
A NOP may also find application in time delays to waste time.
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Questions ?

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