Department of Electronics and Communication Engineering

Islamic University of Science &Technology, Awantipora.

Midterm Examination (Spring 2024)

Subject: Microprocessor and Microcontroller (ECE 253C) SET C Max Marks: 30 Time: ½ hr
Roll No: ______________________________ Students Signature: __________________________
Q 1 – Q20 carry 1 mark each
Q1: Suppose registers ‘A’ and ‘B’ contain 50H and 40H respectively. After instruction MOV A, B, what
will be the contents of registers A and B?
a) 50H, 40H b) 50H, 50H c) 40H, 40H d) 60H, 40H
Q2: Program Counter is made of _________ bits
a) 8 b) 16 c) 32 d) 20

Q3: During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)?
a) T1 Opcode fetch b) T2 OP code fetch c) T3 OP code fetch d) T4 OP code fetch
Q4: Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used
(Undefined) in flag register of an 8085 microprocessor?
a) 1, 3, 5 b) 1, 2, 5 c) 1, 3, 4 d) 2, 3, 5
Q5: READY signal in 8085 is useful when the CPU communicates with
a) A PPI chip b) A fast peripheral device
c) A DMA controller chip d) A slow peripheral device
Q6: In an 8085, what is the content of the Instruction Register (IR)?
a) Op-code for the instruction to be executed next b) Op-code for the instruction being executed
c) Operand for the instruction being executed d) Operand for the instruction to be executed next
Q7: Which of the following is not a property of TRAP interrupt in microprocessor?
a) It is a vectored interrupt b) It uses edge-triggered signal
c) It is a non-maskable interrupt d) It is of highest priority
Q8: For how many times per instruction, the content of the program counter is placed on the address
bus?
a) One time b) Two times c) Depends on the length of the instruction
d) Depends on the memory capacity of the processor
Q9: Which causes the microprocessor to immediately terminate its present activity?
a) RESET signal b) INTERUPT signal c) Both d) None of these
Q10: Which of the following is a non-vectored input?
a) RST-6.5 b) RST-7.5 c) INTR d) TRAP
Q11: Which of the data transfer is not possible in microprocessor
a) memory to accumulator b) accumulator to memory
c) memory to memory d) I/O device to accumulator
Q12: The 8085 has two registers known as primary data pointers. These are registers
a) B and C b) D and E c) H and L d) C and D
Q13: In order to reset the carry without affecting the accumulator contents one has to use
a) SUB A b) XRA A c) ORA A d) CMC
Q14: Let the content of accumulator and register B be 0000 0100 and 0100 0000 respectively before
execution of instruction SUB B. The content of accumulator after the execution of this instruction will
be
a) 11000100 b) 01000000 c) 00000100 d) 010001000
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First Floor, Academic Block III, One University Avenue, IUST, Awantipora, J & K 192122
 Department of Electronics and Communication Engineering
Islamic University of Science &Technology, Awantipora.

Q15: The power failure alarm must be connected to which one of the following inputs of 8085?
a) INTR b) TRAP c) HOLD d) RST7.
Q16: In 8085, let the accumulator contains the value 0AH and register C contains the value 05H. After
CMP C instruction is executed, the
a) zero and carry flags will be set b) reset zero flag will be reset and carry flag will be
c) zero flag will be set and carry flag will be d) set zero and carry flags will be reset
Q17: Which of the following flag is used to mask INTR interrupt?
a) zero flag b) auxiliary carry flag c) interrupt flag d) sign flag
Q18: Which of the following circuit is used as a special signal to demux the address bus and data bus?
a) Decoder b) Demultiplexer c) Address Latch Enable d) Priority Encoder
Q19: In 8-bit microprocessor, how many opcodes are present?
a) 278 b) 246 c) 256 d) 250
Q20: In 8085, the DAA instruction is used for
a) Direct Address Accumulator b) Double Add Accumulator
c) Decimal Adjust Accumulator d) Direct Access Accumulator
Q21: The content of the accumulator after the execution of the following 8085 assembly language
program, is: (2marks)
MVI A, 42H
MVI B, 05H
ADD B
DCR B
JNZ
ADI 25H
HLT
a) 82H
b) 78H
c) 76H
d) 47H
Q22: List the four Instructions which control the Interrupt structure of 8085 (2 marks)
__________________________________________ ________________________________________
__________________________________________ _______________________________________
Q23: Give the 4 instructions that perform the logical operations (2 marks)
___________________________________ _________________________________________
____________________________________ ____________________________________________
Q24: Write one example for each type of instruction below: (4 marks)
a) 1 byte_______________________________ b) 2 byte__________________________________

c) 3 byte _______________________________ d) Indirect addressing mode _________________

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First Floor, Academic Block III, One University Avenue, IUST, Awantipora, J & K 192122