Electronic Devices

Lecture 13
Bipolar Junction Transistor

Dr. Roaa Mubarak

BJT Biasing
• Transistor Biasing is the process of setting a transistors
DC operating voltage or current conditions to the
correct level so that any AC input signal can be
amplified correctly by the transistor. 𝐼𝐶

• The analysis or design of a transistor amplifier requires

knowledge of both the dc and ac response of the 𝐼𝐵
system. In fact, the amplifier increases the strength of a 𝑉𝐶𝐸
weak signal by transferring the energy from the applied 𝑉𝐵𝐸
DC source to the weak input ac signal The analysis or 𝐼𝐸
design of any electronic amplifier therefore has two
components:
❑The dc portion and
❑The ac portion
 BJT Biasing
• During the design stage, the choice of parameters for the required dc levels will
affect the ac response.
• Biasing: Application of dc voltages to establish a fixed level of current and voltage.
Purpose of the DC biasing circuit
• To turn the device “ON”
• To place it in operation in the region of its characteristic where the device
operates most linearly .
• Proper biasing circuit which it operate in linear region and circuit have centered
Q-point or midpoint biased
• Improper biasing cause:
• Distortion in the output signal.
• Produce limited or clipped at output signal.
Important basic relationship
IC
𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶 RC

VCB VCC
𝐼𝐶 = 𝛃𝐼𝐵 RB
VCE
IB
𝐼𝐸 = (1 + 𝛃)𝐼𝐵 VBE
VBB IE
𝑉𝐶𝐵 = 𝑉𝐶𝐸 − 𝑉𝐵𝐸
 BJT
Analysis
DC AC
analysis analysis
Calculate Calculate
the DC Q-point gains of the amplifier
Solving Graphical
input & output Method
loops

• DC Biasing Circuits
1. Fixed-bias circuit
2. Emitter-stabilized bias circuit
3. Voltage divider bias circuit
4. DC bias with voltage feedback
 1. Fixed Bias circuit
• This is common emitter (CE) configuration
• 1st step: Locate capacitors and replace them with
an open circuit
• 2nd step: Locate 2 main loops which;
• BE loop (input loop)
• CE loop(output loop)
1. Fixed Bias circuit
• 1st step: Locate capacitors and replace them with an open circuit
 1. Fixed Bias circuit
• 2nd step: Locate 2 main loops.
1. Fixed Bias circuit
• BE Loop Analysis
From KVL:
−𝑉𝑐𝑐 + 𝑅𝐵 𝐼𝐵 + 𝑉𝐵𝐸 = 0

𝑉𝑐𝑐 − 𝑉𝐵𝐸
𝐼𝐵 =
𝑅𝐵
• CE Loop Analysis
From KVL:
−𝑉𝑐𝑐 + 𝑅𝑐 𝐼𝐶 + 𝑉𝐶𝐸 = 0
𝑉𝐶𝐸 = 𝑉𝑐𝑐 − 𝑅𝑐 𝐼𝐶
𝐼𝐶 = 𝛃𝐼𝐵
𝑉𝑐𝑐 − 𝑉𝐵𝐸
𝐼𝐶 = 𝛃( )
𝑅𝐵
Note that 𝑅𝑐 does not affect the value of Ic
 1. Fixed Bias circuit
• The transistors base current, IB remains constant for given values of
Vcc, and therefore the transistors operating point must also remain
fixed. Hence referred as fixed biasing.
• This two resistor biasing network is used to establish the initial
operating region of the transistor using a fixed current bias.

• DISADVANTAGE
• Unstable – because it is too dependent on β and produce width
change of Q-point
• For improved bias stability , add emitter resistor to dc bias.
2. Emitter-Stabilized bias circuit
• An emitter resistor, RE is added to improve stability
• 1st step: Locate capacitors and replace them with an open
circuit
• 2nd step: Locate 2 main loops which;
• BE loop
• CE loop
2. Emitter-Stabilized bias circuit
• BE loop Analysis

• CE loop Analysis
 Improved Bias Stability
• The addition of the emitter resistor to the dc bias of the BJT provides improved
stability, that is, the dc bias currents and voltages remain closer to where they
were set by the circuit when outside conditions, such as temperature, and
transistor beta, change.

Note :it seems that beta in numerator canceled with beta in denominator
 3. Voltage Divider Bias Circuit
• Provides good Q-point stability with a single polarity supply voltage.
• This is the biasing circuit wherein, ICQ and VCEQ are almost independent of beta.
• The level of IBQ will change with beta so as to maintain the values of ICQ and
VCEQ almost same, thus maintaining the stability of Q point.
 3. Voltage Divider Bias Circuit

• Two methods of analyzing a voltage divider bias circuit are:

• Exact method : can be applied to any voltage divider circuit
• Approximate method : direct method, saves time and energy,
• 1st step: Locate capacitors and replace them with an open circuit.
• 2nd step: Simplified circuit using Thevenin Theorem.
• 3rd step: Locate 2 main loops which;
• BE loop
• CE loop
3. Voltage Divider Bias Circuit
• 2nd step: : Simplified circuit using Thevenin Theorem
Voltage Divider Bias Circuit
• 3rd step: Locate 2 main loops.
 Voltage Divider Bias Circuit
• BE loop Analysis

• CE loop Analysis
 3. Voltage Divider Bias Circuit
• This voltage divider biasing configuration is the most widely used
transistor biasing method.

• Also, voltage divider network biasing makes the transistor circuit

independent of changes in beta as the voltages at the transistors base,
emitter, and collector are dependent on external circuit values.
 4. DC Bias with Voltage Feedback
• Another way to improve the stability of a bias circuit is to add a feedback path
from collector to base.
• In this bias circuit the Q-point is only slightly dependent on the transistor beta, 𝛃
Calculate the DC Q-point

Calculating the DC Q point is done by two methods:

• Graphical Method “ Load Line”
• Solving input & output loops
 Load line analysis
• A fixed bias circuit with given values of VCC,RC and
RB can be analyzed ( means, determining the values
of IBQ, ICQ and VCEQ) using the concept of load 𝐼𝐶
line also.
• Here the input loop KVL equation is not used for the 𝐼𝐵
purpose of analysis, instead, the output
characteristics of the transistor used in the given
circuit and output loop KVL equation are made use
𝐼𝐸
of
−𝑉𝑐𝑐 + 𝑅𝑐 𝐼𝐶 + 𝑉𝐶𝐸 = 0
𝑉𝐶𝐸 = 𝑉𝑐𝑐 − 𝑅𝑐 𝐼𝐶
 Load line analysis
𝑉𝐶𝐸 = 𝑉𝑐𝑐 − 𝑅𝑐 𝐼𝐶
• IC(sat) occurs when transistor operating in saturation region

• VCE(off) occurs when transistor operating in cut-off region

• Put these two point at given output characteristics

Circuit values affect the Q-point
Solving input & output loops
Problem- solving Technique ( Bipolar DC analysis) NPN:
• Before analyzing we need to know the mode of BJT operation
1- Assume that transistor is biased in the forward- Active mode in which case,
𝑉𝐵𝐸 = 𝑉𝐵𝐸 𝑂𝑁 = 0.7 𝑉 , 𝐼𝐵 > 0, 𝐼𝐶 = 𝛃 𝐼𝐵
2- Analyze the circuit with this assumption.
3- Evaluate the resulting state of the transistor , If the initial assumed parameter
values and 𝑉𝐶𝐸 > 𝑉𝐶𝐸 (sat) =0.2V are true, then the initial assumption is
correct. However if 𝐼𝐵 < 0 then the transistor is probably cutoff and if 𝑉𝐶𝐸 <
𝑉𝐶𝐸 (sat) then the transistor is likely in saturation.
4- If the initial assumption is proven incorrect, then a new assumption must be
made and the new circuit must be analyzed, step 3 must then repeated.
Solving input & output loops
𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶

Active
𝐼𝐶 = 𝛃𝐼𝐵 , 𝑉𝐵𝐸 = 𝑉𝐵𝐸 𝑂𝑁 = 0.7 𝑉, All the current are positive.

Saturation
𝐼𝐶
𝐼𝐶 < 𝛃𝐼𝐵 , = 𝛃𝑓𝑜𝑟𝑐𝑒𝑑 < 𝛃, 𝑉𝐵𝐸 = 𝑉𝐵𝐸 𝑂𝑁 = 0.7 𝑉, 𝑉𝐶𝐸 = 𝑉𝐶𝐸 (sat) ⩽0.2V.
𝐼𝐵

Cutoff
𝐼𝐵 = 𝐼𝐶 = 𝐼𝐸 = 0
Example 1
• Determine IB, IC, IE, VBE, VCE in the following circuit if bDC is 150

IC
RC= 100 Ω

VCB
RB= 10KΩ VCC
VCE =10V
IB
VBB = 5V VBE
IE
Solution
VBE = 0.7V
VBB − VBE 5V − 0.7V
IB = = = 430 A
RB 10 K
I C = b dc I B = (150 )( 430 A) = 64.5mA
I E = I C + I B = 64 = 64.5mA + 430 A = 64.9mA

VCE = VCC − I CV
RcC

= 10V − (64.5mA )(100 )

= 10V − 6.45V = 3.55V
VCB = VCE − VBE
= 3.55V - 0.7V = 2.85V
 Example 2
Determine whether or not the transistor shown in the following
figure in saturation. Assume VCE(sat.) = 0.2 V and βdc =100

IC
RC= 1K Ω

RB= 10KΩ VCC

VCE(sat) =10V
IB
VBB = 3V VBE
 Solution
Applying KVL to input circuit, we get
VBB = IB RB + VBE

3V = (10 kΩ) IB + 0.7V

3V − 0.7V 2.3V
 IB = = = 0.230mA
10k 10k

Applying KVL to output circuit, we get

VCC = IC RC + VCE(sat)
 10V = (1kΩ) IC + 0.2V
10V − 0.2V 9.8V
 IC = = = 9.8mA
1k 1k

IB(min) = IC / βdc = 9.8 mA / 100 = 0.098 mA

 I B = 0.220mA  I B(min) = 0.098mA

Therefore, the transistor is saturated

 Darlington Connection

• The Darlington circuit provides a very high current gain—the product of

the individual current gains: 𝛃D=𝛃1𝛃2
• A Darlington transistor connection provides a transistor having a very
large current gain, typically a few thousand.
• Darlington pairs are available as complete packages.
• A Darlington pair is sufficiently sensitive to respond to the small current.
Darlington Connection
DC Bias of Darlington Circuits
−𝑉𝑐𝑐 + 𝐼𝐵 𝑅𝐵 + 𝑉𝐵 = 0

𝑉𝐵 = 𝑉𝐵𝐸 + 𝑉𝐸

𝑉𝐸 = 𝐼𝐸 𝑅𝐸

𝐼𝐸 = 𝝱𝐷 + 1 𝐼𝐵 ≅ 𝝱𝐷 𝐼𝐵

−𝑉𝑐𝑐 + 𝐼𝐵 𝑅𝐵 + 𝑉𝐵𝐸 + 𝝱𝐷 𝐼𝐵 𝑅𝐸 = 0
• Base current

• Emitter Current