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Cao Syllabus

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12 views2 pages

Cao Syllabus

.

Uploaded by

sanketkurve7
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Hours / Maximum Marks ESE

Course Code Course Title Week Credits Continual End Sem. Duration
Total
L T P Evaluation Exam (Hrs.)
Computer
N-PCCCS301T Architecture and 3 0 0 3 40 60 100 3
Organization

Course Objective
The course provides to students with a comprehensive overview of Computer Architecture and
organization, arithmetic operation, memory structure and mechanism, and IO operation along with
multiprocessing architecture that enhances, core level of understanding.

Course Outcomes
After successful completion of this course the student will be able to:
CO1 Understand: Understand the fundamental components in the architecture of a computer system.
Apply: Apply the concept of number representation, various arithmetic and logical operations in
CO2 design of arithmetic unit. of binary number system, logical microoperations and memory
interleaving.
CO3 Analyze: Analyze the role of various technologies of memory design in computer architecture.
Understand: Demonstrate the execution of a complete instruction using different types of control
CO4
and sequencing units.
Apply: Make use of pipelining, input/output organization, shared memory, RISC technology in
CO5
multiprocessor and parallel architectures.

SYLLABUS
UNIT 1: Basic Structure of Computers and Processing Unit
Functional Unit, Basic operational concepts, Bus Structures, Interconnection, addressing modes, Subroutine
Linkages: Parameter Passing.
Processing Unit: Processor Organization, Register Organization and Activity, Instruction cycles,
Instruction Formats, Execution & Sequencing Complete instruction, Hardwired control, Micro programmed
control.
UNIT 2: The Arithmetic Unit
Number representation, Addition and Subtraction with signed-magnitude, Signed Multiplication: Booth’s
algorithm, Bit-pair algorithm, Integer division (Restoring and non-restoring), Floating point arithmetic
operations.
UNIT 3: The Memory System

Revision BOS Meeting Date W. E. F.


- 8th 03-05-2024 2024-25
Page 1 of 28
Various Technologies used in memory design, Higher order memory design, memory hierarchy, Main
memory, Auxiliary memory, Cache Memory, Cache optimization techniques, locality of reference
principle, memory Interleaving, Associative Memory.
UNIT 4: Input/Output Organization
I/O mapped I/O and Memory mapped I/O, Interrupts and Interrupts handing mechanisms, Vectored
interrupts, Synchronous and Asynchronous data transfer, Direct Memory Access, Computer peripherals,
I/O devices such as magnetic disc, Magnetic tape, CD-ROM systems.

UNIT 5: Pipelining
RISC philosophy, CISC vs RISC, Pipelining, Branch Prediction, Delayed Branch, Data dependency,
Hazards, Influence of pipelining in instruction set design, Multiple Execution units, Performance
consideration.
UNIT 6: Introduction to Multiprocessors
Basic concepts in Parallel processing, Classification of parallel architecture, Parallel processing vs
pipelining, Memory Access (UMA, NUMA, COMA), Vector processing, Array Processing, Multi core
architecture.

Text Books:
1. Computer Organization, V. C. Hamacher, Z. G. Vranesic, S. G. Zaky, 5th Edition, 2002, McGraw
Hill Publication.
2. Computer Organization & Architecture, W. Stallings, 2001, PHI publication.
3. Computer Architecture & Organization, J. P. Hayes, 3rd Edition, 1998, Tata McGraw-Hill
Publication.

Reference Books:
1. Computer System and Architecture, M Mano, 1993, PHI publication.
2. Computer Organization, Design and Architecture, Sajjan G. Shiva, 4th Edition, 2007, CRC Press
Publication.
3. Computer Architecture: A Quantitative Approach, John L. Hennessy, David A. Patterson, 6 th
Edition, 2011, Elsevier Science.

Revision BOS Meeting Date W. E. F.


- 8th 03-05-2024 2024-25
Page 2 of 28

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