IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

Large-Signal Stability Analysis of DC Distribution

Systems with Cascading Converter Structure
Li Ding, Student Member, IEEE, Chi K. Tse, Fellow, IEEE

Abstract—DC-DC converters are major components of individually and the magnitude of the output impedance of
the DC distribution systems. The converters interface with the source converter is smaller than the magnitude of the input
external power inputs, internal DC buses and loadings impedance of the load converter within the entire frequency
of subsystems. The interfacing DC-DC converters should
be stable locally and globally under mutual interactions range. Subsequently, many impedance based criteria [8]–[12]
through a DC bus within the system. Current research have been developed aiming to narrow the forbidden range
efforts have focused on the analysis of the stability of the given by Middlebrook’s criterion and increase the degree of
DC distribution system subject to small-signal disturbance. freedom of a design.
However, in practice, the system routinely operates un- The above impedance-based criteria are derived from the
der large-signal disturbances, such as when an additional
subsystem is turned on after being connected to the DC small-signal stability analysis, which permits fast calculation,
bus. In this scenario, the small-signal model may fail to but can be inaccurate for large-signal operations. Therefore,
fully describe the dynamics of the system. In this paper, some large-signal analysis methods have been proposed. The
we identify and analyze the bifurcation process when the behavior of a DC cascaded system under large-signal dis-
system undergoes abrupt load changes. According to the turbance has been described and analyzed by phase-plane
nonlinear operation of the interconnected system, a large-
signal stability criterion is derived. This criterion is simple, analysis [13]–[15]. In these previous works, the system’s dif-
and can be easily extended to multiple connected converter ferential equations are graphically solved (plotted), providing
systems. The criterion is also consistent with the result the trajectories on the phase plane. Specifically, the graphical
from bifurcation analysis. Finally, the validity of the pro- and experimental results show that the DC bus voltage and the
posed criterion is verified by the full-circuit simulations and output voltage of the system may collapse under sudden load
the experimental works.
changes. The phase-plane analysis is explicit and suitable for
Index Terms—Bifurcation analysis, constant power load, numerical simulations. However, detailed internal parameters
DC distribution system, design-oriented analysis, large- should be specified and different parameters produce different
signal disturbance, stability criterion
trajectories. Also, it does not readily generate an analytical and
general relationship between the parameters and the system’s
I. I NTRODUCTION stability.
Apart from the phase-plane analysis, Lyapunov-based meth-
D C distribution systems are widely used in micro-grids,
electric vehicles, communication systems and other
power supply applications [1]–[3]. Within a DC distribution
ods are the effective and widely used to analyze the large-
signal stability of the system. In reference [16], the stability of
a three-phase two-level power converter under different time
system, power sources and loads are connected with interfac-
scales has been analyzed based on the Lyapunov function.
ing power converters via a DC bus. In this system, interacting
The Lyapunov stability theorem is also applied to the DC-
power converters should be designed for a stable operation
DC converters to obtain the stability of global asymptotic
according to some system design criteria [4]–[6].
conditions [17].
The stability criteria of DC distribution systems can be de-
However, for more complex power electronics systems, it is
rived from small-signal and large-signal points of view. For the
difficult to find the Lyapunov function. Some methods, such as
small-signal stability analysis, the first criterion was proposed
the Takagi-Sugeno multi-modeling [18] and Brayton-Moser’s
by Middlebrook in 1976 [7] for a DC cascaded system which
mixed potential function theory [19], have been developed to
is the ancestor of today’s micro-grid system. According to
generate the Lyapunov function. The Brayton-Moser mixed
Middlebrook’s criterion, the stability of a system of two DC-
potential function theory can be used to analyze the large-
DC converters in cascaded connection can be guaranteed if
signal stability of the nonlinear circuits and obtain the analyt-
both the source converter and the load converter are stable
ical solution of the stable operating region [20]. In reference
[21], a large-signal stability criterion has been derived with
Manuscript received Month xx, 2022; revised Month xx, xxxx; ac- mixed potential theory to analyze the catastrophic bifurcation
cepted Month x, xxxx. This work is supported by Hong Kong Research
Grant Council under GRF 112071/21E. phenomenon of the photovoltaic-battery hybrid power system
L. Ding is with the Department of Electronic and Information Engi- under large-signal disturbance. In reference [22], based on an
neering, The Hong Kong Polytechnic University, Hunghom, Hong Kong. equivalent gyrator model of the buck converter, a criterion
(Email: [email protected]).
C. K. Tse is with the Department of Electrical Engineering, City Uni- derived from the mixed potential theory has been used to
versity of Hong Kong, Kowloon, Hong Kong. (Email: [email protected]). study the large-signal stability of a current-mode controlled
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

DC cascaded system. The results of these two prior works

show that the output voltage of the source converter gets rLine LLine Sl1
close to the load converter’s output voltage under transient Source
vbus vbusl
Load
E converter converter 1 R1 vo1
disturbance which is generated by stepping up the load from (Bs) (B1)
almost no load to full load in a very short time. In reference
Sl2
[23], the mixed potential function of a DC system cascaded
Load
with a LC filter and a constant power load has been established converter 2 R2 vo2
(B2)
to analyze the effect of different control parameters on the
large-signal stability of the system. However, again, detailed
internal parameters are needed when applying the mixed Fig. 1. DC distributed system with a source converter and two load
potential function theory and this method involves tedious converters.
computation and is difficult to apply to the DC distribution
systems containing a number of subsystems. Therefore, it is
highly desirable to have a simple and effective criterion to
investigate the large-signal stability of the DC distribution S L rL L rL D
system from a design-oriented perspective.
In this paper, we study the bifurcation phenomenon and vd S
D C vC vd C vC
derived a stability criterion for practical designs. The focus
of this study is to identify the instability conditions and the
stability boundaries of the system under an abrupt load change (a) (b)
situation. A simple and effective criterion is proposed to ana- Ca Ra Vref
vC
lyze the transient behaviors and to give the stability boundaries Rf
of the system. The results will be presented in design-oriented vd
vp
E/A Rc
forms that can facilitate the choice of parameters for ensuring
Rd
the system’s stable operation.
Vramp
This paper is organized as follows. The instability of the
system from a bifurcation viewpoint and the physical origin (c)
of the phenomenon are exposed in Section II. By showing Fig. 2. (a) Buck converter circuit, for building the load converter 1 (B1 )
this instability mechanism, a large-signal criterion based on and the source converter (Bs ); (b) boost converter, for building the load
the steady operating point is developed in Section III. The converter 2 (B2 ); (c) controller circuit of B1 , B2 and Bs .
criterion is generated directly from the bifurcation analysis and
an extension of the criterion to the DC distribution systems
containing a number of subsystems will also be shown. A
theoretical analysis of the stability boundary of the system is 16
vbus(V)

given. Section IV experimentally verifies the analysis. Finally, 14

12
Section V concludes this paper.
14
vbusl(V)

10
II. B IFURCATION P HENOMENON AND A NALYSIS
6
A typical structure of a DC distribution system with one 7
vo1(V)

source converter (Bs ) and two load converters (B1 and B2 ) is 6

5
shown in Fig. 1. For illustrative purposes, both B1 and Bs are
buck converters and B2 is a boost converter, but the analysis 30
vo2(V)

15
method can be extended to any other types of converters. In
0
this system, the bus voltage is regulated by Bs . All converters 0.15 0.16 0.17 0.18 0.19 0.2
t(s)
are controlled with three independent voltage-mode controller
circuits, as shown in Fig. 2. The maximum duty cycle of Fig. 3. Voltage collapse on the input port of the load converters and the
these three converters are clamped at 0.9. The power source E output voltage of B1 after B2 is connected to the DC bus.
shown in Fig. 1 is 24 V. Also, rLine = 0.6 Ω and LLine = 5 µH
account for the wire impedance from the source converter to
load converters. The values of the circuit components used
in the full circuit simulation are given in Table I, where TABLE I
g = Ra /Rf , τ = Ra Ca and Kv = Rd /(Rd + Rc ). In the C IRCUIT C OMPONENTS
following sections, the subscripts 1, 2 and s in the symbols Component B1 B2 Bs Component B1 B2 Bs
are used to represent B1 , B2 and Bs , respectively. L / µH 470 220 220 g 19.6 0.02 19.6
C / µF 680 680 680 τ /s 0.1 0.1 0.01
rL / Ω 0.5 0.5 0.5 Kv 0.84 0.17 0.36
A. Bifurcation Phenomenon R/Ω 6 30 – Vref / V 5 5 5
vC / V 6 30 14 f / kHz 16 16 16
In practice, the source converter and the load converters
are decentralized in a DC distribution system and the load
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converters may not connect to the DC bus at the same time. TABLE II
Without loss of generality, we assume that Sl1 is turned on C IRCUIT O PERATING S TATES
before t = 0 s, which means that source converter Bs and State Ss Ds S1 D1 S2 D2
load converters B1 are stable. After t = 0.15 s, Sl2 is turned
1 off on off on off on
on and B2 is connected to the DC bus.
2 off on off on on off
Fig. 3 shows the transient waveforms of the system when
3 off on on off off on
Sl2 is turned on some time after Sl1 is turned on. After B2
4 off on on off on off
is connected to the DC bus, it can be observed that the input
5 on off off on off on
voltage of the load converters (vbusl ) drops to 7 V. This voltage
6 on off off on on off
drop will also make the voltage input to B1 and B2 a bit lower
7 on off on off off on
or even to a point lower than the required output of B1 and 8 on off on off on off
B2 . So, the output voltage of B1 drops to less than 6 V, and
the output voltage of B2 cannot reach its desired output value
which is 30 V. The instability is irreversible, and the system
Then, the discrete-time model that describes the dynamics
is stuck in the abnormal state.
of the system can be derived from equation (3). Suppose the
switching period is T . Denote x(nT ) = xn (0), or simply
B. Bifurcation Analysis xn for brevity, which is the initial value at the beginning of
In general, bifurcations can be classified into continuous and switching period n. Within a period T , the state-j equation
discontinuous bifurcations, depending on whether the states of given by (3) describes the system starting from time (nT +
the system are varying continuously or discontinuously. The P of Tj = τj −τj−1 , where
τj−1 ) to (nT +τj ) for a time interval
cause of this bifurcation is that there is a structural change in τ0 = 0 and τ8 = T , such that j Tj = T . Using equation
the system as the parameters of the system are varied through (3), the value of xn (τj ) by the end of this state-j is given by:
the critical point, and such a bifurcation may cause undesirable
or even catastrophic consequences as the state variables may xn (τj ) = Nj (Tj ) xn (τj−1 ) + (Nj (Tj ) − I) A−1
j Bj E, (4)
exhibit undesirably wide excursion in the state space causing
damage to some system components [24]. where I is an 9 × 9 identity matrix, and Nj (ξ) is the
As shown in Fig. 3, when B2 is connected to the DC bus, corresponding system matrices given by
the system becomes unstable. The input voltage of the load
∞
converters collapses, and excessive power is consumed by the X 1 k k
Nj (ξ) = eAj ξ = I + A ξ . (5)
wire resistor. The output voltage of the load converters fall k! j
k=1
below the desired values. Meanwhile, the duty cycles of the
load converters are fixed at the maximum values, which cause Equation (4) can be rewritten as xn (τj ) = fj (xn (τj−1 )).
high current stress on the switching devices. In this way, xn+1 = xn (T ) = xn (τ8 ) can be determined
When a load converter is plugged to the DC bus, there iteratively from xn (0) = xn using equation (4). Thus, in
is a large-signal disturbance on the dc bus line. In order to general, we have
investigate the bifurcation phenomenon of the system during
the transient, the discrete-time mapping model has to be xn+1 = f (xn ). (6)
established. In this system, all the subsystems are designed
for operation in continuous conduction mode (CCM). A state To complete the derivation, we have to find the relation
vector x containing three 3-dim column vectors xs , x1 and among the duty cycles of the subsystems and the state vari-
x2 for converters Bs , B1 and B2 , respectively, is chosen as ables xn . According to Fig. 2, switch Si will be turned off
follows: ∆
when si (xn din ) = (vpi − vrampi ) is zero as:
T
x = [xs x1 x2 ] , (1)
∆
where s (xn dn ) = vp − vramp = 0. (7)
T
xs = [iLs vCs vas ] , The equilibrium point XQ and the corresponding duty cycle
T DQ of the system can be found by determining the steady-state
x1 = [iL1 vC1 va1 ] , (2)
T solutions. Using the discrete-time model developed earlier, the
x2 = [iL2 vC2 va2 ] .
steady-state variables and the duty cycles can be found by
Without loss of generality, we can assume that the subsys- putting xn+1 = xn = XQ and dn = DQ . In the steady state,
tems share and synchronize a common period T , having eight the capacitor voltages equal the bus voltage and the output
operating states as described in Table II. The state-j equation, of the system, i.e., VCs = Vbus , VC1 = Vo1 and VC2 = Vo2 .
where j = 1, 2, 3, 4, 5, 6, 7, 8, within a period is given by Defining
ẋ = Aj x + Bj E state j. (3) T
XQ = [ILs Vbus VAs IL1 Vo1 VA1 IL2 Vo2 VA2 ] , (8)
Expressions of Aj and Bj can be readily found and are
omitted here. and solving for XQ and DQ , we get
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1 1

Voi = kdi Vrefi , (9a) 0.5 0.5

Vbus = kds Vrefs , (9b)

Im(λ)

Im(λ)
0 0
p
Vbus − Vbus 2 − 4P r
Line
ILs = , (9c) −0.5 −0.5
2rLine
Vbusl = Vbus − ILs rLine , (9d) −1
−1 −0.5 0 0.5 1
−1
0.8 0.9 1
Re(λ) Re(λ)
Vbus
DQs = , (9e) (a) (b)
E
Vo1 1 1
IL1 = , (9f)
R1   0.5 0.5
rL1
Vo1 1 + R1

Im(λ)

Im(λ)
0
DQ1 = , (9g) 0

Vbusl
Vo2 −0.5 −0.5

IL2 = , (9h)
R2 (1 − DQ2 )
√
−1
−1 −0.5 0
Re(λ)
0.5 1
−1
0.8 0.9 1 1.1

1 − b + b2 − 4c Re(λ)

DQ2 = , (9i) (c) (d)

2
VAs = Vrefs − (1 − DQs )Vramps , (9j) Fig. 4. Movement of the eigenvalues when bifurcation occurs. (a) Before
B2 is added to the DC bus; (b) enlargement of (a); (c) after B2 is added
VAi = Vrefi − (1 − DQi )Vrampi , (9k) to the DC bus; (d) enlargement of (c).
2 2
Vbusl rL2 Vo1 Vo2
where b = Vo2 , c= R2 , P = R1 + R2 , i = 1, 2.

The dynamics of the system in a small neighborhood of the

equilibrium point or orbit can be inspected by determining
the eigenvalues of the Jacobian of the system. Then, by
varying some selected system parameters and tracking the
movement of the eigenvalues, the stability information such as
the bifurcation point and the boundaries of operating regions
can be identified. The Jacobian matrix can be derived from
the state equations and by perturbing around the equilibrium (a) (b)
point, and then the eigenvalues can be calculated by solving Fig. 5. Phase portrait views of the saddle-node bifurcation after B2 is
λ in the characteristic equation given by: connected to the DC bus. (a) Blue curve: constant power curve of B1 ;
red curve: phase portrait of B1 ; (b) blue curve: constant power curve of
B2 ; red curve: phase portrait of B2 .
det [λI − J (XQ )] = 0. (10)
the desired operating region. This result agrees with the full-
From equation (10), we can get all the eigenvalues of the
circuit simulation results provided in Fig. 3 that the output
Jacobian matrix. From Figs. 5(a) and (b), it can be found
voltage of B1 collapses after B2 is connected to the DC bus
that all the eigenvalues are inside the unit circle before B2
and the output voltage of B2 cannot reach its desired value.
is connected to the DC bus, which means that the system is in
the stable operating region. After B2 is connected to the DC
III. L ARGE -S IGNAL S TABILITY C RITERION
bus, an eigenvalue touches the unit circle on the positive real
line while other eigenvalues stay in the unit circle, as shown in A. Revisit the System’s Transition under Large-Signal
Figs. 4(c) and (d). This means that a saddle-node bifurcation Disturbance
occurs. In order to derive the large-signal stability criterion, it is
The saddle-node bifurcation results in the creation of a new important to revisit the system’s dynamic behavior when B2 is
orbit (or the destruction of an existing orbit). In this system, connected to the DC bus. After t = 0.15 s, Sl2 is turned on and
after B2 is connected to the DC bus, vo1 drops and cannot be B2 is connected to the DC bus. Since the load converters are
recovered to the original value. Meanwhile, vo2 is fixed at the connected in parallel, the connection of B2 will cause a drop of
value that is lower than the desired value. The phenomenon the overall input impedance of the load converters. Due to the
can be seen more clearly in the phase portrait, as shown in presence of the line impedance, the drop in the overall input
Figs. 5(a) and (b). After B2 is connected, the trajectory of impedance of the load converters will lead to a voltage drop
B1 fails to converge to its original desired operating point at the input port of the load converters. After being connected
while the trajectory of B2 cannot reach its desired operating to the DC bus, B2 is in a start-up process. During the start-
point and stays at the abnormal state finally. This means that up process, the controller of B2 initially saturates the duty
both B1 and B2 operate in the new orbits which are not in cycle at its maximum value for fast reaching of the controller’s
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rLine
reference value. Meanwhile, B1 may enter the accommodation
region since the a voltage drop occurs in vbusl .
From the foregoing discussion and the previous full-circuit vbus vbusl Req1 Req2
simulation results, we can see that there is a complex interac-
tion among the subsystems through the non-ideal DC bus when
the DC distribution system is under large-signal disturbance Fig. 6. Equivalent circuit of the system under large-signal disturbance.
such as an abrupt load change, and such disturbance may cause
the voltage of the DC bus to collapse and thus would affect
the stability of the whole system. Meanwhile, the collapse of
the bus voltage may cause undesirable or even catastrophic
Vbusl1 = Vo1 (R1 + rL1 )/(Dm1 R1 ). (11)
consequences as the current magnitude on the DC bus have a
sudden increase which may damage the system’s components.
Vbusl2 = Vo2 [(1 − Dm2 )2 R2 + rL2 ]/((1 − Dm2 )R2 ). (12)

B. Stable Operation Requirements of the System Here, Dm1 and Dm2 represent the maximum duty cycle
values of B1 and B2 , respectively. Vbusl1 and Vbusl2 represent
If the system can maintain stability under large-signal the permissible minimum input voltage values of B1 and
disturbance, it can finally return to the desired operating point. B2 , respectively. For simplicity, only the equivalent series
For this case, B2 can start-up successfully and B1 can recover resistances of the inductors are taken into account, with other
to its normal operating state. This also means that all the parasitic parameters such as equivalent series resistances of the
load converters can maintain a constant power load (CPL) capacitors all set to zero. Detailed derivation of the equations
characteristic. Since all the load converters have a duty cycle (11) and (12) can be found in a prior work [25].
limit (Dm ), in order to ensure the load converters maintaining From the foregoing discussion, the steady-state value of the
the CPL characteristic, the duty cycle should always lie within load converters’ input voltage is adopted to inspect the large-
the range (0, Dm ). Thus, the input voltage of each load signal stability of the system. Thus, it is important to analyze
converter should be greater than a permissible minimum value the allocation of Vbus on the wire impedance and the input
to ensure that the system can return to the desired operating port of the load converters.
point. Otherwise, the duty cycle will saturate and stay at Dm , Under the critical condition, the whole system can be
and the load converters will operate in an open-loop condition simplified as shown in Fig. 6. In this model, Bs is equivalent
and behave as resistive loads rather than CPLs. to a voltage source, and Vbus is the output voltage of Bs .
Equivalent resistances Req1 and Req2 are the DC values of
C. Concept of the Criterion input resistances of the load converters which are operating at
their maximum duty cycles. Here, the line inductance is not
From the foregoing discussion, it can be concluded that the included in the simplified model. The reason is that the it only
input voltage of the load converters can be used as an indicator affects the dynamic of the system, and have no effect on the
to assess the large-signal stability of the system. Here, only calculation of the steady-state operating point of the system.
the steady-state values need to be considered and the detailed
According to equations (11) and (12), each load converter
dynamics such as oscillation can be ignored. This is because
has its permissible minimum input voltage because the output
the load converters may fail to maintain the CPL characteristic
voltages of the load converters are different. Since the load
and can be judged operating in an undesired region if their in-
converters are in parallel connection, an overall permissible
put voltages are below the permissible minimum value. Thus,
minimum input voltage Vbusl min should be greater than the
it is reasonable to derive a criterion using a set of algebraic
biggest one. Thus, Vbusl min is defined as
equations instead of differential equations to investigate the
system’s stability under large-signal disturbance. Vbusl min ≥ max {Vbusl1 , Vbusl2 } . (13)
It should be pointed that under an abrupt load change
situation, the duty cycle of a load converter which was stable According to Fig. 5 and equations (11), (12) and (13), the
originally, e.g., B1 , may not reach the maximum value during large-signal stability criterion can be given as:
the accommodation process. This is because the initial value
of the energy storage element is not zero if the converter is Req vbus
Vbusl min =
stable originally. However, for simplification, we will consider Req + rLine
the critical condition corresponding to all the load converters
 
Vo1 Dm1 Req1 Vo2 Req2
operating at the maximum duty cycle during the adjusting ≥ max , . (14)
R1 (1 − Dm2 )R2
transition.
Here Req = Req1 ||Req2 ; and Req1 = RD 1 +rL1
2 and Req2 =
m1
(1 − Dm2 )2 R2 + rL2 represent the DC values of the input
D. Derivation of the Criterion impedances of B1 and B2 , respectively. It is obviously that
When B1 and B2 operate in the critical condition, the the parameters used to calculate the boundary of the system
relation of the output voltages and the converter’s parameters are the load, equivalent series resistance of the inductor, output
in the steady state can be defined as voltage and the maximum duty cycle of each load converter,
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rLine LLine Sl1 rLine

Source Load
E converter vbus vbusl converter 1 R1 vo1
(Bs) (B1) vbus vbusl Req1 Req2 Reqn

Sln
Load
converter n Rn von
(Bn) Fig. 8. Equivalent circuit of the system under large-signal disturbance
(N load converters).

Fig. 7. DC distributed system with one source converter and multi-load

converters. overall permissible minimum input voltage Vbusl min should be
greater than the largest one of Vbusli . So, Vbusl min is defined
which are easy to obtain. Since the subsystems interact with as
each other under large-signal disturbance through the line Vbusl min ≥ max {Vbusl1 , Vbusl2 · · · Vbusli } . (16)
resistance which is normally omitted, the stability threshold
(boundary) of rLine should be investigated. Substituting the According to the previous discussion and Fig. 8, the large-
parameters given in Table I into inequality (14), we get signal stability criterion of the system under large-signal
rLine ≤ min{0.68 Ω, 0.54 Ω}. Hence, if rLine is greater disturbance can be expressed as
than 0.54 Ω, the system will lose stability under large-signal
disturbance. The analysis result based on the derived criterion Req Vbus
Vbusl min = ≥ max {Vbusl1 , Vbusl2 · · · Vbusli } ,
agrees with the previous full-circuit simulation result and the Req + rLine
bifurcation analysis result. (17)
Pn
where Req = 1/ i=1 (1/Reqi ).
E. Extension of the Criterion to the Large-Scale DC Dis-
tribution Power System F. Description of the Effect of the Soft-Start Routine on
From the previous discussion, it can be found that the the System’s Stability
parameters used in the criterion are easily obtained and the In practice, a soft-start routine is usually incorporated in
calculation process is simple. So, the stability criterion can the control. Also, the effect of the soft-start routine on the
be easily extended to the system containing a number of system’s stability under large-signal disturbance has been
subsystems. Fig. 7 is a representative DC distribution system rarely reported in prior works. Therefore, the effect of the
consisting of one source converter which regulates the bus soft-start routine on the proposed criterion will be discussed
voltage and a number of load converters, each of which in this subsection.
regulates its own output. Without loss of generality, we assume Fig. 9 shows the relationship between the maximum duty
that all the switches except Sln are turned on before t = 0 cycle value of B2 and the stability boundary of rLine . In the
s, which means that the source converter Bs and the load previous discussions, B2 is a hard switching converter, and we
converters B1 to Bn−1 have already operated stable. After assume that the duty cycle of B2 will fix at Dm2 during the
t = 0 s, Sln is turned on and Bn is connected to the DC whole start-up process after it is connected to the DC bus. If
bus. According to the previous discussion, if vbusl can be the soft-start routine is introduced, the duty cycle of B2 will
guaranteed to be greater than the permissible minimum input increase gradually from 0 to Dm2 instead of increasing to and
voltage, the whole system can keep stable after the abrupt keeping at Dm2 rapidly in the transient process. Therefore,
load change situation and permissible minimum input voltage the value of the equivalent duty cycle of B2 in the start-up
of this system can be derived as follow: process is smaller than that in hard switching case. Here, the
equivalent duty cycle of B2 can be regarded as the averaged
Vbusli = f (Dmi , Voi , Ri , rLi ), (15) value of the duty cycle in the start-up process and can be used
to replace Dm2 in inequality (14) to obtain the boundary of
where Vo , Dm , R, rL and Vbusl represent the steady-state the system under large-signal disturbance.
values of output voltage, maximum duty cycle value, load, From Fig. 9, it can be observed that the stability boundary of
equivalent series resistance of the inductor and the permissible the system may vary with the maximum duty cycle of B2 . By
minimum input voltage, respectively. Also, i = 1, ...n denotes adjusting the soft-start parameters and making the equivalent
load converters B1 to Bn . duty cycle of B2 in the start-up process equals 0.79, and using
When the system operates in critical condition, where all this value to calculate the boundary through inequality (14),
the load converters operate at their maximum duty cycles, the rLine reaches the peak value, and the system can become stable
whole system can be simplified, as shown in Fig. 8. under large-signal disturbance when rLine ≤ 0.91 Ω. However,
Here, equivalent resistances Req1 to Reqn are the input if we further increase the soft-start duration, which means
resistances of the load converters which are operating at that the value of the equivalent duty cycle of B2 in the start-
their maximum duty cycles. Since each load converter has up process is further decreased, the maximum value of rLine
its permissible minimum input voltage Vbusli because the will decrease, which means that it will narrow the stability
output voltages of the load converters are different. In addition, boundary of the system.a long soft-start duration may lead a
because the load converters are in parallel connection, thus, the poor transient performance of the system.
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1
0.9
vbus: [20 V/div]
0.8
0.7
vbusl: [20 V/div]
0.6

rLine (Ω)
0.5 vo1: [5 V/div]
0.4
0.3
Turn on Sl2 vo2: [20 V/div]
0.2
0.1
0
0.5 0.6 0.7
D
0.8 0.9 1 Time: [4 ms/div]
m2

Fig. 9. Relationship between Dm2 and rLine . (a)

vbus: [20 V/div]

vbus(V)

14.5 14.5
vbus(V)

14 14
13.5 13.5 vbusl: [20 V/div]
14 16
vo1: [5 V/div]
vbusl(V)
vbusl(V)

14
10
12
6 10
7 6.5 Turn on Sl2 vo2: [20 V/div]
vo1(V)
vo1(V)

6 6
5 5.5

30 30 Time: [2 ms/div]
vo2(V)

vo2(V)

15 15
0 0
0.15 0.2 0.25 0.3 0.35 0.4 0.15 0.2 0.25 0.3
t(s) t(s) (b)
(a) (b)
Fig. 11. Transient waveforms (a) for rLine = 0.6 Ω (without soft-
start), showing unstable system under large-signal disturbance; (b) for
Fig. 10. Transient waveforms (a) for rLine = 1 Ω (with soft-start),
rLine = 0.5 Ω (without soft-start), showing stable system under large-
showing unstable system under large-signal disturbance; (b) for rLine =
signal disturbance.
0.8 Ω (with soft-start), showing stable system under large-signal distur-
bance.

the criterion proposed in Section III. Here, the topologies,

A long soft-start duration may lead a poor transient perfor- the control methods and the parameters of B1 , B2 and Bs
mance of the system. So, in practice, the soft-start time is in the are the same with the full-circuit simulation circuits shown in
range of 25 to 100 switching cycles [26], which is smaller than Section II. The maximum duty cycles of these three converters
the start-up time. So, the value of the equivalent duty cycle of are 0.9. The input voltage (E) is 24 V and the values of rLine
the converter will not be much smaller than the maximum duty and LLine are 0.6 Ω and 5 µH, respectively, which account
cycle value of the hard switching condition. So, the maximum for the wire impedance from Bs to B1 and B2 .
value of rLine in the system with soft-start will be a bit greater
than that of the hard-switching system. Therefore, the model A. Hard Switching Subsystems Verification
based on the hard-switching condition shown in Fig. 6 and
the corresponding criterion given in inequality (14) is still Firstly, Sl1 is turned on and both B1 and Bs were stable
effective in providing a sufficient criterion to ensure stability before t = 0 s, and Sl2 is turned on at t = 0 s. Substituting
under large-signal disturbance. the parameters given in Table I into the inequality (14), we get
Fig. 10 shows the transient waveforms of the system ob- rLine ≤ min{0.68 Ω, 0.54 Ω}. Hence, if rLine is greater than
tained by the full-circuit simulation when Sl2 is turned on 0.54 Ω, the system will lose stability under large disturbance.
some time after Sl1 is turned on. Here, all the subsystems Fig. 11(a) shows the transient waveforms of the system with
adopt the soft-start routine and the equivalent duty cycle of rLine = 0.6 Ω and LLine = 5 µH. From Fig. 11(a), it can be
B2 in the start-up process is adjusted to be equal to 0.79. observed that vbus can be kept at the regulated value after B2
According to Fig. 9, the stability boundary of the system under is connected to the DC bus. However, vo1 drops to 5 V and
large-signal disturbance is rLine ≤ 0.91 Ω. In Fig. 10(a), it vo2 can only reach the value of 25 V instead of its regulated
can be observed that the whole system cannot maintain stable value (30 V), and the system can be regraded as operating in
operation after B2 is connected to the DC bus if the value a new orbit. However, the steady-state values of the output
of rLine fail to satisfy the stability criterion. However, if the voltage on this orbit (5 V for B1 and 25 V for B2 ) are not
stability criterion can be satisfied, as shown in Fig. 10(b), after the desired operating points. Therefore, the system is unstable
B2 is connected to the DC bus, the system may undergo the under large-signal disturbance and a saddle-node bifurcation
adjusting transition and the system can recover to the normal occurs. Moreover, the instability cannot be removed unless
operating region. It can be found that the full-circuit simulation the system is shut down manually. When the system has
results verify the effectiveness of the proposed criterion. rLine = 0.5 Ω < 0.54 Ω, which satisfies the proposed criterion,
the system can operate normally after B2 is connected to the
DC bus, as shown in Fig. 11(b). The experimental results
IV. E XPERIMENTAL V ERIFICATION are in good agreement with the full-circuit simulation results,
A DC distribution system with one source converter (Bs ) bifurcation analysis results, and also verify the effectiveness of
and two load converters (B1 and B2 ) is used to demonstrate the concept of the proposed criterion that the system’s large-
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

vbus: [20 V/div] 2.5 3

Theoretical analysis Theoretical analysis
Full circuit simulation Full circuit simulation
vbusl: [20 V/div] 2
Experiment 2.5 Experiment

Unstable Unstable
vo1: [5 V/div] 2

rLine (Ω)

rLine (Ω)
1.5
1.5
Turn on Sl2 vo2: [20 V/div] Stable
Stable
1
1

Time: [20 ms/div] 0.5 0.5

30 40 50 60 70 80 30 40 50 60 70 80
R2 (Ω) R (Ω)
2

(a) (a) (b)

Fig. 14. Operating boundaries for the system in (R2 , rLine ) parameter
vbus: [20 V/div]
space (a) without and (b) with soft-start.
vbusl: [20 V/div]
vo1: [5 V/div]
system can operate normally after B2 is connected to the DC
Turn on Sl2 vo2: [20 V/div] bus, verifying the effectiveness of the proposed criterion on
predicting the stability condition of the system with soft-start
Time: [20 ms/div] routine under large-signal disturbance.
According to the proposed criterion and Fig. 9, it can be
(b)
found that the maximum value of rLine will decrease if we
increase the soft-start duration to limit the equivalent duty
Fig. 12. Transient waveforms (a) for rLine = 1 Ω (with soft-start), cycle of B2 in the start-up process to below 0.79. Here,
showing unstable system under large-signal disturbance; (b) for rLine = we adjust the soft-start parameters to set the equivalent duty
0.8 Ω (with soft-start), showing stable system under large-signal distur-
bance. cycle of B2 to about 0.7. It can be predicted that the system
is unstable under large-signal disturbance if rLine = 0.7 Ω.
vbus: [20 V/div] Fig. 13 shows the experimental result. It can be observed that
B1 cannot recover to its original operating region while B2
vbusl: [20 V/div]
cannot reach its desired operating point. This agrees with the
vo1: [5 V/div] prediction based on the proposed criterion.
Turn on Sl2 vo2: [20 V/div]
C. Stability Boundary of the system
Time: [40 ms/div] Stable transient operating boundaries in the (R2 , rLine )
parameter space are compared with the theoretical analysis,
as shown in Fig. 12. The boundary of the theoretical analysis
Fig. 13. Transient waveforms for rLine = 0.7 Ω (with soft-start and the
equivalent maximum duty cycle is about 0.7), showing unstable system shown in Fig. 14(a) can be obtained by varying the value of
under large-signal disturbance. R2 and calculating the results according to inequality (14).
In Fig. 14(b), it can be obtained by varying the value of R2 ,
substituting the duty cycle value of B2 from 0 to the maximum
signal disturbance can be predicted by investigating the steady- value in inequality (14) and plotting the relationship between
state value of the input voltage of the load converters. Dm2 and rLine like the Fig. 9, and finding out the maximum
value ofrLine . In Fig. 14, the stable regions corresponding
B. Soft-Start Switching Subsystems Verification to the system can operate at the desired region under large-
signal disturbance, while the unstable regions correspond to
In the closed-loop controlled system with soft-start routine, the system working in an undesirable operating regions under
however, the duty cycle of B2 increases slowly after B2 large-signal disturbance. It can be found that the results of
is plugged to the DC bus. Fig. 12(a) shows the system the experiment and the full-circuit simulation are in good
which includes a soft-start routine with rLine = 1 Ω and agreement with the theoretical analysis.
LLine = 5 µH. Initially, Sl1 is on and Sl2 is off. After
converters B1 and Bs have reached their steady states, Sl2
is turned on. According to Fig. 8, when the system adopts V. C ONCLUSION
soft-start, and the equivalent duty cycle of B2 in the start-up A bifurcation phenomenon has been found for the DC
process is adjusted to be equal to 0.79, if rLine > 0.91 Ω, cascaded power system with multi-load converters. Essentially,
the system will lose stability under large-signal disturbance. the input voltage of the load converters collapses suddenly
From Fig. 12(a), it can be observed that vbus can be kept at the when an extra load converter connected to a non-ideal DC
regulated value after B2 is connected to the DC bus, but vo2 bus of the system. The root cause of this phenomenon is the
cannot reach its regulated value of 30 V and vo1 collapses and saturation of the duty cycles of the load converters and the
cannot recover to its normal operating region. Fig. 12(b) shows existence of the wire resistance of the DC bus. The voltage
the same system with rLine = 0.8 Ω. It can be found that the dropped across on the wire resistance may cause the input
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

Li Ding (Student Member) received the B.E. de- Chi K. Tse (M’90–SM’97–F’06) received the
gree in information engineering from the Guang- BEng (Hons) degree with first class honors in
dong University of Technology, Guangzhou, electrical engineering and the PhD degree from
China, in 2011, the M.E. degree in signal and the University of Melbourne, Australia, in 1987
information processing from the South China and 1991, respectively.
University of Technology, Guangzhou, in 2014. He is presently Chair Professor of Electrical
He is currently pursuing the Ph.D. degree in Engineering at City University of Hong Kong,
power electronics with the Hong Kong Polytech- Hong Kong. Prior to joining City University of
nic University, Hong Kong. His current research Hong Kong in October 2019, he was with
interests include modeling and analysis power Hong Kong Polytechnic University, with which he
electronic systems and study the complex be- served as Head of the Department of Electronic
havior in power electronic circuits. and Information Engineering from 2005 to 2012. His research interests
include power electronics, nonlinear systems and complex network ap-
plications. He was awarded a number of research and industry awards,
including Prize Paper Awards by IEEE T RANSACTIONS O N P OWER E LEC -
TRONICS in 2001, 2015 and 2017, RISP Journal of Signal Processing
Best Paper Award in 2014, Best paper Award by International Journal
of Circuit Theory and Applications in 2003, two Gold Medals at the
International Inventions Exhibition in Geneva in 2009 and 2013, a Silver
Medal at the International Invention Innovation Competition in Canada
in 2016, a Grand Prize and Gold Medal at the Silicon Valley Interna-
tional Invention Festival in 2019, and a number of recognitions by the
academic and research communities, including honorary professorship
by several Chinese and Australian universities, Chang Jiang Scholar
Chair Professorship, IEEE Distinguished Lectureship, Distinguished Re-
search Fellowship by the University of Calgary, Gledden Fellowship and
International Distinguished Professorship-at-Large by the University of
Western Australia. While with the Hong Kong Polytechnic University, he
received the President’s Award for Outstanding Research Performance
twice, Faculty Research Grant Achievement Award twice, Faculty Best
Researcher Award, and several teaching awards.
Dr. Tse serves and has served as Editor-in-Chief for the IEEE T RANS -
ACTIONS ON C IRCUITS AND S YSTEMS II (2016-2019), IEEE Circuits and
Systems Magazine (2012-2015), Editor-in-Chief of IEEE Circuits and
Systems Society Newsletter (since 2007), Associate Editor for three
IEEE Journal/Transactions, Editor for International Journal of Circuit
Theory and Applications, and is on the editorial boards of a few
other journals. He currently chairs the steering committee for the IEEE
Transactions on Network Science and Engineering. He also serves as
panel member of Hong Kong Research Grants Council, and member of
several professional and government committees.