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DLD Exp 3

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13 views9 pages

DLD Exp 3

Uploaded by

Muhammad Usman
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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LAB EXERCISE: 3

DESIGN OF ADDER AND SUBTRACTOR

AIM:
To design and construct half adder, full adder, half subtractor and full subtractor
circuits and verify the truth table using logic gates.

THEORY:

HALF ADDER:

A half adder has two inputs for the two bits to be added and two outputs one
from the sum ‘ S’ and other from the carry ‘ c’ into the higher adder position. Above
circuit is called as a carry signal from the addition of the less significant bits sum from
the X-OR Gate the carry out from the AND gate.
FULL ADDER:

A full adder is a combinational circuit that forms the arithmetic sum of input;
it consists of three inputs and two outputs. A full adder is useful to add three bits at a
time but a half adder cannot do so. In full adder sum output will be taken from X-OR
Gate, carry output will be taken from OR Gate.

HALF SUBTRACTOR:

The half subtractor is constructed using X-OR and AND Gate. The half
subtractor has two input and two outputs. The outputs are difference and borrow. The
difference can be applied using X-OR Gate, borrow output can be implemented using
an AND Gate and an inverter.

FULL SUBTRACTOR:

The full subtractor is a combination of X-OR, AND, OR, NOT Gates. In a full
subtractor the logic circuit should have three inputs and two outputs. The two half
subtractor put together gives a full subtractor .The first half subtractor will be C and A
B. The output will be difference output of full subtractor. The expression AB
assembles the borrow output of the half subtractor and the second term is the inverted
difference output of first X-OR
LOGIC DIAGRAM:

HALF ADDER

TRUTH TABLE:

A B CARRY SUM

0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0

K-Map for SUM: K-Map for CARRY:

SUM = A’B + AB’ CARRY = AB


LOGIC DIAGRAM:

FULL ADDER
FULL ADDER USING TWO HALF ADDER

TRUTH TABLE:

A B C CARRY SUM

0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

K-Map for SUM:

SUM = A’B’C + A’BC’ + ABC’ + ABC


K-Map for CARRY:

CARRY = AB + BC + AC

LOGIC DIAGRAM:

HALF SUBTRACTOR

TRUTH TABLE:
A B BORROW DIFFERENCE

0 0 0 0
0 1 1 1
1 0 0 1
1 1 0 0

K-Map for DIFFERENCE:


DIFFERENCE = A’B + AB’

K-Map for BORROW:

BORROW = A’B

FULL SUBTRACTOR USING TWO HALF SUBTRACTOR:

TRUTH TABLE:
A B C BORROW DIFFERENCE

0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 1 0
1 0 0 0 1
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

K-Map for Difference:


Difference = A’B’C + A’BC’ + AB’C’ + ABC

K-Map for Borrow:

Borrow = A’B + BC + A’C

PROCEEDURE:
 Connections are given as per circuit diagram.

 Logical inputs are given as per circuit diagram.

 Observe the output and verify the truth table

RESULT:
Attach output of logic circuits in results

 Design circuit of Half adder and Full adder on the software.


 Design circuit of Half Subtractor and Full Subtractor on the
software.
POST EXPERIMENT QUESTIONS
 How many AND, OR, and EXOR gates are required for the configuration of
full adder?

 What is the major limitation that half adders have?


 Explain the significance of carry input and carry output in a full adder.

 Explain the significance of borrow input and borrow output in a full


subtractor.

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