CAD Note:: Title Title Title

5 4 3 2 1
Table of Contents
Page Title Page Title Page Title
D 01 Table of Contents 31 Debug mux 61 Discrete Load Switches D
02 CHANGE HISTORY 32 Debug buttons 62 1.8VSB & Load SW

03 BLOCK DIAGRAM 33 SW Debug Conn 63 CHARGER
04 CLOCK DISTRIBUTION 34 EE Debug Connector 64 5V Load SW
05 SYSTEM POWER STATE DIAGRAM35 SM BUS, DIAGNOSTIC CONN 65 3P3V Load SW
06 POWER DISTRIBUTION 36 Power Monitor 66 VCPU Controller
07 INPUT POWER DIAGRAM 37 SPI ROM UEFI 67 VCORE VCCSA
08 POWER SYSTEM/CONTROL DIAG 38 TPM 68 VCVGT
09 I2C MAP 39 Temp Sensor/System Fan 69 SL Power
10 CPU(1)_MISC,JTAG,DDI.EDP 40 REALTEK ALC3269 CODEC 70 BATT CONN, power input
C
11 CPU(2)_LPDDR3 41 Audio Jack/Spkr 71 Empty C
12 CPU(3)_SKL POWER1 42 Audio Amplifier 72 LCD backlight/TB

13 CPU(4)_SKL_POWER2 43 SSD page 1 73 Empty
14 CPU(5)_GND 44 SSD Page 2 74 Empty
15 CPU(6)_CFG_RESERVED 45 USB3.0, TYPE A 75 Empty
16 LPDDR3(1)_MEMORY DOWN 46 SL HDMI MUX/3P3V_HPD 76 TP's and Mech
17 LPDDR3(2)_MEMORY DOWN 47 SurfLink Connector
18 XDP 48 BLADE
19 LPDDR3(3)_CA/DQ Voltage 49 G5 touch circuitry
20 PCH(1)_SD,HDA,RTC, CLK 50 Wi-Fi_BT
B
21 PCH(2)_CLK,SMB,LPC, SPI 51 Empty B
22 PCH(3)_SYS PWR CONTR 52 Empty

23 PCH(4)_CCI, HWID 53 mDP
24 PCH(5)_PCIE,USB 54 Camera/Sensor Conn.
25 PCH(6)_CPU,GPIO,MISC 55 eDP connector
26 PCH(7)_POWER 56 3P3VA & Reset
27 SAM_1, K22 57 VCCEDRAM & VCCEOPIO
28 SAM_2, K22 58 PMIC 1
29 SAM_3, K22 59 PMIC 2
30 INSTANT_ON 60 PMIC 3
A A
CAD Note:
Default component footprint is SMD 0201, X5R, 1% resistors.
Property: BUILD-OPT Title: 01. Table of Contents
DNP = Do Not Place S or DB = Replace after Debug Microsoft Confidential Engineer: Surface
Size Project Name Rev
A3 A 1.0.0.1
Date: Thursday, April 26, 2018 Sheet 1 of 79
Vinafix.com 5 4 3 2 1
5 4 3 2 1
Schematics Change History
Schematics Change is maintained in spreadsheet, and would not fit on this page.
D D
C C
B B
A A
CAD Note:
Default component footprint is SMD 0201, X5R, 1% resistors S = Short after design fixed
Title: 02. CHANGE HISTORY
Property: BUILD-OPT Microsoft Confidential Engineer: Surface
DNP = Not Installed Part. A3 A 1.0.0.1
5 4 3 2 1
Front IR Architectural Diagram I-Core

Illuminator Rev 2.5
(OV7251)
Debug UART, external connector

Front RGB
D MIPI CSIx1 MIPI CSIx1 (720p – OV9734) D
(1Gbps) Analog audio combo jack (3.5mm)

Power Monitor Components
(DEBUG) I2C HD Audio Audio R AMP
L Right
I2C Codec ALC1304
SSD2 BGA chip
Left
128GB, 256GB
512GB, 1TB 2 Mic
[email protected] OUT
SSD BGA chip ALS I2C I2C1 UART2 CSI2x2 CSI2x2 I2C2 HDA
I2C4 DP1.2
128GB, 256GB CMC + ESD mDP
I2C3 DMIC AUX/DDPC
512GB, 1TB 2/4 x PCIe PCIe 11/12
DDI1
Memory/ 2/4 x PCIe PCIe 7/8
LPDDR3 x32 DDI1_AUX DDI2_AUX
MUX
POWER IN/OUT
Storage LPDDR3
LPDDR3x32
GB x32
LPDDR3
16,8,4 x32
(4x) 128-bit (32b x 4) – 2 Chl -64 bit each DDR0x64, DD1x64 DDPB_CTRL DDPC_CTRL
C USB3p2 C
USB2p2 USB2/USB3.0/DP1.2x4 CMC + ESD
16MB Quad SPI SPI0 DDI2
External
GPIOs AUX/DDPC SurfLink
SPI ROM SKL-U
DDI2_AUX DDI2_AUX Debug CMC + ESD Connectors
Backlight Controller I2C5
DDPC_CTRL DDPC_CTRL MUX MUX
15W
LCD TCON eDP
2+2/2+3E Debug [email protected] OUT
Signals
13.5" eDP 1.4a USB3.0 USB3.0
CMC + ESD POR CHANGES
SPI SPI1
USB3p1
USB2p1
Type-A
NTRIG G5 USB2
I2C I2C0
TrackPad INT
PCIe9
UART UART1
KeyBoard UART SC O
INT
I
P
G
P
D
USB2p5
1XPCIe
Antennas
B Freescale X LPC
B
K22 Wifi abgn+ac

MUX PWM/Tach Power path updates
SL UART Marvell 88W8897 Separate Block Diagram
Hall Effect XDP USB2 BT
SC Debug LPC POR CHANGES
Fan/Fan TPM IMVP8 PMIC
Connection I2C I2C Debug XDP Infineon ISL95857
Nuvaton W/2+3E support LEGEND
Power/PMIC Battery Battery SC,K22 NationZ Mostly same as P
BD9992GW 7.4V 45WH Charger POR CHANGES
7.4V
Temp (sep Block Dia) w/Fuel G ISL9237 2xTPS62134 Changed Feature/Implementation
Greenpak Surflink VCCEDRAM/VCCEOPIO
New Feature/Implementation
A SD FLUSH A
Title: 03. BLOCK DIAGRAM

Microsoft Confidential Engineer: Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
D D
C C
B B
A A
Title: 04. CLOCK DISTRIBUTION

Microsoft Confidential Surface
Engineer:
A3 A 1.0.0.1
5 4 3 2 1
D D
C C
B B
A A
Title: 05. SIGNAL & RESET MAP

Microsoft Confidential Engineer:
Surface
Vinafix.com Size Project Name Rev
C A 1.0.0.1
5 4 3 2 1
5 4 3 2 1
IMVP8 SKL
J47001
Q63008 /Q63009 VCORE
SurfLink Connector PWR_SL1
Back to Back FETS
VCORE VCORE Imax = 20A
PWR_SL1 R67007
20mє À
VCCGT/GTx
VCCGT/GTx VCCGT Imax = 20A
PWR_SL1_R R68001
20mє À
VCCSA
VCCSA VCCSA Imax = 7A
R67008
50mє À
Platform PMIC 3VSUS_ORG

U58001 R26004
10mє A
D V3P3_DSW
V3P3_DSW 3P3V_TPM D
R38001
R58034 V6 R58039 100mє À
R63001 10mє À 20mє A U65003
20mє A TPS22920 3P3V_SSD
3P3V_SSD_EN R6501010 mє A
U43005
TPS62085 1P8V_SSD
R43017 1P8V_SSD
25mє A
U43006
TPS62085 1P2V_SSD
U63001 R43016 1P2V_SSD
ISL9237 VSYS_R 25mє A
Buck/Boost Charger R63042
10mє À U65001
3P3V_SWPWR
TPS22920 3P3V_PANEL
EDP_VDD_EN R65002
50mєA
R63009 J53001
10mє A
U53005 ML_V3P3_PWR
NCP380 mDP
R53007 mDP_PWR_EN Connector
0є À
VDD_BAT
3P3V_CAM
R54005
100mє A
J70001 /J70002 /J70003
Battery Connector
2S
Battery V5A
V5A U45004 5V_USBPWR_A J45001
7.6V typ AP2553 USB 3.0 A
V5
PWR_SL1_F
R58019 R58024 R45003 SKL_SLP_S4_N Connector

VDD_BAT
5mє A 10mє A 5mє À
U48002
C
3P3VA SLG59M1448V 5V0_OFFBOARD C
R48022 PCH_TPANEL_PWR_EN (keyboard)

Imax = .5A 100mє À
U56002
U56005
TPS62177 3P3VA_SW 5V_SWPWR
NX3P1108
3P3VA R64019
Always On R56007 3P3VA_SW_EN R56031 Imax = .3A
100mє À 100mє A 10mє A
U64002
SLG59M1448 V 5V_TS
3P3VA_TEMP R64006 PCH_TPANEL _PWR_EN
R39016 50mє A
100mєA U64004
SLG59M1448V 5V_AUDIO
R64016 PCH_AUD_5V_EN
3P3V_PMI_DBG 20mє À
R36023
100mє A
Vsys U64006
SLG59M1448V 5V_FAN (i-core only)
3P3VA_SAM R64020 SAM_FAN_PWR_EN
R28001 20mє A
100mє A
1P8VSUS_ORG
3P3V_DEBUG V1P8A
V1P8A R26003
R31023 10mє A
0mє À R58012 V8 R58016
20mє À 20mє A U62001
SLG59M1448 V 1P8V_AUDIO
PCH_AUD_1V8_EN R62002
VCC_RTC 20mє A
Imax=100 uA
1P8V_AUDIO_DVDD
R40005
20mє À
U62003
NX3P1108 1P8V_TS
PCH_TPANEL _PWR_EN R62007
20mє A
B B
V3P3A_PCH V3P3A_PCH U65004

TPS22920 3P3V_WWAN
R58002 V7 R58008 WWAN_PWREN R65012
10mє À 50mє A 40mє A
V0P85A V0P85A
V0P85A
R59023 V12 R59027
25m㤿 10mє A
V1P00A V1P00A
V11 V1P00A
R59003 R59007
25mє À 10mє A 1V_MODPHY
DeepSleep Rail R61007
20mє À
U61002
SLG5NT1477 VCCSTG
VCCSTG_EN R61003
S4/S5 Rail 10 mє À
Power Monitor Input U61003
SLG5NT1477
SKL_SLP_S4_N + VCCST_CPU
XDP_PRESENT_LOGIC R61006
S0 Rail R99999
20mє A
10 mє À
V1P00A_XDP
R18001
V1P8U_2P5U 0 mє A
V1P8U_2P5U
Load switch V1P8U_2P5U
R58023 V9 R58026
Control Signal 10mє À 50mє A
V1P2U
V1P2U
External V1P2U
DC-DC R58032 V10 R58037
Regulator/Load U61001
Regulator 25mєA 5mєA
Switch SLG5NT1477 VCCPLL_OC
R59032 SOiX_EN R61001
10mє A 10mє A
A
V0P6DX_LPDDR3 A
Linear V13 V0P6DX_LPDDR3

R59035
Regulator 20mє A
VCCIO VCCIO
VCCIO
R58004 V4 R58009
25mєA 10mє A
U72001
RT8555 VCC_EDP_BKLT_OUT
R72001 L_BKLTEN
20mє À
DVi7U7660s16s512x2Retail
Title: 06. POWER DISTRIBUTION

Engineer:
Vinafix.com Size
Custom
Project Name
A
Rev
1.0.0.1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title: 07. POWER SEQUENCE 1

Surface
D A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
D D
C C
B B
A A
Title: 08. POWER SEQUENCE

Surface
D A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
D EB U G : P o w e r M o n ito rs
U 36002 U 3 60 0 4 U 36006 U36008
PM I1 M A X3 4 4 0 7 PM I3 M A X 3 44 0 7 P M I5 M A X 3 44 07 PM I6 IN A 2 3 1 D e b u g C o n n e cto r 1
0
0
3
7 -b it sla ve ad d re sses 0 x1 2 S 0 x1 8 S 0 x1 C S 0 x4 1 S 3
J
Se p te m b er 2 8 , 2 0 1 6 U 3 6 0 01 U 3 6 0 03 U 3 60 05 U 3 60 07
PM I0 M A X 3 44 07 E E P o w er D e b u g 1
D
C a m e ra s P M I2 M A X 3 4 4 0 7 PM I4 M A X3 4 4 0 7 PM IB A T T IN A 2 3 1 0
0
4
D
E EP R O M G T 2 4C 0 8S
0 x1E S 0 x1 0 S 0x1 A S 0 x4 0 S
3 P 3 V _ P M I_D BG
C o n n e cto r 3
J
2
/
1 1 , , , 5
0
0 0 x5 0 , 0x5 1 , 1 P8 V S U S_ O R G 2
0
6
2 .2k? 1
0
0
2
0
0
3
0
0
0
0
4
5
J 0 x5 2 , 0x5 3 S
5
/
4
1 P M I_ I2 C _ S xx
3
R To E E P o w e r D eb u g D e b u g M u xe s 1
3
1
3
1
3
1
3
0
5
2 k? C o n n ecto r U U U U
1 Fro n t R G B O V 9 73 4 2
0 R I2 C _S x x_ C A M R e m o ve d in R e tail
0 M I2 C 2 M
4
J5 0 x3 6 S I2 C 1 O p tio n to co n n ec t
to I2 C _R O P _S x x D EB U G _ O SG in R e tail
1
0 IR C am O V 0 72 5 1
0 T o E E P ow e r D eb u g D N P in N o n -R e tail/R e tail
4 C o n n e cto r
J5 0 x6 0 S
W ifi/B T
Lig h t Se n so r a n d B K LT C o n tro ller 1 P8 V S U S_ O R G
1 P 8 V _ W IFI_ IN T_ O U T
+l 1
a 3
n 0
/4 r 0 10 k?
A LS IS L2 9 0 33 3
6 W ifi 8 8 W 8 8 9 7 et
In
5
R E EP R O M A T 2 4C 1 6D
3
0
1
0 SO C /P C H 0
5
2
2 k?
S E R _S xx 0
0
C
0
4 0 x4 4 S
1 P8V SU S _ O R G R U 5 0 0 01 S 0 x5 0 -0 x5 7 5
J5 I2 C _ S xx _A LS 5
/
U 1 0 0 01 M
U
C
4 I2 C _ S xx _A LS (D N P ) O p tio n to C o n n e ct to
7
0
5
2 k?
0 x4 D I2 C 5 M A LS S en sor at J5 4 0 0 1
1
0 B acklig h t D rvr R T 8 55 5 2
R M
0 I2 C 3
2
7
U
0 x3 1 S I2 C _ S xx_ B K LT
D isp la y_ V D D 1 8
5 V A -> P 3 V 3_ T P
3 P3 V_ P A N EL T P_P W R _E N
To Debug
d
D isp la y rd
a 2
/
1
C o nn ecto r
ar
o
/2
1
1 2.2k?
T ra ckp a d
o 1 4 .7 k? b
ff 6
b
1 ff 7
R O R
1
0 T C O N M LT S1 5 2 0 0 0 O
I2C _ D IS P LA Y_ S xx (D N P ) I2C _S x x_ TP Trackp ad IC S9 10 1 B 0
0
5 M I2 C 4 I2 C 0 M 0
8
J5 0x2 8 S S 0 x2 0 4
J
To Debug
C o n n ecto r
To Debug
3 P 3 V A _S W
M u xes
P o w e r M a n a ge m e n t 2
/
1 To D eb ug
0 2 k? C o n n e cto r
0
1 9
B 0 P M IC B D 9 99 9 2G W 5 B
R
0
8
5
U 0 x3 0 S
3P 3 V A _ SW
/7 M
6
3
0 2 .2k? I2 C 2
1 7
0
0 C h arge r B Q 2 47 7 0 C H G _ S xx
2
R
SA M T em p S en so rs
8
5
U 0 x0 9 S K 2 2 P 1 2 1M 1 2 0 SF5
I2 C _ R O P_ S xx I2 C _ S xx_ M C U To E E P ow er D eb u g
M I2 C 1 I2 C 0 M
1
0
3 Fu el G au ge B Q 4 0x5 0
0 U 2 7 0 01 C o n n e cto r
0 0 B A T T_I2C _x xx 3 1 6
0 0 0 x2 8 C ritica l Tem p S N 15 1 1 00 4 0 T e m p S e n so r S T T S 7 5 1 0 IR Te m p TM P 0 07 0
7
J 7
J 0x0 B S 0
9 0 0
S 0 x4 8 3
U S 0 x3 B 9
3
S 0 x4 0
9
3
U U
T o D e b u g M ux es
O p tio n to C o nn ect I2 C s
To E E P o w e r D eb u g 2
0 4
0
C o n n ecto r
T e m p S e n so r S T T S 7 51 0 T e m p S e n so r S T T S 7 5 1 0
9 9
A
0x3 A 3 0 x4A 3 A
S U S U
Title: 09. I2C MAP

Engineer:
A3 A 1.0.0.1
5 4 3 2 1
R10035 330 0201

VCCSTG
VCCST_CPU MTP10001 SMD RND 22.8mil
VCCSTG MTP10002 SMD RND 22.8mil
100
0201
DNP MTP10003 SMD RND 22.8mil PLACE TP's on BOTTOM,
R10002 MTP10004 SMD RND 22.8mil
R10001 49.9 U10001D KBL_R_U42 MTP10005 SMD RND 22.8mil
1K 0201
TP_CATERR_R_N
R10032
0201 D63
0201 SMD RND 22.8mil A54 CATERR#
R10003 499 GTP10006 H_PROCHOT_R_N C65 PECI
[34,60,63,66] PROCHOT_N PROCHOT# JTAG
D C63 D
[10,56] PM_THERMTRIP_N THERMTRIP#
A65 B61
SKTOCC# PROC_TCK PROC_TCK [10,18]
D60
CPU MISC PROC_TDI PROC_TDI [10,18]
R10004 [18] XDP_BPM0 C55 A61
BPM#[0] PROC_TDO PROC_TDO [10,18]
100 [18] XDP_BPM1 D55 C60
BPM#[1] PROC_TMS PROC_TMS [10,18]
0402 B54 B59
BPM#[2] PROC_TRST# PROC_TRST_N [10,18]
C56
BPM#[3]
51
0201
D
Q10001 XDP_TP10001 EE SQ 13.8mil GPP_E3 A6
G A7 GPP_E3/CPU_GP0
[29] SAM_PROCHOT [49] TS_IRQ_3V3_N GPP_E7/CPU_GP1
R10008
XDP_TP10002
EE SQ 13.8mil BA5 B56
AY5 GPP_B3/CPU_GP2 PCH_JTAG_TCK D59
[27,48] TRACKPAD_INT_N GPP_B4/CPU_GP3 PCH_JTAG_TDI PLACE TP's on BOTTOM,
A56
S
[53] mDP_PWR_EN PCH_JTAG_TDO VCCSTG
100K
RUM002N02GT2L PROC_POPIRCOMP AT16 C59

PCH_OPIRCOMP AU16 PROC_POPIRCOMP PCH_JTAG_TMS C61 MTP10007 SMD RND 22.8mil
OPCE_RCOMP H66 PCH_OPIRCOMP PCH_TRST# A59 MTP10008 SMD RND 22.8mil
0201 OPC_RCOMP H65 OPCE_RCOMP JTAGX MTP10009 SMD RND 22.8mil
OPC_RCOMP
51
51
100
0201
49.9
49.9
49.9
49.9
R10029
MTP10010 SMD RND 22.8mil

0201
0201
KBL-R U42
R10015
R10017
0201 0201 0201 0201
<$LOCATION>
R10011
R10012
R10013
R10014
R10016
<MATERIAL>
4 OF 20
C REV = 1 PCH_JTAG_TCK [18] C
VCCST_CPU
PROC_TDI [10,18]
PROC_TDO [10,18]
PROC_TMS [10,18]
R10019
1K PROC_TRST_N [10,18]
0201
PROC_TCK [10,18]
TBL1002
[10,56] PM_THERMTRIP_N EDP_DISP_UTIL
GPP_A 3.3V
U10001A KBL_R_U42
E55 C47
DNP
R10022
GPP_B 3.3V
[53] MDP_DDI1_ML0_DN DDI1_TXN[0] EDP_TXN[0] EDP_TX0_DN [55]
[53]
[53]
MDP_DDI1_ML0_DP
MDP_DDI1_ML1_DN
F55
E58 DDI1_TXP[0]
DDI1_TXN[1]
EDP_TXP[0]
EDP_TXN[1]
C46
D46
EDP_TX0_DP
EDP_TX1_DN
[55]
[55]
0
0201
V5A
GPP_C 3.3V
F58 C45
[53] MDP_DDI1_ML1_DP DDI1_TXP[1] EDP_TXP[1] EDP_TX1_DP [55]
[53]
[53]
MDP_DDI1_ML2_DN
MDP_DDI1_ML2_DP
F53
G53 DDI1_TXN[2]
DDI1_TXP[2]
EDP_TXN[2]
EDP_TXP[2]
A45
B45
EDP_TX2_DN
EDP_TX2_DP
[55]
[55]
V5A
GPP_D 1.8V
[53] MDP_DDI1_ML3_DN F56 A47
[53] MDP_DDI1_ML3_DP
G56 DDI1_TXN[3]
DDI1_TXP[3]
EDP_TXN[3]
EDP_TXP[3]
B47
EDP_TX3_DN
EDP_TX3_DP
[55]
[55]
R10034
GPP_E 3.3V
C50 E45 R10033 10K
[47]
[47]
SL_DDI2_ML0_DN
SL_DDI2_ML0_DP
D50
C52
DDI2_TXN[0]
DDI2_TXP[0]
DDI EDP EDP_AUXN
EDP_AUXP
F45
EDP_AUX_DN
EDP_AUX_DP
[55]
[55]
10K
0201
0201 GPP_F 1.8V
[47] SL_DDI2_ML1_DN DDI2_TXN[1]
B [47]
[47]
SL_DDI2_ML1_DP
SL_DDI2_ML2_DN
D52
A50 DDI2_TXP[1]
DDI2_TXN[2]
EDP_DISP_UTIL
B52
eDP x 4 GPP_G 3.3V B
B50 G50
[47] SL_DDI2_ML2_DP MDP_DDI1_AUX_DN [53]
DDI2_TXP[2] DDI1_AUXN
GDP 3.3V
5
[47] SL_DDI2_ML3_DN D51 F50
DDI2_TXN[3] DDI1_AUXP MDP_DDI1_AUX_DP [53]
C51 E48
[47] SL_DDI2_ML3_DP DDI2_TXP[3] DDI2_AUXN SL_DDI2_AUX_DN [46]
F48 4 3
DDI2_AUXP SL_DDI2_AUX_DP [46] MDP_SNK1_HPD [53]
G46
DISPLAY SIDEBANDS RSVD_G46 F46
RSVD_F46 Q10002B
2
L13 Q10002A
[53] DDPB_CTRL_CLK GPP_E18/DDPB_CTRLCLK NX3008NBKS
L12 L9 NX3008NBKS
VCCIO [53] DDPB_CTRL_DATA GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 L7 SOT-363 1 6 SOT-363
GPP_E14/DDPC_HPD1 SL_SNK0_HPD [47]
N7 L6
[46] DDPC_CTRL_CLK GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 BL_INST_ON_HNDSHK [29,30]
N8 N9
[46] DDPC_CTRL_DATA GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3
R10025 L10
GPP_E17/EDP_HPD EDP_HPD [55]
24.9 INT. PD N11
GPP_E22/DDPD_CTRLCLK 3VSUS_ORG SAM_PCH_RSV1 [27]
0201
0201
0201
0201
100K
100K
100K
49.9K
0201 N12 R12
[27] SAM_PCH_HALL_INT GPP_E23/DDPD_CTRLDATA EDP_BKLTEN SOC_BKLTEN [30]
R11
EDP_COMP EDP_BKLTCTL SOC_BKLT_CTRL_IN [30]
INT. PD E52 U13 R10039 49.9K
EDP_RCOMP EDP_VDDEN SOC_DISPLAY_VDD_EN [30]
0201
R10026
R10027
R10028
KBL-R U42
R10037
DNP
DNP
TBL1001 1 OF 20
REV = 1
A A
10. CPU(1)_MISC,JTAG,DDI.EDP
Title:
Microsoft Confidential
Engineer: Surface
U SPECIFIC B A 1.0.0.1
Date: Friday, April 27, 2018 Sheet 10 of 79
5 4 3 2 1
Vinafix.com
5 4 3 2 1
KBL_R_U42
U10001C
U10001B KBL_R_U42
DDR4(IL)/LP3-DDR4(NIL) LP3/DDR4
[16] M_A_D[23:16] M_A_D16 AF65 AN45
LP3/DDR4 M_A_D17 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] M_B_DIM0_CLKN0 [17]
DDR4(IL)/LP3-DDR4(NIL) AU53 AF64 AN46
[16] M_A_D[7:0] M_A_D0 DDR0_CKN[0] M_A_DIM0_CLKN0 [16] M_A_D18 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] M_B_DIM0_CLKN1 [17]
AL71 AT53 AK65 AP45
M_A_D1 DDR0_DQ[0] DDR0_CKP[0] M_A_DIM0_CLKP0 [16] M_A_D19 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] M_B_DIM0_CLKP0 [17]
AL68 AU55 AK64 AP46
M_A_D2 DDR0_DQ[1] DDR0_CKN[1] M_A_DIM0_CLKN1 [16] M_A_D20 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] M_B_DIM0_CLKP1 [17]
AN68 AT55 AF66
M_A_D3 DDR0_DQ[2] DDR0_CKP[1] M_A_DIM0_CLKP1 [16] M_A_D21 DDR1_DQ[4]/DDR0_DQ[20] LP3/DDR4
AN69 AF67 AN56
M_A_D4 DDR0_DQ[3] LP3/DDR4 M_A_D22 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] M_B_DIM0_CKE0 [17]
AL70 BA56 AK67 AP55
M_A_D5 DDR0_DQ[4] DDR0_CKE[0] M_A_DIM0_CKE0 [16] M_A_D23 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] M_B_DIM0_CKE1 [17]
AL69 BB56 AK66 AN55
M_A_D6 DDR0_DQ[5] DDR0_CKE[1] M_A_DIM0_CKE1 [16] [16] M_A_D[31:24] M_A_D24 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2]/NC M_B_DIM0_CKE2 [17]
AN70 AW56 AF70 AP53
M_A_D7 DDR0_DQ[6] DDR0_CKE[2]/NC M_A_DIM0_CKE2 [16] M_A_D25 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3]/NC M_B_DIM0_CKE3 [17]
AN71 AY56 AF68
D [16] M_A_D[15:8] M_A_D8 DDR0_DQ[7] DDR0_CKE[3]/NC M_A_DIM0_CKE3 [16] M_A_D26 DDR1_DQ[9]/DDR0_DQ[25] LP3/DDR4 D
AR70 AH71 BB42
M_A_D9 DDR0_DQ[8] LP3/DDR4 M_A_D27 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] M_B_DIM0_CS0_N [17]
AR68 AU45 AH68 AY42
M_A_D10 DDR0_DQ[9] DDR0_CS#[0] M_A_DIM0_CS0_N [16] M_A_D28 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] M_B_DIM0_CS1_N [17]
AU71 AU43 AF71 BA42
M_A_D11 DDR0_DQ[10] DDR0_CS#[1] M_A_DIM0_CS1_N [16] M_A_D29 DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] M_B_DIM0_ODT0 [17]
AU68 AT45 AF69 AW42
M_A_D12 DDR0_DQ[11] DDR0_ODT[0] M_A_DIM0_ODT0 [16] M_A_D30 DDR1_DQ[13]/DDR0_DQ[29] NC/DDR1_ODT[1]
AR71 AT43 AH70
M_A_D13 DDR0_DQ[12] NC/DDR0_ODT[1] M_A_D31 DDR1_DQ[14]/DDR0_DQ[30] LP3/DDR4 M_B_CAA0 M_B_CAA[9:0] [17]
AR69 AH69 AY48
M_A_D14 DDR0_DQ[13] LP3/DDR4 M_A_CAA0 M_A_CAA[9:0] [16][16] M_A_D[55:48] M_A_D48 DDR1_DQ[15]/DDR0_DQ[31] DDR1_CAA[0]/DDR1_MA[5] M_B_CAA1
AU70 BA51 AT66 AP50
M_A_D15 AU69 DDR0_DQ[14] DDR0_CAA[0]/DDR0_MA[5] BB54 M_A_CAA1 M_A_D49 AU66 DDR1_DQ[16]/DDR0_DQ[48] DDR1_CAA[1]/DDR1_MA[9] BA48 M_B_CAA2
[16] M_A_D[39:32] M_A_D32 DDR0_DQ[15] DDR0_CAA[1]/DDR0_MA[9] M_A_CAA2 M_A_D50 DDR1_DQ[17]/DDR0_DQ[49] DDR1_CAA[2]/DDR1_MA[6] M_B_CAA3
BB65 BA52 AP65 BB48
M_A_D33 AW65 DDR0_DQ[16]/DDR0_DQ[32] DDR0_CAA[2]/DDR0_MA[6] AY52 M_A_CAA3 M_A_D51 AN65 DDR1_DQ[18]/DDR0_DQ[50] DDR1_CAA[3]/DDR1_MA[8] AP48 M_B_CAA4
M_A_D34 AW63 DDR0_DQ[17]/DDR0_DQ[33] DDR0_CAA[3]/DDR0_MA[8] AW52 M_A_CAA4 M_A_D52 AN66 DDR1_DQ[19]/DDR0_DQ[51] DDR1_CAA[4]/DDR1_MA[7] AP52 M_B_CAA5
M_A_D35 AY63 DDR0_DQ[18]/DDR0_DQ[34] DDR0_CAA[4]/DDR0_MA[7] AY55 M_A_CAA5 M_A_D53 AP66 DDR1_DQ[20]/DDR0_DQ[52] DDR1_CAA[5]/DDR1_BG[0] AN50 M_B_CAA6
M_A_D36 BA65 DDR0_DQ[19]/DDR0_DQ[35] DDR0_CAA[5]/DDR0_BG[0] AW54 M_A_CAA6 M_A_D54 AT65 DDR1_DQ[21]/DDR0_DQ[53] DDR1_CAA[6]/DDR1_MA[12] AN48 M_B_CAA7
M_A_D37 AY65 DDR0_DQ[20]/DDR0_DQ[36] DDR0_CAA[6]/DDR0_MA[12] BA54 M_A_CAA7 M_A_D55 AU65 DDR1_DQ[22]/DDR0_DQ[54] DDR1_CAA[7]/DDR1_MA[11] AN53 M_B_CAA8
M_A_D38 DDR0_DQ[21]/DDR0_DQ[37] DDR0_CAA[7]/DDR0_MA[11] M_A_CAA8 [16] M_A_D[63:56] M_A_D56 DDR1_DQ[23]/DDR0_DQ[55] DDR1_CAA[8]/DDR1_ACT# M_B_CAA9
BA63 BA55 AT61 AN52
M_A_D39 BB63 DDR0_DQ[22]/DDR0_DQ[38] DDR0_CAA[8]/DDR0_ACT# AY54 M_A_CAA9 M_A_D57 AU61 DDR1_DQ[24]/DDR0_DQ[56] DDR1_CAA[9]/DDR1_BG[1]
[16] M_A_D[47:40] M_A_D40 DDR0_DQ[23]/DDR0_DQ[39] DDR0_CAA[9]/DDR0_BG[1] M_A_D58 DDR1_DQ[25]/DDR0_DQ[57] LP3/DDR4 M_B_CAB0 M_B_CAB[9:0] [17]
BA61 AP60 BA43
M_A_D41 DDR0_DQ[24]/DDR0_DQ[40] LP3/DDR4 M_A_CAB0 M_A_CAB[9:0] [16] M_A_D59 DDR1_DQ[26]/DDR0_DQ[58] DDR1_CAB[0]/DDR1_MA[13] M_B_CAB1
AW61 AU46 AN60 AY43
M_A_D42 BB59 DDR0_DQ[25]/DDR0_DQ[41] DDR0_CAB[0]/DDR0_MA[13] AU48 M_A_CAB1 M_A_D60 AN61 DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAB[1]/DDR1_MA[15] AY44 M_B_CAB2
M_A_D43 AW59 DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAB[1]/DDR0_MA[15] AT46 M_A_CAB2 M_A_D61 AP61 DDR1_DQ[28]/DDR0_DQ[60] DDR1_CAB[2]/DDR1_MA[14] AW44 M_B_CAB3
M_A_D44 BB61 DDR0_DQ[27]/DDR0_DQ[43] DDR0_CAB[2]/DDR0_MA[14] AU50 M_A_CAB3 M_A_D62 AT60 DDR1_DQ[29]/DDR0_DQ[61] DDR1_CAB[3]/DDR1_MA[16] BB44 M_B_CAB4
M_A_D45 AY61 DDR0_DQ[28]/DDR0_DQ[44] DDR0_CAB[3]/DDR0_MA[16] AU52 M_A_CAB4 M_A_D63 AU60 DDR1_DQ[30]/DDR0_DQ[62] DDR1_CAB[4]/DDR1_BA[0] AY47 M_B_CAB5
M_A_D46 DDR0_DQ[29]/DDR0_DQ[45] DDR0_CAB[4]/DDR0_BA[0] M_A_CAB5 [17] M_B_D[23:16] M_B_D16 DDR1_DQ[31]/DDR0_DQ[63] DDR1_CAB[5]/DDR1_MA[2] M_B_CAB6
BA59 AY51 AU40 BA44
M_A_D47 AY59 DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAB[5]/DDR0_MA[2] AT48 M_A_CAB6 M_B_D17 AT40 DDR1_DQ[32]/DDR1_DQ[16] DDR1_CAB[6]/DDR1_BA[1] AW46 M_B_CAB7
[17] M_B_D[7:0] M_B_D0 DDR0_DQ[31]/DDR0_DQ[47] DDR0_CAB[6]/DDR0_BA[1] M_A_CAB7 M_B_D18 DDR1_DQ[33]/DDR1_DQ[17] DDR1_CAB[7]/DDR1_MA[10] M_B_CAB8
AY39 AT50 AT37 AY46
M_B_D1 AW39 DDR0_DQ[32]/DDR1_DQ[0] DDR0_CAB[7]/DDR0_MA[10] BB50 M_A_CAB8 M_B_D19 AU37 DDR1_DQ[34]/DDR1_DQ[18] DDR1_CAB[8]/DDR1_MA[1] BA46 M_B_CAB9
M_B_D2 AY37 DDR0_DQ[33]/DDR1_DQ[1] DDR0_CAB[8]/DDR0_MA[1] AY50 M_A_CAB9 M_B_D20 AR40 DDR1_DQ[35]/DDR1_DQ[19] DDR1_CAB[9]/DDR1_MA[0] BB46
M_B_D3 AW37 DDR0_DQ[34]/DDR1_DQ[2] DDR0_CAB[9]/DDR0_MA[0] BA50 M_B_D21 AP40 DDR1_DQ[36]/DDR1_DQ[20] NC/DDR1_MA[3] BA47
M_B_D4 BB39 DDR0_DQ[35]/DDR1_DQ[3] NC/DDR0_MA[3] BB52 M_B_D22 AP37 DDR1_DQ[37]/DDR1_DQ[21] NC/DDR1_MA[4]
M_B_D5 BA39 DDR0_DQ[36]/DDR1_DQ[4] NC/DDR0_MA[4] M_B_D23 AR37 DDR1_DQ[38]/DDR1_DQ[22] DDR4(IL)/LP3-DDR4(NIL) AH66
M_B_D6 DDR0_DQ[37]/DDR1_DQ[5] DDR4(IL)/LP3-DDR4(NIL) AM70 [17] M_B_D[31:24] M_B_D24 DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2] M_A_DQSN2 [16]
BA37 AT33 AH65
M_B_D7 DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] M_A_DQSN0 [16] M_B_D25 DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] M_A_DQSP2 [16]
BB37 AM69 AU33 AG69
[17] M_B_D[15:8] M_B_D8 DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] M_A_DQSP0 [16] M_B_D26 DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] M_A_DQSN3 [16]
AY35 AT69 AU30 AG70
M_B_D9 DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] M_A_DQSN1 [16] M_B_D27 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] M_A_DQSP3 [16]
AW35 AT70 AT30 AR66
M_B_D10 DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1] M_A_DQSP1 [16] M_B_D28 DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6] M_A_DQSN6 [16]
AY33 BA64 AR33 AR65
M_B_D11 DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] M_A_DQSN4 [16] M_B_D29 DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSP[2]/DDR0_DQSP[6] M_A_DQSP6 [16]
AW33 AY64 AP33 AR61
M_B_D12 DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] M_A_DQSP4 [16] M_B_D30 DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQSN[3]/DDR0_DQSN[7] M_A_DQSN7 [16]
BB35 AY60 AR30 AR60
M_B_D13 DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQSN[3]/DDR0_DQSN[5] M_A_DQSN5 [16] M_B_D31 DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQSP[3]/DDR0_DQSP[7] M_A_DQSP7 [16]
C BA35 BA60 AP30 AT38 C
M_B_D14 DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQSP[3]/DDR0_DQSP[5] M_A_DQSP5 [16] [17] M_B_D[55:48] M_B_D48 DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQSN[4]/DDR1_DQSN[2] M_B_DQSN2 [17]
BA33 BA38 AU27 AR38
M_B_D15 DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQSN[4]/DDR1_DQSN[0] M_B_DQSN0 [17] M_B_D49 DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2] M_B_DQSP2 [17]
BB33 AY38 AT27 AT32
[17] M_B_D[39:32] M_B_D32 DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSP[4]/DDR1_DQSP[0] M_B_DQSP0 [17] M_B_D50 DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3] M_B_DQSN3 [17]
AY31 AY34 AT25 AR32
M_B_D33 DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] M_B_DQSN1 [17] M_B_D51 DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3] M_B_DQSP3 [17]
AW31 BA34 AU25 AR25
M_B_D34 DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] M_B_DQSP1 [17] M_B_D52 DDR1_DQ[51] DDR1_DQSN[6] M_B_DQSN6 [17]
AY29 BA30 AP27 AR27
M_B_D35 DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] M_B_DQSN4 [17] M_B_D53 DDR1_DQ[52] DDR1_DQSP[6] M_B_DQSP6 [17]
AW29 AY30 AN27 AR22
M_B_D36 DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] M_B_DQSP4 [17] M_B_D54 DDR1_DQ[53] DDR1_DQSN[7] M_B_DQSN7 [17]
BB31 AY26 AN25 AR21
M_B_D37 DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] M_B_DQSN5 [17] M_B_D55 DDR1_DQ[54] DDR1_DQSP[7] M_B_DQSP7 [17]
BA31 BA26 AP25
M_B_D38 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5] M_B_DQSP5 [17] [17] M_B_D[63:56] M_B_D56 DDR1_DQ[55] LP3/DDR4
BA29 AT22 AN43
M_B_D39 BB29 DDR0_DQ[54]/DDR1_DQ[38] LP3/DDR4 AW50 M_B_D57 AU22 DDR1_DQ[56] NC/DDR1_ALERT# AP43
[17] M_B_D[47:40] M_B_D40 DDR0_DQ[55]/DDR1_DQ[39] NC/DDR0_ALERT# M_B_D58 DDR1_DQ[57] NC/DDR1_PAR
AY27 AT52 AU21 AT13
M_B_D41 AW27 DDR0_DQ[56]/DDR1_DQ[40] NC/DDR0_PAR M_B_D59 AT21 DDR1_DQ[58] DRAM_RESET# AR18 SM_RCOMP_0 1% 200 R11004
M_B_D42 AY25 DDR0_DQ[57]/DDR1_DQ[41] AY67 M_B_D60 AN22 DDR1_DQ[59] DDR_RCOMP[0] AT18 SM_RCOMP_1 80.6 R11005
M_B_D43 DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA DIMM_VREF_CA [19] M_B_D61 DDR1_DQ[60] DDR_RCOMP[1]
AW25 AY68 AP22 AU18 SM_RCOMP_2 1% 162 R11006
M_B_D44 DDR0_DQ[59]/DDR1_DQ[43] DDR0_VREF_DQ DIMM0_VREF_DQ [19] M_B_D62 DDR1_DQ[61] DDR_RCOMP[2]
BB27 DDR CH - A BA67 AP21
M_B_D45 DDR0_DQ[60]/DDR1_DQ[44] DDR1_VREF_DQ DIMM1_VREF_DQ [19] M_B_D63 DDR1_DQ[62]
BA27 AN21 DDR CH - B 0201
M_B_D46 BA25 DDR0_DQ[61]/DDR1_DQ[45] AW67 DDR1_DQ[63] 0201
M_B_D47 DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL DDR_VTT_CTL [34,59]
BB25 0402
DDR0_DQ[63]/DDR1_DQ[47]
KBL-R U42
<$LOCATION>
KBL-R U42 <MATERIAL>
<$LOCATION> 3 OF 20
<MATERIAL> REV = 1
2 OF 20
REV = 1
B B
A A
Title: 11. CPU(2)_LPDDR3

Engineer: Surface
U SPECIFIC C A 1.0.0.1
5 4 3 2 1
5 4 3 2 1
V1P2U
22u
22u
22u
4V
4V
4V
C12001
C12002
C12003
0603 0603 0603
U10001N KBL_R_U42
VCCIO
D CPU POWER 3 OF 4 D
AU23 AK28
VDDQ_AU23 VCCIO_AK28
6.3V
6.3V
6.3V
6.3V
4V
4V
4V
10u
10u
10u
10u
6.3V
AU28 AK30
VDDQ_AU28 VCCIO_AK30
1u
1u
1u
1u
AU35 AL30
AU42 VDDQ_AU35 VCCIO_AL30 AL42
VDDQ_AU42 VCCIO_AL42
C12010
C12004
C12005
C12011
C12020
C12021
C12022
C12023
0402 0402 0402 0402 BB23 AM28 0402 0402 0402 0402 C12050 C12051
BB32 VDDQ_BB23 VCCIO_AM28 AM30 22u 6.3V 22u 6.3V
BB41 VDDQ_BB32 VCCIO_AM30 AM42 0603 0603
BB47 VDDQ_BB41 VCCIO_AM42 VCCSA
BB51 VDDQ_BB47 AK23
VDDQ_BB51 VCCSA_AK23 AK25
VCCSA_AK25 G23
VCCST_CPU AM40 VCCSA_G23 G25
VDDQC VCCSA_G25
4V
10u
G27
VCCSA_G27
4V
C12025 10u
A18 G28
DNP
from 1VSB, control SLP_S4 (S3 rail) C12089 C12090 C12043 C12044 C12045 C12046 C12047 C12048 C12034 C12033
VCCSTG VCCST VCCSA_G28 J22 10p 50V 10p 50V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 47u 6.3V 47u 6.3V
VCCSA_J22
C12024
0402 C12040 A22 J23 0402 0402 0402 0402 0402 0402 0603 0603
1u 6.3V VCCSTG_A22 VCCSA_J23 J27 0201 0201 DNP
0402 AL23 VCCSA_J27 K23
VCCPLL_OC VCCSA_K23 K25
0402 VCCSA_K25
4V
10u
K20 K27
K21 VCCPLL_K20 VCCSA_K27 K28
VCCPLL_K21 VCCSA_K28 K30
VCCST_CPU VCCSA_K30
C12041
C
0402 VCCSA C
AM23
VCCIO_SENSE VCCIO_SENSE [58]
AM22
VSSIO_SENSE VSSIO_SENSE [58]
VCCPLL_OC C12042 H21
VSSSA_SENSE VSSSA_SENSE [66]
1u 6.3V H20 C12069 C12070
VCCSA_SENSE VCCSA_SENSE [66]
0402 10u 6.3V 10u 6.3V
0402 0402
C12049
1u 6.3V KBL-R U42
<$LOCATION>
0402 <MATERIAL>
14 OF 20 KBL_R_U42
U10001L
REV =1
VCORE VCORE
CPU POWER 1 OF 4
A30 G32
A34 VCCCORE_A30 VCCCORE_G32 G33
AK33 VCCCORE_A44 VCCCORE_G37 G38
AK35 VCCCORE_AK33 VCCCORE_G38 G40
AK37 VCCCORE_AK35 VCCCORE_G40 G42
AK38 VCCCORE_AK37 VCCCORE_G42 J30
AK40 VCCCORE_AK38 VCCCORE_J30 J33
AL33 VCCCORE_AK40 VCCCORE_J33 J37
B B
AL37 VCCCORE_AL33 VCCCORE_J37 J40
AL40 VCCCORE_AL37 VCCCORE_J40 K33 VCCST_CPU
AM32 VCCCORE_AL40 VCCCORE_K33 K35
AM33 VCCCORE_AM32 VCCCORE_K35 K37
VCCCORE_AM35 VCCCORE_K38
56
100
AM37 K40
G30 VCCCORE_AM38 VCCCORE_K42 K43 0201 0201
VCCCORE_G30 VCCCORE_K43
R12004
R12003
K32 E32
RSVD_K32 VCC_SENSE VCC_CORE_SENSE [66]
E33
VSS_SENSE VSS_CORE_SENSE [66]
AK32
RSVD_AK32 B63 H_CPU_SVIDALERT_N R12005 220 0201
VIDALERT# H_CPU_SVIDCLK SVID_ALERT# [66]
AB62 A63 R12006 0 0201
VCCOPC_AB62 VIDSCK H_CPU_SVIDDAT VIDSCLK [66]
P62 D64 R12007 0 0201
VCCOPC_P62 VIDSOUT VIDSOUT [66]
V62
VCCOPC_V62 G20
H63 VCCSTG_G20 VCCSTG +VCCSTG is control by SLP_S0,
VCC_OPC_1P8_H63 but it can overwrite by XDP, that
G61 means it need power for XDP intrafece
VCC_OPC_1P8_G61
REMOVED +VCCEDRAM & +VCCEOPIO RAILS AC63
AE63 VCCOPC_SENSE
A
VSSOPC_SENSE A
AE62
AG62 VCCEOPIO_AE62
VCCEOPIO_AG62
AL63
AJ62 VCCEOPIO_SENSE
VSSEOPIO_SENSE
Title: 12. CPU(3)_SKL POWER1
Engineer:
KBL-R U42
<$LOCATION>
<MATERIAL> U SPECIFIC B A 1.0.0.1
12 OF 20 Date: Tuesday, May 01, 2018 Sheet 12 of 79
5 4 REV = 1 3 2 1
Vinafix.com
5 4 3 2 1
U10001M KBL_R_U42
VCORE VCCGT VCCGT
CPU POWER 2 OF 4
N70
A48 VCCGT_N70 N71
A53 VCCCORE_A48 VCCGT_N71 R63
A58 VCCCORE_A53 VCCGT_R63 R64
A62 VCCGT_A58 VCCGT_R64 R65
A66 VCCGT_A62 VCCGT_R65 R66
AA63 VCCGT_A66 VCCGT_R66 R67
AA64 VCCGT_AA63 VCCGT_R67 R68
AA70 VCCGT_AA69 VCCGT_R71 T62
D
AA71 VCCGT_AA70 VCCGT_T62 U65 D
AC64 VCCGT_AA71 VCCGT_U65 U68
AC65 VCCGT_AC64 VCCGT_U68 U71
AC66 VCCGT_AC65 VCCGT_U71 W63
AC67 VCCGT_AC66 VCCGT_W63 W64
J43 VCCGT_AC71 VCCGT_W68 W69
J45 VCCCORE_J43 VCCGT_W69 W70 VCCGT
J46 VCCCORE_J45 VCCGT_W70 W71
J48 VCCCORE_J46 VCCGT_W71 Y62 VCORE
J50 VCCCORE_J48 VCCGT_Y62
J52 VCCCORE_J50 Place on primary side, beside the package
J53 VCCCORE_J52 AK42
J55 VCCGT_J53 VCCCORE_AK42 AK43
J56 VCCGT_J55 VCCCORE_AK43 AK45
J58 VCCGT_J56 VCCCORE_AK45 AK46 C13017 C13018 C13019 C13020 C13021 C13022 C13023 C13024 C13025 C13026 C13027 C13028
J60 VCCGT_J58 VCCCORE_AK46 AK48 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V
K48 VCCGT_J60 VCCCORE_AK48 AK50 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
K50 VCCCORE_K48 VCCCORE_AK50 AK52
K52 VCCCORE_K50 RSVD_AK52 AK53
K53 RSVD_K52 VCCGTX_AK53 AK55
K55 VCCGT_K53 VCCGTX_AK55 AK56
K60 VCCGT_K58 VCCGTX_AK60 AK70 C13322 C13323
L62 VCCGT_K60 VCCGTX_AK70 AL43 10u 6.3V 10u 6.3V C13335 C13336 C13337 C13338
L63 VCCGT_L62 VCCCORE_AL43 AL46 0402 0402 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V
L64 VCCGT_L63 VCCCORE_AL46 AL50 0402 0402 0402 0402
L65 VCCGT_L64 VCCCORE_AL50 AL53
L66 VCCGT_L65 VCCGTX_AL53 AL56
L67 VCCGT_L66 VCCGTX_AL56 AL60
L68 VCCGT_L67 VCCGTX_AL60 AM48
L69 VCCGT_L68 VCCCORE_AM48 AM50
C C
M62 VCCGT_L71 VCCGTX_AM53 AM56
N63 VCCGT_M62 VCCGTX_AM56 AM58
N64 VCCGT_N63 VCCGTX_AM58 AU58
N66 VCCGT_N64 VCCGTX_AU58 AU63
N67 VCCGT_N66 VCCGTX_AU63 BB57 Place on secondary side VCCGT
VCCGT_N67 VCCGTX_BB57
N69
VCCGT_N69 VCCGTX_BB66
BB66 under the package
J70 AK62
[66] VCCGT_SENSE VCCGT_SENSE VCCGTX_SENSE
J69 AL61
[66] VSSGT_SENSE VSSGT_SENSE VSSGTX_SENSE
KBL-R U42
<$LOCATION> REMOVED GTX Connections
<MATERIAL>
13 OF 20 C13164 C13165 C13166
REV = 1
1u 1u 1u
6.3V 6.3V 6.3V
VCORE 0201 0201 0201 VCCGT
Place on primary side, beside the package
C13083 C13084 C13085 C13086 C13087 C13088 C13089

10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V C13167 C13168 C13169
0402 0402 0402 0402 0402 0402 0402
1u 1u 1u
6.3V 6.3V 6.3V
0201 0201 0201
C13090 C13091 C13097 C13098 C13099

10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V
0402 0402 0402 0402 0402
B VCCGT B
C13190 C13191 C13192 C13193 C13194 C13195 C13196
47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V
0603 0603 0603 0805 0805 0603 0603
C13300 C13301 C13302 C13303 C13304 C13311 C13312 C13313

22u 6.3V 22u 6.3V 22u 6.3V 22u 6.3V 22u 6.3V 22u 6.3V 22u 6.3V 22u 6.3V
0603 0603 0603 0603 0603 0603 0603 0603

C13197 C13198 C13199 C13200 C13201 C13202 C13203 DNP
47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V
0603 0603 0603 0603 0603 0603 0603
DNP
VCORE C13306 C13307 C13308 C13309 C13310 C13314 C13315 C13316 C13317
22u 6.3V 22u 6.3V 22u 6.3V 22u 6.3V 22u 6.3V 22u 6.3V 22u 6.3V 22u 6.3V 22u 6.3V
0603 0603 0603 0603 0603 0603 0603 0603 0603

C13330 C13332 C13333 C13329 C13331 C13334 DNP DNP DNP DNP DNP DNP DNP DNP DNP
10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V
0402 0402 0402 0402 0402 0402
C13340 C13339 C13343 C13341 C13342

10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V
0402 0402 0402 0402 0402
VCCGT
DNP DNP DNP DNP DNP
C13345 C13344 C13348 C13346 C13347
10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V 10u 6.3V
0402 0402 0402 0402 0402
C13122 C13123 C13131 C13106 C13107 C13108 C13109 C13305 C13318 C13319 C13320 C13321
DNP DNP DNP DNP DNP
A 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V 47u 6.3V A
0603 0805 0805 0603 0603 0603 DNP 0805 0603 0805 0603 0805
VCORE DNP DNP DNP DNP 0603 DNP DNP DNP DNP DNP
Place on secondary side
under the package VCORE
C13170 C13171 C13172
Place on secondary side
under the package
1u 1u 1u
0201 0201 0201 C13173 C13174 C13175
6.3V 6.3V 6.3V
1u
0201
1u
0201
1u
0201 Title: 13. CPU(4)_SKL_POWER2
6.3V 6.3V 6.3V Microsoft Confidential
Engineer: Surface
Date: Tuesday, May 01, 2018 Sheet 13 of 79
5 4 3 2 1
5 4 3 2 1
U10001P
KBL_R_U42
U10001Q
KBL_R_U42 U10001R
KBL_R_U42
GND 1 OF 3
GND 2 OF 3 GND 3 OF 3
A5 AL65
A67 VSS_A5 VSS_AL65 AL66 AT63 BA49 F8 L18
A70 VSS_A67 VSS_AL66 AM13 AT68 VSS_AT63 VSS_BA49 BA53 G10 VSS_F8 VSS_L18 L2
AA2 VSS_A70 VSS_AM13 AM21 AT71 VSS_AT68 VSS_BA53 BA57 G22 VSS_G10 VSS_L2 L20
D AA4 VSS_AA2 VSS_AM21 AM25 AU10 VSS_AT71 VSS_BA57 BA6 G43 VSS_G22 VSS_L20 L4 D
AA65 VSS_AA4 VSS_AM25 AM27 AU15 VSS_AU10 VSS_BA6 BA62 G45 VSS_G43 VSS_L4 L8
AA68 VSS_AA65 VSS_AM27 AM43 AU20 VSS_AU15 VSS_BA62 BA66 G48 VSS_G45 VSS_L8 N10
AB15 VSS_AA68 VSS_AM43 AM45 AU32 VSS_AU20 VSS_BA66 BA71 G5 VSS_G48 VSS_N10 N13
AB16 VSS_AB15 VSS_AM45 AM46 AU38 VSS_AU32 VSS_BA71 BB18 G52 VSS_G5 VSS_N13 N19
AB18 VSS_AB16 VSS_AM46 AM55 AV1 VSS_AU38 VSS_BB18 BB26 G55 VSS_G52 VSS_N19 N21
AB21 VSS_AB18 VSS_AM55 AM60 AV68 VSS_AV1 VSS_BB26 BB30 G58 VSS_G55 VSS_N21 N6
AB8 VSS_AB21 VSS_AM60 AM61 AV69 VSS_AV68 VSS_BB30 BB34 G6 VSS_G58 VSS_N6 N65
AD13 VSS_AB8 VSS_AM61 AM68 AV70 VSS_AV69 VSS_BB34 BB38 G60 VSS_G6 VSS_N65 N68
AD16 VSS_AD13 VSS_AM68 AM71 AV71 VSS_AV70 VSS_BB38 BB43 G63 VSS_G60 VSS_N68 P17
AD19 VSS_AD16 VSS_AM71 AM8 AW10 VSS_AV71 VSS_BB43 BB55 G66 VSS_G63 VSS_P17 P19
AD20 VSS_AD19 VSS_AM8 AN20 AW12 VSS_AW10 VSS_BB55 BB6 H15 VSS_G66 VSS_P19 P20
AD21 VSS_AD20 VSS_AN20 AN23 AW14 VSS_AW12 VSS_BB6 BB60 H18 VSS_H15 VSS_P20 P21
AD62 VSS_AD21 VSS_AN23 AN28 AW16 VSS_AW14 VSS_BB60 BB64 H71 VSS_H18 VSS_P21 R13
AD8 VSS_AD62 VSS_AN28 AN30 AW18 VSS_AW16 VSS_BB64 BB67 J11 VSS_H71 VSS_R13 R6
AE64 VSS_AD8 VSS_AN30 AN32 AW21 VSS_AW18 VSS_BB67 BB70 J13 VSS_J11 VSS_R6 T15
AE65 VSS_AE64 VSS_AN32 AN33 AW23 VSS_AW21 VSS_BB70 C1 J25 VSS_J13 VSS_T15 T17
AE66 VSS_AE65 VSS_AN33 AN35 AW26 VSS_AW23 VSS_C1 C25 J28 VSS_J25 VSS_T17 T18
AE67 VSS_AE66 VSS_AN35 AN37 AW28 VSS_AW26 VSS_C25 C5 J32 VSS_J28 VSS_T18 T2
AE68 VSS_AE67 VSS_AN37 AN38 AW30 VSS_AW28 VSS_C5 D10 J35 VSS_J32 VSS_T2 T21
AE69 VSS_AE68 VSS_AN38 AN40 AW32 VSS_AW30 VSS_D10 D11 J38 VSS_J35 VSS_T21 T4
AF1 VSS_AE69 VSS_AN40 AN42 AW34 VSS_AW32 VSS_D11 D14 J42 VSS_J38 VSS_T4 U10
AF10 VSS_AF1 VSS_AN42 AN58 AW36 VSS_AW34 VSS_D14 D18 J8 VSS_J42 VSS_U10 U63
AF15 VSS_AF10 VSS_AN58 AN63 AW38 VSS_AW36 VSS_D18 D22 K16 VSS_J8 VSS_U63 U64
C VSS_AF15 VSS_AN63 VSS_AW38 VSS_D22 VSS_K16 VSS_U64 C
AF17 AP10 AW41 D25 K18 U66
AF2 VSS_AF17 VSS_AP10 AP18 AW43 VSS_AW41 VSS_D25 D26 K22 VSS_K18 VSS_U66 U67
AG16 VSS_AF63 VSS_AP23 AP28 AW49 VSS_AW47 VSS_D34 D39 K64 VSS_K63 VSS_U70 V16
AG17 VSS_AG16 VSS_AP28 AP32 AW51 VSS_AW49 VSS_D39 D44 K65 VSS_K64 VSS_V16 V17
AG18 VSS_AG17 VSS_AP32 AP35 AW53 VSS_AW51 VSS_D44 D45 K66 VSS_K65 VSS_V17 V18
AG19 VSS_AG18 VSS_AP35 AP38 AW55 VSS_AW53 VSS_D45 D47 K67 VSS_K66 VSS_V18 W13
AG20 VSS_AG19 VSS_AP38 AP42 AW57 VSS_AW55 VSS_D47 D48 K68 VSS_K67 VSS_W13 W6
AG21 VSS_AG20 VSS_AP42 AP58 AW6 VSS_AW57 VSS_D48 D53 K70 VSS_K68 VSS_W6 W9
AG71 VSS_AG21 VSS_AP58 AP63 AW60 VSS_AW6 VSS_D53 D58 K71 VSS_K70 VSS_W9 Y17
AH13 VSS_AG71 VSS_AP63 AP68 AW62 VSS_AW60 VSS_D58 D6 L11 VSS_K71 VSS_Y17 Y19
AH6 VSS_AH13 VSS_AP68 AP70 AW64 VSS_AW62 VSS_D6 D62 L16 VSS_L11 VSS_Y19 Y20
AH63 VSS_AH6 VSS_AP70 AR11 AW66 VSS_AW64 VSS_D62 D66 L17 VSS_L16 VSS_Y20 Y21
AH64 VSS_AH63 VSS_AR11 AR15 AW8 VSS_AW66 VSS_D66 D69 VSS_L17 VSS_Y21
AH67 VSS_AH64 VSS_AR15 AR16 AY66 VSS_AW8 VSS_D69 E11
AJ15 VSS_AH67 VSS_AR16 AR20 B10 VSS_AY66 VSS_E11 E15
AJ18 VSS_AJ15 VSS_AR20 AR23 B14 VSS_B10 VSS_E15 E18
AJ20 VSS_AJ18 VSS_AR23 AR28 B18 VSS_B14 VSS_E18 E21 KBL-R U42
VSS_AJ20 VSS_AR28 VSS_B18 VSS_E21 <$LOCATION>
AJ4 AR35 B22 E46 <MATERIAL>
AK11 VSS_AJ4 VSS_AR35 AR42 B30 VSS_B22 VSS_E46 E50
VSS_AK11 VSS_AR42 VSS_B30 VSS_E50 18 OF 20
AK16 AR43 B34 E53 REV = 1
AK18 VSS_AK16 VSS_AR43 AR45 B39 VSS_B34 VSS_E53 E56
B B
AK63 VSS_AK27 VSS_AR5 AR50 B58 VSS_B53 VSS_E71 F1
AK68 VSS_AK63 VSS_AR50 AR52 B62 VSS_B58 VSS_F1 F13
AL2 VSS_AK8 VSS_AR55 AR58 BA1 VSS_B71 VSS_F22 F23
AL28 VSS_AL2 VSS_AR58 AR63 BA10 VSS_BA1 VSS_F23 F27
AL32 VSS_AL28 VSS_AR63 AR8 BA14 VSS_BA10 VSS_F27 F28
AL35 VSS_AL32 VSS_AR8 AT2 BA18 VSS_BA14 VSS_F28 F32
AL38 VSS_AL35 VSS_AT2 AT20 BA2 VSS_BA18 VSS_F32 F33
AL55 VSS_AL52 VSS_AT4 AT42 F68 VSS_BA36 VSS_F4 F40
AL58 VSS_AL55 VSS_AT42 AT56 BA45 VSS_F68 VSS_F40 F42
AL64 VSS_AL58 VSS_AT56 AT58 VSS_BA45 VSS_F42 BA41
VSS_AL64 VSS_AT58 VSS_BA41
KBL-R U42
<$LOCATION> KBL-R U42
A A
<MATERIAL> <$LOCATION>
16 OF 20 <MATERIAL>
REV = 1 17 OF 20
REV = 1
Title: 14. CPU(5)_GND
Engineer: Surface
5 4 3 2 1
Vinafix.com
5 4 3 2 1
KBL_R_U42
U10001S
GTP15001
SMD RND 22.8mil RESERVED SIGNALS-1
E68 BB68
[18] CFG0 CFG[0] RSVD_TP_BB68
B67 BB69 SMD RND 22.8mil
[18] CFG1 CFG[1] RSVD_TP_BB69
D65
[18] CFG2 CFG[2]
D67 AK13 RSVD_TP_AK13 GTP15002
[18] CFG3 CFG[3] RSVD_TP_AK13
E70 AK12 RSVD_TP_AK12 GTP15003
D [18] CFG4 CFG[4] RSVD_TP_AK12 D
C68
[18] CFG5 CFG[5]
D68 BB2 SMD RND 22.8mil
[18] CFG6 CFG[6] RSVD_BB2
C67 BA3
[18] CFG7 CFG[7] RSVD_BA3
F71
[18] CFG8 CFG[8]
G69
[18] CFG9 CFG[9]
F70 AU5
[18] CFG10 CFG[10] TP5
G68 AT5
[18] CFG11 CFG[11] TP6
H70
[18] CFG12 CFG[12]
G71
[18] CFG13 CFG[13]
H69 D5
[18] CFG14 CFG[14] RSVD_D5
G70 D4
[18] CFG15 CFG[15] RSVD_D4 B2
E63 RSVD_B2 C2
[18] CFG16 CFG[16] RSVD_C2
F63
[18] CFG17 CFG[17] B3
E66 RSVD_B3 A3
[18] CFG18 CFG[18] RSVD_A3
F66
[18] CFG19 CFG[19] AW1
R15001 49.9 CFG_RCOMP E60 RSVD_AW1
0201 CFG_RCOMP E1
CFG4 E8 RSVD_E1 E2
[18] ITP_PMODE ITP_PMODE RSVD_E2
0 Default enable eDP AY2 BA4
AY1 RSVD_AY2 RSVD_BA4 BB4
C 1 Disable eDP R15002 RSVD_AY1 RSVD_BB4 C
1K D1 A4
0201 D3 RSVD_D1 RSVD_A4 C4
RSVD_D3 RSVD_C4
K46 BB5
K45 RSVD_K46 TP4
RSVD_K45 A69
AL25 RSVD_A69 B69
AL27 RSVD_AL25 RSVD_B69
RSVD_AL27 AY3
C71 RSVD_AY3
B70 RSVD_C71 D71
RSVD_B70 RSVD_D71 C70
F60 RSVD_C70
RSVD_F60 C54
A52 RSVD_C54 D54
RSVD_A52 RSVD_D54
BA70 AY4
BA68 RSVD_TP_BA70 TP1 BB3
U10001T KBL_R_U42 RSVD_TP_BA68 TP2
J71 AY71 ZVM# and MSM# may need to
J68 RSVD_J71 VSS_AY71 AR56 control the VCCOPC and VCCEOPIO
RSVD/XTAL RSVD_J68 ZVM#
B AW69 F6 F65 AW71 B
AW68 RSVD_AW69 RSVD_F6 E3 G65 VSS_F65 RSVD_TP_AW71 AW70
AU56 RSVD_AW68 XTAL24_IN C11 VSS_G65 RSVD_TP_AW70
AW48 RSVD_AU56 RSVD_C11 B11 F61 AP56
C7 RSVD_AW48 RSVD_B11 A11 E61 RSVD_F61 MSM# C64 GTP15004
U12 XTAL24_OUT RSVD_A11 D12 RSVD_E61 PROC_SELECT#
U11 RSVD_U12 RSVD_D12 C12 SMD RND 22.8mil
H11 RSVD_U11 RSVD_C12 F52
RSVD_H11 RSVD_F52
KBL-R U42
<$LOCATION>
<MATERIAL>
KBL-R U42 19 OF 20
<$LOCATION> REV = 1
XTAL_24M_IN
<MATERIAL>
20 OF 20
REV = 1 XTAL_24M_OUTR1504 1M
0201S_P28-W35
24MHz X1501
R1503 0 3 1
0201S_P28-W354 2
GND
A
0201S_P33
C1503
50V 10p
X948599-001 C1502
10p 50V
0201S_P33
Vinafix.com A
Title: 15. CPU(6)_CFG_RESERVED

Engineer: Surface
5 4 3 2 1
Vinafix.com
5 4 3 2 1
V0P6DX_LPDDR3
[11,16] M_A_CAA[9:0] M_A_CAA0 R16001 68 5% 0201
U16001 U16002 M_A_CAA1 R16002 68 5% 0201
[11,16] M_A_CAB[9:0] M_A_CAA2
H9CCNNNBLTBLAR-NUD H9CCNNNBLTBLAR-NUD R16003 68 5% 0201
M_A_CAA3 R16004 68 5% 0201
[11,16] M_A_CAA[9:0] M_A_CAA0 M_A_D16 M_A_D[23:16] [11] M_A_CAB0 M_A_D58 M_A_D[63:56] [11] M_A_CAA4
R2 P9 R2 P9 R16005 68 5% 0201
M_A_CAA1 P2 CA0 DQ0 N9 M_A_D17 M_A_CAB1 P2 CA0 DQ0 N9 M_A_D61 M_A_CAA5 R16006 68 5% 0201
M_A_CAA2 N2 CA1 DQ1 N10 M_A_D23 M_A_CAB2 N2 CA1 DQ1 N10 M_A_D56 M_A_CAA6 R16007 68 5% 0201
M_A_CAA3 N3 CA2 DQ2 N11 M_A_D18 M_A_CAB3 N3 CA2 DQ2 N11 M_A_D57 V_VREF_CA_DIMM V_VREF_DQ_DIMM0 M_A_CAA7 R16008 68 5% 0201
M_A_CAA4 M3 CA3 DQ3 M8 M_A_D21 M_A_CAB4 M3 CA3 DQ3 M8 M_A_D60 M_A_CAA8 R16009 68 5% 0201
M_A_CAA5 F3 CA4 DQ4 M9 M_A_D20 M_A_CAB5 F3 CA4 DQ4 M9 M_A_D59 M_A_CAA9 R16010 68 5% 0201
M_A_CAA6 E3 CA5 DQ5 M10 M_A_D22 M_A_CAB6 E3 CA5 DQ5 M10 M_A_D62
M_A_CAA7 E2 CA6 DQ6 M11 M_A_D19 M_A_CAB7 E2 CA6 DQ6 M11 M_A_D63 C16001 C16002 C16003 C16004
M_A_CAA8 CA7 DQ7 M_A_D7 M_A_D[7:0] [11] M_A_CAB8 CA7 DQ7 M_A_D37 M_A_D[39:32] [11] [11,16] M_A_CAB[9:0]
D2 F11 D2 F11 47000p 47000p 47000p 47000p
M_A_CAA9 C2 CA8 DQ8 F10 M_A_D0 M_A_CAB9 C2 CA8 DQ8 F10 M_A_D38 6.3V 6.3V 6.3V 6.3V M_A_CAB0 R16011 68 5% 0201
CA9 DQ9 F9 M_A_D4 CA9 DQ9 F9 M_A_D32 0201 0201 0201 0201 M_A_CAB1 R16012 68 5% 0201
D DQ10 F8 M_A_D1 DQ10 F8 M_A_D36 M_A_CAB2 R16013 68 5% 0201 D
J3 DQ11 E11 M_A_D6 J3 DQ11 E11 M_A_D33 M_A_CAB3 R16014 68 5% 0201
[11,16] M_A_DIM0_CLKP1 CK DQ12 [11,16] M_A_DIM0_CLKP0 CK DQ12
J2 E10 M_A_D3 J2 E10 M_A_D39 M_A_CAB4 R16015 68 5% 0201
[11,16] M_A_DIM0_CLKN1 CK# DQ13 [11,16] M_A_DIM0_CLKN0 CK# DQ13
E9 M_A_D5 E9 M_A_D34 M_A_CAB5 R16016 68 5% 0201
DQ14 D9 M_A_D2 DQ14 D9 M_A_D35 M_A_CAB6 R16017 68 5% 0201
DQ15 M_A_D29 M_A_D[31:24] [11] DQ15 M_A_D52 M_A_D[55:48] [11] M_A_CAB7
[11,16] M_A_DIM0_CKE2 K3 T8 [11,16] M_A_DIM0_CKE0 K3 T8 R16018 68 5% 0201
K4 CKE0 DQ16/NC T9 M_A_D28 K4 CKE0 DQ16/NC T9 M_A_D51 M_A_CAB8 R16019 68 5% 0201
[11,16] M_A_DIM0_CKE3 CKE1 DQ17/NC [11,16] M_A_DIM0_CKE1 CKE1 DQ17/NC
T10 M_A_D31 T10 M_A_D50 V1P8U_2P5U M_A_CAB9 R16020 68 5% 0201
DQ18/NC T11 M_A_D26 DQ18/NC T11 M_A_D48
L3 DQ19/NC R8 M_A_D25 L3 DQ19/NC R8 M_A_D53
[11,16] M_A_DIM0_CS0_N CS#0 DQ20/NC [11,16] M_A_DIM0_CS0_N CS#0 DQ20/NC R16021
L4 R9 M_A_D24 L4 R9 M_A_D54
[11,16] M_A_DIM0_CS1_N CS#1 DQ21/NC [11,16] M_A_DIM0_CS1_N CS#1 DQ21/NC
R10 M_A_D27 R10 M_A_D55 0 R16022 80.6 0201
DQ22/NC M_A_D30 DQ22/NC M_A_D49 1P8V_DUAL_VR_FB_R [58] [11,16] M_A_DIM0_ODT0
R11 R11 [11,16] M_A_DIM0_CS0_N R16023 80.6 0201
DQ23/NC M_A_D9 M_A_D[15:8] [11] DQ23/NC M_A_D41 M_A_D[47:40] [11]
L8 C11 L8 C11 0603 R16024 80.6 0201
G8 DM0 DQ24/NC C10 M_A_D12 G8 DM0 DQ24/NC C10 M_A_D45 V1P8U_2P5U
For 1.8V sensing [11,16] M_A_DIM0_CS1_N
R16025 80.6 0201
DM1 DQ25/NC DM1 DQ25/NC [11,16] M_A_DIM0_CKE0
P8 C9 M_A_D15 P8 C9 M_A_D44 5 distributed. the Figure 4-56 at PDG2.0 the pink circle. R16026 80.6 0201
DM2 DQ26/NC DM2 DQ26/NC [11,16] M_A_DIM0_CKE1
D8 C8 M_A_D11 D8 C8 M_A_D46 R16027 80.6 0201
DM3/NC DQ27/NC DM3/NC DQ27/NC [11,16] M_A_DIM0_CKE2
B11 M_A_D13 B11 M_A_D40 R16028 80.6 0201
DQ28/NC DQ28/NC [11,16] M_A_DIM0_CKE3
B10 M_A_D8 B10 M_A_D47 C16005 C16096 C16006 C16007 C16008 C16009 C16097
A1 DQ29/NC B9 M_A_D14 A1 DQ29/NC B9 M_A_D42 10u 10p 10u 10u 10u 10u 2p R16029 37.4 0201
DNU1 DQ30/NC DNU1 DQ30/NC [11,16] M_A_DIM0_CLKP0
A2 B8 M_A_D10 A2 B8 M_A_D43 6.3V 50V 6.3V 6.3V 6.3V 6.3V 25V R16030 37.4 0201
DNU2 DQ31/NC DNU2 DQ31/NC [11,16] M_A_DIM0_CLKN0
A12 A12 0402 0201 0402 0402 0402 0402 0201 [11,16] M_A_DIM0_CLKP1 R16031 37.4 0201
A13 DNU3 V1P8U_2P5U A13 DNU3 R16032 37.4 0201
DNU4 DNU4 [11,16] M_A_DIM0_CLKN1
B1 A3 B1 A3 V1P8U_2P5U
B13 DNU5 VDD1_1 A4 B13 DNU5 VDD1_1 A4
DNU6 VDD1_3 DNU6 VDD1_3 GND
T1 A5 T1 A5 2 near each DRAM.
T13 DNU7 VDD1_5 A6 T13 DNU7 VDD1_5 A6
U1 DNU8 VDD1_7 A10 U1 DNU8 VDD1_7 A10 C16010 C16011 C16012 C16013 C16014 C16015 C16016 C16017 Look the Figure
U2 DNU9 VDD1_9 U3 U2 DNU9 VDD1_9 U3 1u 1u 1u 1u 1u 1u 1u 1u 4-55 at PDG2.0
U12 DNU10 VDD1_2 U4 U12 DNU10 VDD1_2 U4
DNU11 VDD1_4 DNU11 VDD1_4
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V the pink circle.
U13 U5 U13 U5 0402 0402 0402 0402 0402 0402 0402 0402
DNU12 VDD1_6 U6 DNU12 VDD1_6 U6
VDD1_8 U10 VDD1_8 U10 V1P2U
L10 VDD1_10 V1P2U L10 VDD1_10 V1P2U V1P2U
[11] M_A_DQSP2 DQS0 [11] M_A_DQSP7 DQS0
L11 L11
[11] M_A_DQSN2 DQS0# [11] M_A_DQSN7 DQS0# R16037
A8 A8
G10 VDD2_1 A9 G10 VDD2_1 A9 0
[11] M_A_DQSP0 DQS1 VDD2_2 [11] M_A_DQSP4 DQS1 VDD2_2 V1P2U_VR_FB_R [58]
C G11 D4 G11 D4 5 distributed. C
[11] M_A_DQSN0 DQS1# VDD2_3 [11] M_A_DQSN4 DQS1# VDD2_3
D5 D5 C16018 C16019 C16020 10u C16022 0603
P10 VDD2_4 D6 P10 VDD2_4 D6 Look the Figure 10u 10u 10u C16021 10u
For 1.2V sensing
[11] M_A_DQSP3 DQS2/NC VDD2_5 [11] M_A_DQSP6 DQS2/NC VDD2_5 4-56 at PDG2.0
P11 G5 P11 G5 6.3V 6.3V 6.3V 0402 6.3V
[11] M_A_DQSN3 DQS2#/NC VDD2_6 [11] M_A_DQSN6 DQS2#/NC VDD2_6
H5 H5 the blue circle. 0402 0402 0402 6.3V 0402
D10 VDD2_7 H6 D10 VDD2_7 H6
[11] M_A_DQSP1 DQS3/NC VDD2_8 [11] M_A_DQSP5 DQS3/NC VDD2_8
D11 H12 D11 H12
[11] M_A_DQSN1 DQS3#/NC VDD2_9 [11] M_A_DQSN5 DQS3#/NC VDD2_9
J5 J5
VDD2_10 J6 VDD2_10 J6
VDD2_11 VDD2_11 3 near each
B2 K5 B2 K5
B5 VSS1 VDD2_12 K6 B5 VSS1 VDD2_12 K6 DRAM. Look C16023 C16024 C16025 C16026 C16027 C16028 C16029 C16030 C16031 C16032 C16033 C16034
C5 VSS2 VDD2_13 K12 C5 VSS2 VDD2_13 K12 the Figure 1u 1u 1u 1u 1u 1u 1u 1u 1u 1u 1u 1u
E4 VSS3 VDD2_14 L5 E4 VSS3 VDD2_14 L5
VSS4 VDD2_15 VSS4 VDD2_15
4-55 at 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
E5 P4 E5 P4 PDG2.0 the 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
F5 VSS5 VDD2_16 P5 F5 VSS5 VDD2_16 P5
H2 VSS6 VDD2_17 P6 H2 VSS6 VDD2_17 P6 blue circle.
J12 VSS7 VDD2_18 U8 J12 VSS7 VDD2_18 U8 V1P2U
K2 VSS8 VDD2_19 U9 K2 VSS8 VDD2_19 U9
L6 VSS9 VDD2_20 V1P2U L6 VSS9 VDD2_20 V1P2U
M5 VSS10 M5 VSS10
N4 VSS11 F2 N4 VSS11 F2
N5 VSS12 VDDCA1 G2 N5 VSS12 VDDCA1 G2
VSS13 VDDCA2 VSS13 VDDCA2 2 near each
R4 H3 R4 H3
R5 VSS14 VDDCA3 L2 R5 VSS14 VDDCA3 L2 C16035 C16036 C16037 C16038 C16039 C16040 C16041 C16042 DRAM. Look
T2 VSS15 VDDCA4 M2 T2 VSS15 VDDCA4 M2 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u the Figure
T3 VSS16 VDDCA5 T3 VSS16 VDDCA5
VSS17
V1P2U
VSS17
V1P2U 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4-55 at
T4 T4 0201 0201 0201 0201 0201 0201 0201 0201
T5 VSS18 A11 T5 VSS18 A11
PDG2.0 the
VSS19 VDDQ1 C12 VSS19 VDDQ1 C12 red circle.
VDDQ2 E8 VDDQ2 E8
C3 VDDQ3 E12 C3 VDDQ3 E12
D3 VSSCA1 VDDQ4 G12 D3 VSSCA1 VDDQ4 G12
F4 VSSCA2 VDDQ5 H8 F4 VSSCA2 VDDQ5 H8 C16043 C16044 C16045 C16046 C16047 C16048 C16049 C16050
G3 VSSCA3 VDDQ6 H9 G3 VSSCA3 VDDQ6 H9 1u 1u 1u 1u 1u 1u 1u 1u
G4 VSSCA4 VDDQ7 H11 G4 VSSCA4 VDDQ7 H11 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
J4 VSSCA5 VDDQ8 J9 J4 VSSCA5 VDDQ8 J9 0402 0402 0402 0402 0402 0402 0402 0402
M4 VSSCA6 VDDQ9 J10 M4 VSSCA6 VDDQ9 J10
P3 VSSCA7 VDDQ10 K8 P3 VSSCA7 VDDQ10 K8
B VSSCA8 VDDQ11 VSSCA8 VDDQ11 4 near each DRAM. B
K11 K11
VDDQ12 L12 VDDQ12 L12 Look the Figure 4-55
B6 VDDQ13 N8 B6 VDDQ13 N8 at PDG2.0 the red
B12 VSSQ1 VDDQ14 N12 B12 VSSQ1 VDDQ14 N12
VSSQ2 VDDQ15 VSSQ2 VDDQ15
C16051 C16052 C16053 C16054 C16055 C16056 C16057 C16058 circle (big one).
C6 R12 C6 R12 1u 1u 1u 1u 1u 1u 1u 1u
D12 VSSQ3 VDDQ16 U11 D12 VSSQ3 VDDQ16 U11 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
E6 VSSQ4 VDDQ17 V_VREF_CA_DIMM E6 VSSQ4 VDDQ17 V_VREF_CA_DIMM 0402 0402 0402 0402 0402 0402 0402 0402
F6 VSSQ5 F6 VSSQ5
F12 VSSQ6 H4 V_VREF_DQ_DIMM0 F12 VSSQ6 H4 V_VREF_DQ_DIMM0
G6 VSSQ7 VREFCA J11 G6 VSSQ7 VREFCA J11
G9 VSSQ8 VREFDQ G9 VSSQ8 VREFDQ
H10 VSSQ9 H10 VSSQ9
K10 VSSQ10 J8 K10 VSSQ10 J8
VSSQ11 ODT M_A_DIM0_ODT0 [11,16] VSSQ11 ODT M_A_DIM0_ODT0 [11,16] 5 distributed. Look
L9 L9 C16061 C16059 C16062 C16063 C16060
M6 VSSQ12 0402 M6 VSSQ12 0402 10u 10u 10u 10u 10u the Figure 4-56 at
M12 VSSQ13 B3 ZQ1601 R16034 1% 243 M12 VSSQ13 B3 ZQ1603 R16033 1% 243 6.3V 6.3V 6.3V 6.3V 6.3V PDG2.0 the red
N6 VSSQ14 ZQ0 B4 N6 VSSQ14 ZQ0 B4
VSSQ15 ZQ1
ZQ1602 R16035 1% 243
VSSQ15 ZQ1
ZQ1604 R16036 1% 243 0402 0402 0402 0402 0402 circle (VDDQ).
P12 0402 P12 0402
R6 VSSQ16 R6 VSSQ16
VSSQ17 TBL1601 VSSQ17 TBL1601
T6 C4 T6 C4
T12 VSSQ18 NC1 K9 T12 VSSQ18 NC1 K9
VSSQ19 NC2 R3 VSSQ19 NC2 R3
NC3 NC3 V1P2U
TBL1601, SEE PAGE 23
TBL1601 TBL1601
V0P6DX_LPDDR3
DNP For 4GB System 2 near each DRAM.
Memory: R16035, R16036 C16064 C16065 C16066 C16067 C16068 C16069 C16070 C16071
Look the Figure
1u 1u 1u 1u 1u 1u 1u 1u
6.3V
0402
6.3V
0402
6.3V
0402
6.3V
0402
6.3V
0402
6.3V
0402
6.3V
0402
6.3V
0402
4-55 at PDG2.0
the yellow
circle.
C16072 C16073 C16074 C16075 C16076 C16077 C16078 C16079 C16090 C16091 C16092 C16093 C16094 C16095 C16080 C16081
1u 1u 1u 1u 1u 1u 1u 1u 1u 1u 1u 1u 1u 1u 22u 6.3V 22u 6.3V
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V C16082 C16083 C16084 3 distributed.
A 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0603 0603 10u 10u 10u A
DNP DNP DNP DNP DNP DNP 6.3V 6.3V 6.3V Look the Figure
0402 0402 0402 4-56 at PDG2.0
the yellow
distributed along terminations. Shown in blue circle.
Figure 4-57 in PDG2.0 Edge of vtt island.
Caps shown in green
Figure 4-57 in PDG2.0
16. LPDDR3(1)_MEMORY DOWN

Title:
Engineer: Surface
5 4 3 2 1
5 4 3 2 1
U17001 U17002
H9CCNNNBLTBLAR-NUD H9CCNNNBLTBLAR-NUD V0P6DX_LPDDR3
[11,17] M_B_CAA[9:0] M_B_CAA0 M_B_D0 M_B_D[7:0] [11] [11,17] M_B_CAB[9:0] M_B_CAB0 M_B_D54 M_B_D[55:48] [11] [11,17] M_B_CAA[9:0] M_B_CAA0
R2 P9 R2 P9 R17001 68 5% 0201
M_B_CAA1 P2 CA0 DQ0 N9 M_B_D1 M_B_CAB1 P2 CA0 DQ0 N9 M_B_D53 M_B_CAA1 R17002 68 5% 0201
M_B_CAA2 N2 CA1 DQ1 N10 M_B_D4 M_B_CAB2 N2 CA1 DQ1 N10 M_B_D49 V_VREF_CA_DIMM V_VREF_DQ_DIMM1 M_B_CAA2 R17003 68 5% 0201
M_B_CAA3 N3 CA2 DQ2 N11 M_B_D3 M_B_CAB3 N3 CA2 DQ2 N11 M_B_D48 M_B_CAA3 R17004 68 5% 0201
M_B_CAA4 M3 CA3 DQ3 M8 M_B_D2 M_B_CAB4 M3 CA3 DQ3 M8 M_B_D55 M_B_CAA4 R17005 68 5% 0201
M_B_CAA5 F3 CA4 DQ4 M9 M_B_D6 M_B_CAB5 F3 CA4 DQ4 M9 M_B_D52 M_B_CAA5 R17006 68 5% 0201
M_B_CAA6 E3 CA5 DQ5 M10 M_B_D5 M_B_CAB6 E3 CA5 DQ5 M10 M_B_D50 C17001 C17002 C17003 C17004 M_B_CAA6 R17007 68 5% 0201
M_B_CAA7 E2 CA6 DQ6 M11 M_B_D7 M_B_CAB7 E2 CA6 DQ6 M11 M_B_D51 M_B_CAA7
CA7 DQ7 M_B_D[31:24] [11] CA7 DQ7 M_B_D[47:40] [11] 47000p 6.3V 47000p 6.3V 47000p 6.3V 47000p 6.3V R17008 68 5% 0201
M_B_CAA8 D2 F11 M_B_D25 M_B_CAB8 D2 F11 M_B_D45 M_B_CAA8 R17009 68 5% 0201
M_B_CAA9 CA8 DQ8 M_B_D29 M_B_CAB9 CA8 DQ8 M_B_D47 0201 0201 0201 0201 M_B_CAA9
C2 F10 C2 F10 R17010 68 5% 0201
D CA9 DQ9 F9 M_B_D27 CA9 DQ9 F9 M_B_D42 D
DQ10 F8 M_B_D26 DQ10 F8 M_B_D46
J3 DQ11 E11 M_B_D24 J3 DQ11 E11 M_B_D44
[11,17] M_B_DIM0_CLKP0 CK DQ12 [11,17] M_B_DIM0_CLKP1 CK DQ12
J2 E10 M_B_D28 J2 E10 M_B_D43
[11,17] M_B_DIM0_CLKN0 CK# DQ13 [11,17] M_B_DIM0_CLKN1 CK# DQ13
E9 M_B_D30 E9 M_B_D41
DQ14 D9 M_B_D31 DQ14 D9 M_B_D40
DQ15 M_B_D19 M_B_D[23:16] [11] DQ15 M_B_D33 M_B_D[39:32] [11] [11,17] M_B_CAB[9:0] M_B_CAB0
[11,17] M_B_DIM0_CKE0 K3 T8 [11,17] M_B_DIM0_CKE2 K3 T8 R17011 68 5% 0201
K4 CKE0 DQ16/NC T9 M_B_D23 K4 CKE0 DQ16/NC T9 M_B_D32 M_B_CAB1 R17012 68 5% 0201
[11,17] M_B_DIM0_CKE1 CKE1 DQ17/NC [11,17] M_B_DIM0_CKE3 CKE1 DQ17/NC
T10 M_B_D21 T10 M_B_D37 M_B_CAB2 R17013 68 5% 0201
DQ18/NC T11 M_B_D16 DQ18/NC T11 M_B_D36 M_B_CAB3 R17014 68 5% 0201
L3 DQ19/NC R8 M_B_D22 L3 DQ19/NC R8 M_B_D34 M_B_CAB4 R17015 68 5% 0201
[11,17] M_B_DIM0_CS0_N CS#0 DQ20/NC [11,17] M_B_DIM0_CS0_N CS#0 DQ20/NC
L4 R9 M_B_D18 L4 R9 M_B_D38 M_B_CAB5 R17016 68 5% 0201
[11,17] M_B_DIM0_CS1_N CS#1 DQ21/NC [11,17] M_B_DIM0_CS1_N CS#1 DQ21/NC
R10 M_B_D17 R10 M_B_D39 M_B_CAB6 R17017 68 5% 0201
DQ22/NC R11 M_B_D20 DQ22/NC R11 M_B_D35 M_B_CAB7 R17018 68 5% 0201
DQ23/NC M_B_D13 M_B_D[15:8] [11] DQ23/NC M_B_D56 M_B_D[63:56] [11] M_B_CAB8
L8 C11 L8 C11 R17019 68 5% 0201
G8 DM0 DQ24/NC C10 M_B_D15 G8 DM0 DQ24/NC C10 M_B_D59 M_B_CAB9 R17020 68 5% 0201
P8 DM1 DQ25/NC C9 M_B_D10 P8 DM1 DQ25/NC C9 M_B_D60
D8 DM2 DQ26/NC C8 M_B_D11 D8 DM2 DQ26/NC C8 M_B_D62
DM3/NC DQ27/NC B11 M_B_D12 DM3/NC DQ27/NC B11 M_B_D57
DQ28/NC B10 M_B_D8 DQ28/NC B10 M_B_D58
A1 DQ29/NC B9 M_B_D9 A1 DQ29/NC B9 M_B_D61 R17021 80.6 0201
DNU1 DQ30/NC DNU1 DQ30/NC [11,17] M_B_DIM0_ODT0
A2 B8 M_B_D14 A2 B8 M_B_D63 R17022 80.6 0201
DNU2 DQ31/NC DNU2 DQ31/NC [11,17] M_B_DIM0_CS0_N
A12 A12 [11,17] M_B_DIM0_CS1_N R17023 80.6 0201
A13 DNU3 V1P8U_2P5U A13 DNU3 V1P8U_2P5U R17024 80.6 0201
DNU4 DNU4 [11,17] M_B_DIM0_CKE0
B1 A3 B1 A3 [11,17] M_B_DIM0_CKE1 R17025 80.6 0201
B13 DNU5 VDD1_1 A4 B13 DNU5 VDD1_1 A4 R17026 80.6 0201
DNU6 VDD1_3 DNU6 VDD1_3 [11,17] M_B_DIM0_CKE2
T1 A5 T1 A5 [11,17] M_B_DIM0_CKE3 R17027 80.6 0201
T13 DNU7 VDD1_5 A6 T13 DNU7 VDD1_5 A6
U1 DNU8 VDD1_7 A10 U1 DNU8 VDD1_7 A10 R17028 37.4 0201
DNU9 VDD1_9 DNU9 VDD1_9 [11,17] M_B_DIM0_CLKP0
U2 U3 U2 U3 [11,17] M_B_DIM0_CLKN0 R17029 37.4 0201
U12 DNU10 VDD1_2 U4 U12 DNU10 VDD1_2 U4 R17030 37.4 0201
DNU11 VDD1_4 DNU11 VDD1_4 [11,17] M_B_DIM0_CLKP1
U13 U5 U13 U5 [11,17] M_B_DIM0_CLKN1 R17031 37.4 0201
DNU12 VDD1_6 U6 DNU12 VDD1_6 U6
VDD1_8 U10 VDD1_8 U10
L10 VDD1_10 L10 VDD1_10
[11] M_B_DQSP0 DQS0 [11] M_B_DQSP6 DQS0
L11 V1P2U L11 V1P2U
[11] M_B_DQSN0 DQS0# [11] M_B_DQSN6 DQS0#
A8 A8
G10 VDD2_1 A9 G10 VDD2_1 A9
C C
[11] M_B_DQSP3 DQS1 VDD2_2 [11] M_B_DQSP5 DQS1 VDD2_2
G11 D4 G11 D4
[11] M_B_DQSN3 DQS1# VDD2_3 [11] M_B_DQSN5 DQS1# VDD2_3
D5 D5
P10 VDD2_4 D6 P10 VDD2_4 D6
[11] M_B_DQSP2 DQS2/NC VDD2_5 [11] M_B_DQSP4 DQS2/NC VDD2_5
P11 G5 P11 G5
[11] M_B_DQSN2 DQS2#/NC VDD2_6 [11] M_B_DQSN4 DQS2#/NC VDD2_6
H5 H5
D10 VDD2_7 H6 D10 VDD2_7 H6
[11] M_B_DQSP1 DQS3/NC VDD2_8 [11] M_B_DQSP7 DQS3/NC VDD2_8
D11 H12 D11 H12
[11] M_B_DQSN1 DQS3#/NC VDD2_9 [11] M_B_DQSN7 DQS3#/NC VDD2_9
J5 J5
VDD2_10 J6 VDD2_10 J6
B2 VDD2_11 K5 B2 VDD2_11 K5
B5 VSS1 VDD2_12 K6 B5 VSS1 VDD2_12 K6
C5 VSS2 VDD2_13 K12 C5 VSS2 VDD2_13 K12
E4 VSS3 VDD2_14 L5 E4 VSS3 VDD2_14 L5
E5 VSS4 VDD2_15 P4 E5 VSS4 VDD2_15 P4
F5 VSS5 VDD2_16 P5 F5 VSS5 VDD2_16 P5
H2 VSS6 VDD2_17 P6 H2 VSS6 VDD2_17 P6
J12 VSS7 VDD2_18 U8 J12 VSS7 VDD2_18 U8
K2 VSS8 VDD2_19 U9 K2 VSS8 VDD2_19 U9
L6 VSS9 VDD2_20 V1P2U L6 VSS9 VDD2_20 V1P2U
M5 VSS10 M5 VSS10
N4 VSS11 F2 N4 VSS11 F2
N5 VSS12 VDDCA1 G2 N5 VSS12 VDDCA1 G2
R4 VSS13 VDDCA2 H3 R4 VSS13 VDDCA2 H3
R5 VSS14 VDDCA3 L2 R5 VSS14 VDDCA3 L2
T2 VSS15 VDDCA4 M2 T2 VSS15 VDDCA4 M2
T3 VSS16 VDDCA5 V1P2U T3 VSS16 VDDCA5 V1P2U
T4 VSS17 T4 VSS17
T5 VSS18 A11 T5 VSS18 A11
VSS19 VDDQ1 C12 VSS19 VDDQ1 C12
VDDQ2 E8 VDDQ2 E8
C3 VDDQ3 E12 C3 VDDQ3 E12
D3 VSSCA1 VDDQ4 G12 D3 VSSCA1 VDDQ4 G12
F4 VSSCA2 VDDQ5 H8 F4 VSSCA2 VDDQ5 H8
G3 VSSCA3 VDDQ6 H9 G3 VSSCA3 VDDQ6 H9
G4 VSSCA4 VDDQ7 H11 G4 VSSCA4 VDDQ7 H11
J4 VSSCA5 VDDQ8 J9 J4 VSSCA5 VDDQ8 J9
M4 VSSCA6 VDDQ9 J10 M4 VSSCA6 VDDQ9 J10
B
P3 VSSCA7 VDDQ10 K8 P3 VSSCA7 VDDQ10 K8 B
VSSCA8 VDDQ11 K11 VSSCA8 VDDQ11 K11
VDDQ12 L12 VDDQ12 L12
B6 VDDQ13 N8 B6 VDDQ13 N8
B12 VSSQ1 VDDQ14 N12 B12 VSSQ1 VDDQ14 N12
C6 VSSQ2 VDDQ15 R12 C6 VSSQ2 VDDQ15 R12
D12 VSSQ3 VDDQ16 U11 D12 VSSQ3 VDDQ16 U11
E6 VSSQ4 VDDQ17 V_VREF_CA_DIMM E6 VSSQ4 VDDQ17 V_VREF_CA_DIMM
F6 VSSQ5 F6 VSSQ5
F12 VSSQ6 H4 V_VREF_DQ_DIMM1 F12 VSSQ6 H4 V_VREF_DQ_DIMM1
G6 VSSQ7 VREFCA J11 G6 VSSQ7 VREFCA J11
G9 VSSQ8 VREFDQ G9 VSSQ8 VREFDQ
H10 VSSQ9 H10 VSSQ9
K10 VSSQ10 J8 K10 VSSQ10 J8
VSSQ11 ODT M_B_DIM0_ODT0 [11,17] VSSQ11 ODT M_B_DIM0_ODT0 [11,17]
L9 L9
M6 VSSQ12 0402 M6 VSSQ12 0402
M12 VSSQ13 B3 ZQ1701 R17032 1% 243 M12 VSSQ13 B3 ZQ1703 R17033 1% 243
N6 VSSQ14 ZQ0 B4 ZQ1702 R17034 1% 243 N6 VSSQ14 ZQ0 B4 ZQ1704 R17035 1% 243
P12 VSSQ15 ZQ1 0402 P12 VSSQ15 ZQ1 0402
R6 VSSQ16 R6 VSSQ16
VSSQ17 TBL1601 VSSQ17 TBL1601
T6 C4 T6 C4
T12 VSSQ18 NC1 K9 T12 VSSQ18 NC1 K9
VSSQ19 NC2 R3 VSSQ19 NC2 R3
NC3 NC3
TBL1601 TBL1601
DNP For 4GB System

Memory: R17034, R17035
A A
17. LPDDR3(2)_MEMORY DOWN

Title:
Engineer: Surface
5 4 3 2 1
5 4 3 2 1
V3P3_DSW
D D
R18021
100K
0201 C18002
DEBUG_OSG DEBUG_OSG R18026
0.010u 100K
[18] XDP_PRESENT_N 0201 0201
DEBUG_OSG DEBUG_OSG
U18007
XDP_TP18001
SMD RND 22.8mil
[10] XDP_BPM0
XDP_TP18002
SMD RND 22.8mil 1 NC VCC 6
[10] XDP_BPM1
2 A NC 5 XDP_PRESENT_LOGIC [61]
3 GND Y 4
74LVC1G06GM
C
MTP18002 SMD RND 22.8mil C
V1P00A
PRIMARY XDP connector V1P00A
DNP
R18005
49.9
B 1.5K 0201 B
R18025
0201 P18001
TBD
36 35 PROC_TDO [10]
34 GNDPAD XDP_TDO 33
[24] XDP_PRDY_N XDP_PRDYn XDP_PREQN XDP_PREQ_N [24]
32 31 PCH_JTAG_TCK [10] R18015
[10] PROC_TCK 30 XDP_TCK0 XDP_TCK1 29 1K
[10] PROC_TMS XDP_TMS XDP_TDI PROC_TDI [10]
28 27 PM_RSMRST_PWRGD_XDP 0201 SAM_PCH_RSMRST_N [22,29,56]
[10] PROC_TRST_N 26 XDP_TRSTn HOOK[0] 25
[15] ITP_PMODE HOOK[6] HOOK[3] SPI0_MOSI_XDP [21]
R18018 1K 0201 24 23 R18019 1.5K
[18] XDP_PRESENT_N 22 XDP_PRS_PCHXDP_PRS_CPU 21 0201 C18001
VCCOBS_AB OBS_CLK_1N CFG16 [15]
V1P00A 20 19 6.3V 0.1u
[15] CFG18 OBS_CLK_2N GND
18 17 1.5K 0201
[21] XDP_SPI0_IO2 [15] CFG19 OBS_CLK_2P OBS_CLK_1P CFG17 [15]
16 15 CFG7 [15] R18024 V3P3_DSW
[15] CFG15 OBSDATA_15 OBSDATA_7
[15] CFG14 14 13 CFG6 [15] 0201
12 OBSDATA_14 OBSDATA_6 11
[15] CFG13 OBSDATA_13 OBSDATA_5 CFG5 [15]
DEBUG_OSG [15] CFG12 10 9 CFG4 [15]
C18004 C18003 8 OBSDATA_12 OBSDATA_4 7
6.3V 0.1u [15] CFG10 6 5 CFG2 [15]
DEBUG_OSG 47u 0201 4 OBSDATA_10 OBSDATA_2 3
[15] CFG8 2 1 CFG0 [15]
OBSDATA_8 OBSDATA_0
1neG retpadA degreM CMC
A A
For the signals only go to XDP, the 0R should be close to XDP connector.
For the signals to both XDP and target circuit, the option resistor locaction should follow the target signal routing.
Title: 18. XDP

Engineer: Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
D LPDDR3 Vref D
M3: CPU driven VREF path is stuffed by default.

M1: VREF_DQ driven by a Voltage Divider Network during Processor power-off
V1P2U V1P2U
R19001 R19002
8.2K V_VREF_DQ_DIMM0 V_VREF_CA_DIMM 8.2K
0201 0201
0402 0201
R19003 10 R19004 5.1
[11] DIMM0_VREF_DQ DIMM_VREF_CA [11]
C19001 C19002
0.022u 16V 0.022u 16V
0201 0201
C
R19005 C
DIMM0_VREF_DQ_C 8.2K R19006 DIMM_VREF_CA_C
0201 8.2K
R19007 0201 R19008
24.9 24.9
0402 0402
V1P2U
R19010
8.2K
0201 V_VREF_DQ_DIMM1
0402
R19011 10
[11] DIMM1_VREF_DQ
B C19003 B
0.022u 16V
0201
R19012
N1902 8.2K
0201
R19013
24.9
0402
Intel 0203
M3+M1: Default Recommendation
A A
19. LPDDR3(3)_CA/DQ Voltage

Title:
Engineer: Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
1P8V_SSD 3P3V_SSD
0201
0201
R20032
R20002
10K
10K
2
DNP Q20001A
D NX3008NBKS D
G
DNP
U10001J KBL_R_U42
1 6 CLKREQ1_N CLOCK SIGNALS

[43] SSD_PCIECLK_REQ_N S D
D42
R20030 0 C42 CLKOUT_PCIE_N0
SSD AR10 CLKOUT_PCIE_P0 Do not place XDP_TP20001 and XDP_TP20002 under SOC heat sync
GPP_B5/SRCCLKREQ0#
0201
B42 F43 CLK_XDP_DN SMD RND 22.8mil
[43] PCIECLK_SSD_DN CLKOUT_PCIE_N1 CLKOUT_ITPXDP_N CLK_XDP_DP XDP_TP20001
A42 E43 SMD RND 22.8mil
[43] PCIECLK_SSD_DP CLKOUT_PCIE_P1 CLKOUT_ITPXDP_P XDP_TP20002
AT7
GPP_B6/SRCCLKREQ1# BA17
1P8V_SSD2 3P3V_SSD D41 GPD8/SUSCLK
C41 CLKOUT_PCIE_N2 E37 VCCCLK5_R
AT8 CLKOUT_PCIE_P2 NC_2 E35
GPP_B7/SRCCLKREQ2# NC_1
10K
0201
D40 E42 XCLK_BIASREF R20005 1% 2.7K
Q20001B CLKOUT_PCIE_N3 XCLK_BIASREF
5
C40
NX3008NBKS CLKOUT_PCIE_P3
10K
0201
RTC_X1
R20033
R20021
AT10 AM18 R20006 10M 0402
G
GPP_B8/SRCCLKREQ3# RTCX1 AM20 RTC_X2 PDG says to use 2.71K 0.5% resistor.
DNP
DNP B40 RTCX2 the power rail connector
C 0201 C
A40 CLKOUT_PCIE_N4 AN18 R20007 0 CTAL_1 1 2 to the rail of VCCCLK5. Confirmed with Intel OK
CLKREQ4_N CLKOUT_PCIE_P4 SRTCRST# SRTC_RST_N [20] to use 2.71K 1% resistor.
4 3 AU8 AM16
[44] SSD2_PCIECLK_REQ_N S D GPP_B9/SRCCLKREQ4# RTCRST# SKL_RTCRST_N [20,27]
0201 Y20002
E40 32.7 KHz
R20031 0 E38 CLKOUT_PCIE_N5 3.2X1.5X0.9MM
SSD AU7 CLKOUT_PCIE_P5
GPP_B10/SRCCLKREQ5# C20003 C20004
0201
22p 25V 5% 22p 25V 5%
[44] PCIECLK_SSD2_DN
0201 0201
[44] PCIECLK_SSD2_DP KBL-R U42
<$LOCATION> HDA_SDO:
1.Flash descriptor security: VCC_RTC
<MATERIAL>
10 OF 20 Sampled Low: in effect.
REV = 1 Sampled High: override R20009 20K
[50] PCIE_WIFI_RCLK_DN SRTC_RST_N [20]
2.HDA_SDOwhich sample high on C20005
[50] PCIE_WIFI_RCLK_DP the rising edge of PWROK 0201
Will also disable Intel ME. 1u 6.3V
0402
[50] PCIE_WIFI_CLKREQ_N U10001G KBL_R_U42
0201
0201 AUDIO
0201
R20014 33 HDA_SYNC_R BA22
[40] AZ_SYNC_1 HDA_BCLK_R HDA_SYNC/I2S0_SFRM
B R20011 33 AY22 R20015 20K B
[40] AZ_BITCLK_1 HDA_SDO_R HDA_BLK/I2S0_SCLK SKL_RTCRST_N [20,27]
R20012 33 INT. PD BB22 SDIO/SDXC No SD support
[40] AZ_SDATA_OUT_1 HDA_SDO/I2S0_TXD
was HDA_SDI0_R BA21 0201
[40] AZ_SDATA_IN0 HDA_SDI0/I2S0_RXD
AY21 AB11 C20006
HDA_RST_N_R HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD SDRAM_SOC_ID0 [23]
AW22 AB13 1u 6.3V
HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0 SDRAM_SOC_ID1 [23]
J5 AB12 0402
GPP_D23/I2S_MCLK GPP_G2/SD_DATA1 SDRAM_SOC_ID2 [23]
AY20 W12
I2S1_SFRM GPP_G3/SD_DATA2 SDRAM_SOC_ID3 [23]
AW20 W11
I2S1_TXD GPP_G4/SD_DATA3 SSD_SOC_ID0 [23]
W10
GPP_G5/SD_CD# SSD_SOC_ID1 [23]
AK7 W8
[49] FLASH_PROTECT_N GPP_F1/I2S2_SFRM GPP_G6/SD_CLK CPU_SOC_ID0 [23]
AK6 W7
[25,54] CAM_F_XO_EN GPP_F0/I2S2_SCLK GPP_G7/SD_WP CPU_SOC_ID1 [23]
AK9
AK10 GPP_F2/I2S2_TXD BA9
GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7 PCH_PMI_SLOW [25]
BB9
GPP_A16/SD_1P8_SEL PCH_AUD_1V8_EN [25,62]
H5 AB7 SD_RCOMP
[40,54] DMIC_CLK GPP_D19/DMIC_CLK0 SD_RCOMP
D7
[40,54] DMIC_DATA GPP_D20/DMIC_DATA0
SMD RND 22.8mil MTP20001 D8 AF13 R20017
C8 GPP_D17/DMIC_CLK1 GPP_F23 200
SMD RND 22.8mil MTP20002 GPP_D18/DMIC_DATA1 0201
AW5
SMD RND 22.8mil MTP20003 [27] SAM_UEFI_TOP_SWAP GPP_B14/SPKR
AZ_SDATA_IN0
A R20019 A
HDA_RST_N_R 100K
0201 KBL-R U42
Need to place as close to <$LOCATION>
HDA_SDO_R
SOC pins as possible <MATERIAL>
20. PCH(1)_SD,HDA,RTC, CLK
7 OF 20
REV = 1 Title:
C20011 C20012 C20013 Surface
2p 2p 2p Size Project Name Rev
25V 25V 25V
0201 0201 0201 U SPECIFIC B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
Connected to device.
Default : Clock free run. (PD 10K).
Reserver 10K PU for power saving purpose.
D D
[18] XDP_SPI0_IO2
[18] SPI0_MOSI_XDP
R21007 R21008
1K 1K KBL_R_U42
0201 0201 U10001E
Close to PCH
SPI - FLASH
SMBUS, SMLINK
R21011 15 0201 SPI_CLK_R AV2 1 R7
[37] SPI_CLK SPI_SO_R SPI0_CLK GPP_C0/SMBCLK
R21012 15 0201 AW3 R8
[37] SPI_SO SPI_SI_R SPI0_MISO GPP_C1/SMBDATA
R21013 15 0201 AV3 R10 INT. PD
[37] SPI_SI SPI_WP_IO2_R SPI0_MOSI GPP_C2/SMBALERT#
R21009 15 0201 AW2
[37] SPI_WP_IO2 SPI_HOLD_IO3_R_N SPI0_IO2
R21010 15 0201 AU4 R9
[37] SPI_HOLD_IO3_N SPI0_IO3 GPP_C3/SML0CLK
R21023 15 0201 AU3 W2
[37] SPI_CS0_N SPI0_CS0# GPP_C4/SML0DATA
AU2 W1 INT. PD was SMB0ALERT# SMD RND 22.8mil
SPI0_CS1# GPP_C5/SML0ALERT# GTP21013
AU1 GPP_C5 - LPC boot mode selection - needs to be 0
SPI0_CS2# W3
GPP_C6/SML1CLK V3
SPI_TOUCH GPP_C7/SML1DATA AM7 INT. PD
C GPP_B23/SML1ALERT#/PCHHOT# C
R21014 15 0201 TS_SPI_CLK_R M2
[49] TS_SPI_CLK TS_SPI_MISO_R GPP_D1/SPI1_CLK
R21015 15 0201 M3
[49] TS_SPI_MISO TS_SPI_MOSI_R GPP_D2/SPI1_MISO
R21016 15 0201 J4 R21004 R21031
[49] TS_SPI_MOSI GPP_D3/SPI1_MOSI
V1 10K 100K
V2 GPP_D21/SPI1_IO2 1% 1%
R21019 15 TS_SPI_CS_N_R M1 GPP_D22/SPI1_IO3 AY13 0201 0201
[49] TS_SPI_CS_N 0201 LPC
TPM_LPC0 [38]
GPP_D0/SPI1_CS# GPP_A1/LAD0/ESPI_IO0 BA13
3VSUS_ORG GPP_A2/LAD1/ESPI_IO1 TPM_LPC1 [38]
BB13
C LINK GPP_A3/LAD2/ESPI_IO2 TPM_LPC2 [38]
AY12
GPP_A4/LAD3/ESPI_IO3 TPM_LPC3 [38]
G3 BA12
CL_CLK GPP_A5/LFRAME#/ESPI_CS# TPM_LFRAME [38]
R21029 G2 BA11
CL_DATA GPP_A14/SUS_STAT#/ESPI_RESET# TPM_DEEPSLP_N [38]
10K G1
1% CL_RST# 0201
0201 AW9 CK_24M_EC_R R21020 22
GPP_A9/CLKOUT_LPC0/ESPI_CLK TPM_CLK [38]
AW13 AY9
GPP_A0/RCIN# GPP_A10/CLKOUT_LPC1 AW11
AY11 GPP_A8/CLKRUN#
GPP_A6/SERIRQ
3VSUS_ORG C21002
10p 50V
KBL-R U42
49.9
49.9
49.9
49.9
0201
<$LOCATION>
<MATERIAL> R21021 DNP
5 OF 20 8.2K
Need into improve LPC signals -

B REV = 1 0201 0201 0201 0201 B
0201
R21024
R21027
R21025
R21026
P had in their latest design
TPM_CLKRUN [38]
[38] TPM_SERIRQ
Serial Interrupt Request
LAD0_SKL_TERM
LAD1_SKL_TERM
LAD2_SKL_TERM
LAD3_SKL_TERM
GPP_C2/SMBALERT#
0 Default Disable ME crypto TLS
25V
25V
25V
25V
56p
56p
56p
56p
1 Enable ME crypto TLS
C21003
C21006
C21004
C21005
Needs to be left open or low for booting
0201 0201 0201 0201
A A
21. PCH(2)_CLK,SMB,LPC, SPI

Title:
Surface
5 4 3 2 1
Vinafix.com
5 4 3 2 1
C22002
D 100p V3P3_DSW D
0201 C22007
180p C22004 C22005 C22006
SMD RND 22.8mil 25V 0.01u 100p 150p
MTTP22011 10V 25V 25V
3VSUS_ORG 0201
R22043 0201 0201 0201
3VSUS_ORG 10K
C22001 0.1u 0201
6.3V U22001 DNP SMD RND 22.8mil
MTTP22003
0201 SN74AUP1G08DRYR R22006 C22003
MTTP22014 10K R22025
V3P3_VCCDSW
6 VCC A 1 0201 470p 49.9K
3VSUS_ORG
SMD RND 22.8mil 5 NC B 2 0201 0201
4 Y 3 U10001K KBL_R_U42
[27,34,38,43,44,56] PLT_RST_BUF_N GND
SYSTEM POWER MANAGEMENT
R22001 AT11 R22033
GPP_B12/SLP_S0# SKL_SLP_S0_N [27,31,34,38,59,61]
49.9K AP15 0 0201 R22034
AN10 GPD4/SLP_S3# BA16 SKL_SLP_S3_N [34,59,61]
0201 R22035 33 0201
V1P00A PCH_SYS_RST_N GPP_B13/PLTRST# GPD5/SLP_S4# SKL_SLP_S4_N [27,34,45,59,61]
MTTP22010 B5 AY16 22 0201
SYS_RESET# GPD10/SLP_S5#
0201
10K
PM_RSMRST_R AY17
SMD RND 22.8mil SMD RND 22.8mil RSMRST# AN15 R22036 R22027
SLP_SUS# SKL_SLP_SUS_N [27,34,58,59]
R22004
R22029 1K MTTP22004 PROCPWRGD A68 AW15 33 0201 100K
R22005 60.4 0201 VCCST_PWRGD_R B65 PROCPWRGD SLP_LAN# BB17 0201
[34,59] SKL_VCCST_PWRGD VCCST_PWRGD GPD9/SLP_WLAN# AN16
SYS_PWROK_R B6 GPD6/SLP_A#
0402
U22002 3P3VA BA20 SYS_PWROK BA15
PCH_PWROK GPD3/PWRBTN# AC_PRESENT_R PCH_PWRBTN_N [34,59]
SN74AUP1G08DRYR BB20 AY15
C 0.1u C22012 DSW_PWROK GPD1/ACPRESENT AU13 BATLOW_R_N C
PCH_DPWROK 1 GPD0/BATLOW#
A VCC 6 6.3V AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
2 VCC_RTC
B NC 5 0201 AP11
GPP_A15/SUSACK#
SMD RND 22.8mil
3 PME_N
Y 4
GND AU11 MTTP22008 0201
WAKE_N BB15 GPP_A11/PME# AP16 INTRUDER_N R22008 1M
AM15 WAKE# INTRUDER#
R22009DNP 49.9 AW17 GPD2/LAN_WAKE# AM10
[18,29,56] SAM_PCH_RSMRST_N GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE# VRALERT_R_N
AT15 AM11
V3P3_DSW R22020 DNP GPD7/RSVD GPP_B2/VRALERT#
0201
0201 0 R22010
R22024 0201 V3P3_DSW 10K
10K V3P3_VCCDSW KBL-R U42 0201
<$LOCATION>
<MATERIAL>
R22013 100 R22011 20K 11 OF 20 R22012
[34,59] SKL_SYS_PWROK
REV = 1 10K
0201 R22014 100K 0201 0201
0201 DNP for VR hot indicator (may not be used)
[22] PM_PCH_PWROK
V3P3_DSW V3P3_DSW
R22022 DNP
R22026 10K 0201 100K
0201 DNP
R22037
[27,34,56,59] PCH_DPWROK
10K
V3P3_VCCDSW 0201
R22021
B B
R22044 10K
0201 R22038
56p 0201 100
25V [34,59] SKL_PCH_PWROK PM_PCH_PWROK [22]
C22009
V3P3_DSW 2200p 25V
0201
If SUSWARN #/SUS_ACK # handshake

D22002
is not used, these signals are tied on the board R22040
SUSWARN_N R22018 22 SUSACK_N 0201 100 K A
[66] VRM_PWRGD
0201
RB520CS3002L
V3P3_VCCDSW
R22031 100K R22041
0201 100 0201
VRM_PWR_EN [29,66]
R22019
D22003
10K
0201 K A
R22042 RB520CS3002L
A 0201 100 C22010 C22011 A
[29,34,59] PMIC_SAM_ALL_SYS_PWRGD
2200p 25V C22008 6.3V
0201 2200p 25V 0.1u
0201 0201
DNP
22. PCH(3)_SYS PWR CONTR

Title:
Engineer:
U SPECIFIC A3 A 1.0.0.1
5 4 3 2 1
TBL2301 PCBA vendor and revision

TBL2301B
R23016, R28013 LOAD FOR DEBUG, ELSE NO-STUFF R23010, R23020, R23024 Revision EV2P5
V3P3_DSW
R23023, R28024 LOAD FOR RETAIL, ELSE NO-STUFF R23005, R23013, R23017, R28051, R28052, R28053 NO-STUFF FOR REVISION
R23005, R23020, R23024, R28051 Revision EV2P51

TBL1601 TBL1601 TBL1601
R23010, R23013, R23017, R28052, R28053 NO-STUFF FOR REVISION R23051 TBL1601 R23055 R23057
TBL2301A 10K R23053 10K 10K
R23010, R23013, R23024, R28052 Revision DV 0201 10K 0201 0201
D R23015, R28014 NEW BOARDID SYSTEM, ELSE NO-STUFF 0201 D
R23005, R23020, R23017, R28051, R28053 NO-STUFF FOR REVISION
R23022, R28025 OLD BOARDID SYSTEM, ELSE NO-STUFF [20] SDRAM_SOC_ID0
R23005, R23013, R23024, R28051, R28052 Revision DV1.01 [20] SDRAM_SOC_ID1
[20] SDRAM_SOC_ID2
R23010, R23020, R23017, R28053 NO-STUFF FOR REVISION [20] SDRAM_SOC_ID3
R23010, R23020, R23017, R28053 Revision DV1.1, DV1.2, PV
R23005, R23013, R23024, R28051, R28052 NO-STUFF FOR REVISION

See TBL1601 TBL1601 TBL1601 TBL1601 TBL1601
TBL_SSD_2302 R23050 R23052 R23054 R23056
R23005, R23020, R23017, R28051, R28053 Lacey EV1 10K 10K 10K 10K
0201 0201 0201 0201
R23010, R23013, R23024, R28052 NO-STUFF FOR REVISION
R23010, R23013, R23017, R28052, R28053 Reserved
R23005, R23020, R23024, R28051 NO-STUFF FOR REVISION
R23005, R23013, R23017, R28051, R28052, R28053 Reserved

V3P3_DSW V1P8A V3P3_DSW
TBL2304 R23010, R23020, R23024 NO-STUFF FOR REVISION
TBL1001 TBL1001 TBL1001 SSD SSD

R23041 R23043 R23045 R23031 R23033
10K 10K 10K 10K 10K
0201 0201 0201 0201 0201
C C
[20] CPU_SOC_ID0 [20] SSD_SOC_ID0

TBL1601 [20] CPU_SOC_ID1 [20] SSD_SOC_ID1
[23] CPU_SOC_ID2
TBL1001 TBL1001 TBL1001 SSD SSD

R23040 R23042 R23044 R23030 R23032
10K 10K 10K 10K 10K
See TBL1001 0201 0201 0201 0201 0201
V1P8A
C23001
10u
6.3V TBL2303 TBL2304 TBL2304 TBL2301
0402 R23001 R23002 R23003 R23004 R23005
10K 10K 10K 10K 10K
MISC_SOC_ID bits are "RESERVED" in PM 0201 0201 0201 0201 0201
PWRMON_ID0 bit is noted in "DEBUG_OSG" in PM
B MISC_SOC_ID0 B
PWRMON_ID0
U10001I KBL_R_U42 GP_SOC_ID0
GP_SOC_ID1
CSI-2 PCBA_SOC_ID0
A36 C37 TBL2303 DNP TBL2304 TBL2304 TBL2301

B36 CSI2_DN0 CSI2_CLKN0 D37 R23006 R23007 R23008 R23009 R23010
C38 CSI2_DP0 CSI2_CLKP0 C32 10K 10K 10K 10K 10K
CSI2_DN1 CSI2_CLKN1 CSI2_CLK1_FCAM_DN [54]
D38 D32 0201 0201 0201 0201 0201 POWER MONITORS
CSI2_DP1 CSI2_CLKP1 CSI2_CLK1_FCAM_DP [54]
C36 C29
D36 CSI2_DN2 CSI2_CLKN2 D29 CSI2_CLK2_IRCAM_DN [54] R23007 POWER MONITORS, ELSE NO-STUFF
CSI2_DP2 CSI2_CLKP2 CSI2_CLK2_IRCAM_DP [54]
A38 B26
B38 CSI2_DN3 CSI2_CLKN3 A26 R23011 R23002 NO POWER MONITORS, ELSE NO-STUFF
CSI2_DP3 CSI2_CLKP3 100 0201
C31 E13 CSI2_COMP DV HAS NO POWER MONITORS
[54] CSI2_FCAM4_DN CSI2_DN4 CSI2_COMP V1P8A
D31 B7
[54] CSI2_FCAM4_DP CSI2_DP4 GPP_D4/FLASHTRIG
C33
D33 CSI2_DN5
A31 CSI2_DP5 EMMC
B31 CSI2_DN6 AP2 MISC_SOC_ID0 TBL2301 TBL2301B TBL2301A
A33 CSI2_DP6 GPP_F13/EMMC_DATA0 AP1 PWRMON_ID0 R23013 TBL2301 R23016 R23015
B33 CSI2_DN7 GPP_F14/EMMC_DATA1 AP3 GP_SOC_ID0 10K R23017 10K 10K
CSI2_DP7 GPP_F15/EMMC_DATA2 AN3 GP_SOC_ID1 0201 10K 0201 0201
A29 GPP_F16/EMMC_DATA3 AN1 PCBA_SOC_ID0 0201
[54] CSI2_IRCAM8_DN CSI2_DN8 GPP_F17/EMMC_DATA4 PCBA_SOC_ID1 PCBA_SOC_ID1
B29 AN2
[54] CSI2_IRCAM8_DP CSI2_DP8 GPP_F18/EMMC_DATA5 PCBA_SOC_ID2 PCBA_SOC_ID2
C28 AM4
D28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM1 DEBUG_RETAIL_SOC_ID DEBUG_RETAIL_SOC_ID
A27 CSI2_DP9 GPP_F20/EMMC_DATA7
A CSI2_DN10 A
B27 AM2 NEW_SOC_ID NEW_SOC_ID
C27 CSI2_DP10 GPP_F21/EMMC_RCLK AM3
CSI2_DN11 GPP_F22/EMMC_CLK CPU_SOC_ID2 [23]
D27 AP4
CSI2_DP11 GPP_F12/EMMC_CMD
AT1 EMMC_RCOMP_R TBL2301 TBL2301 TBL2301B TBL2301A
EMMC_RCOMP R23020 R23024 R23023 R23022
R23018 10K 10K 10K 10K
KBL-R U42
<$LOCATION>
200 0201 0201 0201 0201 Title: 23. PCH(4)_CCI, HWID
<MATERIAL> 0201
9 OF 20 1% Engineer:
REV = 1 Size Project Name Rev
5 4 3 2 1
U10001H KBL_R_U42
SSIC / USB3
PCIE/USB3/SATA
D H8 D
USB3_1_RXN USB3_TYPEA_RX_DN [45]
G8
H13 USB3_1_RXP C13 USB3_TYPEA_RX_DP [45]
PCIE1_RXN/USB3_5_RXN USB3_1_TXN USB3_TYPEA_TX_DN [45] USB Type A
G13 D13
B17 PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB3_TYPEA_TX_DP [45]
A17 PCIE1_TXN/USB3_5_TXN J6
PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_RXN USB3_SL_RX_DN [47]
H6
USB3_2_RXP/SSIC_RXP USB3_SL_RX_DP [47]
G11 B13 USB3 SL1
PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_TXN USB3_SL_TX_DN [47]
F11 A13
D16 PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_TXP USB3_SL_TX_DP [47]
C16 PCIE2_TXN/USB3_6_TXN J10
PCIE2_TXP/USB3_6_TXP USB3_3_RXN H10
H16 USB3_3_RXP B15
G16 PCIE3_RXN USB3_3_TXN A15
D17 PCIE3_RXP USB3_3_TXP
C17 PCIE3_TXN E10
PCIE3_TXP USB3_4_RXN F10
G15 USB3_4_RXP C15 C24031 C24032
F15 PCIE4_RXN USB3_4_TXN D15
PCIE4_RXP USB3_4_TXP 10p 10p
B19
A19 PCIE4_TXN AB9 0201 0201
PCIE4_TXP USB2N_1 USB2_TYPEA_DN [45]
AB10 USB Type A
F16 USB2P_1 USB2_TYPEA_DP [45]
E16 PCIE5_RXN AD6
PCIE5_RXP USB2N_2 USB2_SL_DN [47]
C19 AD7 USB2 SL1
PCIE5_TXN USB2P_2 USB2_SL_DP [47]
D19
PCIE5_TXP AH3
G18 USB2N_3 AJ3
F18 PCIE6_RXN USB2P_3
C D20 PCIE6_RXP AD9 C
C20 PCIE6_TXN USB2N_4 AD10
PCIE6_TXP USB2P_4
F20 AJ1
[43] PCIE_SSD_RX7_DN PCIE7_RXN/SATA0_RXN USB2N_5 USB2_BT_DN [50]
E20 AJ2 BT
[43] PCIE_SSD_RX7_DP B21 PCIE7_RXP/SATA0_RXP USB2P_5 USB2_BT_DP [50]
C24003 0.22u USB2
[43] PCIE_SSD_TX7_DN PCIE7_TXN/SATA0_TXN
PCIE SSD1 SSD 0201 6.3V SSD 0.22u A21 AF6
[43] PCIE_SSD_TX7_DP PCIE7_TXP/SATA0_TXP USB2N_6
C24004 0201 6.3V AF7
G21 USB2P_6
[43] PCIE_SSD_RX8_DN F21 PCIE8_RXN/SATA1A_RXN AH1
[43] PCIE_SSD_RX8_DP PCIE8_RXP/SATA1A_RXP USB2N_7
C24005 0.22u D21 AH2
[43] PCIE_SSD_TX8_DN PCIE8_TXN/SATA1A_TXN USB2P_7
SSD 0201 6.3V SSD 0.22u C21
[43] PCIE_SSD_TX8_DP PCIE8_TXP/SATA1A_TXP AF8
C24006 0201 6.3V
E22 USB2N_8 AF9
[50] PCIE_WIFI_RX9_DN PCIE9_RXN USB2P_8
E23
[50] PCIE_WIFI_RX9_DP PCIE9_RXP
PCIE WIFI C24007 0.1u 6.3V 0201 B23 AG1
[50] PCIE_WIFI_TX9_DN A23 PCIE9_TXN USB2N_9 AG2
C24008 0.1u
[50] PCIE_WIFI_TX9_DP PCIE9_TXP USB2P_9
0201 6.3V
F25 AH7 3VSUS_ORG
3VSUS_ORG E25 PCIE10_RXN USB2N_10 AH8
D23 PCIE10_RXP USB2P_10
PCIE10_TXN 0201 USB_CONN_OC_N [45]
C23 AB6 USB2_COMP 0201 R24004 113 R24005 10K
PCIE10_TXP USB2_COMP AG3
PCIE_RCOMPN F5 USB2_ID AG4 0201 C24030 10p
E5 PCIE_RCOMP_N USB2_VBUSSENSE GND
R24009 R24006 100 PCIE_RCOMPP
10K 0201 PCIE_RCOMP_P A9
1% D56 GPP_E9/USB2_OC0# C9
[18] XDP_PRDY_N D61 PROC_PRDY# GPP_E10/USB2_OC1# D9
0201
[18] XDP_PREQ_N PIRQA_N BB11 PROC_PREQ# GPP_E11/USB2_OC2# B9
B GPP_A7/PIRQA# GPP_E12/USB2_OC3# B
E28 J1
[44] PCIE_SSD2_RX11_DN E27 PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 J2
[44] PCIE_SSD2_RX11_DP D24 PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1 J3
PCIE SSD2 0.22u 0201 6.3V
[44] PCIE_SSD2_TX11_DN PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2
C24020 SSD 0.22u 0201 6.3V C24
[44] PCIE_SSD2_TX11_DP PCIE11_TXP/SATA1B_TXP
SSD C24021 E30 H2
[44] PCIE_SSD2_RX12_DN PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0
F30 H3
[44] PCIE_SSD2_RX12_DP PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1
0.22u 0201 6.3V A25 G4
[44] PCIE_SSD2_TX12_DN PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2
C24022 SSD 0.22u 0201 6.3V B25
[44] PCIE_SSD2_TX12_DP PCIE12_TXP/SATA2_TXP
SSD C24023 H1
GPP_E8/SATALED#
KBL-R U42
<$LOCATION>
<MATERIAL>
8 OF 20
REV = 1
SSD2_SATA_PCIE_DET_N [44]
A A
Title: 24. PCH(5)_PCIE,USB

Engineer:
5 4 3 2 1
3VSUS_ORG MTP25001
3P3V_SSD 3P3V_SSD SMD RND 22.8mil
[25,29] SAM_PCH_INT0
R25059 R25060 R25055 R25056
100K 100K R25050 R25051 100K 100K U10001F KBL_R_U42
0201 0201 100K 100K 0201 0201
LPSS ISH
DNP DNP 0201 0201
No reboot strap SSD SSD
Low: Disable (Default) AN8 P2
TPANEL_RST_N [49]
High:Enable AP7 GPP_B15/GSPI0_CS# GPP_D9 P3
[25,27] SL_CONN PCH_TPANEL_PWR_EN [25,62,64]
DNP AP8 GPP_B16/GSPI0_CLK GPP_D10 P4
[45] 5V_USB_EN SKL_NO_REBOOT
D
3VSUS_ORG R25001 1K INT. PD AR7 GPP_B17/GSPI0_MISO GPP_D11 P1 R25071 0 D
GPP_B18/GSPI0_MOSI GPP_D12 CAM_F_XO_EN [20,25,54]
0201 DNP 0201
0201 AM5 M4 CAM_F_PWR_DN_N_R R25003 330
GPP_B19/GSPI1_CS# GPP_D5/ISH_I2C0_SDA CAM_F_PWR_DN_N [25,54]
AN7 N3
[48] KPTP_FAULT_N GPP_B20/GSPI1_CLK GPP_D6/ISH_I2C0_SCL
AP5 GTP25024
[25,27] SAM_PCH_INT1 GPP_B21/GSPI1_MISO
INT. PD AN5 N1
GPP_B22/GSPI1_MOSI GPP_D7/ISH_I2C1_SDA CAM_IR_XO_EN [25,54]
N2 R25054 1K
GPP_D8/ISH_I2C1_SCL CAM_IR_PWR_DN_N [25,54]
R25078 0 0201 AB1 0201
[27,31] SAM_PCH_UART_TX GPP_C8/UART0_RXD
R25077 0 AB2 AD11
[27,31] SAM_PCH_UART_RX GPP_C9/UART0_TXD GPP_F10/I2C5_SDA/ISH_I2C2_SDA
0201 W4 AD12 MTP25016
[32] BOOT_TO_USB GPP_C10/UART0_RTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
AB3 SMD RND 22.8mil
[32] BOOT_TO_UEFI GPP_C11/UART0_CTS#
SSD 0 R25083 0201 AD1 U1
[43] PCH_SSD_UART2_RXD GPP_C20/UART2_RXD GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
SSD 0 R25084 0201 AD2 U2
[43] PCH_SSD_UART2_TXD GPP_C21/UART2_TXD GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
AD3 U3
[25,64] PCH_AUD_5V_EN GPP_C22/UART2_RTS# GPP_D15/ISH_UART0_RTS# TCON_BRD_REV [25,55]
AD4 U4
[25,27] SAM_PCH_T1_PWRBTN_N GPP_C23/UART2_CTS# GPP_D16/ISH_UART0_CTS#/SML0BALERT# TCON_VENDOR_ID [25,55]
AC1
GPP_C12/UART1_RXD/ISH_UART1_RXD PCH_UART1_RXD [31,33]
Pull up resistors, pg 48 U7 AC2
[31,48] I2C_SDA_TP GPP_C16/I2C0_SDA GPP_C13/UART1_TXD/ISH_UART1_TXD PCH_UART1_TXD [31,33]
U6 AC3
[31,48] I2C_SCL_TP GPP_C17/I2C0_SCL GPP_C14/UART1_RTS#/ISH_UART1_RTS# AB4
GPP_C15/UART1_CTS#/ISH_UART1_CTS# PCIE_WIFI_WAKE_N [50]
U8
U9 GPP_C18/I2C1_SDA AY8
GPP_C19/I2C1_SCL GPP_A18/ISH_GP0 WLAN_PWD_N [25,50]
BA8
C
I2C_SDA_CAM_R GPP_A19/ISH_GP1 ALS_IRQ_N [54] C
R25007 49.9 0201 AH9 BB7
[54] I2C_SDA_CAM I2C_SCL_CAM_R GPP_F4/I2C2_SDA GPP_A20/ISH_GP2 PCIE_WIFI_DISABLE_N [50]
R25008 49.9 0201 AH10 BA7
[54] I2C_SCL_CAM GPP_F5/I2C2_SCL GPP_A21/ISH_GP3 PCIE_WIFI_PERST_N [50]
AY7 R25004 330
GPP_A22/ISH_GP4 CAM_LED_F_EN [25,54]
0201 R25085 0 DNP AH11 AW7 0201
[72] I2C_SDA_BKLT GPP_F6/I2C3_SDA GPP_A23/ISH_GP5 WWAN_PWREN [25,65]
0201 R25086 0 DNP AH12 AP13 R25011 33
[72] I2C_SCL_BKLT GPP_F7/I2C3_SCL GPP_A12/BM_BUSY#/ISH_GP6 PCIE_SSD_PERST_N [43,44]
0201
0201
0201
AF11 MTP25030
GPP_F8/I2C4_SDA
2K
GTP25030 2K AF12 R25057 R25052 R25053 SMD RND 22.8mil

GPP_F9/I2C4_SCL
2K
2K
SMD RND 22.8mil 49.9K 100K 100K
GTP25031 0201 0201 0201
SMD RND 22.8mil 0201 0201
KBL-R U42
R25074
R25075
C25001 3VSUS_ORG
<$LOCATION>
R25014
R25015
3VSUS_ORG 0201
<MATERIAL>
6 OF 20 68p
[54] I2C_SDA_ALS
REV = 1 R25090 49.9K 50V
SAM_PCH_T1_PWRBTN_N [25,27]
0201
MTP25003
[54] I2C_SCL_ALS
1P8VSUS_ORG 1P8VSUS_ORG R25068 49.9K SMD RND 22.8mil
CAM_F_XO_EN [20,25,54]
0201
R25069 49.9K
CAM_IR_XO_EN [25,54]
GTP25034 0201
SMD RND 22.8mil R25062 49.9K
CAM_F_PWR_DN_N [25,54]
GTP25035 0201 BBS_BIT0,BBS_BIT1 : Boot BIOS Strap
B SMD RND 22.8mil R25061 49.9K B
CAM_IR_PWR_DN_N [25,54]
GTP25033 0201
SMD RND 22.8mil Boot BIOS Strap
GTP25032
SMD RND 22.8mil R25019 49.9K
WWAN_PWREN [25,65]
0201 BBS_BIT0 Boot BIOS Location
R25020 49.9K
PCH_AUD_1V8_EN [20,62]
0201 1 LPC - Not to use
R25048 49.9K R25024 49.9K 0 SPI (PCH)
SAM_PCH_INT1 [25,27] PCH_TPANEL_PWR_EN [25,62,64]
0201 0201
R25046 49.9K Sampled on rising edge of PWROK.

PCH_PMI_SLOW [20]
MTP25002 0201
SMD RND 22.8mil
SAM_PCH_INT0 [25,29] 1P8VSUS_ORG R25065 49.9K

CAM_LED_F_EN [25,54]
0201 BBS_BIT0 has internal SoC PD resistor
R25035 49.9K
0201 R25036 0201 49.9K R25070 49.9K Want to ensure BIOS strap is for SPI boot mode - IPD
TCON_BRD_REV [25,55] SL_CONN [25,27]
R25037 0201 49.9K 0201
TCON_VENDOR_ID [25,55]
A R25038 49.9K A
WLAN_PWD_N [25,50]
0201
R25049 49.9K
0201
PCH_AUD_5V_EN [25,64] Title: 25. PCH(6)_CPU,GPIO,MISC
Surface
5 4 3 2 1
Vinafix.com
5 4 3 2 1
V0P85A
V1P00A Put this logic at near SOC VCCPRIM. 3VSUS_ORG

R26010
0 for B, C E port
0201
DNP V0P85A DNP DNP
C26001 V0P85A_VR_FB_R [59] C26002 C26003 C26004
2.57A
1u 6.3V C26036 C26037 C26038 1u 6.3V 1u 6.3V 1u 6.3V
0402
0402 0402 0402
D C26033 C26056 22u 22u 22u D
22u 6.3V C26005 0603 0603 0603
0603 1u 6.3V 2p 6.3V 6.3V 6.3V
0402 25V 1P8VSUS_ORG
0201
C26044
V1P00A
R26008 KBL_R_U42 3VSUS_ORG
2p U10001O
C26006 25V
CPU POWER 4 OF 4
0 0603 1u 6.3V 0201
C26023 C26007 0402 AB19
22u 1u 6.3V AB20 VCCPRIM_1P0_AB19 AK15 C26047 C26048 C26008
6.3V 0402 P18 VCCPRIM_1P0_AB20 VCCPGPPA AG15 1u 6.3V
0603 C26045 VCCPRIM_1P0_P18 VCCPGPPB Y16 2p 2p 0402
AF18 VCCPGPPC Y15 25V 25V
2p AF19 VCCPRIM_CORE_AF18 VCCPGPPD T16 0201 0201
25V V20 VCCPRIM_CORE_AF19 VCCPGPPE AF16
R26009 VCCPRIM_CORE_V20 VCCPGPPF
0201 V21 AD15
VCCPRIM_CORE_V21 VCCPGPPG
0 0603 DCPDSW_1P0 AL1 V19
DCPDSW_1P0 VCCPRIM_3P3_V19 V1P00A
C26024 C26010 C26009 K17 T1 1P8VSUS_ORG
22u 1u 6.3V 1u 6.3V L1 VCCMPHYAON_1P0_K17 VCCPRIM_1P0_T1
6.3V 0402 0402 VCCMPHYAON_1P0_L1 AA1
0603 N15 VCCATS_1P8
VCCPLL(VCCSFR)=0.12A VCCMPHYGT_1P0_N15 3VSUS_ORG
N16 AK17 C26049 C26011
V1P00A N17 VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3 1u 6.3V
L26003 VCCMPHYGT_1P0 P15 VCCMPHYGT_1P0_N17 AK19 2p 0402
C 2p C26054 P16 VCCMPHYGT_1P0_P15 VCCRTC_AK19 BB14 25V C
25V 0201 VCCMPHYGT_1P0_P16 VCCRTC_BB14 C26012 C26013 0201
75OHM VCCAMPHYPLL_1P0 K15 BB10 DCPRTC 1u6.3V 0.1u 25V VCC_RTC
0402 VCCAMPHYPLL_1P0 DCPRTC
C26039 2p C26053 L15 0402 0402
C26025 C26022 25V 0201 VCCAMPHYPLL_1P0 A14 C26014
2p 2.2u 6.3V 2p 25V VCCAPLL_1P0 V15 VCCCLK1 0.1u 25V
25V 0603 0201 2p C26055 VCCAPLL_1P0 K19 VCCCLK2_R 0402 C26015 C26016
0201 25V 0201 AB17 VCCCLK2 0.1u 25V 1u 6.3V
3VSUS_ORG Y18 VCCPRIM_1P0_AB17 L21 0402 0402
VCCPRIM_1P0_Y18 VCCCLK3
L26008 DNP AD17 N20 VCCCLK4_R
75OHM AD18 VCCDSW_3P3_AD17 VCCCLK4
3VSUS_ORG 1P8VSUS_ORG V3P3_VCCDSW 0402 AJ17 VCCDSW_3P3_AD18 L19 VCCCLK5_R V1P00A
C26040 VCCDSW_3P3_AJ17 VCCCLK5
25V L26009 75OHM C26043 C26042 AJ19 A10
0402 VCCHDA VCCCLK6
2p 1u 6.3V 2p 25V
1P8VSUS_ORG_L AJ16 AN11 L26005
0201 L26004 0402 0201
75OHM VCCSPI GPP_B0/CORE_VID0 AN13
0402 GPP_B1/CORE_VID1
AF20
AF21 VCCSRAM_1P0_AF20 2.2uH MHz
C26041 C26057 T19 VCCSRAM_1P0_AF21 C26026 0603
25V 25V VCCSRAM_1P0 T20 VCCSRAM_1P0_T19 C26052 22u 6.3V
2p 2p C26017 C26021 VCCSRAM_1P0_T20 2p 25V
V1P00A 0201 0201 1u 6.3V 2p 25V AJ21 0201
3VSUS_ORG VCCPRIM_3P3_AJ21 0603
0402 0201 GTP26005
L26006
R26001 AK20
0 0402 VCCPRIM_1P0_AK20
VCCAPLLEBB N18 GTP26006
C26018 C26059 C26060 VCCAPLLEBB
B
1u 6.3V 1u 6.3V 1u 6.3V C26027 0 B
0402 0402 0402 C26051 22u 6.3V
V1P00A KBL-R U42 2p 25V
<$LOCATION> 0603
C26046 <MATERIAL> 0201
VCCCLK5_R
15 OF 20 L26007
2p REV = 1
25V
V1P00A R26002 V1P8A
0201
0 0402 1P8VSUS_ORG C26028 0

R26003
C26050 47u 6.3V
C26019 2p 25V
1u 6.3V 0 0603 0201
0603
0402
C26058 C26029
V3P3_VCCDSW V0P85A 1u 6.3V 22u 6.3V C26020
0402 0603 1u 6.3V
0402
C26030 C26034
C26061 22u 6.3V C26035
0603 10u V3P3_DSW
2p 22u 6.3V
25V 0603 0402 3VSUS_ORG
R26004
0201 6.3V
V1P00A 0 0603
2pF caps need to be place as close to C26032

C26031 47u 6.3V
A SOC pins as possible 22u 6.3V 0805
A
0603
Title: 26. PCH(7)_POWER

Engineer:
5 4 3 2 1
MTP27001
U27001A
D MK22FN512VDC12 D
PORT A Use last, NMI
J8
PTA4/NMI_b/EZP_CS_b/LLWU_P3/FTM0_CH1 J9
FTM2_CH0/PTA10/FTM2_QD_PHA J4 CPUFAN_PWM [39]
PTA11/FTM2_CH1/FTM2_QD_PHB K8 SAM_PANEL_LOGO_EN [30]
PTA12/FTM1_CH0/I2S0_TXD0/FTM1_QD_PHA SAM_SL_5V_PG [63]
L8
PTA13/LLWU_P4/FTM1_CH1/I2S0_TX_FS/FTM1_QD_PHB MASTER_THERMTRIP_N [56]
K9
PTA14/SPI0_PCS0/UART0_TX/I2S0_RX_BCLK L9 SAM_PCH_UART_TX [25,31] DEBUG_LED0 [29]
PTA15/SPI0_SCK/UART0_RX/I2S0_RXD0 SAM_PCH_UART_RX [25,31]
J10
PTA16/SPI0_SOUT/UART0_CTS_b/I2S0_RX_FS SKL_SLP_S4_N [22,34,45,59,61]
H10
PTA17/ADC1_SE17/SPI0_SIN/UART0_RTS_b/I2S0_MCLK SAM_PCH_HALL_INT [10]
H11
PTA29/FB_A24 SAM_KBTP_PWR [48]
MTP27003
MK22FN512VDC12 MTTP27013
U27001B MTP27002
PORT B G11 MTTP27012
PTB0/I2C0_SCL/ADC0_SE8/ADC1_SE8/LLWU_P5/FTM1_CH0/FTM1_QD_PHA G10 DEBUG_LED1 CPUFAN_TACH [39]
PTB1/I2C0_SDA/ADC0_SE9/ADC1_SE9/FTM1_CH1/FTM1_QD_PHB G9
PTB2/ADC0_SE12/I2C0_SCL/UART0_RTS_b/FTM0_FLT3 SKL_SLP_S0_N [22,31,34,38,59,61]
G8
PTB3/ADC0_SE13/I2C0_SDA/UART0_CTS_b/FTM0_FLT0 PCH_DPWROK [22,34,56,59]
F11
PTB6/ADC1_SE12/FB_AD23 E11 SAM_SL_5V_EN [63,69]
C PTB7/ADC1_SE13/FB_AD22 3P3V_SSD_EN_R [29] C
D11
PTB8/LPUART0_RTS_b/FB_AD21 E10 SAM_KIP_RST [31,48]
PTB9/SPI1_PCS1/LPUART0_CTS_b/FB_AD20 TRACKPAD_INT_N [10,48]
D10
PTB10/ADC1_SE14/SPI1_PCS0/LPUART0_RX/FB_AD19/FTM0_FLT1 C10 SAM_GP_DEEPSLP [56]
PTB11/ADC1_SE15/SPI1_SCK/LPUART0_TX/FB_AD18/FTM0_FLT2 SL_CONN [25] R27100
499K
B10
PTB16/SPI1_SOUT/UART0_RX/FTM_CLKIN0/FB_AD17/EWM_IN E9 SAM_TEST_B10 [34]
PTB17/SPI1_SIN/UART0_TX/FTM_CLKIN1/FB_AD16/EWM_OUT_b D9 SAM_SSD_FLUSH [43]
PTB18/FTM2_CH0/I2S0_TX_BCLK/FB_AD15/FTM2_QD_PHA SKL_SLP_SUS_N [22,34,58,59]
C9
PTB19/FTM2_CH1/I2S0_TX_FS/FB_OE_b/FTM2_QD_PHB BATGONE [63,70]
F10
PTB20/FB_AD31/CMP0_OUT F9 SAM_DISPLAY_BKLT_EN [30]
PTB21/FB_AD30/CMP1_OUT F8 SAM_PCH_T1_PWRBTN_N [25] 3P3VA_SW
PTB22/FB_AD29 E8 SAM_UEFI_TOP_SWAP [20]
PTB23/SPI0_PCS5/FB_AD28 SAM_PCH_RSV1 [10]
MK22FN512VDC12
R27036 R27037
2.2K 2.2K
U27001C
1% 1%
PORT C 0201 0201
B9
PTC0/ADC0_SE14/SPI0_PCS4/PDB0_EXTRG/FB_AD14/USB_SOF_OUT D8 PMIC_EN_R [29]
PTC1/FTM0_CH0/ADC0_SE15/LLWU_P6/SPI0_PCS3/UART1_RTS_b/FB_AD13/I2S0_TXD0/LPUART0_RTS_b C8 KIP_IO [29,31,48]
B PLT_RST_BUF_N [22,34,38,43,44,56] B
PTC2/ADC0_SE4b/CMP1_IN0/SPI0_PCS2/UART1_CTS_b/FTM0_CH1/FB_AD12/I2S0_TX_FS/LPUART0_CTS_b B8
PTC3/CMP1_IN1/LLWU_P7/SPI0_PCS1/UART1_RX/FTM0_CH2/CLKOUT/I2S0_TX_BCLK/LPUART0_RX SL_PG [56,69]
A8 R27046 DEBUG_SL 2K 0402
PTC4/LLWU_P8/SPI0_PCS0/UART1_TX/FTM0_CH3/FB_AD11/CMP1_OUT/LPUART0_TX D7 DEBUG_MUX_S3 [31]
PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/FB_AD10/CMP0_OUT/FTM0_CH2 GP_SAM_COLD_BOOT [56]
C7
PTC6/CMP0_IN0/LLWU_P10/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/FB_AD9/I2S0_MCLK B7 RTCRST_CTRL_R [29]
PTC7/CMP0_IN1/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS/FB_AD8 A7 SAM_PCH_RSMRST_N_R [29]
PTC8/ADC1_SE4b/CMP0_IN2/FTM3_CH4/I2S0_MCLK/FB_AD7 D6 R27047 DEBUG_SL 2K 0402 VCCRTC_RST [56]
PTC9/ADC1_SE5b/CMP0_IN3/FTM3_CH5/I2S0_RX_BCLK/FB_AD6/FTM2_FLT0 C6 DEBUG_MUX_S2 [31]
PTC10/ADC1_SE6b/I2C1_SCL/FTM3_CH6/I2S0_RX_FS/FB_AD5 I2C_ROP_SCL [31,63,70]
C5 I2C_ROP_SDA [31,63,70]
PTC11,ADC1_SE7b/LLWU_P11/I2C1_SDA/FTM3_CH7/FB_RW_b B6
PTC12/FB_AD27/FTM3_FLT0 A6 SB_PWRBTN_SR [29]
PTC13/FB_AD26 A5 SAM_PCH_INT1 [25]
PTC14/FB_AD25 B5 SL_UART_SEL_N [69]
PTC15/FB_AD24 D5 BRDID_ADC_RD_EN [28,29] PU Resistors are on PCH side
PTC16/LPUART0_RX/FB_CS5_b/FB_TSIZ1/FB_BE23_16_BLS15_8_b SAM_THERM1 [39]
C4
PTC17/LPUART0_TX/FB_CS4_b/FB_TSIZ0/FB_BE31_24_BLS7_0_b B4 SL_ADC_RD_EN [69] SKL_RTCRST_N [20]
PTC18/LPUART0_RTS_b/FB_TBST_b/FB_CS2_b/FB_BE15_8_BLS23_16_b A4 SL_3P3V_DIS [46]
PTC19/LPUART0_CTS_b/FB_CS3_b/FB_BE7_0_BLS31_24_b/FB_TA_b SSD_FLUSH_DONE [43,56]
D
Q27001
G RUM002N02GT2L
MK22FN512VDC12 [29] RTCRST_CTRL
S
A R27005 A
100K
0201
Title: 27. SAM_1, K22

Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
3P3VA
MTP_BF28005
SMD RND 31.5mil
3P3VA_SW MTP_BF28001 MTP_BF76007
SMD RND 31.5mil
SMD RND 31.5mil
Place 10u cap close to IC U27001E 3P3VA_SW

C28019
Place 1x0.1uF and 1x0.01uF cap next to each VDD pin 0.1u
E6 0201
C28005 E7 VDD_E6 6.3V R28002
C28001 C28002 C28003 C28004 C28006 C28007 C28008 C28009 E5 VDD_E7
VDD_E5 10K
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V L10 0201
10u 0.1u 0.1u 0.1u 0.1u 0.010u 0.010u 0.010u 0.010u VDD_L10 Place this cap close
0402 0201 0201 0201 0201 0201 0201 0201 0201 to RESETN
J11
RESET SAM_RESET_N [31,33]
F5
VDDA C28010
D Place these caps close to VDA 3P3VA D
GTP28012 SMD RND 22.8mil
C28011 C28012 K6 0.010u
6.3V 6.3V VBAT L11 0201
0.1u 0.010u R28039 0 0201 G1 EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0 MTP_BF28002
0201 0201 VOUT33
G2 SMD RND 31.5mil
VREGIN
G5 K11
VREFH XTAL0/PTA19/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1
C28015 C28016 G6
1u 6.3V R28040 VREFL
6.3V 0.010u 10K L3
0201 0201 0201 VREF_OUT/CMP1_IN5/CMP0_IN5/ADC1_SE18 L5
EXTAL32
C28017
0.1u F6
0201 VSSA Y28001
6.3V L4 1 2 R28044 0 0201
K10 XTAL32
G3 VSS_K10 C28020 32.768KHz C28021
F7 VSS_G3
L6 VSS_F7 2.7p 2.7p
G7 VSS_L6 DNP 0201 DNP 0201
VSS_G7 25V 25V
MK22FN512VDC12
C C
3P3VA_SW
0201 R28093 4.02K TBL1001 SOC type 2

0201 R28092 8.06K TBL1001 SOC type 1
0201 R28091 16.2K TBL1001 SOC type 0 SEE TABLE TBL1001 on page 10
0201 R28082 4.02K SSD SSD vendor 1
0201 R28081 8.06K SSD SSD vendor 0 SEE TABLE TBL_SSD_2302 on page 23
0201 R28072 16.2K TBL2303 RESERVED 1
Table 2303 bits are "RESERVED" in PM
0201 R28071 4.02K TBL2303 RESERVED 0
0201 R28062 8.06K TBL2304 Greenpack revision 1
0201 R28061 16.2K TBL2304 Greenpack revision 0 SEE TABLE TBL2301D on page 23
0201 R28053 4.02K TBL2301 PCBA vendor and revision 2
0201 R28052 8.06K TBL2301 PCBA vendor and revision 1
B B
0201 R28051 16.2K TBL2301 PCBA vendor and revision 0 SEE TABLE on page 23
U27001F
0201 R28012 10K TBL2303 RESERVED 2
F1
USB0_DP F2
USB0_DM 0201 R28013 10K TBL2301B SEE TABLE TBL2301B on page 23
ADC0_DP1
H1 BOARD_ID0 0201 R28014 10K TBL2301A SEE TABLE TBL2301A on page 23
H2 BOARD_ID1
ADC0_DM1 J1 BOARD_ID2
ADC1_DP1/ADC0_DP2 J2 BOARD_ID3
ADC1_DM1/ADC0_DM2 K1 BOARD_ID4
ADC0_DP0/ADC1_DP3 K2 DEBUG_RETAIL_BOARD_ID
ADC0_DM0/ADC1_DM3 L1 NEW_BOARD_ID
ADC1_DP0/ADC0_DP3 L2 Q28002
ADC1_DM0/ADC0_DM3 SAM_SL_VDET [69] RUM002N02GT2L
J3
ADC1_SE16/ADC0_SE22 SL_ADC [69]
H3
ADC0_SE16/CMP1_IN2/ADC0_SE21 0201 R28019 3.48K D S
K5 0201 R28020 3.48K Q28003

DAC0_OUT/CMP1_IN3/ADC0_SE23 K4 RUM002N02GT2L
G
DAC1_OUT/CMP0_IN4/ADC1_SE23 SAM_CHG_IMON [63]
0201 R28021 3.48K D S
MTP_BF28003 SMD RND 31.5mil
J6 0201 R28022 3.48K
JTAG_TCLK/PTA0/SWD_CLK/EZP_CLK/UART0_CTS_b/FTM0_CH5 SAM_SWD_CLK [31,33]
H8
G
JTAG_TDI/PTA1/EZP_DI/UART0_RX/FTM0_CH6 PMIC_SAM_INT_N [59] [27,29] BRDID_ADC_RD_EN
J7 0201 R28023 10K TBL2303
JTAG_TDO/PTA2/TRACE_SWO/EZP_DO/UART0_TX/FTM0_CH7 H9 SAM_TRACE_SWO [31,33]
JTAG_TMS/PTA3/SWD_DIO/UART0_RTS_b/FTM0_CH0 SAM_SWD_DIO [31,33]
K7 0201 R28024 10K TBL2301B
JTAG_TRST_b/PTA5/USB_CLKIN/FTM0_CH2/I2S0_TX_BCLK SAM_DISPLAY_BKLT_PWM [30]
MTP_BF28004 0201 R28025 10K TBL2301A
E4 SMD RND 22.8mil SHOULD BE MTP
MTTP28015
PTE0/CLKOUT32K/I2C1_SDA/ADC1_SE4a/SPI1_PCS1/UART1_TX/RTC_CLKOUT SAM_IC_DEBUG_TX [33] R28036
E3 R28102
PTE1/I2C1_SCL/ADC1_SE5a/LLWU_P0/SPI1_SOUT/UART1_RX/SPI1_SIN SAM_IC_DEBUG_RX [33]
E2 100K
PTE2/ADC1_SE6a/LLWU_P1/SPI1_SCK/UART1_CTS_b SAM_GP_RST [56] VBAT_CHGR [63]
F4 0201
PTE3/ADC1_SE7a/SPI1_SIN/UART1_RTS_b/SPI1_SOUT PMIC_SAM_RSMRST_N [34,59]
H7
PTE4/LLWU_P2/SPI1_PCS0/LPUART0_TX SAM_KIP_UART_TX [48] 100K
A A
TP28009 SMD RND 22.8mil SHOULD BE MTP 0201 GND
L7
RTC_WAKEUP B11 GTP28010 SHOULD BE MTP
NC_B11 C11 SMD RND 22.8mil 3P3VA
NC_C11 A11
NC_A11 K3
NC_K3 H4
NC_H4 R28043 R28037
200K C28018 33K
0201 6.3V 0.1u 0201
MK22FN512VDC12 0201
SAM_RTC_WAKEUP [56]
Surface
C A 1.0.0.1
5 4 3 2 1
5 4 3 2 1
3P3VA_SW
R29061
200K
0201
D D
U27001D
PORT - D D4
PTD0/LLWU_P12/SPI0_PCS0/UART2_RTS_b/FTM3_CH0/FB_ALE/FB_CS1_b/FB_TS_b/LPUART0_RTS_b D3 PSAM_SL_DBG_EN [29]
PTD1/ADC0_SE5b/SPI0_SCK/UART2_CTS_b/FTM3_CH1/FB_CS0_b/LPUART0_CTS_b SAM_CHG_ACOK [63]
C3
PTD2/LLWU_P13/SPI0_SOUT/UART2_RX/FTM3_CH2/FB_AD4/I2C0_SCL/LPUART0_RX SL_UART_RX [69]
B3
PTD3/SPI0_SIN/UART2_TX/FTM3_CH3/FB_AD3/I2C0_SDA/LPUART0_TX A3 R29045 DEBUG_SL 2K 0402 SL_UART_TX [69]
PTD4/LLWU_P14/SPI0_PCS1/UART0_RTS_b/FTM0_CH4/FB_AD2/EWM_IN/SPI1_PCS0 A2 DEBUG_MUX_S0 [31]
PTD5/ADC0_SE6b/SPI0_PCS2/UART0_CTS_b/FTM0_CH5/FB_AD1/EWM_OUT_b/SPI1_SCK B2 SAM_CHGR_PSU_ON_R [29]
PTD6/ADC0_SE7b/LLWU_P15/SPI0_PCS3/UART0_RX/FTM0_CH6/FB_AD0/FTM0_FLT0/SPI1_SOUT SAM_PWR_BTN_STATE [34,56]
A1
PTD7/UART0_TX/FTM0_CH7/FTM0_FLT1/SPI1_SIN SAM_SEN_HALL_INT [41]
A10 R29019 100 0201 I2C_SCL_MCU [34,39,59]
PTD8/I2C0_SCL/LPUART0_RX/FB_A16 A9 R29020 100 0201
PTD9/I2C0_SDA/LPUART0_TX/FB_A17 I2C_SDA_MCU [34,39,59]
B1
PTD10/LPUART0_RTS_b/FB_A18 BL_INST_ON_HNDSHK [10,30]
C2
PTD11/LPUART0_CTS_b/FB_A19 KIP_IO [27,31,48]
C1 499 R29076
PTD12/FTM3_FLT0/FB_A20 GP_DBGACC [31,47,56]
D2 0201
PTD13/FB_A21 D1 SPI1_EXT [37]
PTD14/FB_A22 E1 SAM_PROCHOT_R [29]
PTD15/FB_A23 SAM_PCH_INT0 [25]
PORT - E G4
C PTE5/SPI1_PCS2/LPUART0_RX/FTM3_CH0 SAM_KIP_UART_RX [48] C
F3 R29046 DEBUG_SL 2K 0402
PTE6/SPI1_PCS3/LPUART0_CTS_b/I2S0_MCLK/FTM3_CH1/USB_SOF_OUT H5 DEBUG_MUX_S1 [31]
PTE24/ADC0_SE17/I2C0_SCL/EWM_OUT_b SAM_PWRBTN_N [56]
J5
PTE25/ADC0_SE18/I2C0_SDA/EWM_IN H6 DEBUG_LED0 [27]
PTE26/CLKOUT32K/RTC_CLKOUT/USB_CLKIN PMIC_SAM_ALL_SYS_PWRGD [22,34,59]
MK22FN512VDC12
3P3VA_SW
DEBUG_SL
C29021
B 0.1u 6.3V B
0201 PMIC_EN [58,59]
U29020 3P3V_SSD_EN [65]
8 SAM_PCH_RSMRST_N [18,22,56]
DEBUG_SL 1 VCC RTCRST_CTRL [27]
R29072 PR SAM_PMIC_PWRBTN [59]
6 Pn 3 VRM_PWR_EN [22,66]
[27,28] BRDID_ADC_RD_EN D D Q Q SAM_SL_DBG_EN [47] SAM_CHGR_PSU_ON [34,63]
7 5
0201 0 CK K Qn Q SAM_PROCHOT [10]
Cn
DEBUG_SL 2
R29073 CLR 4 499 R29049 MTP29001
GND [27] PMIC_EN_R
0201 100 0201 MTP29002
[29] PSAM_SL_DBG_EN
NC7SZ74L8X 499 R29050 MTP29003
[27] 3P3V_SSD_EN_R
DEBUG_SL 0201 MTP29004
DEBUG_SL 499 R29051 MTP29005
[27] SAM_PCH_RSMRST_N_R
R29074 DEBUG_SL DEBUG_SL 0201 MTP29006
20K C29022 R29075 499 R29052 MTP29007
[27] RTCRST_CTRL_R
0201 0.1u 6.3V 20K 0201 MTP29008
0201 0201 0 R29053
[27] SB_PWRBTN_SR
0201
499 R29055
[29] SAM_CHGR_PSU_ON_R
0201
A 499 R29056 A
[29] SAM_PROCHOT_R
DEBUG_SL 0201
C29023
0.1u 6.3V
0201
Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
When BL_INST_ON_HNDSHK is LOW, SAM controls BKLT.

When BL_INST_ON_HNDSHK is HIGH, SOC controls BKLT. 3P3VA_SW
MTP30002
D D
MTP30001
U30001 GTP30001
C1 B2
[10] SOC_BKLTEN A VCC
A1 C2
[27] SAM_DISPLAY_BKLT_EN B Y L_BKLTEN [72]
A2 B1 C30001
C GND 0.1u 6.3V
SN74AUP1G97YZP 0201
[10,29] BL_INST_ON_HNDSHK
GND
MTP30004
U30002 GTP30002
C1 B2
[10] SOC_BKLT_CTRL_IN A VCC
A1 C2
[28] SAM_DISPLAY_BKLT_PWM B Y L_BKLT_CTRL_IN [72]
C C
A2 B1
C GND C30002
SN74AUP1G97YZP 0.1u 6.3V
0201
MTP30003
GND
3P3VA_SW
C30003
0.1u 6.3V
0201
U30003
5
2 VCC 4 GND
B [10] SOC_DISPLAY_VDD_EN B
1 A Y DISPLAY_VDD_EN [65]
[27,30] SAM_PANEL_LOGO_EN B 3
GND
R30002 R30001 R30004 R30005 R30003
49.9K 200K 49.9K 200K 49.9K 74LVC1G32GX
R30015 GND
200K
GND GND
PANEL_LOGO [55]
35kohms-287kohms pulldown at TDM
A PANEL_LOGO Input is 3.3V tolerant A
Title: 30. INSTANT_ON

R30014 100 0201 Surface
[27,30] SAM_PANEL_LOGO_EN Microsoft Confidential Engineer:
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
3P3VA 3P3VA
C31006
0.1u 6.3V U31001 C31002
0201 14 0.1u 6.3V U31002
DEBUG_SL V+ 0201 14
4 5 DEBUG_SL V+
[28,33] SAM_SWD_DIO 1S1 1D SD_DEBUG1 [47]
3 4 5
[37] SPI1_SI_DBG 1S2 [28,33] SAM_SWD_CLK 1S1 1D SD_DEBUG3 [47]
2 3
[25,33] PCH_UART1_TXD 1S3 [37] SPI1_CLK_DBG 1S2
1 2
[48] KIP_SWD_DIO 1S4 [25,33] PCH_UART1_RXD 1S3
1
MTP31005 [48] KIP_SWD_CLK 1S4 MTP31007
8 7
[27,63,70] I2C_ROP_SDA 2S1 2D
9 8 7
[31] SSD_TDI_BUF 10 2S2 [27,63,70] I2C_ROP_SCL 9 2S1 2D
[31] TS_TDI_BUF 2S3 [31] SSD_TCK_BUF 2S2
11 0402 to allow rework 10
2S4 R31022 100K [31] TS_TCK_BUF 11 2S3
12 [27,31] DEBUG_MUX_S3 DEBUG_SL 0402 2S4
D [29,31] DEBUG_MUX_S0 IN1 D
16 12
[29,31] DEBUG_MUX_S1 IN2 [29,31] DEBUG_MUX_S0 IN1
15 6 R31013 100K 16
[31] DEBUG_MUX_1OEN 1EN GND [27,31] DEBUG_MUX_S2 [29,31] DEBUG_MUX_S1 IN2
13 DEBUG_SL 0402 15 6
[31] DEBUG_MUX_2OEN 2EN [31] DEBUG_MUX_1OEN 1EN GND
13
[31] DEBUG_MUX_2OEN 2EN
TS3A5017RSVR R31014 100K
3P3VA [29,31] DEBUG_MUX_S1 DEBUG_SL 0402 TS3A5017RSVR
DEBUG_SL
3P3VA DEBUG_SL
C31003 R31015 100K
0.1u 6.3V [29,31] DEBUG_MUX_S0 DEBUG_SL 0402
0201 C31001
DEBUG_SL U31003 0.1u 6.3V U31005
14 0201 14
V+ MTP31009 DEBUG_SL V+
4 5 4 5
[28,33] SAM_TRACE_SWO 1S1 1D SD_DEBUG2 [47] [28,33] SAM_RESET_N 1S1 1D SD_DEBUG4 [47]
3 3
[37] SPI1_CS_DBG_N 1S2 [37] SPI1_SO_DBG 1S2
2 R31016 22.1 2
[25,27] SAM_PCH_UART_TX 1S3 [33] SAM_DEBUG_RX SAM_DEBUG_R_RX [47] [25,27] SAM_PCH_UART_RX 1S3
1 0402 1
[27,29,48] KIP_IO 1S4 [27,48] SAM_KIP_RST 1S4
R31018 100K MTP31008
DNP 0402
8 7 R31017 22.1 8 7
[25,48] I2C_SDA_TP 2S1 2D [33] SAM_DEBUG_TX SAM_DEBUG_R_TX [47] [25,48] I2C_SCL_TP 2S1 2D
9 0402 9
[31] SSD_TMS_BUF 2S2 [31] SSD_TDO_BUF 2S2
10 10
[31] TS_TMS_BUF 2S3 [31] TS_TDO_BUF 2S3
11 MTP31006 11
[22,27,34,38,59,61] SKL_SLP_S0_N 2S4 2S4
MTP31010
12 12
16 16
15 6 3P3VA 15 6
[31] DEBUG_MUX_1OEN 1EN GND [31] DEBUG_MUX_1OEN 1EN GND
13 13
[31] DEBUG_MUX_2OEN 2EN [31] DEBUG_MUX_2OEN 2EN
TS3A5017RSVR TS3A5017RSVR
DEBUG_SL DEBUG_SL
MTP31011 C31004
MTP31012 0.1u 6.3V 1P8V_TS
MTP31013 0201 U31004
MTP31014 DEBUG_SL 6 1
VCCY VCCA
C 4 2 C
[31] TS_TDO_BUF Y A TS_TDO_1V8 [49]
MTP31001
TS_TCK_BUF [31]
MTP31002
TS_TMS_BUF [31]
MTP31003 3 5 C31013
TS_TDO_BUF [31] GND NC5
MTP31004 0.1u 6.3V
TS_TDI_BUF [31]
74AUP1T34GM 0201
R31028 100K SOT886 DEBUG_SL DEBUG_SL
DEBUG_SL 0402 TS_TCK_BUF [31] U31006
1 6
3P3VA VCCA VCCY
2 4 R31025 22.1
[31] TS_TCK_BUF A Y TS_TCK_1V8 [49]
DEBUG_SL 0201
R31029 100K
DEBUG_SL 0402 TS_TMS_BUF [31] 5 3
R31030 100K C31011 NC5 GND
DEBUG_SL 0402 TS_TDI_BUF [31] 0.1u 6.3V 74AUP1T34GM C31007
0201 SOT886 DEBUG_SL 0.1u 6.3V
DEBUG_SL U31008 0201
1 6 DEBUG_SL
VCCA VCCY
2 4 R31026 22.1
[31] TS_TMS_BUF A Y TS_TMS_1V8 [49]
DEBUG_SL 0201
5 3 3P3VA
NC5 GND C31014
74AUP1T34GM 0.1u 6.3V
SOT886 DEBUG_SL 0201
U31010 DEBUG_SL
1 6 MTP31019 C31010
VCCA VCCY 0.1u 6.3V
2 4 R31027 22.1 0201
[31] TS_TDI_BUF A Y TS_TDI_1V8 [49]
DEBUG_SL 0201 MTP31020 DEBUG_SL
5 3 DEBUG_MUX_1OEN [31]
NC5 GND
Motherboard Mux Settings 74AUP1T34GM U31015
B0 Mode SD_DEBUG3 SD_DEBUG1 SD_DEBUG4 SD_DEBUG2 5 DEBUG_MUX_2OEN [31]
SOT886 DEBUG_SL [27,31] DEBUG_MUX_S3 VCC
B1 3P3V_SSD R31047 FOR INTEL 1 6
B 1P8V_SSD R31046 FOR SAMSUNG TOSHIBA [27,31] DEBUG_MUX_S2 A Y0 B
B2 SAM JTAG SAM_SWD_CLK SAM_SWD_DIO SAM_RESET_N SAM_TRACE_SWO 4
[29,31] DEBUG_MUX_S0 Y1
B3 UEFI Flashing SPI1_CLK_DBG SPI1_SI_DBG SPI1_SO_DBG SPI1_CS_DBG_N 3 2
B4 PCH logging PCH_UART1_RXD PCH_UART1_TXD SAM_PCH_UART_RX SAM_PCH_UART_TX 3P3V_SSD [29,31] DEBUG_MUX_S1 E GND
1P8V_SSD
B5 KIP JTAG KIP_SWD_CLK KIP_SWD_DIO KIP_RST KIP_IO 3P3VA SN74LVC1G19DRYR
B6 BATTERY/CHARGER I2C_ROP_SCL I2C_ROP_SDA I2C_SCL_TP_R I2C_SDA_TP_R DEBUG_SL
B7 SSD JTAG SSD_JTAG_TCK SSD_JTAG_TDI SSD_JTAG_TDO SSD_JTAG_TMS
TS JTAG TS_TCK TS_TDI TS_TDO TS_TMS
PWR MON DEBUG_PMI_I2C_SCL DEBUG_PMI_I2C_SDA DEBUG_PMI_SLOW SKL_SLP_S0_N R31048
R31046 R31047
0 0 [29,47,56] GP_DBGACC
C31008 0201 0201
0.1u 6.3V SSD SSD
0201 U31011 0
DEBUG_SL 6 1 DEBUG_GP
VCCY VCCA
0201
4 2
[31] SSD_TDO_BUF Y A SSD_JTAG_TDO [43]
3
Q31002B Q31001B
NX3008NBKS NX3008NBKS
D
3 5 DEBUG_GP DEBUG_GP
GND NC5 C31015 5 5
74AUP1T34GM 0.1u 6.3V G G
S
U31012 DEBUG_SL
1 6
4
VCCA VCCY
6
MTP31015 Q31001A Q31002A
SSD_TCK_BUF [31]
MTP31016 2 4 R31043 22.1 NX3008NBKS NX3008NBKS
D
SSD_TMS_BUF [31] [31] SSD_TCK_BUF A Y SSD_JTAG_TCK [43,44]
MTP31017 DEBUG_SL 0201
SSD_TDO_BUF [31]
MTP31018 2 DEBUG_GP 2 DEBUG_GP
SSD_TDI_BUF [31] G G
5 3
R31040 100K NC5 GND
SSD_TCK_BUF [31]
S
DEBUG_SL 0402 C31012 74AUP1T34GM C31009
0.1u 6.3V SOT886 DEBUG_SL 0.1u 6.3V
1
3P3VA 0201 U31013 0201
DEBUG_SL 1 6 DEBUG_SL
VCCA VCCY
R31041 100K 2 4 R31044 22.1
SSD_TMS_BUF [31] [31] SSD_TMS_BUF A Y SSD_JTAG_TMS [43,44]
DEBUG_SL 0402 DEBUG_SL 0201 GTP31001
R31042 100K
DEBUG_SL 0402 SSD_TDI_BUF [31] 5 3 SMD RND 22.8mil
A A
NC5 GND C31016
74AUP1T34GM 0.1u 6.3V
U31014 DEBUG_SL R31039
1 6 100K
VCCA VCCY
2 4 R31045 22.1 DNP
[31] SSD_TDI_BUF A Y SSD_JTAG_TDI [43]
DEBUG_SL 0201 0402
5 3
NC5 GND 31. Debug mux
74AUP1T34GM Title:
SOT886 DEBUG_SL Microsoft Confidential Surface
Engineer:
C A 1.0.0.1
5 4 3 2 1
5 4 3 2 1
V3P3_DSW
BOOT_TO_USB
D R32001 D
4.99K
BOOT_TO_USB [25]
SMD RND 22.8mil

MTP32002
MTTP_BF32004
SMD RND 31.5mil
MTP
MTTP
C C
V3P3_DSW
R32002
4.99K
BOOT_TO_UEFI [25]
SMD RND 22.8mil
B B
MTP32001
MTTP_BF32003
SMD RND 31.5mil
MTP
MTTP
A A
Title: 32. Debug Buttons

Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
3P3VA_SW
J3302
2 1
D 4 2 1 3 D
6 4 3 5
8 6 5 7
10 8 7 9 DBG_D
12 10 9 11 C3302
12 11
DEBUG CONN
14 13 6.3V 0.1u
16 14 13 15
18 16 15 17 0201
20 18 17 19
3P3VA_SW 22 20 19 21
24 22 21 23
[66] IMVP_SDA_P 24 23
26 25
[66] IMVP_SCL_P 26 25
28 27
30 28 27 29
DBG_D 32 30 29 31
C3301 34 32 31 33
34 33 PCH_UART1_RXD [25,31]
6.3V 0.1u 36 35
4/6/2018 38 36 35 37
0201 40 38 37 39
[28,31] SAM_RESET_N 40 39
42 41
44 42 41 43 V5A
46 44 43 45
48 46 45 47
48 47 SAM_TRACE_SWO [28,31]
50 49 MTP33001
C [28,31] SAM_SWD_CLK 50 49 SAM_SWD_DIO [28,31] C
52 51 Changed H_PROCHOT# to
54 52 51 53 H_PROCHOT_3P3V# for EV2 SMD RND 22.8mil
56 54 53 55
58 56 55 57
58 57 R3303
60 59 DBG_D MTP33002
62 60 59 61 10K C3303
64 62 61 63 0201_p28 6.3V 0.1u SMD RND 22.8mil
64 63
DBG_D
0201
66 65
68 MT2 MT1 67
MT4 MT3
PCH_UART1_TXD [25,31]
GND
DBG_D GND
B B
SAM_DEBUG_TX [31]
3
Q33002B
NX3008NBKS
D
5
[69] PROT_3V3_SW_G G
S
SAM_DEBUG_RX [31]
4
[28] SAM_IC_DEBUG_TX
6
Q33002A
NX3008NBKS
D
2
G
S
1
A A
[28] SAM_IC_DEBUG_RX
Title: 33. SW Debug Conn

Engineer: Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
D D
GTP34001
[22,59] PCH_PWRBTN_N
GTP34032
[22,27,56,59] PCH_DPWROK
GTP34030
[29,39,59] I2C_SCL_MCU
GTP34029
[29,39,59] I2C_SDA_MCU
GTP34002
[59] SAM_PMIC_PWRBTN_N
GTP34003
[11,59] DDR_VTT_CTL
GTP34004
[10,60,63,66] PROCHOT_N
GTP34005 GTP34041
[60] NTC_REF SKL_SLP_SUS_N [22,27,58,59]
GTP34008 GTP34040 V3P3A_PCH

C C
GTP34009
I2C testpoints are shown on page 25 GTP34016

PMIC_SAM_RSMRST_N [28,59]
GTP34011 GTP34017
[29,63] SAM_CHGR_PSU_ON SKL_SLP_S4_N [22,27,45,59,61]
GTP34012
[27] SAM_TEST_B10
GTP34018
SKL_SLP_S3_N [22,59,61]
GTP34049
[22,27,38,43,44,56] PLT_RST_BUF_N
GTP34019
SKL_VCCST_PWRGD [22,59]
GTP34020
PMIC_SAM_ALL_SYS_PWRGD [22,29,59]
GTP34021
SKL_PCH_PWROK [22,59]
GTP34022
SKL_SYS_PWROK [22,59]
GTP34023
SKL_SLP_S0_N [22,27,31,38,59,61]
GTP34010
[29,56] SAM_PWR_BTN_STATE
B B
A A
Title
34. EE Debug Connector
Size Document Number Rev

A2 A <RevCode>
Vinafix.com
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title: 35. EMPTY

Engineer: Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
D D
SMD RND 22.8mil
MTP36001
MTP36002
SMD RND 22.8mil
C C
MTP36003
SMD RND 22.8mil
No Power Monitors in this SKU
B B
Resistor Address for MAX3440

20.5K => 0x3C/0x3D
11.0K => 0x38/0x39
5.90K => 0x34/0x35
3.16K => 0x30/0x31
A
1.74K => 0x2C/0x2D A
931K => 2x28/2x29

499 => 2x24/2x25
GND => 2x20/2x21
Title: 36. Power Monitor

Engineer:
Custom A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
D 3VSUS_ORG
UEFI SPI ROM D
3VSUS_ORG
1K
(128Mb=16MB @104MHz)
0201
Needs to >= 66MHz
R37001
C37001
U37001 0.1u 6.3V
W25Q128JVPIQ 0201
SPI1_CS0_N 1
SPI1_SO 2 CS# 8
SPI1_WP_N 3 DO(IO1) VCC 7 SPI1_HOLD_N
4 WP#(IO2) HOLD#(IO3) 6 SPI1_CLK
9 GND1 CLK 5 SPI1_SI
GND2 DI(IO0)
3VSUS_ORG
C 3VSUS_ORG C
DEBUG_SL
1K
1K
U37002
TS3A27518EZQSR C37002
0.1u 6.3V 0201 0201
SPI1_CLK A1 C2 0201 DEBUG_SL DEBUG_SL DEBUG_SL
SPI1_SI COM1 V+
R37003
R37004
B1 DEBUG_SL R37005 100K
SPI1_SO C1 COM2 C4 0201
SPI1_WP_N D1 COM3 EN#
SPI1_HOLD_N E1 COM4 B4
SPI1_CS0_N COM5 IN1 SPI1_EXT [29]
D2 D3
COM6 IN2 MTTP37001
C3
SPI_CLK = 20/33/50Mhz A3 GND
SMD RND 22.8mil
B3 N.C. E2
[21] SPI_CLK NC1 NO1 SPI1_CLK_DBG [31]
A2 E3
[21] SPI_SI NC2 NO2 SPI1_SI_DBG [31]
A4 E4
[21] SPI_SO NC3 NO3 SPI1_WP_DBG_N SPI1_SO_DBG [31]
B5 D5
[21] SPI_WP_IO2 NC4 NO4 SPI1_HOLD_DBG_N
C5 D4
[21] SPI_HOLD_IO3_N NC5 NO5
A5 E5
[21] SPI_CS0_N NC6 NO6 SPI1_CS_DBG_N [31]
BGA24
B SPI1_CLK R37006 0 NDEBUG_SL 0201 SPI_CLK MTTP37002 SMD RND 22.8mil B
SPI1_SI R37007 0 NDEBUG_SL 0201 SPI_SI MTTP37003 SMD RND 22.8mil
SPI1_SO R37008 0 NDEBUG_SL 0201 SPI_SO MTTP37004 SMD RND 22.8mil
SPI1_WP_N R37009 0 NDEBUG_SL 0201 SPI_WP_IO2 MTTP37005 SMD RND 22.8mil
SPI1_HOLD_N R37010 0 NDEBUG_SL 0201 SPI_HOLD_IO3_N MTTP37006 SMD RND 22.8mil
SPI1_CS0_N R37011 0 NDEBUG_SL 0201 SPI_CS0_N MTTP37007 SMD RND 22.8mil
IN1/IN2 = L => COM to NC

IN1/IN2 = H => NC to COM
A A
Title: 37. SPI ROM UEFI

Engineer: Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
D
Trusted Platform Module D
V3P3_DSW
MTP38001
V3P3_DSW V3P3_DSW
V3P3_DSW C38006
TPM_DEEPSLP_N [21] 4.7u
6.3V
V3P3_DSW R38002 R38009 0402
100K 8.2K V3P3_DSW
0201 V3P3_DSW
C38001 C38008 X813010-001
0.1u 6.3V 0.1u 6.3V 0201
U38001
0201 0201 TBL3801 0201 TBL3801
R38003 1 28 TPM_NC6 R38018 0 C38002 C38007 R38007
4.99K 2 NC/SDA/GPIO0 NC/LPCPD/LPCPD# 27 0.1u 6.3V 0.1u 6.3V 100K
NC/SCL/GPIO1 SERIRQ/SIRQ TPM_SERIRQ [21]
0201 3 26 0201 0201
NC_3 LAD0/MISO TPM_LPC0 [21]
TBL3801 4 25
R38015 0 5 GND_4 GND_25 24 0201
0201 TBL3801 6 VDD/VSB/NC VDD/VHIO/3V_24 23
C
TPM_PP GPIO/GPX/GPIO2/NC LAD1/MOSI TPM_LPC1 [21] C
7 22
PP LFRAME# TPM_LFRAME [21]
8 21
NC/TEST LCLK/SCLK TPM_CLK [21]
9 20
LRESET1#/NC/BADD/GPIO3 LAD2/SPI_RST/RESET TPM_LPC2 [21]
R38004 R38017 0 10 19
4.99K 0201 TBL3801 11 VDD/3V VDD/VHIO/3V_19 18
0201 12 GND_11 GND_18 17
NC_12 LAD3 TPM_LPC3 [21]
TBL3801 13 16
NC_13 LRESET2#/LRESET/SPI_RST/SRESET/LRESET# PLT_RST_BUF_N [22,27,34,43,44,56]
14 15
NC/RESERVED NC/CLK/RUN/SINT/GPIO4/CLKRUN#
R38019 0 TBL3801
[22,27,31,34,59,61] SKL_SLP_S0_N NPCT650SBCWX TPM_NC9
0201 TBL3801 R38005 0
TPM_CLKRUN [21]
0201
TBL3801
0201 DNP DNP
R38016
R38006 C38004 C38005

0 10p 50V 22p 25V
TBL3801
10K
0201 0201 0201

TBL3801
B B
TBL3801
Lancelot RefDes Nuvuton NationZ
U38001 M1006791-002 X930840-002
R38002 NO STUFF X813010-001
R38003 NO STUFF NO STUFF
R38004 X813007-001 NO STUFF
R38005 X811786-001 NO STUFF
R38006 NO STUFF X811786-001
R38015 X811786-001 NO STUFF
A R38016 NO STUFF NO STUFF A
R38017 X811786-001 X811786-001

R38018 X811786-001 NO STUFF
R38019 X811786-001 NO STUFF Title: 38. TPM
Engineer: Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
V5A
J39001
7
5 MT7
1 NC1
2 1
3 2
3
FAN Connector
4
6 4
C39001 NC2 8
D 22u 6.3V MT8 D
0603
MTP39001
CFAN_PWM_R_1 R39004 100
CPUFAN_PWM [27]
SMD RND 22.8mil
0603
CPUFAN_TACH [27]
V3P3_DSW R39021close to J39001
100K
R39005 4.99K 0201 V5A
0201 MTP39003
SMD RND 22.8mil
MTP39004
SMD RND 22.8mil
C C
3P3VA 3P3VA_SW
3P3VA
33K
33K
R39019
R39008
0201 0201
U39003
B B
1 5
[29,34,59] I2C_SCL_MCU SCL V+
6 3
[29,34,59] I2C_SDA_MCU SDA ALERT
4 2
ADD0 GND
[56] GP_TSYS C39006
R39017 SN1608035 0.1u 6.3V
0 0201 0201
[27] SAM_THERM1
7-bit I2C Address = 0x48
A1
A2
D39003
BAT54CW
K
R39026 0 0201
A MTTP39001SHOULD BE MTTP? A
SMD RND 22.8mil
Title: 39. Temp Sensor/System Fan

Engineer: Surface
5 4 3 2 1
Vinafix.com
5 4 3 2 1
5V_AUDIO
R40002
5V_AUDIO_AVDD SPKR Trace Width
10 C40006
1. Maximum trace resistance for each
0402 C40034 C40005 0.1u 6.3V channel less than 0.5 ohms.
6.3V
22u
6.3V
22u
0201
2. Each of 4 traces, measured from
0603 0603 AGND CODEC to speaker connector,
CODEC_LDO1
less than 0.25 ohms
10u
0.1u
6.3V
6.3V
V5A
D D
C40027
C40026
AGND 0402 0201 R40015 R40020
10K 10K
0201 0201
AGND AGND DNP
ALC298_VD22STB
ALC298_MIC1_CAP
R40034
C40022 324K
10u SMD RND 22.8mil MTTP40001
6.3V SMD RND 22.8mil MTTP40002
L40001 2A 0402
600 OHM
AGND
U40008 GND
0805 AUDIO_VREF
C40009 C40008 J5 E4
VD33STB BCLK AZ_BITCLK_1 [20] MTTP40004
10u 0.1u C9
10V 6.3V C40001 C40002 B9 AVDD1 H2
0603 0201 2.2u 0.1u 6.3V B8 LDO1-AMP_B9 RESETO
C40009 and C40010 can be deleted and L40001
converted to a 0 ohm jumper if smart amp 0402 C7 LDO1-AMP_B8 E3 SDATA_IN_R R40006 33
6.3V
0201 MIC1-CAP SDATA-IN AZ_SDATA_IN0 [20] SMD RND 22.8mil
remains. GND GND D7 G2
A9 VREF SDATA-OUT AZ_SDATA_OUT_1 [20]
0201
AGND AGND AVSS1 F3
SYNC AZ_SYNC_1 [20]
AGND
C40010 C40011 H9 DNP
10u 0.1u D9 PVDD1 H3 C40012
6.3V 6.3V E8 PVDD2 I2C-SCL H4 22p
0402 0201 F9 PVSS_E8 I2C-SDA 25V
C 1P8V_AUDIO PVSS_F9 0201 C
GND GND GND GND
J6
G1 DVDD H7 100K R40013 1P8V_AUDIO
J2 DVDD-IO IRQ J8
C40033 DVSS-IO_J2 GPIO1 0201
C40014 C40015 C40016 C40017 J4 F4
10u 0.1u 10u 0.1u 1P8V_AUDIO J9 DVSS-IO_J4 GPIO2 F7
AGND DVSS-IO_J9 DC_DET MTP40001
6.3V 6.3V 6.3V 6.3V 0.1u 6.3V G3
0402 0201 0402 0201 0201 GND GPIO4 G6
C1 I2S-DIN F5
C40031 E1 AVDD2 I2S-DOUT H8 SMD RND 22.8mil
10u C40020 C40021 C40032 CODEC_LDO2 D1 VBG I2S-BCLK G7
GND GND LDO2-CAP SPDIF-IN
6.3V 10u 0.1u 0.1u D2 E5 CODEC_PD_N
VRP-ADDA I2S-LRCK CODEC_PD_N [42]
0402 6.3V 6.3V 6.3V H1 J3
LDO3-IN GPIO10
10u
6.3V
0402 0201 0201 CODEC_LDO3 J1 G8

LDO3-CAP EAPD
10u
0.1u
6.3V
6.3V
AGND F1 R40031
AVSS2_F1 E6 1K
AGND AGND AGND DMIC-CLK1 DMIC_CLK [20,54]
C40025
0402 AGND F6 0201 1P8V_AUDIO

DMIC-DATA1 DMIC_DATA [20,54]
C40024
0402 0201 C40023 A3 0201

A2 CPVDD R40001 100K
AGND CPGND
AUDIO_VREF1 GND GND GND GND
CPVPP B4 H6 R40003 200K
C4 CPVPP_B4 GPI-JD1 H5 COMBO_JACK [41] HPOUT_JD_R HPOUT_JD [41]
C40003 C40004 0201
10u 6.3V 0.1u 6.3V CPVEE C3 CPVPP_C4 GPI-JD2
C5 CPVEE B5
0402 0201 CPVEE-CLN HP-L HPOUT_L [41]
C40019 C40018 A4 A5
D5 CPVREF HP-R A8 HPOUT_R [41]
2.2u 2.2u AGND
AGND AGND 6.3V 6.3V AVSS2_D5 AVSS-SW
B
0402 0402 AGND B6 MTTP_BF40001 SMD RND 31.5mil B
CODEC_CBP1_R B3 LINE1-L A6 MTTP_BF40002 SMD RND 31.5mil
CBP1 LINE1-R C8
AGND LINE1-VREFO CODEC_AMP_OUTL [42]
C40028 2.2u 6.3V CODEC_CBN1_R A1
CBN1 CODEC_AMP_OUTR [42]
B7
CODEC_CBP2_R B2 MIC-L MIC1_L [41]
0402 A7
CBP2 MIC-R MIC1_R [41]
C40029 2.2u 6.3V CODEC_CBN2_R B1 C6
CBN2 MIC1-VREFO-L MIC1_VREFO_L [41]
D6
MIC1-VREF-O-R
0402
R40017 0 C2 E7
TP40003 D3 DUMMY_C2 PCBEEP
D4 DUMMY_D3
0201
E2 DUMMY_D4
Place close to J41001 F2 DUMMY_E2
SMD RND 22.8mil
AGND DUMMY_F2 D8 MTTP_BF40004 SMD RND 31.5mil
SPK-OUT-LP E9 MTTP_BF40003 SMD RND 31.5mil
G4 SPK-OUT-LN
AGND BOND0
G5 G9 MTTP_BF40006 SMD RND 31.5mil
R40018 0
close to audio J7 BOND1 SPK-OUT-RP F8 MTTP_BF40005 SMD RND 31.5mil
DFTEN SPK-OUT-RN
0201 ALC3269C-GRT
Place under U40001
GND
A GND AGND A
Title: 40. REALTEK ALC3269 CODEC

Engineer: Surface
A3 A 1.0.0.1
5 4 3 2 1
V3P3_DSW
SMD RND 22.8mil
MTP41011
R41015
SAM_SEN_HALL_INT [29]
499K
D D
0201
C41016
6.3V
J41005
0.1u
PINS MIRRORED
2 1
4 2 1 3
6 4 3 5
8 6 5 7
8 7
10 9
12 MTG2 MTG1 11
R41001 MTG4 MTG3
[40] MIC1_VREFO_L 502426-0810

2.2K 0201
L41001 place close to J41004

C41001 R41002
4.7uF 1K
L41001
6.3V 0201 120 OHM,100MHZ
0402
[40] MIC1_R
0603
BLM18SG121TN1D
C41015
4.7uF R41003 C41002
6.3V 22K 25V 100p
0402 0201 0201
[40] MIC1_L
C C
PCB trace width of MIC1-R/Mic1-L (Sleeve/Ring2) are Audio Jack/MIC1 Combo Jack
AGND AGND required at least 40 mil for HP crosstalk consideration and
its length should be as short as possible
SMD RND 22.8mil
MTP41001
HPOUT_JD [40]
MIC1_R_CR_F_C
R41004 22K
[40] COMBO_JACK
CDS2C05GTA
A2
C41004 0201
10u 6.3V D41001
0402 V5.5MLA0402NR
A1
AGND
MTP41004
0603 BLM18SG121TN1D SMD RND 22.8mil GND
R41005 51.1 HPOUT_L_F L41002 120 OHM,100MHZ HPOUT_L_F_C
[40] HPOUT_L
0603
R41006 51.1 HPOUT_R_F L41003 HPOUT_R_F_C
[40] HPOUT_R
0603
BLM18SG121TN1D MTP41005
0603
120 OHM,100MHZ
A2
A2
SMD RND 22.8mil
R41007 R41008 D41002 D41003
10K 10K V5.5MLA0402NR V5.5MLA0402NR DNP
0201 0201 C41005 C41006
J41004
A1
A1
100p 100p
B MIC1_R_CR_F_C B
25V 25V MTP41002 1
0201 0201 SMD RND 22.8mil MIC
3
GND GND RIGHT
AGND AGND 4
GND GND DET
5
LEFT
2
GND
A2
SPKR SMD RND 22.8mil
MTP41006
J41002
78171-0002
X872411-001 D41004
V5.5MLA0402NR AGND
A1
MTP41003
1 SMD RND 22.8mil
[42] AMP_SPK_RP 1
C41007 2 AGND
1000p 25V 2
0201 MTP41007
3 GND
MTG1
A2
A2
SMD RND 22.8mil 4

C41008 D41005 D41006 MTG2
GND
25V 1000p V14MLA0603NH V14MLA0603NH
0201
A1
A1
GND
[42] AMP_SPK_RN
GND GND
J41003 X872411-001
SMD RND 22.8mil 78171-0002
MTP41008
A A
[42] AMP_SPK_LP
1
1
C41009 2
1000p 25V 2
0201 MTP41009
3
MTG1
A2
A2
SMD RND 22.8mil 4

C41010 D41007 D41008 MTG2
GND
25V 1000p V14MLA0603NH V14MLA0603NH
0201
A1
A1
GND 41. Audio Jack/Spkr

[42] AMP_SPK_LN Title:
Engineer: Surface
GND GND
C A 1.0.0.1
5 4 3 2 1
5 4 3 2 1
SPKR Trace Width

1. Maximum trace resistance for each
Stereo Input(S.E.) channel less than 0.5 ohms.
2. Each of 4 traces, measured from
Stereo Output-BTL CODEC to speaker connector,
D less than 0.25 ohms D
AMP_SPK_RP [41] AMP_SPK_LN [41]

AMP_SPK_RN [41] AMP_SPK_LP [41]
OUTPR OUTNR OUTNL OUTPL
R42001 C42012 C42013 R42002 R42003 C42019 C42018 R42004
0201 0201 330p

10 330p 330p 10 10 330p 10
0201 0201 0201 Close IC Close IC 0201 0201 0201
25V 25V 25V 25V
C42002 C42001 C42003 C42004
0.22u 0.22u 0.22u 0.22u

Close IC 0402 0402 0402 0402 Close IC
C 25V 25V 25V 25V C
VSYS VSYS
24
23
22
21
20
19
18
17
BSNL
OUTNL
GND
BSNR
OUTNR
GND
GND
GND
25
OUTPR 16
C42017 OUTPL C42016
10u C42007 C42006 26 C42014 C42015 10u
0603 BSPR 15 0603
0.1u 1000p BSPL 1000p 0.1u
16V 0201 0201 0201 0201 16V
16V 25V 27 25V 16V
PVCC 14
Close IC Shut-down Control PVCC Close IC
1P8V_AUDIO U42001
Hi : Normal 28
5V_AUDIO Low: shut-down PVCC ALC1304 13
PVCC AM Avoidance Setting
R42023 100K AMP_PD_N 29
R42022 0201 SDZ 12 GVDD
10K AVCC
0201 30 R42013
FAULTZ 11
Sync 10K
B 0201 B
31 DNP
INPR
1
10
AM0
2 3 32
[40] CODEC_PD_N INNR
Q42001 9 R42009
MMBT3904WT1G C42008 AM1 R42011
PBTL/BTL
10K
Gain/SLV
1u 33 10K 0201
EPAD
GVDD
MUTE
SOT-323 0402 C42009 0201
Plimit
BTL/PBTL Setting
INNL
INPL
GND
10V 1u DNP
[40] CODEC_AMP_OUTR
0402 R42020
10V 10K
1
8
0201
R42014 DNP R42012
R42016
0 10K
0201 GVDD 0201
0 0201 Gain/SLV Setting
C42010 R42010
R42015 C42005 C42011 10K
0 1u 1u R42021 0201
0201 0402 0402 1u 0
DNP 10V 10V 0402 0201
Close IC 10V DNP
GAIN / SLV
A A
CODEC_AMP_OUTL [40]
R42017 R42008
0
0201
0
0201 Title: 42. Audio Amplifier
Engineer: Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
For common BGA SSDs

U43001A U43001D
R43011 0 0402 D4 A1
[20] PCIECLK_SSD_DP D5 REFCLK_P DNU_A1 A2
R43012 0 0402
[20] PCIECLK_SSD_DN REFCLK_N U43001C DNU_A2 A4
C1 M10 DNU_A4 A6 PCIE[12:1]_TXN/P : Gen1 and Gen2 = 75 to 200 nF; where 100 nF is nominal value, Gen3 = 176 to 265 nF; where 220 nF is nominal value
F4 C2 GND_C1 GND_M10 N1 DNU_A6 A8 SMD RND 22.8mil GTP43028
[24] PCIE_SSD_TX7_DP SATAmAp/PERp0 GND_C2 GND_N1 DNU_A8
F5 C3 N2 A11 PCIE[12:1]_RXN/P : Gen1 and Gen2 = 75 to 200 nF; where 100 nF is nominal value, Gen3 = 176 to 265 nF; where 220 nF is nominal value
[24] PCIE_SSD_TX7_DN SATAmAm/PERn0 C4 GND_C3 GND_N2 N3 DNU_A11 A13
C5 GND_C4 GND_N3 N4 DNU_A13 A15
SSD 0.22u 0201 6.3V SSD H4 C15 GND_C5 GND_N4 N5 DNU_A15 A17
[24] PCIE_SSD_RX7_DP 0.22u 0201 6.3V C43001 H5 SATAmBp/PETp0 D6 GND_C15 GND_N5 N14 DNU_A17 A18 Difference between USB3 and PCIe: 1. No Choke, 2. Add cap on PER (p832 at DG v1.2)
[24] PCIE_SSD_RX7_DN C43002 SATAmBm/PETn0 D11 GND_D6 GND_N14 N15 DNU_A18 B1 RXN/RXP cap value must be different between Gen2 and Gen3
E1 GND_D11 GND_N15 P7 DNU_B1 B2 TX (from SOC) caps are at SOC side
K4 E2 GND_E1 GND_P7 P8 DNU_B2 B4
[24] PCIE_SSD_TX8_DP PER_P1 GND_E2 GND_P8 DNU_B4
K5 E3 P9 B8 SMD RND 22.8mil GTP43020 Always ON logic, as like Intel RVP5.
[24] PCIE_SSD_TX8_DN PER_N1 GND_E3 GND_P9 DNU_B8
E4 P10 B11
E5 GND_E4 GND_P10 P11 DNU_B11 B13
SSD 0.22u 0201 6.3V SSD M4 E6 GND_E5 GND_P11 P12 DNU_B13 B15
[24] PCIE_SSD_RX8_DP 0.22u 0201 6.3V C43004 M5 PET_P1 E7 GND_E6 GND_P12 R1 DNU_B15 B17
[24] PCIE_SSD_RX8_DN C43005 PET_N1 E11 GND_E7 GND_R1 R2 DNU_B17 B18
E14 GND_E11 GND_R2 R3 DNU_B18 C6
D P4 E15 GND_E14 GND_R3 R4 DNU_C6 C9 D
P5 PERp2/NC_P4 F6 GND_E15 GND_R4 R5 DNU_C9 C11
PERn2/NC_P5 G1 GND_F6 GND_R5 R9 DNU_C11 C12
1P8V_SSD G2 GND_G1 GND_R9 R10 DNU_C12 C16
T4 G3 GND_G2 GND_R10 R14 DNU/DDR_VDDQ C17 SMD RND 22.8mil GTP43021
T5 PETp2/NC_T4 G4 GND_G3 GND_R14 R15 DNU_C17 C18 SMD RND 22.8mil GTP43022
PETn2/NC_T5 G5 GND_G4 GND_R15 T9 DNU_C18 D12
0201 C43003 SSD_PERST_N [44] G9 GND_G5 GND_T9 T10 DNU_D12 E16
0.1u SSD V4 G10 GND_G9 GND_T10 U1 DNU_E16 E17
6.3V V5 PERp3/NC_V4 G14 GND_G10 GND_U1 U2 DNU_E17 E18
GND PERn3/NC_V5 G15 GND_G14 GND_U2 U3 DNU_E18 G16
SMD RND 22.8mil H9 GND_G15 GND_U3 U4 DNU_G16 G17
MTP43024 Y4 H10 GND_H9 GND_U4 U5 DNU_G17 G18
U43002 SSD Y5 PETp3/NC_Y4 J1 GND_H10 GND_U5 U9 DNU_G18 J16
1 A PETn3/NC_Y5 GND_J1 GND_U9 DNU_J16
[22,27,34,38,44,56] PLT_RST_BUF_N VCC 6 J2
GND_J2 GND_U10
U10
DNU_J17
J17
2 B 5 J3 U14 J18
[25,44] PCIE_SSD_PERST_N NC GND_J3 GND_U14 DNU_J18
3 GND 4 D7 J4 U15 L16
Y PERST# GND_J4 GND_U15 DNU_L16
J5 W1 L17
GND SN74AUP1G08DRYR SSD F14 J9 GND_J5 GND_W1 W2 DNU/JTAG_TRST# N16
R43003 PEDET J10 GND_J9 GND_W2 W3 DNU_N16 R16
100K D8 J14 GND_J10 GND_W3 W4 DNU_R16 U16
1% CLKREQ# J15 GND_J14 GND_W4 W5 DNU_U16 W16
0201 D14 K7 GND_J15 GND_W5 W6 DNU_W16 W17
GND SUSCLK/NC_D14 K8 GND_K7 GND_W6 W11 C13 DNU_W17 Y7
E8 K9 GND_K8 GND_W11 W14 C14 RFU_C13 DNU/SSD_FLUSH Y8
DEVSLP/NC_E8 K10 GND_K9 GND_W14 W15 D15 RFU_C14 DNU/SSD_FLUSH_FB Y12
[20] SSD_PCIECLK_REQ_N E12 K11 GND_K10 GND_W15 Y6 F15 RFU_D15 DNU_Y12 Y14 SMD RND 22.8mil GTP43029
PEWAKE#/NC_E12 K12 GND_K11 GND_Y6 Y11 H14 RFU_F15 DNU_Y14 Y15
R43098 1M DNP W7 L1 GND_K12 GND_Y11 Y13 H15 RFU_H14 DNU_Y15 AA6 C43101 4.7u
GTP43003 LED1#/ DAS L2 GND_L1 GND_Y13 AA1 K14 RFU_H15 DNU_AA6 AA7 6.3V 0201
0402 SMD RND 22.8mil L3 GND_L2 GND_AA1 AA2 K15 RFU_K14 DNU_AA7 AA8
GND_L3 GND_AA2 RFU_K15 DNU_AA8 PCH_SSD_UART2_TXD [25] SSD
XRCGB25M000F2P00R0 L4 AA3 L7 AA9
GND_L4 GND_AA3 RFU_L7 DNU_AA9 PCH_SSD_UART2_RXD [25]
DNP Y43001 B6 L5 AA4 L8 AA11
0201 C43099 1 3 CAL_P/NC_B6 L14 GND_L5 GND_AA4 AA5 L9 RFU_L8 DNU_AA11 AA12
25V 2 4 C43098 SSD_XTAL_OUT C7 L15 GND_L14 GND_AA5 AA14 L10 RFU_L9 DNU_AA12 AA13
10p 0201 XTAL_ OUT/NC_C7 M9 GND_L15 GND_AA14 AA15 L11 RFU_L10 DNU_AA13 AA16
DNP SSD_XTAL_IN C8 GND_M9 GND_AA15 L12 RFU_L11 DNU_AA16 AA17
10p 25V DNP
XTAL_IN/NC_C8 M7 RFU_L12 DNU/UART_RX AA18 SMD RND 22.8mil GTP43024
C10 HFB1M8MO331A0MR M8 RFU_M7 DNU/UART_TX AB1 SMD RND 22.8mil GTP43025
RZQ_1/NC_C10 M11 RFU_M8 DNU_AB1 AB2
SSD_DIAG1 D13 M12 RFU_M11 DNU_AB2 AB4
[43] SSD_DIAG1 DIAG1/I2C_DATA M14 RFU_M12 DNU_AB4 AB6
SSD_DIAG0 E13 M15 RFU_M14 DNU_AB6 AB8
[43,44] SSD_DIAG0 DIAG0/I2C_CLK N7 RFU_M15 DNU_AB8 AB11
L18 N8 RFU_N7 DNU_AB11 AB13
JTAG_TRST#/NC_L18 N9 RFU_N8 DNU_AB13 AB15 SMD RND 22.8mil
SSD_JTAG_TCK N17 N10 RFU_N9 DNU/VCCF AB17 SMD RND 22.8mil GTP43027 V3P3_DSW
[31,43,44] SSD_JTAG_TCK JTAG_ TCK RFU_N10 DNU_AB17 MTP43026
N11 AB18
SSD_JTAG_TMS N18 N12 RFU_N11 DNU_AB18 AC1
[31,43,44] SSD_JTAG_TMS JTAG_ TMS RFU_N12 DNU_AC1 SMD RND 22.8mil
P14 AC2 L43002 1P2V_SSD
C SSD_JTAG_TDI R17 P15 RFU_P14 DNU_AC2 AC4 GTP43015 U43006 0.47uH X950133-001 C
[31,43] SSD_JTAG_TDI JTAG_ TDI T14 RFU_P15 DNU_AC4 AC6 7 6
SSD1_JTAG_TDO R18 T15 RFU_T14 DNU_AC6 AC8 VIN SW
[43,44] SSD1_JTAG_TDO JTAG_ TDO RFU_T15 DNU_AC8 2.5X2.0X1.2
V14 AC11 1 4 DNP
U17 V15 RFU_V14 DNU_AC11 AC13 EN VOS C43035 C43036 C43037 C43038
SMB_ CLK/NC_U17 W8 RFU_V15 DNU_AC13 AC15 C43034 3 22u 22u 22u 22u R43150
U18 W12 RFU_W8 DNU_AC15 AC17 10u FB R43025 R43009 C43041 4V 4V 4V 4V 10K
SMB_ DATA/NC_U18 W13 V_SEL0/RFU_W12 DNU/VCCFQ AC18 SMD RND 22.8mil GTP43026 6.3V 5 2 82.5K 82.5K 20% 20% 20% 20% 0201
W18 V_SEL1/RFU_W13 DNU_AC18 SMD RND 22.8mil GTP43023 0402 GND PG 1% 1% 100p 0603 0603 0603 0603
ALERT#/NC_W18 0201 0201 25V
HFB1M8MO331A0MR TPS62085RLTR
GTP43014 GTP43013 AA10 GTP43012 3P3V_SSD DNP SSD 0201
SMD RND 22.8mil SMD RND 22.8mil RZQ_2/NC_AA10 1P2V_SSD SMD RND 22.8mil 0201 QFN-7 DNP
R43018
C43039
U43001B
0.1u 6.3V
G7
HFB1M8MO331A0MR G8 1p2v/1p1v/0p9v/RFU_G7 R43010 is 215K for Samsung, 1P2V_SSD = 1.06V-1.15V + 100mV P-P ripple
G11 1p2v/1p1v/0p9v/RFU_G8 100K R43010 is 165K for Toshiba, 1P2V_SSD = 1.2V +/- 5%
1p2v/1p1v/0p9v/RFU_G11 GND
G12 1% R43026 R43010 R43010 is 150K for Intel Pleasant Star, 1P2V_SSD = 1.24V+/- 4%
H7 1p2v/1p1v/0p9v/RFU_G12 215K 165K R43010 is 165K and R43009 is 24.9K for Hynix, 1P2V_SSD = 0.92V +/- 0.06V
1p2v/1p1v/0p9v/RFU_H7 0201
H8 1% 1%
H11 1p2v/1p1v/0p9v/RFU_H8 0201 0201
H12 1p2v/1p1v/0p9v/RFU_H11 3P3V_SSD R43023 0 0201 DNP SSD
J7 1p2v/1p1v/0p9v/RFU_H12
J8 1p2v/1p1v/0p9v/RFU_J7
1P8V_SSD 1p2v/1p1v/0p9v/RFU_J12
SMD RND 22.8mil
R43019
R7 100K MTP43027
R8 V1P8_R7 SMD RND 22.8mil 1% V3P3_DSW 1P8V_SSD
R11 V1P8_R8 GTP43016 0201 L43001
R12 V1P8_R11 U43005 0.47uH X950133-001
T7 V1P8_R12 7 6
T8 V1P8_T7 VIN SW
V1P8_T8 2.5X2.0X1.2
T11 1 4
T12 V1P8_T11 EN VOS C43030 C43031 C43032 C43033
U7 V1P8_T12 C43029 3 22u 22u 22u 22u
U8 V1P8_U7 10u FB R43007 C43040 4V 4V 4V 4V
U11 V1P8_U8 6.3V 5 2 82.5K 20% 20% 20% 20%
U12 V1P8_U11 0402 GND PG 1% 100p 0603 0603 0603 0603
3P3V_SSD V1P8_U12 0201 25V
Load R43100 and DNP R43101 for U43001 loaded and U44007 DNP (Single SSD) TPS62085RLTR
0201
R43134 QFN-7 DNP
DNP R43100 and Load R43101 for both U43001 and U44007 loaded (Dual SSD)
D9 100K 0201
D10 V3P3_D9 0201 C43080
[44] SSD2_JTAG_TDO E9 V3P3_D10 0.1u 6.3V
E10 V3P3_E9 R43008
[43,44] SSD1_JTAG_TDO V3P3_E10
W9 33K
W10 V3P3_W9 1%
V3P3_W10 GND
B Y9 0201 B
V3P3_Y9 GND
Y10
V3P3_Y10
R43100 R43101
0 0 HFB1M8MO331A0MR R43024
0402 0402 33K
SSD SSD MTP43020 1%
SMD RND 22.8mil 0201
MTP43021 GTP43017 SSD_DIAG1
SSD_JTAG_TDO [31] SSD_DIAG1 [43]
SMD RND 22.8mil SMD RND 22.8mil
MTP43022
SMD RND 22.8mil
MTP43023
SMD RND 22.8mil
GTP43018 SSD_DIAG0
SSD_DIAG0 [43,44]
SMD RND 22.8mil
SSD_JTAG_TMS
[31,43,44] SSD_JTAG_TMS SSD_JTAG_TCK
[31,43,44] SSD_JTAG_TCK SSD_JTAG_TDI 3P3V_SSD
[31,43] SSD_JTAG_TDI SSD_JTAG_TDO
3P3V_SSD
R43120 R43123
SSD SSD SSD SSD SSD SSD 1P8V_SSD 4.7K 4.7K
C43006 C43007 C43008 C43009 C43010 C43011 0201 0201
6.3V 6.3V 0.1u 0.1u 6.3V 6.3V DNP DNP
1u 1u 6.3V 6.3V 22u 22u
0402 0402 0201 0201 0603 0603 DNP
C43100
0.1u 6.3V
1P8V_SSD 499 R43113 U43007 0201
[56] GP_SSD_FLUSH 5
0201 DNP
2 VCC 4
SSD SSD SSD SSD SSD SSD 1 A Y SSD_DIAG0 [43,44]
C43013 C43014 C43015 C43016 C43017 C43018 B 3
6.3V 6.3V [27] SAM_SSD_FLUSH GND
0.1u 0.1u 6.3V 6.3V
1u 1u 6.3V 6.3V 22u 22u 74AUP1G32GX
0402 0402 0201 0201 0603 0603 DNP
R43108 R43109
1P2V_SSD 200K 200K 1P8V_SSD2 3P3V_SSD GTP43019
MTP43025 0201 0201 SMD RND 22.8mil
SMD RND 22.8mil DNP DNP 1P8V_SSD
SSD SSD SSD SSD SSD SSD DNP SSD
C43019 C43020 C43021 C43022 C43023 C43024 C43025 C43026
6.3V 6.3V 0.1u 0.1u 0.1u 0.1u 6.3V 6.3V 3P3VA_SW
A 1u 1u 6.3V 6.3V 6.3V 6.3V 22u 22u A
0402 0402 0201 0201 0201 0201 0603 0603 R43124 R43121 R43125 R43122
100K 100K 4.7K 4.7K R43107
0201 0201 0201 0201 200K
6
DNP DNP DNP DNP Q43001A 0201
2
[43] SSD_DIAG1 SSD_FLUSH_DONE [27,56]
DNP
1
Q43001B
5
[44] SSD2_DIAG1
DNP
4
R43106 R43110
200K 200K
0201 0201
DNP DNP Title: 43. SSD page 1
Surface
U SPECIFIC Custom A 1.0.0.1

5 4 3 2 1
5 4 3 2 1
For common BGA SSDs

U44007A U44007D
R44012 SSD 0 0402 D4 A1
[20] PCIECLK_SSD2_DP D5 REFCLK_P DNU_A1 A2
R44013 SSD 0 0402
[20] PCIECLK_SSD2_DN REFCLK_N U44007C DNU_A2 A4 PCIE[12:1]_TXN/P : Gen1 and Gen2 = 75 to 200 nF; where 100 nF is nominal value, Gen3 = 176 to 265 nF; where 220 nF is nominal value
C1 M10 DNU_A4 A6
F4 C2 GND_C1 GND_M10 N1 DNU_A6 A8 PCIE[12:1]_RXN/P : Gen1 and Gen2 = 75 to 200 nF; where 100 nF is nominal value, Gen3 = 176 to 265 nF; where 220 nF is nominal value
[24] PCIE_SSD2_TX11_DP SATAmAp/PERp0 GND_C2 GND_N1 DNU_A8
F5 C3 N2 A11
[24] PCIE_SSD2_TX11_DN SATAmAm/PERn0 C4 GND_C3 GND_N2 N3 DNU_A11 A13
C5 GND_C4 GND_N3 N4 DNU_A13 A15
0.22u 0201 6.3V H4 C15 GND_C5 GND_N4 N5 DNU_A15 A17 Difference between USB3 and PCIe: 1. No Choke, 2. Add cap on PER (p832 at DG v1.2)
[24] PCIE_SSD2_RX11_DP 0.22u 0201 6.3V SSD C44121 H5 SATAmBp/PETp0 D6 GND_C15 GND_N5 N14 DNU_A17 A18 RXN/RXP cap value must be different between Gen2 and Gen3
[24] PCIE_SSD2_RX11_DN SSD C44001 SATAmBm/PETn0 D11 GND_D6 GND_N14 N15 DNU_A18 B1 TX (from SOC) caps are at SOC side
E1 GND_D11 GND_N15 P7 DNU_B1 B2
K4 E2 GND_E1 GND_P7 P8 DNU_B2 B4
[24] PCIE_SSD2_TX12_DP PER_P1 GND_E2 GND_P8 DNU_B4
Always ON logic, as like Intel RVP5.
K5 E3 P9 B8 SMD RND 22.8mil GTP44020
[24] PCIE_SSD2_TX12_DN PER_N1 GND_E3 GND_P9 DNU_B8
E4 P10 B11
E5 GND_E4 GND_P10 P11 DNU_B11 B13
0.22u 0201 6.3V M4 E6 GND_E5 GND_P11 P12 DNU_B13 B15
[24] PCIE_SSD2_RX12_DP 0.22u 0201 6.3V SSD C44002 M5 PET_P1 E7 GND_E6 GND_P12 R1 DNU_B15 B17
[24] PCIE_SSD2_RX12_DN SSD C44003 PET_N1 E11 GND_E7 GND_R1 R2 DNU_B17 B18
E14 GND_E11 GND_R2 R3 DNU_B18 C6
D P4 E15 GND_E14 GND_R3 R4 DNU_C6 C9 D
[43] SSD_PERST_N P5 PERp2/NC_P4 F6 GND_E15 GND_R4 R5 DNU_C9 C11
PERn2/NC_P5 G1 GND_F6 GND_R5 R9 DNU_C11 C12
1P8V_SSD G2 GND_G1 GND_R9 R10 DNU_C12 C16
T4 G3 GND_G2 GND_R10 R14 DNU/DDR_VDDQ C17 SMD RND 22.8mil GTP44021
T5 PETp2/NC_T4 G4 GND_G3 GND_R14 R15 DNU_C17 C18 SMD RND 22.8mil GTP44022
PETn2/NC_T5 G5 GND_G4 GND_R15 T9 DNU_C18 D12
0201 C44118 G9 GND_G5 GND_T9 T10 DNU_D12 E16
0.1u V4 G10 GND_G9 GND_T10 U1 DNU_E16 E17
DNP 6.3V V5 PERp3/NC_V4 G14 GND_G10 GND_U1 U2 DNU_E17 E18
GND PERn3/NC_V5 G15 GND_G14 GND_U2 U3 DNU_E18 G16
H9 GND_G15 GND_U3 U4 DNU_G16 G17
Y4 H10 GND_H9 GND_U4 U5 DNU_G17 G18
U44002 R44126 Y5 PETp3/NC_Y4 J1 GND_H10 GND_U5 U9 DNU_G18 J16
1 A PETn3/NC_Y5 GND_J1 GND_U9 DNU_J16
[22,27,34,38,43,56] PLT_RST_BUF_N VCC 6 0 J2
GND_J2 GND_U10
U10
DNU_J17
J17
2 B 5 0201 J3 U14 J18
[25,43] PCIE_SSD_PERST_N NC GND_J3 GND_U14 DNU_J18
3 GND 4 D7 J4 U15 L16
Y PERST# GND_J4 GND_U15 DNU_L16
J5 W1 L17
0201_p28mm
GND SN74AUP1G08DRYR DNP F14 J9 GND_J5 GND_W1 W2 DNU/JTAG_TRST# N16

R44010 PEDET J10 GND_J9 GND_W2 W3 DNU_N16 R16
DNP GND_J10 GND_W3 DNU_R16
100K D8 J14 W4 U16
1% CLKREQ# J15 GND_J14 GND_W4 W5 DNU_U16 W16
D14 K7 GND_J15 GND_W5 W6 DNU_W16 W17
GND SUSCLK/NC_D14 K8 GND_K7 GND_W6 W11 C13 DNU_W17 Y7
E8 K9 GND_K8 GND_W11 W14 C14 RFU_C13 DNU/SSD_FLUSH Y8
DEVSLP/NC_E8 K10 GND_K9 GND_W14 W15 D15 RFU_C14 DNU/SSD_FLUSH_FB Y12
E12 K11 GND_K10 GND_W15 Y6 F15 RFU_D15 DNU_Y12 Y14
DNP [20] SSD2_PCIECLK_REQ_N PEWAKE#/NC_E12 K12 GND_K11 GND_Y6 Y11 H14 RFU_F15 DNU_Y14 Y15
R44016 1M W7 L1 GND_K12 GND_Y11 Y13 H15 RFU_H14 DNU_Y15 AA6 C44190 4.7u
0402 LED1#/ DAS L2 GND_L1 GND_Y13 AA1 K14 RFU_H15 DNU_AA6 AA7 6.3V 0201
GTP44001 L3 GND_L2 GND_AA1 AA2 K15 RFU_K14 DNU_AA7 AA8
GND_L3 GND_AA2 RFU_K15 DNU_AA8 DNP
XRCGB25M000F2P00R0 SMD RND 22.8mil L4 AA3 L7 AA9
DNP Y44001 B6 L5 GND_L4 GND_AA3 AA4 L8 RFU_L7 DNU_AA9 AA11
25V C44120 1 3 CAL_P/NC_B6 L14 GND_L5 GND_AA4 AA5 L9 RFU_L8 DNU_AA11 AA12
2 4 C44122 SSD2_XTAL_OUT C7 L15 GND_L14 GND_AA5 AA14 L10 RFU_L9 DNU_AA12 AA13
10p XTAL_ OUT/NC_C7 M9 GND_L15 GND_AA14 AA15 L11 RFU_L10 DNU_AA13 AA16
DNP SSD2_XTAL_IN C8 GND_M9 GND_AA15 L12 RFU_L11 DNU_AA16 AA17
0201 25V 10p 0201 DNP
XTAL_IN/NC_C8 M7 RFU_L12 DNU/UART_RX AA18 SMD RND 22.8mil GTP44024
C10 HFB1M8MO331A0MR M8 RFU_M7 DNU/UART_TX AB1 SMD RND 22.8mil GTP44025 SMD RND 22.8mil
RZQ_1/NC_C10 M11 RFU_M8 DNU_AB1 AB2 V3P3_DSW SMD RND 22.8mil
SSD2_DIAG1 D13 M12 RFU_M11 DNU_AB2 AB4 MTP44026
[43] SSD2_DIAG1 DIAG1/I2C_DATA M14 RFU_M12 DNU_AB4 AB6 TP44007
SSD_DIAG0 E13 M15 RFU_M14 DNU_AB6 AB8 L44102 1P2V_SSD2
[43] SSD_DIAG0 DIAG0/I2C_CLK RFU_M15 DNU_AB8 U44006
N7 AB11 0.47uH X950133-001
L18 N8 RFU_N7 DNU_AB11 AB13 7 6
JTAG_TRST#/NC_L18 N9 RFU_N8 DNU_AB13 AB15 VIN SW
SSD_JTAG_TCK N17 N10 RFU_N9 DNU/VCCF AB17 1 4 2.5X2.0X1.2
SMD RND 22.8mil GTP44027 DNP
[31,43] SSD_JTAG_TCK JTAG_ TCK RFU_N10 DNU_AB17 EN VOS
N11 AB18 C44035 C44136 C44137 C44138
SSD_JTAG_TMS N18 N12 RFU_N11 DNU_AB18 AC1 SMD RND 22.8mil C44134 3 22u 22u 22u 22u R44150
[31,43] SSD_JTAG_TMS JTAG_ TMS RFU_N12 DNU_AC1 GTP44015 FB
P14 AC2 10u R44109 C44141 4V 4V 4V 4V 10K
C R17 P15 RFU_P14 DNU_AC2 AC4 6.3V 5 2 R44018 24.9K 20% 20% 20% 20% 0201 C
[43] SSD1_JTAG_TDO JTAG_ TDI T14 RFU_P15 DNU_AC4 AC6 GND PG
0402 82.5K 1% 100p 0603 0603 0603 0603 SSD
SSD2_JTAG_TDO R18 T15 RFU_T14 DNU_AC6 AC8 1% 0201 25V
[43] SSD2_JTAG_TDO JTAG_ TDO RFU_T15 DNU_AC8 TPS62085RLTR
V14 AC11 3P3V_SSD 0201 SSD 0201
U17 V15 RFU_V14 DNU_AC11 AC13 0201 QFN-7 DNP DNP
SMB_ CLK/NC_U17 RFU_V15 DNU_AC13 R44118
W8 AC15 C44139
U18 W12 RFU_W8 DNU_AC15 AC17 0.1u 6.3V
SMB_ DATA/NC_U18 W13 V_SEL0/RFU_W12 DNU/VCCFQ AC18 SMD RND 22.8mil GTP44026
GTP44004 W18 V_SEL1/RFU_W13 DNU_AC18 SMD RND 22.8mil GTP44023 R44110 is 215K for Samsung, 1P2V_SSD = 1.06V-1.15V + 100mV P-P ripple
SMD RND 22.8mil ALERT#/NC_W18 100K R44110 is 165K for Toshiba, 1P2V_SSD = 1.2V +/- 5%
HFB1M8MO331A0MR GND
GTP44003 AA10 GTP44002 1% R44019 R44110 R44110 is 165K and R44109 is 24.9K for Hynix, 1P2V_SSD = 0.92V +/- 0.06V
SMD RND 22.8mil RZQ_2/NC_AA10 SMD RND 22.8mil 215K 165K
0201
1% 1% only support Hynix 1TB
0201 0201
1P2V_SSD2 3P3V_SSD R44123 0 0201 DNP SSD
HFB1M8MO331A0MR
U44007B
G7
G8 1p2v/1p1v/0p9v/RFU_G7
G11 1p2v/1p1v/0p9v/RFU_G8
G12 1p2v/1p1v/0p9v/RFU_G11 SMD RND 22.8mil
H7 1p2v/1p1v/0p9v/RFU_G12 R44119 SMD RND 22.8mil
H8 1p2v/1p1v/0p9v/RFU_H7 100K MTP44027
H11 1p2v/1p1v/0p9v/RFU_H8 1% V3P3_DSW TP44006 1P8V_SSD2
H12 1p2v/1p1v/0p9v/RFU_H11 0201 L44101
J7 1p2v/1p1v/0p9v/RFU_H12 U44005 0.47uH X950133-001
J8 1p2v/1p1v/0p9v/RFU_J7 7 6
J11 1p2v/1p1v/0p9v/RFU_J8 VIN SW
1p2v/1p1v/0p9v/RFU_J11 2.5X2.0X1.2
J12 1 4
1P8V_SSD2 1p2v/1p1v/0p9v/RFU_J12 EN VOS C44130 C44131 C44132 C44133
C44129 3 22u 22u 22u 22u
10u FB R44107 C44140 4V 4V 4V 4V
R7 6.3V 5 2 82.5K 20% 20% 20% 20%
3VSUS_ORG R8 V1P8_R7 0402 GND PG 1% 100p 0603 0603 0603 0603
R11 V1P8_R8 0201 25V
V1P8_R11 TPS62085RLTR
R12 0201
T7 V1P8_R12 R44134 QFN-7 DNP
T8 V1P8_T7 100K 0201
R44125 0201 49.9K T11 V1P8_T8 0201 C44180
T12 V1P8_T11 0.1u 6.3V
U7 V1P8_T12 R44108
SSD
U8 V1P8_U7 33K
R44017 0 U11 V1P8_U8 1%
SSD2_SATA_PCIE_DET_N [24] V1P8_U11 GND
0402 U12 GND 0201
3P3V_SSD V1P8_U12
SSD
R44125 is loaded for non-RAID case

D9 R44124
R44017 is loaded for the RAID case D10 V3P3_D9 33K
E9 V3P3_D10 1%
B E10 V3P3_E9 0201 B
W9 V3P3_E10
W10 V3P3_W9
Y9 V3P3_W10
Y10 V3P3_Y9
V3P3_Y10
HFB1M8MO331A0MR
3P3V_SSD
SSD SSD SSD SSD SSD SSD

C44107 C44104 C44105 C44026 C44108 C44030
6.3V 6.3V 0.1u 0.1u 6.3V 6.3V
1u 1u 6.3V 6.3V 22u 22u
0402 0402 0201 0201 0603 0603
1P8V_SSD2
SSD SSD SSD SSD SSD SSD

C44038 C44028 C44115 C44109 C44031 C44033
6.3V 6.3V 0.1u 0.1u 6.3V 6.3V
1u 1u 6.3V 6.3V 22u 22u
0402 0402 0201 0201 0603 0603
1P2V_SSD2
SSD SSD SSD SSD SSD SSD DNP SSD

C44025 C44103 C44024 C44106 C44113 C44112 C44114 C44111
6.3V 6.3V 0.1u 0.1u 0.1u 0.1u 6.3V 6.3V
A 1u 1u 6.3V 6.3V 6.3V 6.3V 22u 22u A
0402 0402 0201 0201 0201 0201 0603 0603
Title: 44. SSD Page 2

Surface
U SPECIFIC Custom A 1.0.0.1

5 4 3 2 1
5 4 3 2 1
WLCSP-5
PCMF1USB3S
B1
GND 5V_USBPWR_A
USB3_TA_CONN_RX_DN J45001
C2 A2
D C1 OUT_1m IN_1m A1 USB3_TA_CONN_RX_DP 21 D
OUT_1p IN_1p 1 MTG12 20
U45001 2 VBUS MTG11 19
3 Dm MTG10 18
[24] USB3_TYPEA_RX_DN WLCSP-5 4 Dp MTG9 17
PCMF1USB3S 5 GND MTG8 16
B1 6 StdA_SSRXm MTG7 15
[24] USB3_TYPEA_RX_DP GND 7 StdA_SSRXp MTG6 14
C45001 0.1u 6.3V USB3_CONN_TX_C_DN C2 A2 USB3_TA_CONN_TX_DN 8 GND_DRAIN MTG5 13
[24] USB3_TYPEA_TX_DN OUT_1m IN_1m USB3_TA_CONN_TX_DP StdA_SSTXm MTG4
0201 C1 A1 9 12
OUT_1p IN_1p StdA_SSTXp MTG3 11
C45002 0.1u 6.3V USB3_CONN_TX_C_DP U45002 MTG2 10
VSYS 0201 MTG1
MTP_BF45002
SMD RND 31.5mil M1015489-001
[24] USB3_TYPEA_TX_DP USERPORTS
U45003
IP3319CX6 MTTP_BF45002
C45015 0.1u 16V SMD RND 31.5mil
0201 A1 DP_O DP_I A2 USB2_TA_CONN_DN
[24] USB2_TYPEA_DP USB2_TA_CONN_DP
B1 DM_I B2
[24] USB2_TYPEA_DN
DM_O C2
ID MTTP_BF45003
K
C1 SMD RND 31.5mil
C
C45016 0.1u 16V GND C
0201 MTP_BF45003 PESD5V0S1UA
WLCSP6
SMD RND 31.5mil D45001
NOTE: power plane split bypass
A
C45020 is located outside shield
C45013
SMD RND 31.5mil

MTTP_BF45004
C45017 0.01u
10u 10V + C45020
6.3V 0201 150uF
B 0402 1210 B
6V
5V_USBPWR_A
V5A
U45004
6 1
IN OUT
3 ALL
C45003 4 FAULT C45014
1u6.3V EN
[24] USB_CONN_OC_N
0201 5 2 0.1u
7 GND ILIM 10V MTP_BF45001 MTTP_BF45001
GNDPAD 0201
14.7K
AP2553FDC-7R R45008 R45005 SMD RND 31.5mil SMD RND 31.5mil
200K 0201
0201
14.7K Sets: MTP_BF45004
R45010
49.9K Min: 1.64A
0201 Typ: 1.8A SMD RND 31.5mil
Max: 1.9A
A MTP_BF45005 A
R45007 SMD RND 31.5mil

[22,27,34,59,61] SKL_SLP_S4_N
DNP 10K
0201 Title: 45. USB3.0, TYPE A
R45009 Engineer: Surface
[25] 5V_USB_EN
499 Size Project Name Rev
0201 B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
SL1 DP mux to HDMI/DVI Dongle control

MTP46008
SP_TP_SMDp58mm
D MTP46003 D
MTP46007 MTP46005 V3P3_DSW SP_TP_SMDp58mm
V3P3_DSW V3P3_DSW SP_TP_SMDp58mm SP_TP_SMDp58mm
MTP46006 MTP46004 MTP46009

R46003 R46006 SP_TP_SMDp58mm SP_TP_SMDp58mm R46001 SP_TP_SMDp58mm
2.2K 2.2K V3P3_DSW 100K
U46001
0201 0201 0201
9
C46004 0.1u 6.3V SLMUX_AUX_DN 5 VDD
[10] SL_DDI2_AUX_DN M+
0201 7 1
[10] DDPC_CTRL_DATA D+ Y+ SL_DDC_AUX_DN [47]
C46001 0.1u 6.3V SLMUX_AUX_DP 4
[10] SL_DDI2_AUX_DP M-
0201 6 2
[10] DDPC_CTRL_CLK D- Y- SL_DDC_AUX_DP [47]
10
[47] SL_CONFIG1 8 SEL 3 C46002
C46003 OE GND 0.1u 6.3V R46002
0.1u 0201 100K
25V PI3USB102GZLEX 0201
GND
PI3USB102GZLEX 0201
GND
EN S Connection
C
L L AUX for DP [D1 to D] GND GND C
L H DDC for HDMI [D2 to D]
H X HI-Z
GND
3P3VA_SW SL1 3P3V HPD power rail

R46007
100K 3P3VA_SW 3P3V_HPD
0201 U46002 R46011
MTP46002 A1 A3 3P3V_HPD 100
3P3V_HDP_EN VIN_A1 VOUT_A3 SL_HPD2 [47]
SMD RND 22.8mil B1 B3 0201
VIN_B1 VOUT_B3 R46012
K
D
C3 C1 200K
ON OCFLAGB C46005 0201 D46001
B B
G Q46001 A2 1u 25V PESD24VS1UL
[27] SL_3P3V_DIS GND_A2
RUM002N02GT2L C2 B2 0603 MTP46001 DIO-ESD,SM,PESD24VS1UL,24 V,50 pF,1X.6X.5
SOT-VMT3_1p2xp8xp5_p4mm ISET GND_B2 SP_TP_SMDp58mm
A
R46010 FPF2495UCX GND
S
100K GND
0201 C46006 R46008 GND
10u 6.3V 20K
0402 0201
GND GND
GND
GND
A A
Title: 46. SL HDMI MUX/3P3V_HPD

Engineer: Surface
B A 1.00
5 4 3 2 1
Vinafix.com
5 4 3 2 1
R47009 0
NDEBUG_SL 0201
3P3VA
R47010 0
NDEBUG_SL 0201
MTP47004 S=0 => D1 <-> D
SMD RND 22.8mil S=1 => D2 <-> D C47004
U47008
0.1u 6.3V
9 DEBUG_SL
5 VDD U47003
[46] SL_DDC_AUX_DP M+
7 1 GND IP3319CX6
[46] SL_DDC_AUX_DN D+ Y+ bga6_2x3ns_p95x1p34xp6_p4mm
4 SL_DBG3_AUX_DN A1 DP_O DP_I A2 SL_DBG3_AUX_R_DN
[31] SD_DEBUG1 M- SL_DBG1_AUX_DP SL_DBG1_AUX_R_DP
6 2 B1 DM_I B2
[31] SD_DEBUG3 D- Y- DM_O C2 PWR_SL
10 ID
[29] SAM_SL_DBG_EN SEL
8 3 C1
OE GND MTP47006 GND
D D
100K
R47020 499 SMD RND 22.8mil GND

NDEBUG_GP PI3USB102GZLEX MTP47007 MTP_BF47007 MTP_BF47001 MTTP_BF47006 MTTP_BF47012
GND
X936286-001 SMD RND 22.8mil SMD RND 31.5mil SMD RND 31.5mil SMD RND 31.5mil SMD RND 31.5mil
3P3VA MTP_BF47008 MTP_BF47002 MTTP_BF47001 MTTP_BF47008
R47008
10-WFQFN
GND GND SMD RND 31.5mil SMD RND 31.5mil SMD RND 31.5mil SMD RND 31.5mil
DEBUG_SL
MTP_BF47009 MTP_BF47003 MTTP_BF47002 MTTP_BF47009
2
SMD RND 31.5mil SMD RND 31.5mil SMD RND 31.5mil SMD RND 31.5mil
U47013
dfn5_1p3xp8xp4_p45mm
MTP_BF47010 MTP_BF47004 MTTP_BF47003 MTTP_BF47007
DF5G7M2N
DF5G7M2N
GND
GND
GND 5 GND SMD RND 31.5mil SMD RND 31.5mil SMD RND 31.5mil SMD RND 31.5mil
2 VCC 4 MTP_BF47011 MTP_BF47005 MTTP_BF47004 MTTP_BF47010
1 A Y SL_DBG_EN [47] SMD RND 31.5mil SMD RND 31.5mil SMD RND 31.5mil SMD RND 31.5mil
[29,31,56] GP_DBGACC B 3 MTP_BF47012 MTP_BF47006 MTTP_BF47005 MTTP_BF47011
GND SMD RND 31.5mil SMD RND 31.5mil SMD RND 31.5mil SMD RND 31.5mil
MTP47005
74LVC1G32GX SMD RND 22.8mil J47001
U47007
U47009
IO1
IO2
IO3
IO5
IO1
IO2
IO3
IO5
DEBUG_GP GND 20525-040E-02 GND
MTP47001 GND conn_fpc-r_40_12mtg_21p2x4p15x1p1_p4mm
SMD RND 22.8mil 1 X908351-001
5
2 1
3 4 USB3_SL_RX_R_DN 3 2
[24] USB3_SL_RX_DN [69] SL_HPD1A 3
M71L47002 4
100mA 2 1 USB3_SL_RX_R_DP USB3_SL_RX_R_DP 5 4
[24] USB3_SL_RX_DP DLP11TB800UL2L USB3_SL_RX_R_DN 6 5
ex-ind4_1P25X1XP35_1p2xp55mm 7 6
USB3_SL_TX_R_DP 8 7
USB3_SL_TX_R_DN 9 8
C47005 0.1u 6.3V USB3_SL_TX_C_DN 3 4 USB3_SL_TX_R_DN 10 9
[24] USB3_SL_TX_DN SL_LANE3_R_DP 10
M71L47003 11
C47002 0.1u 6.3V USB3_SL_TX_C_DP 100mA 2 1 USB3_SL_TX_R_DP SL_LANE3_R_DN 12 11
[24] USB3_SL_TX_DP 12
DLP11TB800UL2L 13
ex-ind4_1P25X1XP35_1p2xp55mm SL_DBG2_DP_HPD_CON 14 13
RN47001 SAM_DEBUG_RXD_CON 15 14
1 2 SL_LANE3_R_DN USB2_SL_DP_R 16 15
[10] SL_DDI2_ML3_DN USB2_SL_DN_R 16
17
4 3 SL_LANE3_R_DP 18 17
[10] SL_DDI2_ML3_DP [46,47] SL_HPD2 18
19
DLP11TB800UL2L 20 19
GND GND MTP47002 21 20
C C
SMD RND 22.8mil 22 21
22
2
23
[46,47] SL_HPD2 23
SL_DBG3_AUX_R_DN 24
DF5G7M2N
DF5G7M2N
GND
GND
24
SL_DBG1_AUX_R_DP 25
SAM_DEBUG_TXD_CON 26 25
SL_DBG4_CONFIG1_CON 27 26
28 27
SL_LANE2_R_DN 29 28
SL_LANE2_R_DP 30 29
31 30
U47006
U47004
31
IO1
IO2
IO3
IO5
IO1
IO2
IO3
IO5
SL_LANE1_R_DN 32
SL_LANE1_R_DP 33 32
34 33
1
5
DLP11TB800UL2L SL_LANE0_R_DN 35 34
4 3 SL_LANE2_R_DN SL_LANE0_R_DP 36 35
[10] SL_DDI2_ML2_DN 36
37
1 2 SL_LANE2_R_DP 38 37
[10] SL_DDI2_ML2_DP [69] SL_HPD1B 38
39
RN47002 40 39
40
MTP47003
SMD RND 22.8mil 41
42 MTG1
DLP11TB800UL2L 43 MTG2
4 3 SL_LANE1_R_DN 44 MTG3
[10] SL_DDI2_ML1_DN MTG4
45
1 2 SL_LANE1_R_DP 46 MTG5
[10] SL_DDI2_ML1_DP MTG6
47
RN47003 48 MTG7
49 MTG8
50 MTG9
51 MTG10
52 MTG11
MTG12
DLP11TB800UL2L
4 3 SL_LANE0_R_DN
SL_DBG4_CONFIG1_CON
SL_DBG2_DP_HPD_CON
SAM_DEBUG_RXD_CON
[10] SL_DDI2_ML0_DN
SAM_DEBUG_TXD_CON
B SL_LANE0_R_DP B
1 2
[10] SL_DDI2_ML0_DP
RN47004
3P3VA
[31] SAM_DEBUG_R_RX
[31] SAM_DEBUG_R_TX
U47001
C47001 IP4252CZ8-4
6.3V 0.1u U47011 dfn9_1p7x1p35xp55_p4mm
DEBUG_SL 1 8
QFN10_1P4X1P8XP55_P4MM 2 I1 I O1 O
7
5 3 SL_DBG2_DP_HPD 3 I2 O2 6
[10] SL_SNK0_HPD
2 S1A OUT1 SL_DBG4_CONFIG1 4 I3 O3 5
[31] SD_DEBUG2
R47007 100K 4 S1B I4 GND PAD O4 9
0201 SEL1 GND
7 9 GND
10 S2A OUT2
[31] SD_DEBUG4 S2B
8
[47] SL_DBG_EN SEL2
[46] SL_CONFIG1
1 MTP47008
VCC SMD RND 22.8mil
R47004 6 MTP47009
499K GND SMD RND 22.8mil
DEBUG_SL GND
TS3A5223
GND X873777-001
U47010
DEBUG_SL IP3319CX6
GND
R47006 1M bga6_2x3ns_p95x1p34xp6_p4mm
0201 R47011 0 GND
NDEBUG_SL 0201 C1
ID
R47012 0 DM_O C2 USB2_SL_DN_R
[24] USB2_SL_DN B1 DM_I B2 USB2_SL_DP_R
NDEBUG_SL 0201
[24] USB2_SL_DP A1 DP_O DP_I A2
A A
BF 2 board compatability
Motherboard Mux Settings
Mode SD_DEBUG3 SD_DEBUG1 SD_DEBUG4 SD_DEBUG2
B3 PCH logging PCH_UART0_RXD PCH_UART0_TXD SAM_PCH_UART_RX SAM_PCH_UART_TX
Title: 47. SurfLink Connector

C A 1.0.0.1
Date: Thursday, April 26, 2018 Sheet 47 of XX
5 4 3 2 1
5 4 3 2 1
MTP48008
MTP48009
MTP48010
MTP48011
KBTP CONNECTOR MTP48012
Pin1 Top Left

J48001
PINS REVERSED
[25,31,48] I2C_SCL_TP 2 1
4 2 1 3
D [48] TRACKPAD_INT_N_R2 4 3 I2C_SDA_TP [25,31,48] D
6 5 MTP48002
6 5 KIP_SWD_CLK [31]
[27,31] SAM_KIP_RST 8 7 MTP48006
8 7 KIP_SWD_DIO [31]
10 9 KIP_IO [27,29,31] TP48002
[28] SAM_KIP_UART_TX 12 10 9 11 5v0_OFFBOARD
[56] PWR_SW_N 12 11 SAM_KIP_UART_RX [29]
D48002
D48005
D48003
I2C_SDA_TP [25,31,48]
K
14 13
D48004
D48012
MTG2 MTG1
K
K
16 15
D48009
PESD3V3U1UL315
MTG4 MTG3
K
K
D48008
D48011
PESD3V3U1UL315
D48010
A
WP6-S012VA2
D48006
PESD3V3U1UL315
A
X930301-001 PESD5V0F1USF315
PESD3V3U1UL315
PESD3V3U1UL315
A
A
PESD3V3U1UL315
PESD3V3U1UL315
PESD3V3U1UL315
A
A
PESD3V3U1UL315
DNP MTP48007
DNP
DNP
DNP DNP I2C_SCL_TP [25,31,48]
DNP DNP DNP
DNP
R48003
0 0201
C C
[48] TRACKPAD_INT_N_R2 TRACKPAD_INT_N [10,27]

C48004
100p PLACE CLOSE TO K22 (U1)
0201 Cap for filtering crosstalk. OEM Trackpad = 010 0000 + R/W bit
25V
Tune in EV2B to find proper value
Current reco.: 100pF (7-bit address + R/W bit)
Write = 0, Read = 1
3VSUS_ORG
100K
R48031
0201
KPTP_FAULT_N [25]
V5A
5v0_OFFBOARD
U48002
6 1
B IN OUT B
3 C48011
4 FAULT 6.3V
[27] SAM_KBTP_PWR EN 10u
5 2 0402
7 GND ILIM
GNDPAD
C48014 AP2553FDC-7R
1u 6.3V 49.9K
0201 R48030
0201
100K
0201
R48028
A A
48. Blade
Title:
Engineer:
Custom A 1.0.0.1
Vinafix.com Date: Thursday, April 26, 2018 Sheet 48 of 79
5 4 3 2 1
5 4 3 2 1
TS_BOOST_HV_IN D49001 TS_HV_IN

5V_TS MTP49035 TS_BOOST_HV_IN A K TS_HV_IN
[25,49] TPANEL_RST_N TPANEL_RST_N
PMEG4015EPK315
TS_HV_IN U49002
MTP49038 TS_HV_IN E3 C1
C49001 HV_IN ANT_HV0 C2
25V 10u C49002 C49067 C49055 ANT_HV1 D1
TS_V1P0_TCH_DIG 1P8V_TS 0603 2.2u 25V 0.1u 100p ANT_HV2 D2
0402 25V 0201 ANT_HV3 C3
0201 ANT_HV4 D3
C49004 2.2u C49008 2.2u TS_HV_IN A2 ANT_HV5 E2
6.3V 6.3V BOOST_HV_OUT ANT_HV6 E1
C49059 0.1u C49061 0.1u 2.2uH TS_BOOST_HV_IN ANT_HV7 F2
1.4A TS_BOOST_HV_IN A1 ANT_HV8 F1
C49060 100p C49062 100p L49001 BOOST_HV_IN ANT_HV9 G2
C49035 C49036 C49003 2.0X1.6X1.0MM ANT_HV10 G1
C49085 10u 0.1u 100p 6.3V 10u B1 ANT_HV11 H2
TS_V1P0_TCH_SSI 16V 0603 BOOST_VSS ANT_HV12 H1
1P8V_TS ANT_HV13 J2
C49007 10u ANT_HV14 J1
C49006 2.2u C49005 2.2u 0603 B8 ANT_HV15 K2
6.3V 6.3V A7 BUCK_1V8_IN ANT_HV16 K1
TS_V1P0_TCH_DIG BUCK_VSS ANT_HV17 L2
D C49063 0.1u C49065 0.1u ANT_HV18 L1 D
A8 ANT_HV19 M2
C49064 100p C49066 100p L49002 4.7uH TS_AYALON1_LVDCDC_LX B7 BUCK_OUT_FB ANT_HV20 M1
0805 BUCK_LX ANT_HV21 M3
F11
TS_V1P0_TCH_SSI ANT_HV22
G3
D4 L3
B8
3VSUS_ORG C49009
F5
TS_SPI_CLK TS_SPI_CLK U49001 10u 6.3V VDD_SSI ANT_HV23
[21,49] TS_SPI_CLK D6 B5
TS_V1P0_TCH_SSI 0603 C49010 4.7u 0402
VDD_SSI
VDE_F
VDD_CORE
VDE_H
TS_SPI_MOSI TS_SPI_MOSI RESERVED_GND[0] B4 C49011 2.2u 0402 1P8V_TS LDO_1V0_OUT M8 TS_AY0_ANT_LV0
[21,49] TS_SPI_MOSI RESERVED_GND[1] ANT_LV0 TS_AY0_ANT_LV1
D5 C49070 0.1u 0201 J3 M7
R49029 RESERVED_GND[2] C5 C49058 100p0201 VDD_1V8_IN ANT_LV1 L8 TS_AY0_ANT_LV2
100K RESERVED_GND[3] B5 TS_V1P8A ANT_LV2 L7 TS_AY0_ANT_LV3
RESERVED_GND[4] C6 C49068 C49069 TS_V1P8A C8 ANT_LV3 L6 TS_AY0_ANT_LV4
F2 RESERVED_GND[5] B6 C49032 0.1u 100p C49012 2.2u 0402 AVDD_IN ANT_LV4 K8 TS_AY0_ANT_LV5
F4 SPI_CLK/I2C_SCL RESERVED_GND[6] C3 0201 0201 C49071 0.1u 0201 F3 ANT_LV5 K7 TS_AY0_ANT_LV6
SPI_DI / I2C_SDA RESERVED_GND[7] 4.99K AVDD_1V8_3 ANT_LV6
TS_SPI_MISO R49014 22.1 F3
TS_TOUCH_SPI_DO_R C4 C49072 100p0201 H3 K6 TS_AY0_ANT_LV7
[10] TS_IRQ_3V3_N [21,49] TS_SPI_MISO GPIO7 / SPI_DO RESERVED_GND[8] AVDD_1V8_2 ANT_LV7
3
TS_SPI_CS_N G1 B3 0402 G3 J8 TS_AY0_ANT_LV8

D [21,49] TS_SPI_CS_N GPIO6 / SPI_CS RESERVED_GND[9] AVDD_1V8_1 ANT_LV8 J7 TS_AY0_ANT_LV9
Q49007 MTP49048 GTP49003 TS_GPIO0 D4 D8 ANT_LV9 J6 TS_AY0_ANT_LV10
G 1 TS_IRQ_1V8 D3 GPIO0 RESERVED_NC[0] J10 TPANEL_RST_N ANT_LV10 H6 TS_AY0_ANT_LV11
D2 GPIO1 / INT RESERVED_NC[1] H10 C49014 0.033u 1P8V_TS L5 ANT_LV11 H7 TS_AY0_ANT_LV12
s FLASH_PROTECT_N R49016 1K C1
TS_FLASH_PROTECTn_GPIO_R GPIO2 / IF_SEL RESERVED_NC[2] J9 0201 VDE_H ANT_LV12 H8 TS_AY0_ANT_LV13
[20,49] FLASH_PROTECT_N C2 GPIO3 RESERVED_NC[3] H9 B2 ANT_LV13 G6 TS_AY0_ANT_LV14
NX3008NBKMB315 C49013 C49015 0.033u
2
R49030 B1 GPIO4 RESERVED_NC[4] J8 0.1u 0201 VDE_F ANT_LV14 G7 TS_AY0_ANT_LV15

10K GPIO5 RESERVED_NC[5] H8 0201 ANT_LV15 G8 TS_AY0_ANT_LV16
GPIO signals may toggle during boot H2 RESERVED_NC[6] TPANEL_RST_N M6 ANT_LV16 F6 TS_AY0_ANT_LV17
(see errata document). Please make H1 GPIO9 TS_AY_RSTN_D K5 RSTN_H ANT_LV17 F7 TS_AY0_ANT_LV18
sure to implement the workaround G2 GPIO10 J1 TS_AY_RSTN_D TS_VDD_OK_F A3 RSTN_D ANT_LV18 F8 TS_AY0_ANT_LV19
described in the errata GPIO11 RSTN_D J5 TS_VDD_OK_F TS_VDD_OK_H M5 VDD_OK_F ANT_LV19 E7 TS_AY0_ANT_LV20
TS_TCK_1V8 H5 VDD_OK_F B2 TS_VDD_OK_H MTP49047 VDD_OK_H ANT_LV20 E8 TS_AY0_ANT_LV21
TS_TDI_1V8 H6 TCK RSTN ANT_LV21 D7 TS_AY0_ANT_LV22
TS_TDO_1V8 R49017 22.1 TS_JTAG_TS_TDO_R G6 TDI G10 TS_SCKL0 R49018 22.1 TS_SCKL TS_SCKL A6 ANT_LV22 D8 TS_AY0_ANT_LV23
TS_TMS_1V8 0201 F6 TDO SCKL SCLK ANT_LV23
[31,49] TS_TCK_1V8 TMS TS_SD0 TS_SD0
B10 A5 D5
[31,49] TS_TDI_1V8 TS_HOST_CLK SD0 TS_SD1 TS_SD1 A5_SSI_D0 RESERVED_GND1
(If Availible) J3 B11 B4 D6
[31,49] TS_TDO_1V8 CLK_IN SD1 C9 TS_SD2 TS_SD2 B3 A5_SSI_D1 RESERVED_GND2 C6
[31,49] TS_TMS_1V8 TS_DLITE_XI H11 SD2 TS_SD3 TS_SD3 A5_SSI_D2 RESERVED_GND3
R49019 C10 A4
200K TS_DLITE_XO_R J11 XI SD3 C11 TS_SD4 A5_SSI_D3 K3
XO SD4 C8 TS_SD5 MTP49003 TS_SCKL RESERVED_NC1 C5
F10 SD5 D9 TS_SD6 MTP49004 TS_SD0 RESERVED_NC2 C4
CLK_SLCT SD6 D10 TS_SD7 MTP49005 TS_SD4 RESERVED_NC3
R49015 G5 SD7 F8 TS_SD8 MTP49006 TS_SD8 B6 C7 MTTP49001
0 H3 FSCK SD8 G8 TS_SD9 GND ATB
FSDI SD9
GND1
GND2
G4 F9 TS_SD10
0201 H4 FSDIO SD10 G9 TS_SD11 DS-A5048_82BGA
FSCS SD11
Add underfill
TS_FLASH_CSn
4
Y49001 TS_HV_IN U49004

B9
J2
1 3 TS_DLITE_XO DS-D5000-B064 TS_HV_IN TS_HV_IN E3 C1 TS_AY1_ANT_HV0
HV_IN ANT_HV0 C2 TS_AY1_ANT_HV1
48MHz Special keepout made to isolate ANT_HV1
XTAL-XTAL,SM,48 MHZ,15 PPM,7 PF,2X1.6X0.155MM C49018 C49073 C49054 D1 TS_AY1_ANT_HV2
buck and boost ground from system ground
2
2.2u 25V 0.1u ANT_HV2 D2 TS_AY1_ANT_HV3

ANT_HV3
TS_FLASH_MOSI
TS_FLASH_MISO
C 0402 25V 100p C3 TS_AY1_ANT_HV4 C

TS_FLASH_SCK
1P8V_TS 0201 0201 ANT_HV4 D3 TS_AY1_ANT_HV5

C49016 C49017 A2 ANT_HV5 E2 TS_AY1_ANT_HV6
2% 25V 12p 2% 25V 12p BOOST_HV_OUT ANT_HV6 E1 TS_AY1_ANT_HV7
ANT_HV7 F2 TS_AY1_ANT_HV8
U49003 C49019 A1 ANT_HV8 F1 TS_AY1_ANT_HV9
son9_4x4xp6_p8mm 2.2u 16V BOOST_HV_IN ANT_HV9 G2 TS_AY1_ANT_HV10
1 8 ANT_HV10 G1 TS_AY1_ANT_HV11
6 CS VCC B1 ANT_HV11 H2 TS_AY1_ANT_HV12
The crystal and capacitors should be placed 5 CK BOOST_VSS ANT_HV12 H1 TS_AY1_ANT_HV13
1P8V_TS as close as possible to the D5, with short and 2 SI/0 1P8V_TS ANT_HV13 J2 TS_AY1_ANT_HV14
symmetrical traces to the XI and XO pins 3 Q/1 9 ANT_HV14 J1 TS_AY1_ANT_HV15
7 WP/2 MTG 4 B8 ANT_HV15 K2 TS_AY1_ANT_HV16
MTP49049 HLRS/3 VSS A7 BUCK_1V8_IN ANT_HV16 K1 TS_AY1_ANT_HV17
R49024 BUCK_VSS ANT_HV17 L2 TS_AY1_ANT_HV18
200K MTP49051 MX25U1635FZUI TS_V1P0_TCH_SSI ANT_HV18 L1 TS_AY1_ANT_HV19
A8 ANT_HV19 M2 TS_AY1_ANT_HV20
DNP MTP49040 B7 BUCK_OUT_FB ANT_HV20 M1 TS_AY1_ANT_HV21
MTP49041 C49033 2.2u 0402 BUCK_LX ANT_HV21 M3 TS_AY1_ANT_HV22
MTP49044 C49075 0.1u 0201 D4 ANT_HV22 L3 TS_AY1_ANT_HV23
MTP49045 C49074 100p0201 VDD_SSI ANT_HV23
MTP49046 B5
FLASH_PROTECT_N X950113-001 LDO_1V0_OUT M8 TS_AY1_ANT_LV0
FLASH_PROTECT_N [20,49] ANT_LV0 TS_AY1_ANT_LV1
1P8V_TS L49003 TS_V1P8A C49022 2.2u 0402 J3 M7
5V_TS MTP49032 C49076 0.1u 0201 VDD_1V8_IN ANT_LV1 L8 TS_AY1_ANT_LV2
TS_V1P8A C49057 100p0201 ANT_LV2 L7 TS_AY1_ANT_LV3
0.47uH C8 ANT_LV3 L6 TS_AY1_ANT_LV4
10u C49052
10u C49021
10u C49020
1P8V_TS V1P8
0805 C49023 2.2u 0402 AVDD_IN ANT_LV4 K8 TS_AY1_ANT_LV5
Analog ANT_LV5
MTP49042 6.3V 6.3V 6.3V C49077 0.1u 0201 F3 K7 TS_AY1_ANT_LV6
MTP49014 C49078 100p0201 H3 AVDD_1V8_3 ANT_LV6 K6 TS_AY1_ANT_LV7
0603 0603 0603 G3 AVDD_1V8_2 ANT_LV7 J8 TS_AY1_ANT_LV8
AVDD_1V8_1 ANT_LV8 J7 TS_AY1_ANT_LV9
MTP49027 TPANEL_RST_N ANT_LV9 J6 TS_AY1_ANT_LV10
FLASH_PROTECT_N TPANEL_RST_N [25,49] ANT_LV10 TS_AY1_ANT_LV11
MTP49008 H6
FLASH_PROTECT_N [20,49] ANT_LV11 TS_AY1_ANT_LV12
C49024 0.033u 0201 L5 H7
MTP49016 TS_TCK_1V8 VDE_H ANT_LV12 H8 TS_AY1_ANT_LV13
TS_TMS_1V8 TS_TCK_1V8 [31,49] B2 ANT_LV13 G6 TS_AY1_ANT_LV14
MTP49022 Not to be used for DEBUG build C49025 0.033u 0201
TS_TDO_1V8 TS_TMS_1V8 [31,49] VDE_F ANT_LV14 TS_AY1_ANT_LV15
MTP49023 G7
TS_TDI_1V8 TS_TDO_1V8 [31,49] ANT_LV15 TS_AY1_ANT_LV16
MTP49017 G8
TS_TDI_1V8 [31,49] Use MTP points on pg 31 instead TS_VDD_OK_H M6 ANT_LV16 F6 TS_AY1_ANT_LV17
TS_AY_RSTN_D K5 RSTN_H ANT_LV17 F7 TS_AY1_ANT_LV18
MTP49024 TS_SPI_CLK A3 RSTN_D ANT_LV18 F8 TS_AY1_ANT_LV19
TS_SPI_MISO TS_SPI_CLK [21,49] VDD_OK_F ANT_LV19 TS_AY1_ANT_LV20
MTP49025 M5 E7
TS_SPI_MOSI TS_SPI_MISO [21,49] VDD_OK_H ANT_LV20 TS_AY1_ANT_LV21
MTP49018 E8
TS_SPI_CS_N TS_SPI_MOSI [21,49] ANT_LV21 TS_AY1_ANT_LV22
MTP49019 D7
TS_SPI_CS_N [21,49] TS_SCKL ANT_LV22 TS_AY1_ANT_LV23
A6 D8
SCLK ANT_LV23
TS_SD4 A5 D5
TS_SD5 B4 A5_SSI_D0 RESERVED_GND1 D6
MTP49015 TS_SD6 B3 A5_SSI_D1 RESERVED_GND2 C6
B TS_SD7 A4 A5_SSI_D2 RESERVED_GND3 B
A5_SSI_D3 K3
RESERVED_NC1 C5
RESERVED_NC2 C4
RESERVED_NC3
B6 C7 MTTP49002
80 pin Sense Connector GND ATB
50 pin Drive Connector J49003

TS_HV_IN
DS-A5048_82BGA
U49005
Add underfill
1 2 TS_HV_IN TS_HV_IN E3 C1 TS_AY2_ANT_HV0

J49002 3 1 2 4 HV_IN ANT_HV0 C2 TS_AY2_ANT_HV1
V1 TS_AY2_ANT_LV6 5 3 4 6 TS_AY2_ANT_LV7 V0 C49026 C49079 C49053 ANT_HV1 D1 TS_AY2_ANT_HV2
1 2 TS_AY1_ANT_HV0 H0 V3 TS_AY2_ANT_LV4 7 5 6 8 TS_AY2_ANT_LV5 V2 2.2u 25V 0.1u ANT_HV2 D2 TS_AY2_ANT_HV3
H1 TS_AY1_ANT_HV1 3 1 2 4 TS_AY1_ANT_HV2 H2 V5 TS_AY2_ANT_LV2 9 7 8 10 TS_AY2_ANT_LV3 V4 0402 25V 100p ANT_HV3 C3 TS_AY2_ANT_HV4
H3 TS_AY1_ANT_HV3 5 3 4 6 TS_AY1_ANT_HV4 H4 V7 TS_AY2_ANT_LV0 11 9 10 12 TS_AY2_ANT_LV1 V6 0201 0201 ANT_HV4 D3 TS_AY2_ANT_HV5
H5 TS_AY1_ANT_HV5 7 5 6 8 TS_AY1_ANT_HV6 H6 V9 TS_AY2_ANT_LV14 13 11 12 14 TS_AY2_ANT_LV15 V8 A2 ANT_HV5 E2 TS_AY2_ANT_HV6
H7 TS_AY1_ANT_HV7 9 7 8 10 TS_AY1_ANT_HV8 H8 V11 TS_AY2_ANT_LV12 15 13 14 16 TS_AY2_ANT_LV13 V10 BOOST_HV_OUT ANT_HV6 E1 TS_AY2_ANT_HV7
H9 TS_AY1_ANT_HV9 11 9 10 12 TS_AY1_ANT_HV10 H10 V13 TS_AY2_ANT_LV10 17 15 16 18 TS_AY2_ANT_LV11 V12 ANT_HV7 F2 TS_AY2_ANT_HV8
H11 TS_AY1_ANT_HV11 13 11 12 14 TS_AY1_ANT_HV12 H12 V15 TS_AY2_ANT_LV8 19 17 18 20 TS_AY2_ANT_LV9 V14 A1 ANT_HV8 F1 TS_AY2_ANT_HV9
H13 TS_AY1_ANT_HV13 15 13 14 16 TS_AY1_ANT_HV14 H14 V17 TS_AY2_ANT_LV22 21 19 20 22 TS_AY2_ANT_LV23 V16 BOOST_HV_IN ANT_HV9 G2 TS_AY2_ANT_HV10
H15 TS_AY1_ANT_HV15 17 15 16 18 TS_AY1_ANT_HV16 H16 V19 TS_AY2_ANT_LV20 23 21 22 24 TS_AY2_ANT_LV21 V18 ANT_HV10 G1 TS_AY2_ANT_HV11
H17 TS_AY1_ANT_HV17 19 17 18 20 TS_AY1_ANT_HV18 H18 V21 TS_AY2_ANT_LV18 25 23 24 26 TS_AY2_ANT_LV19 V20 B1 ANT_HV11 H2 TS_AY2_ANT_HV12
H19 TS_AY1_ANT_HV19 21 19 20 22 TS_AY1_ANT_HV20 H20 V23 TS_AY2_ANT_LV16 27 25 26 28 TS_AY2_ANT_LV17 V22 BOOST_VSS ANT_HV12 H1 TS_AY2_ANT_HV13
H21 TS_AY1_ANT_HV21 23 21 22 24 TS_AY1_ANT_HV22 H22 V25 TS_AY1_ANT_LV22 29 27 28 30 TS_AY1_ANT_LV23 V24 1P8V_TS ANT_HV13 J2 TS_AY2_ANT_HV14
H23 TS_AY1_ANT_HV23 25 23 24 26 TS_AY2_ANT_HV0 H24 V27 TS_AY1_ANT_LV20 31 29 30 32 TS_AY1_ANT_LV21 V26 TS_V1P0_TCH_SSI ANT_HV14 J1 TS_AY2_ANT_HV15
H25 TS_AY2_ANT_HV1 27 25 26 28 TS_AY2_ANT_HV2 H26 V29 TS_AY1_ANT_LV18 33 31 32 34 TS_AY1_ANT_LV19 V28 B8 ANT_HV15 K2 TS_AY2_ANT_HV16
H27 TS_AY2_ANT_HV3 29 27 28 30 TS_AY2_ANT_HV4 H28 V31 TS_AY1_ANT_LV16 35 33 34 36 TS_AY1_ANT_LV17 V30 A7 BUCK_1V8_IN ANT_HV16 K1 TS_AY2_ANT_HV17
H29 TS_AY2_ANT_HV5 31 29 30 32 TS_AY2_ANT_HV6 H30 V33 TS_AY1_ANT_LV14 37 35 36 38 TS_AY1_ANT_LV15 V32 BUCK_VSS ANT_HV17 L2 TS_AY2_ANT_HV18
H31 TS_AY2_ANT_HV7 33 31 32 34 TS_AY2_ANT_HV8 H32 V35 TS_AY1_ANT_LV12 39 37 38 40 TS_AY1_ANT_LV13 V34 ANT_HV18 L1 TS_AY2_ANT_HV19
H33 TS_AY2_ANT_HV9 35 33 34 36 TS_AY2_ANT_HV10 H34 V37 TS_AY1_ANT_LV10 41 39 40 42 TS_AY1_ANT_LV11 V36 A8 ANT_HV19 M2 TS_AY2_ANT_HV20
H35 TS_AY2_ANT_HV11 37 35 36 38 TS_AY2_ANT_HV12 H36 V39 TS_AY1_ANT_LV8 43 41 42 44 TS_AY1_ANT_LV9 V38 B7 BUCK_OUT_FB ANT_HV20 M1 TS_AY2_ANT_HV21
H37 TS_AY2_ANT_HV13 39 37 38 40 TS_AY2_ANT_HV14 H38 V41 TS_AY1_ANT_LV6 45 43 44 46 TS_AY1_ANT_LV7 V40 C49034 2.2u 0402 BUCK_LX ANT_HV21 M3 TS_AY2_ANT_HV22
H39 TS_AY2_ANT_HV15 41 39 40 42 TS_AY2_ANT_HV16 H40 V43 TS_AY1_ANT_LV4 47 45 46 48 TS_AY1_ANT_LV5 V42 C49080 0.1u 0201 D4 ANT_HV22 L3 TS_AY2_ANT_HV23
H41 TS_AY2_ANT_HV17 43 41 42 44 TS_AY2_ANT_HV18 H42 V45 TS_AY1_ANT_LV2 49 47 48 50 TS_AY1_ANT_LV3 V44 C49081 100p0201 VDD_SSI ANT_HV23
H43 TS_AY2_ANT_HV19 45 43 44 46 TS_AY2_ANT_HV20 H44 V47 TS_AY1_ANT_LV0 51 49 50 52 TS_AY1_ANT_LV1 V46 B5
H45 TS_AY2_ANT_HV21 47 45 46 48 TS_AY2_ANT_HV22 H46 V49 TS_AY0_ANT_LV6 53 51 52 54 TS_AY0_ANT_LV7 V48 LDO_1V0_OUT M8 TS_AY2_ANT_LV0
H47 TS_AY2_ANT_HV23 49 47 48 50 V51 TS_AY0_ANT_LV4 55 53 54 56 TS_AY0_ANT_LV5 V50 C49028 2.2u 0402 J3 ANT_LV0 M7 TS_AY2_ANT_LV1
49 50 V53 TS_AY0_ANT_LV2 57 55 56 58 TS_AY0_ANT_LV3 V52 C49056 0.1u 0201 VDD_1V8_IN ANT_LV1 L8 TS_AY2_ANT_LV2
V48 51 52 V55 TS_AY0_ANT_LV0 59 57 58 60 TS_AY0_ANT_LV1 V54 TS_V1P8A C49082 100p0201 ANT_LV2 L7 TS_AY2_ANT_LV3
53 MTG1 MTG2 54 V57 TS_AY0_ANT_LV14 61 59 60 62 TS_AY0_ANT_LV15 V56 C8 ANT_LV3 L6 TS_AY2_ANT_LV4
MTG3 MTG4 V59 TS_AY0_ANT_LV12 63 61 62 64 TS_AY0_ANT_LV13 V58 C49029 2.2u 0402 AVDD_IN ANT_LV4 K8 TS_AY2_ANT_LV5
V61 TS_AY0_ANT_LV10 65 63 64 66 TS_AY0_ANT_LV11 V60 C49083 0.1u 0201 F3 ANT_LV5 K7 TS_AY2_ANT_LV6
V63 TS_AY0_ANT_LV8 67 65 66 68 TS_AY0_ANT_LV9 V62 C49084 100p0201 H3 AVDD_1V8_3 ANT_LV6 K6 TS_AY2_ANT_LV7
5024265010 TS_AY0_ANT_LV22 67 68 TS_AY0_ANT_LV23 AVDD_1V8_2 ANT_LV7 TS_AY2_ANT_LV8
V65 69 70 V64 G3 J8
V67 TS_AY0_ANT_LV20 71 69 70 72 TS_AY0_ANT_LV21 V66 AVDD_1V8_1 ANT_LV8 J7 TS_AY2_ANT_LV9
V69 TS_AY0_ANT_LV18 73 71 72 74 TS_AY0_ANT_LV19 V68 C49087 10u 0603 ANT_LV9 J6 TS_AY2_ANT_LV10
H0 to H47 are the horizontal sensor traces V71 TS_AY0_ANT_LV16 75 73 74 76 TS_AY0_ANT_LV17 V70 ANT_LV10 H6 TS_AY2_ANT_LV11
V0 to V71 are the vertical sensor lines 77 75 76 78 C49030 0.033u 0201 L5 ANT_LV11 H7 TS_AY2_ANT_LV12
A 79 77 78 80 VDE_H ANT_LV12 H8 TS_AY2_ANT_LV13 A
79 80 C49031 0.033u 0201 B2 ANT_LV13 G6 TS_AY2_ANT_LV14
81 82 VDE_F ANT_LV14 G7 TS_AY2_ANT_LV15
83 MTG1 MTG2 84 ANT_LV15 G8 TS_AY2_ANT_LV16
MTG3 MTG4 TS_VDD_OK_H M6 ANT_LV16 F6 TS_AY2_ANT_LV17
TS_AY_RSTN_D K5 RSTN_H ANT_LV17 F7 TS_AY2_ANT_LV18
50 pin Flex Breakout 5024268010 A3

M5
RSTN_D
VDD_OK_F
VDD_OK_H
ANT_LV18
ANT_LV19
ANT_LV20
F8
E7
E8
TS_AY2_ANT_LV19
TS_AY2_ANT_LV20
TS_AY2_ANT_LV21
ANT_LV21 D7 TS_AY2_ANT_LV22
TS_SCKL A6 ANT_LV22 D8 TS_AY2_ANT_LV23
SCLK ANT_LV23
TS_SD8 A5 D5
TS_SD9 B4 A5_SSI_D0 RESERVED_GND1 D6
TS_SD10 B3 A5_SSI_D1 RESERVED_GND2 C6
TS_SD11 A4 A5_SSI_D2 RESERVED_GND3
A5_SSI_D3 K3
RESERVED_NC1 C5
RESERVED_NC2 C4 Title: 49. Touch
RESERVED_NC3
Vinafix.com 80 pin Flex Breakout B6

GND ATB
C7 MTTP49003
Size Project Name
Engineer: Surface
Rev
DS-A5048_82BGA Add underfill Custom A 1.0.0.1
5 4 3 2 1
5 4 3 2 1
1P8V_WIFI_INT_OUT
1P8V_WIFI_INT_OUT
VDD1V8_RF_H16
PCIE_W_PERST_N 220 R50001
1P8V_WIFI_INT_OUT U50001A PCIE_WIFI_PERST_N [25,50]
C50001 SMD RND 22.8mil 0201
100p 25V A10 C3 WIFI_GPIO0 MTTP50001
SMD RND 22.8mil
VDD1V8_RF_K16 J1 AVDD18_1 GPIO[0] D5 WIFI_GPIO1 MTTP50002
SMD RND 22.8mil DNP PCIE_W_DISABLE 0 R50002
AVDD18_10 GPIO[1] WIFI_GPIO2 PCIE_WIFI_DISABLE_N [25,50]
VDD1V8_RF_K9 C50002 0201 K3 B2 MTTP50003 C50004 0.1u 0201
100p 25V K9 AVDD18_11 GPIO[2] A3 6.3V
C50003 C50005 K16 AVDD18_12 GPIO[3] E7
AVDD18_13 GPIO[4] 0201
1u 3.3p 0201 M14 E8
6.3V 25V C1 AVDD18_14 GPIO[5] E9
0201 0201 D2 AVDD18_2 GPIO[6] E10 1P1V_WIFI_INT 1P1V_WIFI_INT_OUT
E14 AVDD18_3 GPIO[7] K13
1.1V
VDD1V8_RF_G16 3P3V_RADIO F1 AVDD18_4 GPIO[8]/LED_OUT_WLAN J13 R50003 0
VDD1V8_RF_K3 G1 AVDD18_5 GPIO[9]/LED_OUT_BT E6
C50006 G16 AVDD18_6 GPIO[10]/SER_WB E11 0201
C50007 C50008 100p 25V H1 AVDD18_7 GPIO[11]/LED_OUT_NFC D8 PCIE_W_PERST_N
1u 100p H16 AVDD18_8 GPIO[12]/PCIE_PERSTn B7 PCIE_W_DISABLE
D 6.3V 25V 0201 B11 AVDD18_9 GPIO[13]/PCIE_W_DISABLE B6 1P8V_WIFI_INT_OUT 1.8V D
0201 0201 MTTP50004 VDD3V3_RF_D16 D16 AVDD33_1 GPIO[14] A5 1P8V_WIFI_INT 1P8V_WIFI_INT_OUT
SMD RND 22.8mil M3 AVDD33_2 GPIO[15] D6
VDD1V8_RF_D2 C50009 M9 AVDD33_3 GPIO[16] B5 R50005 49.9K 0201 R50006 0
VDD1V8_RF_J1 6.3V 0.1u C50070 C50071 AVDD33_4 GPIO[17] C6 R50007 49.9K 0201
C50011 0201 2p 25V 2p 25V D15 GPIO[18] C4 R50008 49.9K 0201 0201
C50010 100p 25V 0201 0201 H10 AVSS1 GPIO[19] C5
100p H15 AVSS10 GPIO[20] B3 R50009 49.9K 0201
25V 0201 J15 AVSS11 GPIO[21] B4
0201 J16 AVSS12 GPIO[22] C2
VDD1V8_RF_C1 K1 AVSS13 GPIO[23] D4
C50012 K15 AVSS14 GPIO[24]
VDD1V8_RF_H1 100p 25V L2 AVSS15 G5 WF_CNFG_HST0 MTTP50005 SMD RND 22.8mil
L3 AVSS16 CONFIG_HOST[0] E5 WF_CNFG_HST1 MTTP50006 SMD RND 22.8mil
C50013 0201 L5 AVSS17 CONFIG_HOST[1] F4 WF_CNFG_HST2 MTTP50007 SMD RND 22.8mil 1P1V_WIFI_INT
100p L7 AVSS18 CONFIG_HOST[2] E4 WF_CNFG_HST3 MTTP50008 SMD RND 22.8mil 3P3V_WWAN L50001
VDD1V8_RF_G1 25V F2 AVSS19 CONFIG_HOST[3] 0402 2.2A 3P3V_RADIO
0201 VDD1V8_RF_PCIE_HSIC_A10 L9 AVSS2 M15 C50015
AVSS20 BRF_ANT BRF_ANT_M15 [50]
C50014 L10 10u
1u C50016 C50017 L13 AVSS21 B14 6.3V
6.3V 1u 6.3V 10p 50V L16 AVSS22 BUCK11_SENSE A15 WF_BUCK11_VOUT L50002 2.2uH 0603 30 OHM
0201 F3 AVSS23 BUCK11_VOUT 2.5X2X1.2MM 1.67A C50018 30 Ohm
0201 0201 F16 AVSS3 C15 0.1u 6.3V C50020 C50021
AVSS4 BUCK18_SENSE 1P8V_WIFI_INT
VDD1V8_RF_F1 G2 B16 WF_BUCK18_VOUT 0201 10u 0.1u
G15 AVSS5 BUCK18_VOUT 6.3V 6.3V
C50023 3P3V_RADIO H2 AVSS6 L50003 2.2uH 0603 0201
0.1u H3 AVSS7 2.5X2X1.2MM 1.67A
6.3V H9 AVSS8 C50024
0201 VDD3V3_RF_M3 AVSS9 10u
6.3V
88W8897-B1-CBK2-T 0603
VDD1V8_RF_M14 C50026 C50027 C50028
10u 100p 25V 3.3p 25V
C50029 C50030 6.3V
OPTION HOST VIO
2.2u 100p 0603 0201 0201 1P8V_WIFI_INT_OUT
3P3V_RADIO MTTP50009
6.3V 25V SMD RND 22.8mil PLACE TP's
0402 0201 DNP on BOTTOM,
MTTP50010
VDD3V3_RF_M9 R50014 0 SMD RND 22.8mil
MTTP50011
SMD RND 22.8mil
VDD1V8_RF_NFC_E14 C50031 C50032 C50033 0201 MTTP50012
SMD RND 22.8mil
10u 100p 25V 3.3p 25V
C C50034 6.3V R50015 0 C
0.1u 6.3V 0603 0201 0201 VIO 3P3V_RADIO
U50001B
0201 R50016 49.9K
0201 VIO D10 J14 0201
VDD3V3_RF_B11 C10 RES_D10 TCK H14
C50036 E15 RES_C10 TDI H13 R50017 49.9K
C50035 C50037 0.1u 6.3V E16 NFC_ANT_N TDO L14 0201 DNP
1u 6.3V 0.1u 6.3V 0201 F13 NFC_ANT_P TMS
C50038 0.1u NFC_SWP1_VDDIN F14 NFC_SWP1_IO BT -> USB2.0(5) 3P3V_RADIO
0201 0201 6.3V F15 NFC_SWP1_VDDIN D11 USB_DMNS R50018 0 0201
NFC_SWP1_VDDOUT USB_DMNS USB_DPLS USB2_BT_DN [24]
0201 F12 C11 R50019 0 0201
NFC_SWP2_IO USB_DPLS USB2_BT_DP [24]
E13
G14 NFC_SWP2_VDDOUT B15 WF_VBAT_IN_3V3 R50020 0
VIO_RF_L12 G13 NFC_TWSI_CLK VBAT_IN F7 0201
E12 NFC_TWSI_SDA VBLDO33_CNTL F6
3P3V_RADIO C50039 G12 NFC_VDDANT VBLDO33_SENSE 1P1V_WIFI_INT_OUT C50041 C50040
0.1u
WIFI > PCIe3 NFC_WI_IN 1u 10u
6.3V R50021 0 0201 PCIE_WIFI_CLKREQ_N_R C7 A7 VDD11 6.3V 6.3V
[20,50] PCIE_WIFI_CLKREQ_N PCIE_WIFI_RCLK_R_DN PCIE_CLKREQn VDD11
0201 R50022 0 0201 D9 B10 VDD12_B1 C50042 0.1u 6.3V GND 0201 0603
3P3V_RADIO [20] PCIE_WIFI_RCLK_DN PCIE_WIFI_RCLK_R_DP PCIE_RCLK_N VDD12 VIO
R50023 0 0201 C8 0201 DNP
[20] PCIE_WIFI_RCLK_DP PCIE_RCLK_P
C9 A2
[24] PCIE_WIFI_TX9_DN PCIE_RX_N VIO
R50038 10K B9 L12 3P3V_RADIO
[24] PCIE_WIFI_TX9_DP PCIE_WIFI_C_RX9_DN PCIE_RX_P VIO_RF
R50042 10K DNP 0201 C50045 0.1u 6.3V 0201 B8 A12 C50047
PCIE_WIFI_CLKREQ_N [20,50] [24] PCIE_WIFI_RX9_DN PCIE_WIFI_C_RX9_DP PCIE_TX_N VIO_SD
0201 C50046 0.1u 6.3V 0201 A8 0.1u 6.3V
[24] PCIE_WIFI_RX9_DP PCIE_TX_P
D7 A6 0201
R50036 10K R50039 49.9K D13 PCIE_WAKEn VSS1 A9
PCIE_WIFI_WAKE_N [25,50] PCIE_WIFI_DISABLE_N [25,50] PCIE_WAKE_N_R PDn VSS2
0201 0201 R50024 0 A11
[25,50] PCIE_WIFI_WAKE_N VSS3
0201 D14 A14
R50037 49.9K R50040 H11 RES1 VSS4 B1
DNP 0201 10K R50025 0 H12 RES10 VSS5 C14
[25] WLAN_PWD_N RES11 VSS6
DNP 0201 0201 J12 C16
SMD RND 31.5mil K12 RES12 VSS7 D1
MTP_BF50001 F8 RES13 VSS8
R50041 49.9K F9 RES2 E1 REF_CLK_IN
PCIE_WIFI_PERST_N [25,50] M_PDN RES3 XTAL_IN REF_CLK_OUT
0201 F10 E2
F11 RES4 XTAL_OUT MTTP50013 SMD RND 22.8mil
SMD RND 31.5mil AT0 G4 RES5 A4
RES6 SLP_CLK_IN
3
4
MTP_BF50002 G7 1P8V_WIFI_INT_OUT
R50027 49.9K Done: RF_CNTL0_N G8 RES7 E3 SER_DAT Y50001
0201 = 1 for 40MHz G11 RES8 SER_DAT F5 SER_CSN R50028 49.9K
auto calibration RES9 SER_CSn FL4000023
DNP SMD RND 31.5mil D3 SER_CLK 0201
1
2
B C50050 MTP_BF50003 RF_CNTL0_N G9 SER_CLK B
RF_CNTL0_N 3.2X2.5MM
WF_RF_PATH_COAX
5.6p RF_CNTL1_P G10 D12

0201 RF_TR_2_A M5 RF_CNTL1_P SD_DAT[0] C13 R50029 49.9K
RF_TR_2_B M10 RF_TR_2_A SD_DAT[1] B13 0201 DNP
U50002 RF_TR_5_A M2 RF_TR_2_B SD_DAT[2] A13
J50001 LFD182G45MJ6D431 RF_TR_5_B M7 RF_TR_5_A SD_DAT[3] MTTP50014
MM8030-2610RK0 RF_TR_5_B SMD RND 22.8mil
1 6 RF_TR_5_A_C C50054 5.6p RF_TR_5_A B12 MTTP50015
P50001 PROBE GND1 5G_IN 0201 25V C12 SD_CLK SMD RND 22.8mil
SIG WF_RF_PATH_A_ANT 2 1 2 5 SD_CMD
OUT IN ANT GND
WIFI_RF_2_A_OUT C50055 10p RF_TR_2_A 88W8897-B1-CBK2-T
3 4 3 4
GND3GND4 GND3 2G_IN 0201 50V MTTP50016
DNP SMD RND 22.8mil 1P8V_WIFI_INT_OUT
A1
GND 2,3,4 C50056

20449-001E 5.6p 25V 3P3V_RADIO
X864717-001 L50006 0201
LXES15AAA1-153 R50030 49.9K
A2
X935756-001 0201
R50031
10K C50057
Done: 4.7k 0402 for ESD 3P3V_RADIO U50003 0201 0.1u 6.3V
AT24C16D-MAHM 0201
R50032 10K
R50033 0201
0 1 8
GND 0201 2 NC Vcc 7 WF_EEP_WP
3 NC1 WP 6 SER_CLK
4 NC2 SCL 5 SER_DAT
C50060 10p 9 GND SDA
C50058 <HDL_POWER>
5.6p 25V 0201 50V PAD
U50004 0201 X912618-001
J50002 LFD182G45MJ6D431 DNP U50005
MM8030-2610RK0 BGS12SN6
P50002 PROBE
1
GND1 5G_IN
6 RF_TR_5_B_C C50063
0201
5.6p
25V
RF_TR_5_B
4
EEPROM
SIG WF_RF_PATH_B_ANT 2 1 WF_RF_PATH_B 2 5 VDD
OUT IN ANT GND 3 RF_TR_2_B_1 C50065 10p RF_TR_2_B
3 4 3 4 WIFI_RF_2_B_FIL_IN C50066 10p WIFI_RF_2_B_FIL_IN_C 5 RF1 0201 50V
GND3GND4 GND3 2G_IN 50V RFIN 1 BRF_ANT_M15_C
RF2
A1
R50034 0201 0 RF_CNTL1_P_R 6

A GND 2,3,4 CTRL A
20449-001E 0201 C50069 2
L50009 10p 50V GND C50067 10p
X864717-001 BRF_ANT_M15 [50]
A2
LXES15AAA1-153 0201 0201 50V

X935756-001
Title: 50. Wi-Fi_BT

Engineer: Surface
A2 A 1.0.0.1
Vinafix.com
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title: 51. Empty

Engineer:
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
D D
C C
B B
A A
Title: 52. Empty

Engineer: Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
mDP mux to HDMI/DVI Dongle control

V3P3_DSW V3P3_DSW
V3P3_DSW
PCH Side R53013 R53012

V3P3_DSW
DP Side
2.2K 2.2K R53011
U53002
0201 0201 100K
9 0201
C53004 0.1u 6.3V DDPB_AUX_C_DN 5 VDD
[10] MDP_DDI1_AUX_DN M+
0201 7 1
[10] DDPB_CTRL_DATA D+ Y+ DDPB_AUX_MUX_DN [53]
D DDPB_AUX_C_DP D
C53003 0.1u 6.3V 4
[10] MDP_DDI1_AUX_DP M-
0201 6 2
[10] DDPB_CTRL_CLK D- Y- DDPB_AUX_MUX_DP [53]
10
[53] DP_CONFIG1 8 SEL 3 C53001
ALL OE GND 0.1u 6.3V R53014
C53002 0201 100K
0.1u 25V PI3USB102GZLEX 0201
0201 X936286-001
10-WFQFN
NOTE:
Place ESD Diodes close to DP connector
[10] MDP_SNK1_HPD
V5.5MLA0402NR
RES_0201_12mil
100K
C C
A2
R53002
D53001
A1
[53] DP_CONFIG1
V5.5MLA0402NR
RES_0201_12mil
A2
1M
D53002
A1
R53001
NOTE:
Place those AC Caps near to DP connector.
WLCSP-5 J53001
PCMF1USB3S 1
0201 B1 2 GND1
C53015 0.1u DDI1_DATA0_C_DP GND 3 Hot_Plug_Detect
[10] MDP_DDI1_ML0_DP ML_LANE0_DP ML_Lane0(p)
6.3V C2 A2 4
C53016 0.1u DDI1_DATA0_C_DN C1 OUT_1m IN_1m A1 ML_LANE0_DN 5 CONFIG1
[10] MDP_DDI1_ML0_DN 6.3V OUT_1p IN_1p R53009 1M ML_CONFIG2 6 ML_Lane0(n)
U53008 RES_0201_12mil 7 CONFIG2
0201 GND2
WLCSP-5 8
PCMF1USB3S ML_LANE1_DP 9 GND3
0201 B1 ML_LANE3_DP 10 ML_Lane1(p)
B
C53013 0.1u DDI1_DATA1_C_DP GND ML_LANE1_DN 11 ML_Lane3(p) GND B
[10] MDP_DDI1_ML1_DP 6.3V C2 A2 ML_LANE1_DP ML_LANE3_DN 12 ML_Lane1(n) GND 29
C53014 0.1u DDI1_DATA1_C_DN C1 OUT_1m IN_1m A1 ML_LANE1_DN 13 ML_Lane3(n) MTG9 28
[10] MDP_DDI1_ML1_DN 6.3V OUT_1p IN_1p 14 GND4 MTG8 27
U53007 ML_LANE2_DP 15 GND5 MTG7 26
0201 ML_Lane2(p) MTG6
ML_AUX_CONN_DP 16 25
WLCSP-5 ML_LANE2_DN 17 AUX_CH(p) MTG5 24
PCMF1USB3S ML_AUX_CONN_DN 18 ML_Lane2(n) MTG4 23
0201 B1 19 AUX_CH(n) MTG3 22
C53018 0.1u DDI1_DATA2_C_DP GND ML_3P3V_PWR 20 GND6 MTG2 21
[10] MDP_DDI1_ML2_DP ML_LANE2_DP DP_PWR MTG1
6.3V C2 A2
C53017 0.1u DDI1_DATA2_C_DN C1 OUT_1m IN_1m A1 ML_LANE2_DN
[10] MDP_DDI1_ML2_DN OUT_1p IN_1p M1019977-001
6.3V
U53006 V3P3_DSW
0201
U53005 V3P3_DSW
WLCSP-5 DNP NCP380HMUAJAATBG
PCMF1USB3S R53010 10K ML_FLAG_N dfn7_2x2xp55_p65mm
0201 B1 0201 3 6
C53012 0.1u DDI1_DATA3_C_DP GND 4 FLAG# IN
[10] MDP_DDI1_ML3_DP ML_LANE3_DP EN ML_3P3V_PWR
6.3V C2 A2 5 1 C53010
C53011 0.1u DDI1_DATA3_C_DN C1 OUT_1m IN_1m A1 ML_LANE3_DN 7 GND1 OUT 2ML_V3P3_FUSE_ILIM C53021 1u 6.3V
[10] MDP_DDI1_ML3_DN OUT_1p IN_1p GND2 ILIM
6.3V 22u 6.3V 0201
U53004 0603
0201
GND
ILIM(33K) ~ 0.8A
C53007 C53008 C53009 meet VESA spec
22u 6.3V 470p 25V 1u 6.3V R53006
0603 0201 0201 33K
K
0201
U53001
IP3319CX6 PESD5V0S1UA
bga6_2x3ns_p95x1p34xp6_p4mm D53003
A1 DP_O DP_I A2 ML_AUX_CONN_DP
A
[53] DDPB_AUX_MUX_DP ML_AUX_CONN_DN

B1 DM_I B2
[53] DDPB_AUX_MUX_DN
DM_O C2
A ID A
C1
GND
[10] mDP_PWR_EN
R53018
49.9K
0201
Title: mDP
Microsoft Engineer: Surface
C A 2.89.6
5 4 3 2 1
5 4 3 2 1
Sensor Connector to IR and RGB Cameras, Left and Right Microphones, and ALS Sensor C54001
To IR LED on
0.01u FPC through
0201
MTP54002 SMD RND 22.8mil U54001

J54001
MP2370DJ MTP54003
VSYS L54001
SMD RND 22.8mil
IR_BST 1 6 IR_SW IRLED_A_P
D BST SW IRLED_A_P [54]
K
L54007 Place caps close to U52001 D
1.3A CAM_IR_LED_IN 5 3 IR_FB D54002 4.7uH 100KHz
120 Ohm 100MHz 0402 IN FB DNP R54019 DNP
MTP54005 4 2 C54004 C54005 1K C54008
C54009 C54010 SMD RND 22.8mil EN GND 0402 0201 0402 6.3V
A
0.1u 16V 10u 16V R54013 2.05K TSOT23-6 4.7u 10p 1u
[54] CAM_IR_STB
0201 0603 0201 0402
R54012 R54018 100K IR_FB_R R54021 1K IRLED_C_N

IRLED_C_N [54]
49.9K 0201 0201
R54015 0201
150K V3P3_DSW R54020 R54022 MTP54004
0201 C54006 7.5K 0.25 SMD RND 22.8mil
U54002 220p 0201 1206
TLV3011 C54007 0201
0201
CAM_IR_STB_ERR_INM 4 6 0.1u
IN- V+
C54002 R54016 4.99K CAM_IR_STB_ERR_REF 5 1 CAM_IR_STB_ERR
1u 0201 REF OUT
0402 CAM_IR_STB_ERR_INP 3 2
IN+ V-
R54017 SC70-6 RN54001, RN54002, RN54003, RN54005 need
V3P3_DSW 10K
C
0201
common footprint from DFX and to be C
DNP stuffed with X869109-001

L54006 Place close to pin 23 MTP54009
1.3A MTP54001
120 Ohm 100MHz0402 SMD RND 22.8mil SMD RND 22.8mil
C54013 C54014
0.1u 6.3V 10u 6.3V Layout Note: J54001 Pin 1 and Odd Pins along North Edge
0201 0402 IRLED_A_P J54001
[54] IRLED_A_P
C54003
Place 0.1u 6.3V 2 1 IRLED_C_N
IRLED_C_N [54]
C54003 near 0201 4 2 1 3
connector 6 4 3 5
CAM_IR_XO_EN_R 8 6 5 7 CAM_F_XO_EN_R R54030 0201 1K
CAM_F_XO_EN [20,25,54]
CAM_IR_PWR_DN_N 10 8 7 9
[25] CAM_IR_PWR_DN_N CAM_IR_STB 10 9 DMIC_CLK [20,40] 0nH 2.5GHZ
12 11
[54] CAM_IR_STB
14 12 11 13 4 3
[20,40] DMIC_DATA 14 13 CSI2_IRCAM8_DP [23]
16 15
[25] CAM_F_PWR_DN_N
18 16 15 17 1 2
[25] I2C_SDA_CAM 18 17 CSI2_IRCAM8_DN [23]
20 19
[25] I2C_SCL_CAM
22 20 19 21 RN54001 X869109-001
0nH 2.5GHZ 24 22 21 23
3 4 26 24 23 25 0nH 2.5GHZ
[23] CSI2_FCAM4_DN
28 26 25 27 4 3
CSI2_CLK2_IRCAM_DP [23]
B 2 1 RGB_LED_A_P 30 28 27 29
B
[23] CSI2_FCAM4_DP
V5A 32 30 29 31 1 2
[25] I2C_SDA_ALS CSI2_CLK2_IRCAM_DN [23]
X869109-001 RN54005 34 32 31 33
Q54001B [25] I2C_SCL_ALS
36 34 33 35 RN54002 X869109-001
NX3008CBKS 36 35 CAM_IR_XO_EN_R
38 37
4 3 R54026 3.48K MTP54006 40 MT2 MT1 39 0nH 2.5GHZ
0402 MT4 MT3 4 3
CSI2_CLK1_FCAM_DN [23]
R54025 SMD RND 22.8mil
10K MTP54007 1 2
V3P3_DSW CSI2_CLK1_FCAM_DP [23] V1P8A
0201 WP3-S036VA1-R6000
5
SMD RND 22.8mil GND RN54003 X869109-001

MTP54010
R54008
U54004
10K GND SMD RND 22.8mil
Q54001A R54029
GND 0201 Pullups for I2C are on the Camera Flex. 5
VCC
6
NX3008CBKS 2 4
[25] ALS_IRQ_N [25] CAM_IR_XO_EN A Y
1 4.7K 0201
[20,25,54] CAM_F_XO_EN B 3 C54016
2 GND 0.1u 6.3V
[25] CAM_LED_F_EN
MTP54008 0201
74LVC1G32GX
1
SMD RND 22.8mil
A GND
ALS 7-bit I2C Address = 0x44 A
RGB Cam 7-bit I2C Address = 0x36

Check with Camera/RF/Power team for regulation, filtering, and component infoRGB EEPROM 7-bit I2C Address = TBD Title: 54. Camera/Sensor Conn
Power regulation, Privacy LED and sensors moved locally on IR Cam 7-bit I2C Address = 0x60 Microsoft Confidential
Engineer: Surface
sensor board. IRLED Buck regulation local to mb Size Project Name Rev
Odd side of the J54001 connector faces the North edge of the PCB B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
L55001
DLP11TB800UL2L
1.25X1.0X.3MM
3P3V_PANEL 3P3V_PANEL 3P3V_PANEL
3 4 6.3V 0.1u
C55001 EDP_TX0_DN [10]
0201
C55002 C55003 C55004 2 1 6.3V 0.1u
D C55005 EDP_TX0_DP [10] D
0.47u 6.3V 1u 6.3V 0.1u 6.3V 0201
0201 0201 0201 3P3V_PANEL J55001 3P3V_PANEL
AXE550127 L55002
DLP11TB800UL2L
1.25X1.0X.3MM
2 1
4 2 1 3 3 4 6.3V 0.1u
4 3 C55006 EDP_TX1_DN [10]
6 5 0201
8 6 5 7 2 1 6.3V 0.1u
8 7 C55007 EDP_TX1_DP [10]
10 9 0201
12 10 9 11
14 12 11 13 L55003
16 14 13 15 EDP_TX0_R_DN DLP11TB800UL2L
18 16 15 17 EDP_TX0_R_DP 1.25X1.0X.3MM
20 18 17 19
22 20 19 21 EDP_TX1_R_DN 3 4 6.3V 0.1u
[25,55] TCON_VENDOR_ID 22 21 EDP_TX1_R_DP C55008 EDP_TX2_DN [10]
24 23 0201
[25,55] TCON_BRD_REV 24 23
26 25 2 1 6.3V 0.1u
26 25 EDP_TX2_R_DN C55009 EDP_TX2_DP [10]
28 27 0201
[10] EDP_HPD 28 27 EDP_TX2_R_DP
30 29
6.3V 0201 3 4 L55004 32 30 29 31
[10] EDP_AUX_DP 0.1u C55010 32 31
DLP11TB800UL2L EDP_AUX_R_DP 34 33 EDP_TX3_R_DN
6.3V 0201 2 1 EDP_AUX_R_DN 36 34 33 35 EDP_TX3_R_DP L55005
[10] EDP_AUX_DN 0.1u C55011 1.25X1.0X.3MM 36 35
38 37 DLP11TB800UL2L
C 38 37 C
40 39 PANEL_LOGO 1.25X1.0X.3MM
PANEL_BIST 40 39 PANEL_LOGO [30]
SMD RND 22.8mil GTP55004 42 41
[72] BKLT_FB6 42 41 BKLT_FB5 [72]
44 43 3 4 6.3V 0.1u
[72] BKLT_FB4 44 43 BKLT_FB3 [72]VCC_EDP_BKLT_OUT C55012 EDP_TX3_DN [10]
46 45 0201
VCC_EDP_BKLT_OUT [72] BKLT_FB2
48 46 45 47
BKLT_FB1 [72]
2 1 6.3V 0.1u
48 47 C55013 EDP_TX3_DP [10]
50 49 0201
50 49
52 51
54 MTG2 MTG1 53
MTG4 MTG3
V3P3_DSW
C55022 C55023
B GTP55006 B
[25,55] TCON_VENDOR_ID
SMD RND 22.8mil 0201 330p 0201 330p
GTP55005
[25,55] TCON_BRD_REV
SMD RND 22.8mil
Caps are for EDP plane discontinuities, connect to GND
VCC_EDP_BKLT_OUT
C55015 Place at connector J55001

0.1u 50V
0603
V3P3_DSW
STITCHING CAPS for Plane splits; one note item 101

A A
C55026 C55027 C55028 C55029 C55030 C55031 C55032 C55033
0.1u 6.3V 0.1u 6.3V 0.1u 6.3V 0.1u 6.3V 0.1u 6.3V 0.1u 6.3V 0.1u 6.3V 0.1u 6.3V
0201 0201 0201 0201 0201 0201 0201 0201
Title: 55. eDP connector

Engineer: Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
1.5A
D56002
PMEG4015EPK315
A K
PWR_SL_F
MTTP56007
D D
1.5A
D56003
PMEG4015EPK315
A K V_ALWAYS_ON
VDD_BAT
R56006
10K
0201
U56002
3P3VA_EN 3 2
EN VIN
3P3VA
C56003
4.7u
R56005 35V
33K 0603
0201 MTP_BF56002
3P3VA
GTP56003 7 SMD RND 31.5mil
PG L56001
SP_TP_SMDp58mm
9VA_SW_NODE 1 2
SW
8 C56005 C56004 C56022
SLEEP 10uH 22u 6.3V 22u 6.3V 22u 6.3V
X881302-001 0603 0603 0603
4.0X4.0X1.2MM MAX
VCC_RTC
D56007 D56004
R56008 A K A K
4 10 499 MTP56003
1 NC VOS C56024
C 0201 SMD RND 22.8mil C
6 PGND 6.3V 0.1u 1PS79SB30 1PS79SB30 R56047
11 AGND 0201 249K
VCCST_CPU AGND/PGND 5 DNP 0201
FB DNP
3
Q56005B
R56043 TPS62177DQCR R56073 5 NX3008NBKS
3P3VA_SW [27] VCCRTC_RST
330 499
4
0201 0201
C56023
R56045 R56071
100K 100K
0201 0201
0.1u
6.3V
C56021
0201
Q56002 MASTER_THERMTRIP_N [27] GND
B
NX3008NBKMB315 Q56005A
NX3008NBKS 3P3VA 1u U56005
E C 2 3 499 R56024 6 1 6.3V NX3P1108UK 3P3VA_SW
s
[10] PM_THERMTRIP_N [69] SL_VDET

0201 0201
Q56001 SOT-363 A2 A1
VIN VOUT MTP56004
MMBT3904TT1G
G
2
1
R56076 B2 B1
33K R56025 0201 EN GND
0201 1M R56060 WLCSP4 C56020
[22,27,34,38,43,44] PLT_RST_BUF_N
0201 499 0.1u 6.3V
VDD_BAT 301K R56022 C56012 0201 0201
1u
100K R56023 6.3V
0201 0201 C56013
DNP 0.1u 6.3V
3P3VA_SW 3P3VA 0201
R56042
B B
499K
U56004
0201 R56013 R56015
GTP56006 499 R56026 1 200K 200K
[22,27,34,59] PCH_DPWROK 0402 GP_VDD_BATA_A 15 VDD 0201 0201
R56017 R56018 VDD_VBAT_A
10K 10K 3
0201 0201 SL_VDET 5
R56021 R56019 PCH_DPWROK_A 4 SL_PG
100 100 DPWROK GTP56010 SL_PG [27,69]
0201 0201 7 SMD RND 22.8mil
2 NC_7
[29] SAM_PWRBTN_N PWR_BTN_N R56069
499 0201 GP_SYS_PWR_EN [63]
R56001 10K 0201 18 8 3P3VA_SW_EN GTP56009
[28] SAM_GP_RST SAM_RST 3P3VA_SW_EN SMD RND 22.8mil 0201
R56002 10K 0201 19 9 0 R56077
[27] SAM_GP_DEEPSLP
A1
SAM_DEEPSLP NC_9 SAM_PCH_RSMRST_N [18,22,29]

A2
C56007 C56008 C56009 C56010 DNP

1000p 0.1u 6.3V 0.1u 6.3V 1000p 20 0201
0201 0201 D56005 0201 0201 C56025 C56026 BAT_SHDN GP_BAT_SHUTDOWN [70] PCH_DPWROK_A 0 R56078
25V BAT54CW 25V 1u 1u 12 DNP
100K R56003 6.3V 6.3V TSYS_A 17
0201 0201 0201 13 PBTN_STATE SAM_PWR_BTN_STATE [29,34]
K
100K R56004 DBG_MODE

0201
6 11
[28] SAM_RTC_WAKEUP RTC_WAKE_N GND
[27,43] SSD_FLUSH_DONE R56072 0201 1K

14
COLD_BOOT
[48] PWR_SW_N [39] GP_TSYS
10
16 FLUSH_DONE
SSD_FLUSH
A1
3P3VA_SW C56015 C56027

D56006 6.3V 0.1u 1u
S56001 V5.5MLA0402NR 0201 6.3V
DEBUG_GP 0201 SLG4X4955VTR FW R028_012U
A2
SWITCH-N-O_6P_1-3_2-4_2MP TBL2304
2 1
MTTP_BF56001
SMD RND 31.5mil
4 N-O 3 R56058
MTP_BF56001
A A
SMD RND 31.5mil
GND 200K
0201
5
6
0201
0 R56059 GP_SSD_FLUSH [43]
[27] GP_SAM_COLD_BOOT
GTP56008
GP_DBGACC [29,31,47]
POWER BUTTON SMD RND 22.8mil
Title: 56. 3P3VA & Reset

C A 1.0.0.1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title: 57. VCCEDRAM & VCCEOPIO

Engineer: Surface
5 4 3 2 1
Vinafix.com
5 4 3 2 1
D D
C58006 U58001A
10u 16V
L2 F13
0805 REG5 PVCC4 PVCC7 REG5
VSYS C58002 C58001
1u 1u
6.3V 6.3V
C58005 0402 0402 VSYS
0.01u 25V
0201
1-2
MTP58004
Q58001 HG4 J1 E13
VCCIO VIN HG4 VIN7_1 E14 V3P3A_PCH
R58006 C58015
CSD87333Q3D VIN7_2
10 0.1u 16V
L58002 8 TG 3 F14 BOOT7
7 4 K1 BOOT7
VSW
SW4 0201 0402 L58001
6 TGR
C58007 D13 SW7
C58012 C58016 C58013 C58017 C58018 0.47uH SW7_1 D14
0.1u R58005
R58062 22u 22u 22u 22u 22u 4.6A 5 0 0201 SW7_2 C58003 C58004 1.0uH C58008 C58011 C58009 C58010 C58165
3.2x2.5x1.2mm
BG
16V 10%
100K 6.3V 6.3V 6.3V 6.3V 6.3V PGND BOOT4 K2 10u 0.01u 3.6A 22u 22u 22u 22u 1u 6.3V R58063
0201 0603 0603 0603 0603 0603 BOOT4 25V 25V 6.3V 6.3V 6.3V 6.3V 0201 200K
0402 2.5X2.0X1.2mm
C13 0603 0201 0603 0603 0603 0603 0201
9
IND-PWR,SM,0.47 uH,4.6 A,.025 OHM,20%,3.2X2.5X1.2MM,HEI322512A-R47M-Q8 PGND7_1 C14 IND-PWR,SM,1.0 uH,3.6 A,.042 OHM,20%,2.5X2.0X1.2MM,HEI252012A-1R0M-Q8 DNP
LG4 L1 PGND7_2 R58010
C58164 LG4 0 0201
1u 6.3V 0201 F12 VOUT7
VOUT7 3P3V_WWAN_IN_VR_FB_R [65]
(AGND)
M1
M2 PGND4_1
R58015 PGND4_2
10 0201 A5 VSYS MTP58008
VOUT4 L3 VIN8_1 B5
[12] VCCIO_SENSE VOUT4 VIN8_2 R58013 C58019
V1P8A
(SGND4)
10 0.1u 16V
K3 C5 BOOT8
[12] VSSIO_SENSE SGND4 BOOT8 0201 0402 L58005
C
C58026 A4 SW8 C
10u 16V SW8_1 B4
0805 SW8_2 C58020 C58021 1.5uH C58022 C58023 C58024
VSYS
10u 0.01u 2.7A 22u 22u 22u R58064
25V 25V 2.5X2.0X1.2mm 6.3V 6.3V 6.3V 100K
A3 0603 0201 0603 0603 0603 0201
C58025 PGND8_1 B3
0.01u PGND8_2 IND-PWR,SM,1.5 uH,2.7 A,.065 OHM,20%,2.5X2.0X1.2MM,HEI252012A-1R5M-Q8
C58167
25V 1u 6.3V
0201 C6 VOUT8 0201
VOUT8
(AGND)
1-2
MTP58005 HG5 A8 DNP
Q58002 HG5 R58018
VIN
CSD87333Q3D C12 0 0201
V5A PVCC9 REG5
V1P8A_VR_FB_R [62]
L58004 8 TG 3
0402 7 VSW 4 SW5 A7 C58028
R58067 SW5
150 6 TGR
C58027 1u 6.3V
C58032 C58033 C58034 C58035 C58036 WPN4020HR47MTJ02 0.1u 16V R58020 0402
22u 22u 22u 22u 22u 4X4X2MM BG 5 0402
10 0201
6.3V 6.3V 6.3V 6.3V 6.3V PGND BOOT5 A9
0603 0603 0603 0603 0603 BOOT5 A10 MTP58010
150 VIN9_1 VSYS
B10 C58029 V1P8U_2P5U
R58068
9
VIN9_2 0.1u 16V

0402 R58025
LG5 A6 C11 BOOT9 0402
LG5 BOOT9 10 0201 L58003
C58162 C58163 C58064 C58065 A11 SW9
22u 22u 22u 22u SW9_1 B11
6.3V 6.3V 6.3V 6.3V SW9_2 C58030 C58031 2.2uH C58037 C58038 C58039 C58169
0603 0603 0603 0603 B6 10u 0.01u 2.5A 22u 22u 22u 1u 6.3V R58065
3P3VA PGND5 25V 25V 6.3V 6.3V 6.3V 0201 100K
2.5X2.0X1.2mm
A12 0603 0201 0603 0603 0603 0201
PGND9_1 B12
PGND9_2 IND-PWR,SM,2.2 uH,2.5 A,.083 OHM,20%,2.5X2.0X1.2MM,HEI252012A-2R2M-Q8
1u 6.3V C58166 B9
Q58008B 0201 VOUT5 D12
R58069 (AGND)
VPPID
NX3008NBKS 200K DNP R58030
1P8V_DUAL_VR_FB_R [16]
3
0201 C10 VOUT9

[70] V5A_VR_FB_R VOUT9
0201 0 (AGND) R58029
B B
5 Q58008A 10 0201
NX3008NBKS C58046
4
10u 16V
R58073 0805 10u C58043
VSYS VSYS
2 SKL_SLP_SUS_N [22,27,34,58,59] G2 REG5 0805 16V
499 0201 PVCC10
1
C58045 C58041 C58044

0.01u 1u 6.3V 0.01u
25V 0402 0201 25V
0201
Q58007
1-2
1-2
Q58006
CSD87333Q3D HG6 J14 F1 HG10 CSD87333Q3D V1P2U
VIN HG6 HG10 VIN
V3P3_VCCDSW
L58007 8 TG 3 3 TG 8 L58006
7 VSW 4 SW6 K14 G1 SW10 4 VSW 7
6 TGR
C58047 SW6 SW10 C58042 TGR
6
C58055 C58056 C58058 C58060 C58061 WPN4020HR47MTJ02 0.1u 16V R58035 R58033 0.1u 16V WPN4020HR47MTJ02 C58048 C58049 C58050 C58051 C58052 C58053 C58054
22u 22u 22u 22u 22u 4X4X2MM BG 5 0402 10 0201 10 0201 0402 5 BG 4X4X2MM 22u 22u 22u 22u 22u 22u 22u
6.3V 6.3V 6.3V 6.3V 6.3V PGND BOOT6 J13 F2 BOOT10 PGND 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
0603 0603 0603 0603 0603 BOOT6 BOOT10 0603 0603 0603 0603 0603 0603 0603
9
9
LG6 L14 H1 LG10 C58170
LG6 LG10 1u 6.3V
C58168 0201
1u
0201 6.3V M13 H2
M14 PGND6_1 PGND10 R58044
DNP PGND6_2
R58045 G8 10 0201
0 0201 DDRID R58066
R58077 VOUT6 K13 H3 VOUT10 100K
150 [58] V3P3_DSW_VR_FB_R VOUT6 VOUT10 V1P2U_VR_FB_R [16]
3P3VA 0201
0603 R58081 (AGND) (AGND)
V3P3_DSW BD99992GW-E2
A Q58010B R58078 0.005 0603 3P3VA A
NX3008NBKS R58070 R58074
200K U58002 150
3
0201 DNP V3P3_VCCDSW 0

A2 A1 0603 0201
5 Q58010A B2 VIN1 VOUT1 B1 Q58009B R58071
NX3008NBKS R58075 C2 VIN2 VOUT2 C1 C58059 C58057 NX3008NBKS 200K
4
VIN3 VOUT3 V3P3_DSW_VR_FB_R [58]

6
10K 22u 22u 0201

R58079 0201 D2 D1 6.3V 6.3V
2 DNP ON GND 0603 0603 5 Q58009A
PMIC_EN [29,58,59] DNP
499 DNP NX3008NBKS
1
PI3PD22920GBEX
6
0201 R58072
DNP
R58076 2 499 DNP
SKL_SLP_SUS_N [22,27,34,58,59] Title: 58. PMIC 1
0 0201 DNP 0201 Microsoft Confidential
Surface
1
R58080 Engineer:
Vinafix.com
[22,27,34,58,59] SKL_SLP_SUS_N
DNP
PMIC_EN [29,58,59]
499
0201 DNP
C A 1.0.0.1
5 4 3 2 1
5 4 3 2 1
VSYS R59095
3.01K 0402
C59040
0.1u
16V
C59002
0201
16V
10u
U58001B
0805
D D
M11 VSYS
3P3VA VBATTBKUP
L7 N6
3P3VA_SW ECVCC PVCC11 REG5
GTP59001 L6
L12 EC_RST_N C59001
SMD RND 22.8mil ECWAKECLK 1u 0.01u 25V
K9
D10 BC_ACOK 6.3V C59008
VSYS [28] PMIC_SAM_INT_N PMIC_INT_N 0402 0201
1-2
H14
3P3VA VIN P7 HG11 V1P00A
C59034 C59039 H11 HG11 VIN
Q59001
R59082 0.01u LOWBATTSENSE CSD87333Q3D
10u 16V (AGND)
200K 0805 25V G11 3 TG 8 L59001
R59083 0201 0201 VDCSENSE P6 SW11 4 7
(AGND) VSW
200K E10 SW11 R59004 TGR
6
0201 F11 RBATTPOS 10 0.47uH C59003 C59004 C59010 C59005 C59006 C59011
RBATTNEG 0201 C59007 5 BG 4.6A 22u 22u 22u 22u 22u 22u R59090
3
K8 N7 BOOT11 PGND 3.2x2.5x1.2mm 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 100K
Q60001B ACOK BOOT11 0.1u 16V 0603 0603 0603 0603 0603 0603 0201
5 NX3008NBKS E11 0402 DNP
IND-PWR,SM,0.47 uH,4.6 A,.025 OHM,20%,3.2X2.5X1.2MM,HEI322512A-R47M-Q8
9
Q60001A SOT-363 E12 RADPPOS
4
NX3008NBKS RADPNEG
6
P5 LG11
SOT-363 PMIC_EN_P LG11
H12
2 PMIC_EN C59035
[29,58] PMIC_EN
MTTP59005 L5 1u
REG33
1
ENSEL N5 0201 6.3V

R59084 3P3VA_SW F7 PGND11
[22,27,31,34,38,59,61] SKL_SLP_S0_N SLP_S0_N
300K
0201 K12 R59019
VDD_V3P3A_RTC
24.9K 0201 M6 VOUT11
V1P00A_VR_FB_R [61]
R59001 R59002 C59025 R59029 L10 VOUT11 0201 10
1u 0402 RTCRST_N (SGND11)
2K 2K 6.3V M7 SGND11
1% 1% K5 SGND11
[22,27,34,56] PCH_DPWROK 0 0201
0402 0402 DPWROK
MTTP59006 R59020
N4
[29,34,39] I2C_SCL_MCU CLK
P4
[29,34,39] I2C_SDA_MCU DATA
M4
ADRS_SEL
C C
B7
[22,27,34,58] SKL_SLP_SUS_N SLP_SUS_N
D6
V1P8A_EN
D7
DS3_VREN M8
V3P3_DSW PVCC12 REG5
M10
V5_EN C59016
H7 1u
V7_EN 6.3V
R59009 G7 0402
10K V12_EN
0201 H8
V11_EN N8
VIN12_1 VSYS
J5 P8
[28,34,59] PMIC_SAM_RSMRST_N RSMRST_N VIN12_2 R59026 V0P85A
C59019
SAM_PMIC_PWRBTN_N 10
[34,59] SAM_PMIC_PWRBTN_N K7 M9 BOOT12
PWRBTN_N BOOT12 L59002
0201 0.1u 16V
MTTP59007 J7 N9 SW12 0402
EC_ONOFF_N SW12_1 P9
J8 SW12_2 C59017 C59018 0.47uH C59021 C59022 C59023 C59024 C59037 C59038
[22,34] PCH_PWRBTN_N PCH_ONOFF_N 10u 0.01u 4.6A 22u 22u 22u 22u 22u 22u C59036 R59091
R59016 F6 25V 25V 3.2x2.5x1.2mm 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 1u 100K
[22,27,34,45,59,61] SKL_SLP_S4_N 22 SLP_S4_N
0201 N10 0603 0201 0603 0603 0603 0603 0603 0603 0201 6.3V 0201
D9 PGND12_1 P10 DNP
V1P8U_2P5U_EN PGND12_2 IND-PWR,SM,0.47 uH,4.6 A,.025 OHM,20%,3.2X2.5X1.2MM,HEI322512A-R47M-Q8
V3P3_DSW G6
[22,34,59,61] SKL_SLP_S3_N SLP_S3_N R59028
VCCST_CPU G9 N11 VOUT12
V1P00S VOUT12 V0P85A_VR_FB_R [26]
R59088 (AGND) (SGND12) 0201 10
10K V1P8A
E9 P11
0201 V1P8S SGND12
(AGND)
F9 0201 0
V3P3_DSW V3P3S R59030
(AGND)
K6
[22,34] SKL_VCCST_PWRGD VCCST_PWRGD
MTTP59008
J6
B [22,29,34] PMIC_SAM_ALL_SYS_PWRGD ALL_SYS_PWRGD B
F4
[11,34,59] DDR_VTT_CTL DDR_VTT_CTL
MTTP59009
L4
[22,34] SKL_PCH_PWROK PCH_PWROK V1P2U
H6
[22,34] SKL_SYS_PWROK SYS_PWROK F3
VDDQ
(AGND)
MTTP59001 SKL_SLP_S0_N [22,27,31,34,38,59,61]

MTTP59010 C59033
SMD RND 22.8mil
0.22u
MTTP59002 MTTP59011 0201
SKL_SLP_S3_N [22,34,59,61]
SMD RND 22.8mil
MTTP59003 E1
PMIC_SAM_RSMRST_N [28,34,59] VIN13_1
C59042 E2
SMD RND 22.8mil VIN13_2
MTTP59004 0.068u D1
DDR_VTT_CTL [11,34,59] VTT_1 V0P6DX_LPDDR3
16V D2
SMD RND 22.8mil VTT_2
0201 C59026 C59027
MTTP59012 DNP 25V 22u
SKL_SLP_S4_N [22,27,34,45,59,61] 6.3V
10u DNP
SMD RND 22.8mil
C1 0603 0603
PGND13_1 C2
PGND13_2
E3 VTTS
VTTS
[22,27,34,45,59,61] SKL_SLP_S4_N (AGND)
0201
0
C59041 BD99992GW-E2 R59037
68p
Place C59041 next to R59016

A A
SAM_PMIC_PWRBTN_N [34,59]
D
R59042
Q59003
499 SAM_PMIC_PWRBTN_R
[29] SAM_PMIC_PWRBTN G RUM002N02GT2L
C59009
0201 1u
6.3V
S
R59043 0402
100K
0201
Title: 59. PMIC 2
Engineer: Surface
C A 1.0.0.1
5 4 3 2 1
5 4 3 2 1
MTTP60002
U58001C MTTP60003
N13 C9
TESTSEL2 REG5 REG5
B13
B2 TESTSEL1 J12
TESTSEL0 REG33 REG33
F8 M3 C60011 R60048
NO_FAULT AVCC33_1 C3 R60049 10V 200K
N2 AVCC33_2 G14 C60006 C60008 C60005 C60004 C60007 C60010 200K 4.7u 0201
LDO_UVLO_OFF AVCC33_3 M12 1u 10V 1u 10V 1u 10V 10V 10V 10V 0201 0402
N1 AVCC33_4 D3 0201 0201 1u 1u 4.7u
0201
P1 TEST00 AVCC33_5 0201 0201 0402
P2 TEST01
B1 TEST02 H13 PMIC_REGIN
TEST10 REGIN REG33
A1 B8 ILIM5 150
A2 TEST11 ILIM5 L13 ILIM6
D TEST12 ILIM6 R60004 D
B14 0402
A14 TEST20
A13 TEST21 R60040 R60041 C60018 C60003
TEST22 301K C60017 0.047u
N14 200K 1u 10V
TEST30 0201 0.047u 16V
P14 0201 0201
TEST31 16V 0603
P13
TEST32 0603
J2 ILIM4
K11 ILIM4 G3 ILIM10
REG33 DVCC33 ILIM10 M5 ILIM11
C60009 ILIM11
1u 10V C60019 C60020 C60021
0201 R60042 0.047u R60043 0.047u R60044 0.047u
G12 499K 16V 150K 16V 475K 16V
J3 DGND_1 0201 0201 0603 0201 0603
DGND_2 0603
L11
REG33 CLK_VDD
C60022
1u 10V
20%
0201
J11
CLK_GND
G4
H4 LED1 E4
LED2 GPIO_VDD1 V1P8A
J4 C7
K4 LED3 GPIO1 C8
GTP60002 LED4 GPIO2
SMD RND 22.8mil
R60033 D5 V3P3_DSW
100 0201 PMIC_ICPROCHOT_N D11 GPIO_VDD2 D8
[10,34,63,66] PROCHOT_N PROCHOT_N GPIO3 E8
[34] NTC_REF GPIO4
C C60014 C60015 C
MTTP60001 1u 10V 1u 10V
R60038
SMD RND 22.8mil 0201 0201
10K 0402 PMIC_MBI L8
R60005 R60006 R60007 R60008 MBI
24.9K 24.9K 24.9K 24.9K PMIC_BATTID K10
BATTID E7
0201 0201 0201 0201 GPIO5
NTC_REF J10 E6
SYSTHERM0 F10 NTC_REF GPIO6 E5
SYSTHERM1 G10 SYSTHERM0 GPIO7 F5
V_THERM_GNSS_THERMISTOR H10 SYSTHERM1 GPIO8 G5
SYSTHERM3 H9 SYSTHERM2 GPIO9 H5
SYSTHERM3 GPIO10
PMIC_VREF L9
RT60001 RT60002 RT60003 RT60004 VREF C4 R60037
0.14 mA 0.14 mA 0.14 mA 0.14 mA C60012 AGND1 G13 47K
AGND2 N3 0201
1u 6.3V C60013 AGND3
t t t t 0201 1u 10V AGND4
N12
P3
0201 AGND5
J9 P12
ADC_GND AGND6
BD99992GW-E2
B B
A A
Title: 60. PMIC 3

Engineer: Surface
C A 1.0.0.1
5 4 3 2 1
5 4 3 2 1
V3P3_DSW V1P2U U61001

SLG5NT1477VTR VCCPLL_OC
1
VDD
2 5-6 MTP61002
D 3-4 D1 S1 7 D
D2 S2
C61003 C61004 9 8
0.1u 6.3V 1u 6.3V ON GND C61001 C61002
0201 0201 1u 6.3V 10u 10V
0201 0603
[61] S0iX_EN
U61002
V3P3_DSW V1P00A SLG5NT1477VTR VCCSTG
1
VDD
2 5-6
3-4 D1 S1 7 V1P00A
C61005 C61006 D2 S2
0.1u 6.3V 1u 6.3V 9 8 C61007 R61002
0201 0201 ON GND 10u 4V 0
0402 0201
V3P3_DSW V1P00A_VR_FB_R [59]
C C
DEBUG_OSG
C61019
DEBUG_OSG 0.1u 6.3V
U61007 0201
[18,61] XDP_PRESENT_LOGIC 1 6
2 A VCC 5
3 B NC 4 VCCSTG_EN
GND Y
SN74AUP1G32DRYR
R61003
0 0201
NDEBUG_OSG
S0iX_EN V3P3_DSW V3P3_DSW

V3P3_DSW
DEBUG_OSG
C61018 C61009 U61003 VCCST_CPU
DEBUG_OSG 0.1u 6.3V 6.3V 1u SLG5NT1477VTR
B U61004 C61008 U61006 0201 0201 B
SN74AUP1G08DRYR 0.1u 6.3V [18,61] XDP_PRESENT_LOGIC 1 6 1
0201 2 A VCC 5 V1P00A VDD
[22,27,34,45,59] SKL_SLP_S4_N B NC
1 A VCC 6 3 4 VCCST_EN 2 5-6
[22,34,59] SKL_SLP_S3_N GND Y D1 S1
2 B
NC 5
3-4 7
[22,27,31,34,38,59] SKL_SLP_S0_N D2 S2
3 GND Y 4 SN74AUP1G32DRYR
S0iX_EN [61] 9 8
ON GND
C61012
R61004 1u 6.3V C61011
0 0201 0201 10u 6.3V
NDEBUG_OSG 0402
V1P00A
MTP61001
C61014
1u 6.3V C61015 C61016
0201 1u 6.3V 10u 6.3V
0201 0402
A A
Title: 61. Discrete Load Switches

Engineer: Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
D D
V5A
C62003
1u 6.3V
0201
U62001
1
VDD 5-6
2 S1-S2
[20,25] PCH_AUD_1V8_EN ON C62005
7 CAP_1P8V_AUDIO 0.1u 6.3V
3-4 CAP 0201
V1P8A D1-D2 8
C62001 GND C62002
6.3V 1u C62010 SLG59M1448V 2200p 25V
0201 STDFN8 0201
2p
25V
0201
C C
1P8V_AUDIO
SMD RND 22.8mil

MTP62001
V1P8A
B B
C62009
10u C62007
6.3V 1u 6.3V
0402 0201 U62003 1P8V_TS
NX3P1108UK SMD RND 22.8mil
V1P8A R62001 MTP62003
0 A2 A1
0201 VIN VOUT
[25,64] PCH_TPANEL_PWR_EN
B2 B1 C62008
V1P8A_VR_FB_R [58] EN GND 0.1u 6.3V
WLCSP4 0201
A A
Title: 62. +1.8VSB & Load SW

A3 A 1.0.0.1
5 4 3 2 1
STITCHING CAPS for Plane splits PCHGR_IN

One-note item 102
C63064 C63065
V3P3_DSW VSYS 0.1u 0.1u
25V 25V
0201 0201 PTP63005
PCHGR_IN
C63060 C63061 C63062 C63063 AON7405
16V 16V 0.1u 0.1u Q63008 AON7405 PTP63006
0.1u 0.1u 25V 25V Q63009
0201 0201 0201 0201 PW R_SL_F 3
5,6,7,8
2 3
5,6,7,8
5 1 2
R63001
1 5
S
VSYS
D
PCHGR_IN CHGR_VIN CHGR_VIN
S
I2 I1
G
DAOL
D PCHGR_IN 3P3VA VSYS D
G
4
25V
25V
25V
25V
25V
E2 ESNESE1
25V
25V
25V
25V
25V
25V
C63003 C63026 C63024 C63025
10u
10u
10u
10u
10u
1000p 0.01u 0.01u 1000p
0.02
10u
10u
10u
10u
10u
10u
25V 25V 25V 25V MTP63001
R63034 0612
R63059 0201 0201 0201 0201
100K R63002 R63003
C63032
C63013
C63004
C63005
C63006
0603
0603
0603
0603
0603
0201 150K 0201 1 1
C63007
C63008
C63009
C63010
C63011
C63012
3
0201 0201
Q63005B
C63001
5 NX3008NBKS
SOT-363
4
6
Q63005A
NX3008NBKS
2 1u
[29,34] SAM_CHGR_PSU_ON 6.3V
1
D63001 0201 C63035
C63034
BAT54CW 0.047u
0.047u
R63014 25V
25V
301K 200mA 0402
0402
0201 R63033 DNP
DNP
A1 C63019 0
R63049
R63022 0.1u 0201
K 14.7K 6.3V
1 0201 0201 R63055
ACP
ACN
VSYS A2 0603 0
0201
19
16
13
15
14
1u C63033 U63001 C63015
1-2
1-2
25V 0402 17 0.22u 25V R63031
ACIN
CSIN
ADP
ASGATE
CSIP
DCIN 12 BOOT1 0603 0 Q63001 Q63002 R63048 R63052
BOOT1 0402 VIN VIN
150 150
CSD87334Q3D CSD87334Q3D 0603 3P3VA
VDD 18 11 CHG_HIDRV1_D 3 TG 8 8 TG 3 0603
VDD UGATE1 L63001
4 VSW 7 7 VSW 4
4.7u C63018 TGR
6 6 TGR
C 6.3V 0402 R63012 10 CHG_SW 1 Q63006B R63046 C

4.7 8 PHASE1 5 BG
1.2uH BG 5 NX3008NBKS 200K
VDDP
3
4.7u C63023 0402 PGND ind_13p7x12p8x2mm PGND 0201
6.3V 0402 9 CHG_LODRV1_D
LGATE1 L63002
VDDP 5
9
C63016
4
3P3VA_SW 0201 0.22u 25V R63030
R63005 100 CHG_PROCHOT_N_R 23 4 BOOT2 0603 0 1.2uH Q63006A
[10,34,60,66] PROCHOT_N PROCHOT BOOT2 IND_13X13X2
200K
0402 NX3008NBKS
6
VAMON = 18x(VCSIP-VCSIN); VBMON = 18x(VCSON-VCSOP) 6 CHG_SW 2
PHASE2 + +
0201
0201 0 R63032 29 C63070 C63071 2

[28] SAM_CHG_IMON AMON_BMON GP_SYS_PW R_EN [56,63]
47uF 47uF
R63011
1
R63015 7 CHG_LODRV2_D 16V 16V R63044
LGATE2 499
0 0201 1210 1210 0201
CHG_ACOK 24
[29] SAM_CHG_ACOK ACOK 5 CHG_HIDRV2_D
UGATE2
0201 49.9 R63017 CHG_SCL 22

[27,31,70] I2C_ROP_SCL SCL 3 R63051
0201 49.9 R63016 CHG_SDA 21 VSYS 0 0402 PTP63003
[27,31,70] I2C_ROP_SDA SDA 0.047u C63022
E2
R63007
I2
DNP 25V 0402 1
0612
SENSE
2 CHG_SRP_A C63017
LOAD
CSOP 0201 0.01
0.047u C63021 1u
R63029 100K GP_BATGONE_R 25 DNP 25V 0402 6.3V R63009
[27,70] BATGONE BATGONE 0201
I1
E1
0201 1 CHG_SRN_A
R63050 133K R63020 CSON PTP63004
DNP R63010
5-8
499 0201 CHG_ILIM_A27
PROG 1
CHG_BATDRV_N 0201 SON-8
25V
25V
S
ILIM = 0.475A 32 4
0.047u C63020 0201 R63021 BGATE G CSD25402Q3A
1K Q63003
10u
10u
0402 25V 28 31 R63058 C63031
COMP VBAT 0402 0.1 4700p 10V
D D D
R63006 0201
1
2
3
C63029
C63030
B C63027 0 B
20 30 CHG_PMON 0603
OTG_EN_CMP_IN PSYS PMON [66]
26 33
VBAT_CHGR
OTGPG_CMP_OUT GND_PAD R63008
100p 7.87K
25V ISL9237HRZ 7-bit I2C Address = 0x12 ?? 0201
0201
C63056 R63053
DNP
R63056 100
499 0.22u 0201
0201 0603
VBAT_CHGR [28]
25V change to 7.87K based on Pyxis, and this charger is 1.44uA/W, TI charge is 1uA/W.
DNP and MPS voltage limit is 0.8V
C63057
1
2
3
[27,69] SAM_SL_5V_EN 0.047u
0201 D D D
16V Q63004
4 G CSD25402Q3A
S SON-8
5-8
VDD_BAT
3P3VA_SW
R63019
100K
R63060 0201
200K
0201
R63061
3
[27] SAM_SL_5V_PG Q63007B
499 0201 5 NX3008NBKS
4
A A
6
Q63007A
2 NX3008NBKS
[56,63] GP_SYS_PW R_EN
1
R63013
499
0201 R63028
200K
0201 R63057
5.11K Title: 63. CHARGER
0201 Microsoft Confidential
Engineer: Surface
Custom A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
5V_TS
V5A
C64001
U64002 6.3V 10u
SLG59M1448V 0402
1
D VDD 5-6 MTP64001 D
2 S1-S2 SMD RND 22.8mil
ON
7
3-4 CAP
D1-D2
8
C64003 GND
6.3V 1u STDFN8
0201
C64024
1000p 25V
0201
[25,62] PCH_TPANEL_PWR_EN
C64025
C64008 10u 6.3V
0.1u 6.3V 0402
0201
Note: connect pins 1, 3, 4 together at the chip

V5A Fat trace; 1uF input cap should be next to IC (pin 3-4)
C C
U64004 5V_AUDIO
SLG59M1448V
1
VDD 5-6 MTP64004
2 S1-S2 SMD RND 22.8mil
[25] PCH_AUD_5V_EN ON
7 CAP_5V_AUDIO_REG
3-4 CAP
D1-D2
8 C64017
GND 1000p 25V C64016
C64029 STDFN8 0201 10u 6.3V
C64015 0402
1u 6.3V 2p
0201 25V
0201
B V5A B
C64018
1u 6.3V
0201
MTP64005
SMD RND 22.8mil
A A
MTP64006 Title: 64. +5V Load SW

SMD RND 22.8mil Microsoft Confidential
Engineer: Surface
5 4 3 2 1
Vinafix.com
5 4 3 2 1
3P3V_PANEL
V3P3_DSW
U65001
A2 A1 MTP65001
B2 VIN1 VOUT1 B1
C65001 C2 VIN2 VOUT2 C1 SMD RND 22.8mil
D 6.3V 1u VIN3 VOUT3 C65002 D
0201 D2 D1 0.1u
ON GND 6.3V
0201
PI3PD22920GBEX
R65006 1K 3P3V_PANEL_EN MTP65002

[30] DISPLAY_VDD_EN
SMD RND 22.8mil
0201
C C
3P3V_SSD
MTP65003
SMD RND 22.8mil
V3P3_DSW
U65003
A2 A1
B2 VIN1 VOUT1 B1
C2 VIN2 VOUT2 C1
VIN3 VOUT3 V3P3A_PCH
D2 D1
C65006 ON GND
1u 6.3V
0201 PI3PD22920GBEX C65005 3P3V_WWAN
U65004
1u 6.3V
B 0201 A2 A1 MTP65006 B
B2 VIN1 VOUT1 B1 SMD RND 22.8mil
C2 VIN2 VOUT2 C1
C65007 VIN3 VOUT3
0.1u 6.3V D2 D1
[25] WWAN_PWREN ON GND
0201
[29] 3P3V_SSD_EN
PI3PD22920GBEX
C65009 C65008
R65031 2p 25V 0.1u 6.3V
100K 0201 0201
0201
R65016
V3P3A_PCH 0
0201
3P3V_WWAN_IN_VR_FB_R [58]
A A
Title: 65. +3P3V Load SW

Engineer: Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
V3P3_DSW
R6602 10K PE_CORE R6637 0

DNP
D D
PWM_CORE1 [67]
Scale to 0.80V for Psys Max.
[63] PMON PWM_CORE2 [67]
C6601 R6601
76.8K
Check Psys Settings 4700p
DNP
PWM_GT1 [68]
VSYS R6636
PWM_SA [67]
GND GND 2M
VIN_SEN_CORE
EV2.5 18 Oct 2016 SYNC_CORE [67,68]

R6603
Should these be pull 133K
up to 3V3? VCCST? C6602
0.01u
CS_CORE1 [67]
CS_CORE2 [67]
GND
V3P3_DSW CS_GT1 [68]

R6604
0 GND
VDD33_CORE
CS_SA [67]
10V C6603 VDD1V8_CORE
20% 1u C6604
PR6601
PR6602
PR6611
VCCST_CPU 1u
PR6604
49
47
46
36
43
42
41
40
39
38
34
U6601
GND GND
PSYS
PE
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
STB
EPAD
VIN_SEN
44 5 PR6605 1.5K
IMVP8 PROG VDD33 CS1 4 CSSUMA_CORE
R6605
R6606
C6613 DNP PR6606 1.5K

26 CS2 3
C C
VDD18 CS3 2
CS4 CSSUMB_CORE
10K
10K
10K
GND 37 1 PR6608 1.5K
[22,29] VRM_PWR_EN EN CS5 CSSUMC_CORE
10K
48 PR6610 1.5K
35 CS6
SLP_S0_N 6 R6607 1.91K
33 VDIFFA VCORE
[33] IMVP_SCL_P SCL_P VFBA_CORE
100
49.9
7 R6608 0 0.1u C6606 R6619 100

32 VFBA DNP DNP
[33] IMVP_SDA_P SDA_P 8 VOSENA_CORE R6622 0
VOSENA VCC_CORE_SENSE [12]
R6638 0 0201 VR_HOT# 31 GND
[10,34,60,63] PROCHOT_N VRHOT_N 9 VORTNA_CORE R6623 0
VORTNA VSS_CORE_SENSE [12]
R6639 0 0201 VR_READY 30
[22] VRM_PWRGD VRRDY 10 R6612 2.43K
R6614 0 SVID_ALERT#_R 29 VDIFFB R6624 100
[12] SVID_ALERT# ALT_N 11 VFBB_CORE R6615 0 0.1u C6607
R6616 10 VIDSOUT_R 28 VFBB DNP DNP GND
[12] VIDSOUT SDIO VOSENB_GT
12
R6617 49.9 VIDSCLK_R 27 VOSENB GND VCCGT
[12] VIDSCLK SCLK 13 VORTNB_GT
VDD1V8_CORE ADDR_P_CORE 25 VORTNB R6609 100
ADDR_P
CS_SUMC
CS_SUMA
CS_SUMB
VORTNC
VOSENC
R6618 IREF_CORE 24 R6610 0
VDIFFC
IMONC
IMONA
IMONB
IREF VCCGT_SENSE [13]
TEMP
VFBC
0
DNP R6620 R6621 R6611 0 VSSGT_SENSE [13]
0 61.9K
MP2949A-003F-C555
18
19
20
21
22
23
45
14
15
17
16
GND R6613 100
8.06K
GND
VFBC_SA
GND CSSUMA_CORE
VCCSA
CSSUMB_CORE
R6626 100
CSSUMC_CORE
R6625
VOSENC_SA R6627 0 VCCSA_SENSE [12]
IMONA_CORE VORTNC_SA R6628 0
B VSSSA_SENSE [12] B
IMONB_CORE R6629
0 R6630 100
R6631 IMONC_CORE DNP
C6608 57.6K R6632 0201_P28 GND
330p ALL C6609 121K
330p R6633 C6611
C6610 619K 0.1u 16V
47p 0201_p33mm
GND GND DNP
GND GND
GND GND GND

R6634
0
[67,68] TEMP_CORE
6.3V
1u
R6635
49.9K
C6612
GND GND
A A
Title: 66. VCPU Controller

Engineer: Surface
5 4 3 2 1
5 4 3 2 1
9V to 12V
D D
VSYS
Place at DrMOS
U6701 PC6702 PC6701 C6743 C6744 C6745 C6746 C6747

C6717 + + + + +
[66] PWM_CORE1 15 BST 21 1u 10u 10u
PWM 16V 16V 47u 47u 47u 47u 47u
[66,67,68] SYNC_CORE 16 VIN1 1 0603 0603 DNP DNP DNP
SYNC VIN14 14 ALL ALL
17 C6701
[66,67,68] TEMP_CORE VTEMPFLT VCORE
V3P3_DSW HSFET
1u
L6704
Idc 30A/Isat 40A GND
DRIVE CONTROL
20 SW2 2 CORE1_SW
VCC 3
SW3
4 0.15uH
SW4
+
1K
C6702 C6721 C6712
6.3V 18 470p 220u R6703
1u CS LSFET
DNP
0402S_P5 GND 0201S_P28-W35
PGND13 13 R6721
PGND12 12 0
19 PGND511 5-11 DNP
[66] CS_CORE1 AGND
GND
MP86902B GND GND GND
GND
C C
VSYS
U6702 C6770 C6771

C6704 C6706 C6714 + +
[66] PWM_CORE2 15 BST 21 1u 10u 10u
PWM 47u 47u
[66,67,68] SYNC_CORE 16 VIN1 1
SYNC VIN14 14
17 C6716
[66,67,68] TEMP_CORE VTEMPFLT
V3P3_DSW HSFET
1u
L6701
Idc 30A/Isat 40A GND
DRIVE CONTROL
20 SW2 2 CORE2_SW
VCC 3
SW3
4 0.15uH
SW4
C6703 C6705 + C6711
6.3V 18 470p 220u
1u CS LSFET
DNP
0402S_P5 GND
PGND13 13
PGND12 12 R6705
19 PGND511 5-11 0
[66] CS_CORE2 AGND DNP
GND
MP86902B GND
GND GND
B B
VSYS
Place at DrMOS
U6703
PC6705 PC6706
[66] PWM_SA 7 BST 13 C6713
PWM 10u 10u
1u
[66,67,68] SYNC_CORE 8 VIN1 1 25V 16V 16V
SYNC VIN6 6 0402 0603 0603
9 C6707
[66,67,68] TEMP_CORE VTEMPFLT 1u 25V
V3P3_DSW HSFET 0402S_P55
VCCSA
L6703
Idc 11.5A/Isat 9.5A
DRIVE CONTROL
12 SW2 2 SA_SW
VCC SW3 3
C6708 C6723 0.36uH
1K
1u 6.3V 470p 50V 9.5A C6719 C6709 C6720 C6710
DNP
0402S_P5 SMC0603
10 47u 6.3V 47u 6.3V 22u 6.3V 22u 6.3V R6704
CS LSFET 0805S_1P45 0805S_1P45
0603S_1-W100 0603S_1-W100
DNP DNP 0201S_P28-W35
R6723
PGND4 4 0
11 PGND5 5 0603_P6
AGND
DNP
[66] CS_SA QFN13_3X3XP8_P4MM
MP86901-AGQT-Z
A GND GND A
Title: 67. VCORE VCCSA

Engineer: Surface
C A 1.0.0.1
5 4 3 2 1
5 4 3 2 1
D D
VSYS
Place at DrMOS
U6801
PC6802 PC6801
[66] PWM_GT1 15 BST 21 C6803 C6802
PWM 10u 10u +
1u
[66,67] SYNC_CORE 16 VIN1 1 25V 16V 16V
SYNC VIN14 14 0402 0603 0603 47u
17 C6804 GND GND ALL GND ALL VCCGT
C [66,67] TEMP_CORE VTEMPFLT C
1u
V3P3_DSW HSFET L6801
GND
Idc 30A/Isat 40A
DRIVE CONTROL
20 SW2 2 GT1_SW
VCC 3
SW3
0.1uH
1K
C6806 SW4 4
1u 6.3V C6801 + C6805 R6802
0402S_P5 18 470p 220u
GND CS LSFET
DNP 0201S_P28-W35
PGND13 13 R6801
PGND12 12 0
[66] CS_GT1
19 PGND511 5-11 0603_P6
AGND DNP GND GND
MP86902B GND GND

GND
B B
A A
Title: 68. VCCGT

Engineer: Surface
5 4 3 2 1
Vinafix.com
5 4 3 2 1
PWR_SL_F
VSYS
3P3VA_SW R69040
HPD FOR SL1 (ONE/TWO WIRE UART) 249K
A1
A2
K
0201
BAT54CW D69010 R69022
D69007 BAT54CW 200
SL_HPD1A [47]
U69002 R69023
A2
A1
K
200
QFN10_1P4X1P8XP55_P4MM
R69028 SL_HPD1B [47]
200
6
3 5 SL_HPD1B_U_MOS R69020 Q69003A Q69005A
[29] SL_UART_TX OUT1 S1A PROT_3V3_SW_G [33]
2 0201 100K NX3008NBKS NX3008NBKS
D
S1B 4 0201
SEL1 R69029
K
200 2 2
9 7 SL_HPD1A_U_MOS G G D69006
[29] SL_UART_RX OUT2 S2A 10 0201 PESD24VS1UL
S2B
S
D 8 DIO-ESD,SM,PESD24VS1UL,24 V,50 pF,1X.6X.5 D
R69001 R69009 R69014 SEL2
A
D
1
200K 200K 100 1 3P3VA_SW
0201 0201 0201 VCC 5
6 G
GND C69003 NX3008NBKS
S
Q69003B
K
GND GND TS3A5223 0.1u 6.3V
0201_p33 D69005
[28] SL_ADC
4
PESD24VS1UL
DIO-ESD,SM,PESD24VS1UL,24 V,50 pF,1X.6X.5
R69019
A
3
5.49K Q69005B
0201 NX3008NBKS
D
5
SL_ADC_RD_EN_R G
S
Q69002B
5 NX3008NBKS
[27] SL_ADC_RD_EN C69013
4
0.1u 6.3V
4
R69006 3P3VA_SW
100K SL_HPD1A_U_MOS
0201
GND SL_HPD1B_U_MOS
GND
PWR_SL MTP_BF69014 SMD RND 31.5mil PWR_SL_F
3A L69001 MTTP_BF69014 SMD RND 31.5mil

[27] SL_UART_SEL_N
70 OHM
ind_0805_44mil
A1
D69003 C69005 C69007 C69001 C69011 3A L69002 R69007 R69011 R69018 R69005 C69012 C69010
R69003 R69017 100p 0.1u 0.1u 100p 70 OHM 8.06 8.06 8.06 8.06 100p 0.1u
499K 300K 25V 25V 25V 25V 0402 0402 0402 0402 25V 25V
A2
0201 V18MLA0402NR 0201 0201 0201 0201 0201 ind_0805_44mil 0201 0201
ex_dio_0402_p6mm_aa GND GND
C GND GND GND GND GND C

GND GND PWR_SL_F_C
C69006
25V 1u
0402
GND
PWR_SL_F
A
D69009
RB520CS3002L
K
6
Q69008A
NX3008NBKS
D
2
G R69026
200K SL_VDET [56]
S
0201
B PWR_SL_F 1% B
1
R69035
200K Q69002A
0201 NX3008NBKS
DNP 6 1
SAM_SL_VDET [28]
GND R69012 R69004
33K 1K
0201 0603
2
GND
C69016
R69027
SL_PWR_GOOD_R 47000p 20K
[27,56] SL_PG
3
Q69008B SL_PWR_GOOD_RR 6.3V 0201

NX3008NBKS DNP 1% 3P3VA_SW
D
3
5
[27,63] SAM_SL_5V_EN G 1 Q68001
MMBT3904WT1G
S
SOT-323
2
R69037
4
200K GND
0201
GND
GND
GND
A
SL1 port discharger A
limit PSU anti-arc pulse voltage
Title: 69. SF1 POWER

Engineer: Surface
A2 A 1.0.0.1
Vinafix.com
5 4 3 2 1
5 4 3 2 1
D D
C C
MTTP_BF70015 SMD RND 31.5mil
MTP_BF70015 SMD RND 31.5mil
R70040
V5A 0
0201
V5A_VR_FB_R [58]
B VDD_BAT
Battery Connector B
MTP_BF70001 MTTP_BF70001

R70042 J70003 C70015 MTP_BF70002 MTTP_BF70002
100K 2287111-2 0.1u 10V
0201 0201 SMD RND 31.5mil SMD RND 31.5mil
J70003 to be place North of J70001 MTP_BF70003 MTTP_BF70003
1 2 3 4 5 6 7 8
North of Board Edge SMD RND 31.5mil SMD RND 31.5mil
BAT_SHUTDOWN_N SMD RND 31.5mil SMD RND 31.5mil

[70] BATT_I2C_DATA
SMD RND 31.5mil SMD RND 31.5mil L70001
J70001 MTP_BF70006 MTTP_BF70006
X950860-001
[27,31,63] I2C_ROP_SCL BATT_I2C_CLK [70]
NO-PIN
NO-PIN
SMD RND 31.5mil SMD RND 31.5mil 0 0402

MTP70003
1
2
3
7 6
8 7
8
DNP
MTP_BF70007 MTP_BF70008 C70016 SMD RND 22.8mil
1
2
3
100p 16V
SMD RND 31.5mil SMD RND 31.5mil 0201
D
MTP_BF70009 MTP_BF70010
[70] BATT_I2C_CLK
Q70007
L70002
R70043 100 0201 G RUM002N02GT2L SMD RND 31.5mil SMD RND 31.5mil
[56] GP_BAT_SHUTDOWN J70002
2287111-2 [27,31,63] I2C_ROP_SDA BATT_I2C_DATA [70]
MTP_BF70011 MTP_BF70012 0 0402
R70041 MTP70004
S
100K 3P3VA_SW SMD RND 31.5mil SMD RND 31.5mil DNP

0201 C70017 SMD RND 22.8mil
MTP70008
100p 16V
1 2 3 4 5 6 7 8 0201
R70070
SMD RND 22.8mil 200K Board Edge
0201 MTTP_BF70007 MTTP_BF70010
A SMD RND 31.5mil SMD RND 31.5mil A
[27,63] BATGONE NOTE: 1.7A/pin
MTP70007
MTTP_BF70008 MTTP_BF70011

SMD RND 22.8mil
MTTP_BF70009 MTTP_BF70012
MTP70005 TP70005
SMD RND 22.8mil SMD SQ 29.5mil WHEN SHORTED BATTERY TURNS OFF
MTP70006
SMD RND 22.8mil

Title: 70. BATT CONN, power input
Place TP's 0.2 inch apart, Microsoft Confidential
Engineer: Surface
Place on component side, near battery. Size Project Name Rev
Must be accessible when battery is installed A2 A 1.0.0.1
Vinafix.com
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
71. Empty
Title:
Engineer: Surface
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
D D
VCC_EDP_BKLT_IN
C72005
C72013 C72014
10u 10u 1u
0805 0805 0402
16V 16V 25V
Q72008
IRLML6402 GND GND GND
VSYS SOT-23
VCC_EDP_BKLT_OUT
VCC_EDP_BKLT_IN VCC_BKLT L72001
2 3 R72003 10
S D D72001
BKLT_LX A K MTP72001
R72010 C72001 C72004
G
100K 1000p 25V 10uH PMEG6010CEH
1
0201 0201 1u U72001 X950454-001 R72036
R72004 25V MTP72003 D1 C2 499K
2.49K 0402 C1 VIN_D1 VOUT C72006 C72007 C72008 0201
BKLT_EDP_IN_DRI 0402 VIN_C1
GND R72008 1K BKLT_EN B4 D2 BKLT_VCP 2.2u 2.2u 2.2u
[30] L_BKLTEN EN VCP 50V 50V 50V
R72007 VCC_EDP_BKLT_IN_DISC 0805 0805 0805
6
200K B1 C72009
0201 B3 LX_B1 A1 C72015
1u
D
[30] L_BKLT_CTRL_IN PWM LX_A1
Q72002A GND GND GND 0.1u 50V
BKLT_EDP_IN_DRI_R 2 SSM6N15AFU A4 0603
G SCL
3
GND
SOT-363 A3
D
SDA
S
E4
3P3V_PANEL FB1 BKLT_FB1 [55,72]
5 Q72002B MTP72009
1
G SSM6N15AFU SMD RND 22.8mil D4
BKLT_EDP_IN_R FB2 BKLT_FB2 [55,72]
R72012 22K SOT-363
S
C4
FB3 BKLT_FB3 [55,72]
C 0201 4 C
R72013 A2 E3
PGND_A2 FB4 BKLT_FB4 [55,72]
100K B2
0201 PGND_B2 E2
[25] I2C_SCL_BKLT FB5 BKLT_FB5 [55,72]
D3
C3 GND_D3 E1
[25] I2C_SDA_BKLT GND_C3 FB6 BKLT_FB6 [55]
I2C testpoints are shown on page 25
RT8555CWSC
GND GND
7-bit I2C Address = 0x31
SMD RND 22.8mil

MTP72004
BKLT_FB1 [55,72]
SMD RND 22.8mil
MTP72005
BKLT_FB2 [55,72]
SMD RND 22.8mil
MTP72006
BKLT_FB3 [55,72]
SMD RND 22.8mil
MTP72007
BKLT_FB4 [55,72]
SMD RND 22.8mil
MTP72008
BKLT_FB5 [55,72]
isolated ground on layer 2 to tie Cin GND, Cout GND,

and controller PGND together. Then tie this isolated
ground plane to main GND under the exposed pads.
B B
A A
Title: 72. Backlight Controller

Engineer: Surface
A2 A 1.0.0.1
Vinafix.com
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Title: 73. Empty

B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
D D
C C
B B
A A
Title: 74. Empty

Engineer:
B A 1.0.0.1
5 4 3 2 1
Vinafix.com
5 4 3 2 1
J75001 J75002 J75003 J75004
D D
2
1 M1030044-001 M1030044-001 M1030044-001 M1030044-001
2
J75005 J75006 J75007
C C
1
2
M1030044-001 M1030044-001 M1030044-001
1
2
B B
A A
Title: 75. Clips

Engineer: Surface
5 4 3 2 1
Vinafix.com
5 4 3 2 1
BOTTOM SIDE spacers MTP_BF76004 MTTP_BF76004
3
MTTP_BF76005
3 3 3 3 3 3
MTP_BF76005
4 4 2
2 4 4 2
2 4 4 2
2 4 4 2
2 4 4 2
2 4 4 2
2
1 MP76021 1 MP76023 1 MP76027 1 MP76029 1 MP76031 1 MP76035
M1009352-002 M1009352-002 M1009352-002 M1009352-002 M1009352-002 M1009352-002 MTP_BF76006 MTTP_BF76006
1
1
3
3
MP76024 MP76025 MP76026 MP76028 MP76030 MP76036 MP76034 V0P85A
3 M1009352-002 3 M1009352-002 3 M1009352-002 3 M1009352-002 3 M1009352-002 3 M1009352-002 3 M1009352-002
4 4 2 2 4 4 2 2 4 4 2 2 4 4 2 2 4 4 2 2 4 4 2 2 4 4 2 2 MTP76001
D SMD RND 22.8mil D
VCCGT
1 1 1 1 1 1 1
1
1
MTP76003
VCCSA SMD RND 22.8mil
MTP76004
VCCGT
SMD RND 22.8mil
TOP SIDE spacers TOP SIDE spacers VCCIO
MP76033 MP76032 MP76037 MP76038 MP76040 MP76041
3
3
M1012486-001 M1012486-001 M1012486-001 M1012486-001 M1012486-001 M1012486-001
MTP76005
3 3 3 3 3 3
SMD RND 22.8mil
4 2 4 2 4 2 4 2 4 2 4 2 VCCST_CPU
4 2 4 2 4 2 4 2 4 2 4 2
1 1 1 1 1 1
MTP76006
SMD RND 22.8mil
1
1
VCCSTG
MTP76007
SMD RND 22.8mil
C C
H76002
1
1
NO-MSPN-157
H76001
Shield Fences
SOC/SSD 1
1
SHT76001
SHIELD NO-MSPN-157
B B
1
SHT76002
COAX Clips M1016647-001
SHIELD
MP76013 ZID = 00 ZOD = 00 1 PMIC
FCAU137A02C5PC
PEMNUT for SoCs MP76002
SHT76003
V1P2U
X943446-001 SHIELD
X949514-001
1
M1019199-001 1 Charger MTP76010

ZID = 00 ZOD = 00 SMD RND 22.8mil
MP76014 MP76015 V0P6DX_LPDDR3
X949515-001 SHT76004
FCAU137A02C5PC FCAU137A02C5PC
X943446-001 X943446-001 ZID = 00 ZOD = 00 SHIELD
2.3mm NPTH MTP76011
1
1 SMD RND 22.8mil

Audio VCORE
SHT76005 H76022
SHIELD
MP76003 M1016649-001 NP
1 Backlight/USB MTP76012
M1019199-001 ZID = 00 ZOD = 00 NO-MSPN-00212 SMD RND 22.8mil
1
X949517-001 SHT76006
ZID = 00 ZOD = 00 SHIELD
1
MP76016 MP76017 G5/Touch
SHT76007
FCAU137A02C5PC FCAU137A02C5PC SHIELD
X943446-001 X943446-001 1 Display/Camera
M1016651-001
2.5mm NPTH
1
MP76004 ZID = 00 ZOD = 00

M1019199-001 H76010 H76011 H76012 H76013 H76014
SHT76008
M1016652-001 NP NP NP NP NP
SHIELD
ZID = 00 ZOD = 00 1 Wi-Fi NO-MSPN-159 NO-MSPN-159 NO-MSPN-159 NO-MSPN-159 NO-MSPN-159
1
SHB76003
SHT76009 SHIELD
A SHIELD
X949521-001 1 Touch A
1 Trackpad H76016 H76017 H76018 H76019 H76020
MP76042
PEMNUT for XDP ZID = 00 ZOD = 00
M1016654-001
NP NP NP NP NP
M1013613-001 NO-MSPN-159 NO-MSPN-159 NO-MSPN-159 NO-MSPN-159 NO-MSPN-159
1
MP76005 ZID = 00
1 M1019199-001 ZID = 00 ZOD = 00 ZOD = 00
1
SHT76010
SHIELD
M1019383-001 1 Surflink
Title: 76. TP's and Mech
X949524-001
Engineer: Surface
Vinafix.com ZID = 00 ZOD = 00 U SPECIFIC Size
C
Project Name
A
Rev
1.0.0.1
5 4 3 2 1

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5 4 3 2 1

D 01 Table of Contents 31 Debug mux 61 Discrete Load Switches D

02 CHANGE HISTORY 32 Debug buttons 62 1.8VSB & Load SW

12 CPU(3)_SKL POWER1 42 Audio Amplifier 72 LCD backlight/TB

22 PCH(3)_SYS PWR CONTR 52 Empty

Schematics Change History

Front IR Architectural Diagram I-Core

Debug UART, external connector

(1Gbps) Analog audio combo jack (3.5mm)

K22 Wifi abgn+ac

Title: 03. BLOCK DIAGRAM

Title: 04. CLOCK DISTRIBUTION

Title: 05. SIGNAL & RESET MAP

Platform PMIC 3VSUS_ORG

R58019 R58024 R45003 SKL_SLP_S4_N Connector

5mє A 10mє A 5mє À

3P3VA SLG59M1448V 5V0_OFFBOARD C

R48022 PCH_TPANEL_PWR_EN (keyboard)

V3P3A_PCH V3P3A_PCH U65004

Linear V13 V0P6DX_LPDDR3

Title: 06. POWER DISTRIBUTION

Title: 07. POWER SEQUENCE 1

Title: 08. POWER SEQUENCE

Title: 09. I2C MAP

R10035 330 0201

RUM002N02GT2L PROC_POPIRCOMP AT16 C59

MTP10010 SMD RND 22.8mil

Title: 11. CPU(2)_LPDDR3

C13083 C13084 C13085 C13086 C13087 C13088 C13089

C13090 C13091 C13097 C13098 C13099

C13300 C13301 C13302 C13303 C13304 C13311 C13312 C13313

0603 0603 0603 0603 0603 0603 0603 0603

0603 0603 0603 0603 0603 0603 0603 0603 0603

C13340 C13339 C13343 C13341 C13342

Title: 15. CPU(6)_CFG_RESERVED

16. LPDDR3(1)_MEMORY DOWN

DNP For 4GB System

17. LPDDR3(2)_MEMORY DOWN

PRIMARY XDP connector V1P00A

Title: 18. XDP

M3: CPU driven VREF path is stuffed by default.

19. LPDDR3(3)_CA/DQ Voltage

1 6 CLKREQ1_N CLOCK SIGNALS

Need into improve LPC signals -

0 Default Disable ME crypto TLS

0201 0201 0201 0201

21. PCH(2)_CLK,SMB,LPC, SPI

If SUSWARN #/SUS_ACK # handshake

22. PCH(3)_SYS PWR CONTR

TBL2301 PCBA vendor and revision

R23005, R23020, R23024, R28051 Revision EV2P51

R23010, R23020, R23017, R28053 Revision DV1.1, DV1.2, PV

R23005, R23013, R23024, R28051, R28052 NO-STUFF FOR REVISION

R23010, R23013, R23017, R28052, R28053 Reserved

R23005, R23020, R23024, R28051 NO-STUFF FOR REVISION

R23005, R23013, R23017, R28051, R28052, R28053 Reserved

TBL1001 TBL1001 TBL1001 SSD SSD

[20] CPU_SOC_ID0 [20] SSD_SOC_ID0

TBL1001 TBL1001 TBL1001 SSD SSD