DEPARTMENT OF

ELECTRONONICS AND
COMMUNICATIONS ENGINEERING

CCA - 2

HALF ADDER

SUBJECT DETAILS

NAME: ESC - II (ELECTRONICS AND

COMMUNICATIONS ENGINEERING) [BESCK204C]
COORDINATOR: PROF.
Dr Suneeth Kumar Agnihotri

PRESENTERS (2 - A)
1BY23CS012-Aditya Kumar
1BY23CS013-Aflak thara
1BY23CS24-Ankit kashyap
1BY23CS37-Bartika das

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 TABLE OF CONTENTS

SERIAL CONTENTS PAGE NUMBER

NUMBER
1 INTRODUCTION 3

2 THEORETICA 4 to 7
L
BACKGROUN
D
3 DESIGN 8 to 11
AND
OPERATION
S
4 APPLICATIONS 12 to 15

5 CONCLUSION 16

6 REFERENCES 17

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 INTRODUCTION

A half adder is a basic digital circuit used for binary addition of single-bit numbers. It has
two inputs, A and B, and produces two outputs: SUM (the XOR of inputs) and CARRY
(the AND of inputs). This fundamental building block is crucial for more complex adder
circuits.

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 THEORETICAL BACKGROUND

BASIC CONCEPTS

● Binary Arithmetic:

○ Binary Numbers: Binary uses only two digits: 0 and 1. Each digit
represents a power of 2 (from right to left).
○ Addition: Add binary numbers like regular decimal numbers, but
carry over when the sum exceeds 1.
○ Subtraction: Subtract by borrowing from higher bits when
needed (similar to decimal subtraction).

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 ○ Multiplication: Multiply bit by bit, shifting left for each position.
○ Division: Divide by repeated subtraction, tracking remainders.

● Logic Gates:

○ AND Gate:

■ Takes two or more inputs and produces one output.

■ Output is high (1) only if all inputs are high (1).
■ Symbol: `⋅` or no symbol.
■ Boolean expression: Y = A . B

○ OR Gate:

■ Has two or more inputs and one output.

■ Output is high (1) if any input is high (1).
■ Symbol: `+`
■ Boolean expression: Y = A + B

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 ○ NOT Gate:

■ Takes a single input and produces the opposite value.

■ Inverts the input (0 becomes 1, and vice versa).
■ Symbol: `¬` or `~`
■ Boolean expression: Y = ~A

○ XOR Gate:

■ Takes two inputs and produces one output.

■ Output is high (1) if inputs are different.
■ Symbol: ⊕
■ Boolean expression: Y = A ⊕ B

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 HALF ADDER DEFINITION

● Components:

○ The Half Adder consists of an XOR gate and an AND gate

● Functionality:

○ SUM (S) Output:

■ The XOR gate produces the sum (S) output.

■ When you add two binary bits (A and B), the XOR
operation results in the sum of those bits.
■ The truth table for the half adder shows that the SUM
output is the result of the XOR gate: SUM = A ⊕ B.

○ CARRY (Cout) Output:

■ The AND gate produces the carry out (Cout) output.

■ The carry bit is generated when the sum equals or
exceeds two (1 + 1).
■ The AND operation ensures that both input bits are high
(1) to produce a carry.
■ The Boolean expression for the carry bit is: CARRY = A . B

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 TRUTH TABLE

● Truth Table:

● Equations:

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 DESIGN AND OPERATION

CIRCUIT DIAGRAM

● XOR Gate (Sum):

○ The XOR gate calculates the sum (S) of the input bits.
○ It performs binary addition by producing a 1 in the SUM output
only when one of the inputs is 1.

● AND Gate (Carry):

○ The AND gate determines the carry (Cout) bit.

○ It generates a 1 in the CARRY output only when both inputs are 1.

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 IMPLEMENTATION

● Basic Gates:

● Derived Gates:

● Waveform Analysis:

○ Inputs & Outputs:

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 ■ A: One of the two binary inputs.
■ B: The second binary input.
■ Sum (S): The sum output of the half adder.
■ Carry (C): The carry output of the half adder.

○ Time Intervals: The time intervals between each change are 100 units,
which allows us to see the evolution of the signals over a longer
period. Here's a detailed look at how the signals change over time:

■ Time 0 to 100

● A = 0, B = 0
● Sum (S) = 0 XOR 0 = 0
● Carry (C) = 0 AND 0 = 0

■ Time 100 to 200

● A = 0, B = 1
● Sum (S) = 0 XOR 1 = 1
● Carry (C) = 0 AND 1 = 0

■ Time 200 to 300

● A = 1, B = 0
● Sum (S) = 1 XOR 0 = 1
● Carry (C) = 1 AND 0 = 0

■ Time 300 to 400

● A = 1, B = 1
● Sum (S) = 1 XOR 1 = 0

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 ● Carry (C) = 1 AND 1 = 1

■ Time 400 to 500

● A = 0, B = 1
● Sum (S) = 0 XOR 1 = 1
● Carry (C) = 0 AND 1 = 0

○ Observations:

■ Sum (S): The sum output is the XOR of the inputs A and B. It
is high (1) when exactly one of the inputs is high, and low (0)
when both inputs are the same.
■ Carry (C): The carry output is the AND of the inputs A and

B. It is high (1) only when both inputs are high.

○ Practical Implications: This waveform diagram is essential for

understanding the behavior of a half adder circuit in digital
electronics. By observing the transitions and relationships between
inputs and outputs, engineers can verify the correct operation of the
half adder and use this fundamental building

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 block in more complex circuits such as full adders and arithmetic logic
units (ALUs).

APPLICATIONS

BASIC ARITHMETIC OPERATIONS

● Single-Bit Addition: To perform single-bit addition using a half adder, you

need to understand its operation and implementation. Here’s a detailed
explanation of how a half adder can be used for single-bit addition:

Half Adder Overview

A half adder adds two single-bit binary numbers and produces a sum and carry. The
half adder has two inputs and two outputs.

Inputs:

● A: First single-bit binary number (0 or 1)

● B: Second single-bit binary number (0 or 1)

Outputs:

● Sum (S): The result of the addition of AAA and BBB.

● Carry (C): The carry-out resulting from the addition, which is 1 if both

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 inputs are 1, otherwise 0.

Logic Gates

● Sum (S): XOR gate

S=A⊕B
● Carry (C): AND
gate C=A⋅B

Truth Table

A B S C

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

Example of Single-Bit Addition

Add two single-bit binary numbers using a half adder:

Example 1:

● Inputs: A=0, B=1

○ Sum: S=0⊕1=1
○ Carry: C=0⋅1=0

Result: The sum is 1, and the carry is 0.

Example 2:

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 ● Inputs: A=1,B=1
○ Sum: S=1⊕1=0
○ Carry: C=1⋅1=1

Result: The sum is 0, and the carry is 1, representing the binary

number 10.

Application in Digital Systems

The half adder is used in various digital systems for basic arithmetic operations,
such as:

● Binary addition: Fundamental in arithmetic logic units (ALUs) within

processors.
● Counters and incrementers: Used in digital clocks, timers, and other
sequential logic circuits.
● Memory addressing: Helps in the calculation of memory addresses in
microprocessors.

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 CONCLUSION

In conclusion, the half adder is a fundamental building block in the realm of digital
electronics and computer architecture. Its simplicity and efficiency make it an
essential component in a wide range of digital systems, ranging from basic
arithmetic operations to more complex computational tasks.
The half adder’s ability to perform the basic addition of binary digits serves as a
crucial foundation for larger and more sophisticated adder circuit, such as full adder
and ripple carry adders, which are integral parts of computer processors and
arithmetic logic units.

The versatility of the half adder extends beyond just addition, as it finds
application in various digital circuits, including counters, comparators, and
address decoders, where the basic binary addition operation is an unnecessary
function. Furthermore, the half adder is widely used in educational settings to
introduce students to the fundamental concepts of binary addition and the design
of simple digital logic circuits, serving as a stepping stone for understanding more
complex digital systems and architectures.

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 REFERENCES

● Virtual Labs (vlabs.ac.in)

● Half Adder in Digital Logic - GeeksforGeeks
● Adders | CircuitVerse

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