System Design using Verilog

Lecture 15
Verilog Operators
Contents of the lecture
GMR Institute of Technology

Verilog Operators
(1) Bitwise operators
(2) Logical Operators
(3) Reduction Operators
(4) Arithmetic Operator
(5) Relational Operator
(6) Equality Operator
(7) Shift Operator
(8) Concatenate Operator
(9) Conditional Operator
(10) Replication Operator
 Bitwise Operator

(1) Bitwise Operators: Bitwise operators operate on individual bits of operands

Operator Operator Operation Number of

type symbols performed operands
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Bitwise ∼ 1’s complement 1

& Bitwise AND 2
| Bitwise OR 2
∧ Bitwise XOR 2
∼ ∧ or ∧ ∼ Bitwise XNOR 2

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 Bitwise Operator

Let A[2:0], B[2:0] and C[2:0] are three-bit vectors and f and w are two scalars

(i) The ∼ operator forms the 1’s complement of the operand.

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The statement C=∼A;

produces the result C(2) = A(2)’, C(1) = A(1)’, and C(0) = A(0)’

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 Bitwise Operator

(ii) The & operator forms bitwise ‘AND’ operation.

The statement C= A & B;

produces the result C(2) = A(2).B(2), C(1) = A(1).B(1), and C(0) = A(0).B(0)
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(iii) The | operator forms bitwise ‘OR’ operation.

The statement C= A | B;

produces the result C(2) = A(2)|B(2), C(1) = A(1)|B(1), and C(0) = A(0)|B(0)

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 Bitwise Operator

(iv) The ^ operator forms bitwise ‘XOR’ operation.

The statement C= A ^ B;

produces the result C(2) = A(2)^B(2), C(1) = A(1)^B(1), and C(0) = A(0)^B(0)
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(v) The ~^ or ^~ operator forms bitwise ‘XNOR’ operation.

The statement C= A ~^ B;

produces the result C(2) = A(2)~^B(2), C(1) = A(1)~^B(1), and C(0) = A(0)~^B(0)

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 GMR Institute of Technology
Bitwise Operator

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 System Design using Verilog

Lecture 16
Verilog Operators (Continue) ………
Contents of the lecture
GMR Institute of Technology

Verilog Operators
(1) Bitwise operators
(2) Logical Operators
(3) Reduction Operators
(4) Arithmetic Operator
(5) Relational Operator
(6) Equality Operator
(7) Shift Operator
(8) Concatenate Operator
(9) Conditional Operator
(10) Replication Operator
 Logical Operators

(2) Logical Operators: Logical operators operate on individual bits of operands

Operator Operator Operation Number of

type symbols performed operands
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Logical ! NOT 1
&& AND 2
|| OR 2

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 Logical Operators

Let A[2:0], B[2:0] and C[2:0] are three-bit vectors and f and w are two scalars

(i) The ! operator forms the 1’s complement of the operand.

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(a) The ! operator has the same effect on a scalar operand as the ∼ operator.

For Example
f = !w will produce f=w’
f=∼w will produce f=w’

(b) The ! operator has the different effect on a vector operand

For Example
The statement f=!A;
produces the result f = [A(2)+A(1)+A(0)]’
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 Logical Operators

(ii) The && operator implement ‘AND’ operation

The statement f=A && B;

produces the result f = [A(2)+A(1)+A(0)] . [B(2)+B(1)+B(0)]
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(iii) The || operator implement ‘OR’ operation

The statement f=A || B;

produces the result f = [A(2)+A(1)+A(0)] + [B(2)+B(1)+B(0)]

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 Reduction Operators

(3) Reduction Operators: The reduction operators perform an operation on the

bits of a single vector operand and produce a one-bit result.
Operator Operator Operation Number of
type symbols performed operands
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Reduction & Reduction AND 1

∼& Reduction NAND 1
| Reduction OR 1
∼| Reduction NOR 1
∧ Reduction XOR 1
∼ ∧ or ∧ ∼ Reduction XNOR 1

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 Reduction Operators

(i) The & operator implement ‘AND’ operation on all bits of single vector operand
and produce single bit result

The statement f=& A;

produces the result f = [A(2).A(1).A(0)]
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(ii) The ~& operator implement ‘NAND’ operation on all bits of single vector
operand and produce single bit result

The statement f=~& A;

produces the result f = [A(2).A(1).A(0)]’

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 Reduction Operators

(iii) The | operator implement ‘OR’ operation on all bits of single vector operand
and produce single bit result

The statement f=| A;

produces the result f = [A(2)+A(1)+A(0)]
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(iv) The ~| operator implement ‘NOR’ operation on all bits of single vector
operand and produce single bit result

The statement f=~| A;

produces the result f = [A(2)+A(1)+A(0)]’

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 Reduction Operators

(v) The ^ operator implement ‘XOR’ operation on all bits of single vector operand
and produce single bit result

The statement f=^ A;

produces the result f = [A(2) xor A(1) xor A(0)]
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(vi) The ~^ operator implement ‘XNOR’ operation on all bits of single vector
operand and produce single bit result

The statement f= ~^ A;
produces the result f = [A(2) xor A(1) xor A(0)]’

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 System Design using Verilog

Lecture 17
Verilog Operators (Continue) ………
Contents of the lecture
GMR Institute of Technology

Verilog Operators
(1) Bitwise operators
(2) Logical Operators
(3) Reduction Operators
(4) Arithmetic Operator
(5) Relational Operator
(6) Equality Operator
(7) Shift Operator
(8) Concatenate Operator
(9) Conditional Operator
(10) Replication Operator
 (4) Arithmetic Operators: They perform standard arithmetic operations.

Operator Operation Number of

type Operator symbols performed operands
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Arithmetic + Addition 2
− Subtraction 2
− 2’s complement 1
∗ Multiplication 2
/ Division 2

(i) C=A+B; puts the three-bit sum of A plus B into C

(ii) C=A−B; puts the difference of A and B into C

(iii) C=−A; places the 2’s complement of A into C.

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 Example of “+” operator

module adder(a,b,c);
input [2:0]a;
input [2:0]b;
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output [2:0]c;
assign c=a + b;
endmodule

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 (5) Relational Operators: They perform standard relation operations.

Operator type Operator symbols Operation performed Number of operands

Relational > Greater than 2

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< Less than 2

>= Greater than or equal to 2

<= Less than or equal to 2

The relational operators are typically used as conditions in if-else and for
statements.

An expression that uses the relational operators returns the value 1 if it is

evaluated as true, and the value 0 if evaluated as false.

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 (6) Equality Operators

Operator type Operator symbols Operation performed Number of operands

Equality == Logical Equality 2

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!= Logical Inequality 2

The expression (A == B) is evaluated as true if A is equal to B and

false otherwise.

The != operator has the opposite effect.

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 (7) Shift Operators

Number of
Operator type Operator symbols Operation performed operands
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Shift >> Right shift 2

<< Left shift 2

A vector operand can be shifted to the right or left by a number of bits

specified as a constant. When bits are shifted, the vacant bit positions are
filled with 0s.

Example1
B=A<<1;
results in B[2] = A[1], B[1] = A[0] and B[0] = 0

Example2
B=A>>1;
results in B[2] = 0, B[1] = A[2] and B[0] = A[1]
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 Shift Operators

Example 1 (Right Shift)

B=A>>1;
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results in B[2] = 0, B[1] = A[2] and B[0] = A[1]

Example 2 (Left Shift)

B=A<<1;
results in B[2] = A[1], B[1] = A[0] and B[0] = 0

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 System Design using Verilog

Lecture 18
Verilog Operators (Continue) ………
Contents of the lecture
GMR Institute of Technology

Verilog Operators
(1) Bitwise operators
(2) Logical Operators
(3) Reduction Operators
(4) Arithmetic Operator
(5) Relational Operator
(6) Equality Operator
(7) Shift Operator
(8) Concatenate Operator
(9) Conditional Operator
(10) Replication Operator
 (8) Concatenate Operator: This operator concatenates two or more vectors
to create a larger vector

Number of
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Operator type Operator symbols Operation performed operands

Concatenate { -,-} Concatenation Any number

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 Concatenate Operator

Example1
Let A and B are two 3 bit vectors and D is a 6 bit vector

Then D= {A,B}
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results six bit vector D= A[2]A[1]A[0]B[2]B[1]B[0]

Example2
E = {3’b111, A, 2’b00};

results 8 bit vector E= 111A[2]A[1]A[0]00

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 (9) Conditional: This operator assigns one of two values depending on a conditional
expression

Number of
Operator type Operator symbols Operation performed operands
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Conditional ?: Concatenation 3

Syntax

conditional_expression ? true_expression : false_expression

If the conditional expression evaluates to 1 (true), then the value of true_expression

is chosen; otherwise, the value of false_expression is chosen

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 Conditional Operator

syntax
conditional_expression ? true_expression : false_expression
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Example-1

A= (B<C)?(D+5): (D+2);

if B is less than C, the value of A will be D + 5

else A will have the value D+2.

The conditional operator can be used both in continuous

assignment statements and in procedural statements inside an
always block

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 Example: A 2-to-1 multiplexer specified using the conditional operator.
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module mux2to1 (w0, w1, s, f);

input w0, w1, s;

output f;

assign f = s ? w1 : w0;

endmodule

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 (10) Replication Operator: This operator allows repetitive concatenation of the
same vector, which is replicated the number of times indicated in the replication
constant.

Number of
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Operator type Operator symbols Operation performed operands

Replication {{}} Replication Any number

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 Replication Operator

Example-1

{3{A}}
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results {A, A, A}

Example-2

{4{2’b10}}

Results the eight-bit vector 10101010

Example-3

{2{A}, 3{B}}

Results to {A, A, B, B, B} 58