Ezairo 8300
Ezairo 8300
Ezairo 8300
M-20865-010
June 2022
© SCILLC, 2022
Previous Edition © 2021
"All Rights Reserved"
onsemi Confidential
Table of Contents
Page
Table of Contents 2
1. Introduction 4
1.1 Purpose 4
1.3 Conventions 4
2. Overview 5
2.2 Features 5
3.4 Preparing the System to Build Source Code with the ASIP Designer toolchain 10
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5. More Information 27
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CHAPTER 1
1. Introduction
1.1 PURPOSE
IMPORTANT: onsemi acknowledges that this document might contain the inappropriate terms “white list",
"master" and "slave”. We have a plan to work with other companies to identify an industry wide solution
that can eradicate non-inclusive terminology but maintains the technical relationship of the original wording.
Once new terminologies are agreed upon, future products will contain new terminology.
This group of topics describes how to begin using the Ezairo 8300 Software Development Kit (SDK). It
provides the prerequisites and instructions necessary to install the relevant software, connect the hardware, and
develop applications for Ezairo 8300 using the Synopsys® ASIP Designer™ toolchain. Sample applications are
included for introduction and practice purposes.
This group of topics is for software developers who are designing and implementing Ezairo 8300 applications.
1.3 CONVENTIONS
The following conventions are used in this group of topics to signify particular types of information:
monospace font
Macros, functions, defines and addresses.
italics
File and path names, or any portion of them.
<angle brackets>
Optional parameters and placeholders for specific information. To use an optional parameter or
replace a placeholder, specify the information within the brackets; do not include the brackets
themselves.
For more information about Ezairo 8300, refer to the following documents:
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CHAPTER 2
2. Overview
Ezairo 8300 is an open-programmable DSP-based System-on-Chip (SoC) specifically designed for use in ultra-
low-power high-performance portable audio devices.
Ezairo 8300 includes five programmable or semi-programmable processing cores, providing a high degree of
parallelism and flexibility:
• The CFX processor is an open-programmable dual-Harvard 24-bit digital signal processor (DSP), providing
support for any type of audio signal processing.
• The HEAR configurable accelerator core is optimized for pre-programmed functions that are frequently
needed in audio signal processing.
• The Filter Engine allows time domain filtering and supports an ultra-low-delay audio path.
• The Arm® Cortex®-M3 core functions as the system master.
• The LPDSP32 is an open-programmable dual-Harvard 32-bit DSP.
2.1 HIGH-LEVEL OVERVIEW
Each of the Ezairo 8300‘s programmable cores has a separate toolchain which is integrated in the SDK.
Section 3.4 “Preparing the System to Build Source Code with the ASIP Designer toolchain” on page 10 contains
more information about the ASIP Designer toolchain for the CFX as a starting point. Information about the other
toolchains, and more information about the CFX toolchain, can be found in the relevant sections of related manuals.
2.2 FEATURES
• Four ADCs with signal detection mode and 2 direct digital output drivers, with high quality and ultra-low
power performances
• Peripherals and interfaces needed to make it a complete hardware platform, when combined with non-volatile
memory, wireless transceivers or multiple sensors
• A neural network accelerator that allows the Ezairo 8300 to perform neural network computations in a highly
efficient and flexible way
The architecture of the Ezairo 8300 is shown in the "Ezairo 8300 Architecture Overview" figure (Figure 1).
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CHAPTER 3
The following items are needed before you can make connections:
• Ezairo 8300 Evaluation and Development Board and a USB to Micro-USB cable
• A Promira programmer and its associated cables
• A computer running Windows
• A SEGGER J-Link™, if you are debugging the LPDSP32 processor
1. Check the jumper positions. The "Ezairo 8300 Evaluation and Development Board Diagram" figure (Figure
2), below, depicts the jumper positions necessary to power the Evaluation and Development Board from the
USB port and connect the Board to the Windows computer. The black rectangles in the diagram indicate the
required jumper positions.
NOTE: In order for the onboard flash (LE25S161) to work, the VDDO1−S header must be shorted
across only pins 1 and 2 OR only pins 7 and 8. It is important not to short 1 and 2 and 7 and 8 at
the same time. This supplies 1.8 V to the EEPROM.
2. Ensure that the power switch (SW1) is in the ON position.
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3. Once the jumpers are in the right positions, you can plug the micro USB cable into the socket (J5) on the
board. The LED close to the USB connector flashes green when it is initially plugged in. After a second or
two, the green LED turns a steady green to show an established connection. If there are any communication
issues and the USB port cannot establish a connection with the Ezairo 8300, the LED flashes red instead of
green, and continues to flash. If this occurs, double check the jumper configuration and ensure that the ON-
OFF switch is set to ON.
4. To enable debugging of a CFX program, connect the cable from the Promira to the development board socket
J1. If you are only debugging a CFX program and not an Arm Cortex-M3 core program, it is also possible to
power the board from the Promira by moving the PSU_SEL jumper to the 3-4 position, and then the USB
cable is not required. More information about this can be found in the Ezairo 8300 Evaluation and
Development Board Manual.
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The ASIP Programmer tools require the Visual C++ 2015 64-bit runtime be installed. If you do not have Visual
Studio or Visual C++ 2015 installed, you can download the runtime redistributable from the address below:
https://www.microsoft.com/en-us/download/confirmation.aspx?id=52685
NOTE: The ASIP Designer is a license based product which requires access to a license server. To
configure the license server location, use the User_Setup.exe tool located in the following
directory, where <version> is the installed version number of the tool (e.g.: P-2019.03-SP2):
To install the SDK, run the Ezairo_8300_SDK_<version>.exe application, where <version> is the the SDK
version number. If you are using Windows 10, the installer prompts you to run as an administrator.
The installer copies the files to C:/Program Files (x86)/ON Semiconductor\Ezairo 8300 SDK by default.
The installer also copies the Ezairo 8300 device support files into C:\Program Files (x86)\Common
Files\SignaKlara\CTK.
A desktop link to the Ezairo 8300 SDK is installed. Use this for opening the SDK, so that it can properly
configure the build environment for the SDK.
ide.json is a JSON-format file that includes all the paths that need to be in your system variable path, and all the
necessary environment variables, so that your Ezairo 8300 SDK code projects can work properly.
The ide.json file is included with your Ezairo 8300 SDK install. The "Default ide.json File" figure (Figure 3)
shows an example of the file’s contents, which can change from release to release.
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As the figure shows, the ide.json file’s path array contains all the recommended system variable paths, whereas
env is a dictionary containing all the necessary key value pairs for the environment variables.
The ide.json file contains the default paths when you download it along with the SDK. However, the tools you
want to use in your coding projects might be different locations from the default ones shown in the file. If so, you
can carefully edit the file, by following these steps:
1. Before you do anything else, back up the file in its original default configuration.
CAUTION: Do not neglect this step! If ide.json is deleted, or if its syntax is incorrect, the SDK cannot
work properly, so be sure you have a backup of the original.
2. Edit the file so that it points to locations appropriate for your system.
NOTE: You need administrator rights to edit ide.json if the Ezairo 8300 SDK has been installed in its
default location.
3. Save the edited file; and keep the backup of the original version, just in case.
3.4 PREPARING THE SYSTEM TO BUILD SOURCE CODE WITH THE ASIP DESIGNER TOOLCHAIN
Prior to starting the IDE you need to create a new environment variable, which the IDE uses to find the
Synopsys license server. The environment variable needs to be named SNPSLMD_LICENSE_FILE. The value of this
variable needs to be the location of the license server being used, in the format port@ServerName. The default port
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is 27020, so the name of the license server needs to resemble 27020@YourServerName. See the "Adding the
SNPSLMD Environment Variable" figure (Figure 4) for an example. For further information, see
https://www.synopsys.com/support/licensing-installation-computeplatforms/licensing.html.
If this environment variable is entered incorrectly, any attempt to create an ASIP Debug configuration fails, with
a message indicating that the plugin cannot load a debug configuration class. (See the "ASIP Debug Configuration
Error" figure (Figure 5).)
The IDE can also fail in other ways when attempting to use ASIP plugins if this environment variable is
incorrect.
Once the SDK has been started, there is one more step to perform before you can build code using the ASIP
Designer toolchain: configure the location of the processor model project file cf624c.prx. To do this, follow the
steps below:
1. Click on the menu item ASIP Designer and select Add/Remove ASIP Processor(s).
2. The dialog that pops open must not have any previous processor models populated.
3. Select Add ASIP. A new dialog appears, asking for the location of the ASIP processor's .prx file. If the
installation has been performed to the default location, you can point to the following file:
C:/Program Files (x86)/ON Semiconductor\Ezairo 8300 SDK \cf624c-a20_<version>\lib\cf624c.prx
4. Click Open, then click Done to save the new location of the project file.
5. A window pops up, asking you to select the processors you want to activate. Select them, and choose
Activate.
6. Follow a similar process to add the processor model for LPDSP32.
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CHAPTER 4
If you wish to build the sample applications into an NVM image for use with an external NVM device, take
care to read the appropriate information in the documentation to determine which modifications are needed. The
NVMUpdate utility found in the utilities folder of the SDK can be used to download NVM images using I2C or
JTag. See the Integrated Development User’s Guide for Ezairo 8300 or the readme file along with NVMUpdate for
more information.
1. If you are upgrading the Ezairo 8300 SDK, create a new workspace at, for example, c:\workspace — using
either Windows Explorer or the onsemi Launcher in step 2.
2. Open the onsemi IDE by going to the Windows Start menu and selecting onsemi > Ezairo 8300 SDK. From
the Ezairo 8300 Development Tools IDE Launcher screen, browse to your new workspace, select it, and click
Launch.
To use the Ezairo 8300 CFX DSP sample project included with this release, first start the Ezairo 8300 SDK as
described in Section 4.1 “Starting the Ezairo 8300 SDK” on page 12.
To import sample applications in the Ezairo 8300 SDK, use the Sample Code Explorer view. This view is open
by default in the C/C++ perspective when starting the SDK for the first time. To access the Sample Code Explorer
view at any other time, choose Window > Show View > Other > onsemi > Sample Code Explorer. The explorer
appears in the views panel in the lower section of the IDE.
In the Sample Code Explorer view, follow these steps to import the CFX assembler sample application:
1. In the Name panel at the lower part of the view, click the arrow next to Sample Code. This reveals the
samples directory.
2. Click the arrow next to samples. This opens a list of the sample applications. Clicking the arrow next to
CFX reveals the sample_CFX_assembly application.
3. Optional step: if you want to read the sample application’s readme file, click on the application name. The
readme file appears in a separate panel, providing a description of what the sample does.
4. To import the CFX sample project, right-click sample_CFX_assembly and select Import Single Project from
the dropdown menu.
5. A copy of the sample application is imported directly into your workspace, as can be seen in the Project
Explorer panel on the left side of the view. This copying does not modify the original source in the SDK
installation folder.
6. Right-click on the project’s name in the Project Explorer panel, and choose Build Project from the dropdown
menu. This builds the project with no errors.
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Before starting development with the ASIP Programmer tools the developer must first point to the CFX or
LPDSP32 model library. To do this:
1. Click on the ASIP Designer menu item in the top menu and select Add/Remove ASIP Processor(s).
2. Click on Add ASIP in the right column.
3. When selecting the CFX processor point to a directory similiar to this: C:/Program Files (x86)/ON
Semiconductor\Ezairo 8300 SDK\cf624c<version>\lib, or C:/Program Files (x86)/ON Semiconductor\Ezairo
8300 SDK\lpdsp32<version>\lib for the LPDSP32 processor.
4. Click on Done to save and close the dialog.
5. After selecting the processors to include click on ASIP Designer > Select Active ASIP programmer
processor.
6. The dialog shows all selected processors and blank checkboxes beside them. Enable the checkboxes for the
processors you want to use with the ASIP programmer tools; multiple processors can be selected. When you
are done, click Finish to close the dialog box.
(See the ASIP Designer - ASIP Programmer Eclipse Reference Manual (eclipse-manual.pdf) for more
information.)
At this point the ASIP Programmer tools are configured for use with projects and debuggers.
NOTE: To change the Communication Toolkit (CTK) configuration used for CFX debugging, you can
set the E8300_CTK_CONFIG environment variable to any existing CTK configuration. By
default without the environment variable, the CFX_CFG_8300 configuration is used for CFX
debugging, which provides the ideal settings for Ezairo 8300 when using Promira. Another
approach to changing the configuration used for CFX debugging (and loading of HEAR and
Filter Engine applications) is to edit the CFX_CFG_8300 CTK configuration. To change or
view CTK configurations such as this one (for example if you are using a CAA rather than the
Promira), open the CTK Configuration Manager using the Windows Search or Start Menu. It is
not possible to change the CTK configuration for a CFX debug session through the IDE, nor
the CTK configuration itself.
To debug the built code on the CFX, create a new debug configuration by following the steps outlined in the
"Creating CFX Assembler Debug Configuration, Step 1" figure (Figure 6):
1. Right click on the built .elf file (sample_CFX_assembly in this case) and select Debug As > Debug
Configurations.
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2. The Debug Configurations dialog is displayed. Right click on the ASIP Designer Application configuration
type and select New (as shown in the "Creating CFX Assembler Debug Configuration, Step 2" figure (Figure
7)).
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3. A new dialog is displayed, allowing you to create your debug configuration. Within this dialog the
following information must be added (shown for the sample_CFX_assembly executable):
a. In the Executable tab view, select your desired Project (in Figure 8, sample_CFX_assembly) and
Executable (in Figure 8, C:\eclipse-workspace\sample_CFX_assembly\Debug), and uncheck the box
labeled Stop At. (See the "Selecting Project and Executable" figure (Figure 8).)
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b. In the ASIP Target tab view, click the Connection Type dropdown menu and select Remote
Hardware/Emulation (see "Selecting Connection Type" figure (Figure 9)).
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NOTE: The Debug Client is an application that is located in the model (selected during setup) under
the ISS directory. If Remote Hardware/Emulation is selected and a red X appears on the
dialog, this indicates that cf624c_client might be missing. Check the ISS directory; if the file is
missing (cf624c_client.exe), it can be found in the Debug_Client directory off the root of the
SDK installation. Copying the client application into ISS resolves the issue.
All other information in the debug configuration can remain set to defaults. The debug client uses the CTK to
communicate with the chip, and always uses the CFX_CFG_8300 CTK configuration, which must be left as the
default Promira configuration. Host and Port are not used in this case.
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1. Click on Apply and Debug. The application begins loading to the device. If this is successful, an ASIP
Designer Debug session opens.
2. You are now able to step through the code, look at registers and memory views, and more.
To use the Ezairo 8300 C sample project included with this release, start the Ezairo 8300 SDK from the desktop
link.
To import sample applications in the Ezairo 8300 SDK, use the Sample Code Explorer view. This view is open
by default in the C/C++ perspective when starting the SDK for the first time. To access the Sample Code Explorer
view at any other time, choose Window > Show View > Other > onsemi > Sample Code Explorer. The explorer
appears in the views panel in the lower section of the IDE.
In the Sample Code Explorer view, follow these steps to import the CFX C sample application:
1. In the Name panel at the lower part of the view, click the arrow next to Sample Code. This reveals the
samples directory.
2. Click the arrow next to samples. This opens a list of the sample applications. Clicking the arrow next to
CFX reveals the factorial_calculation_demo application.
3. Optional step: if you want to read the sample application’s readme file, click on the application name. The
readme file appears in a separate panel, providing a description of what the sample does.
4. To import the CFX sample project, right-click factorial_calculation_demo and select Import Single Project
from the dropdown menu.
5. A copy of the sample application is imported directly into your workspace, as can be seen in the Project
Explorer panel on the left side of the view. This copying does not modify the original source in the SDK
installation folder.
6. Right-click on the project’s name in the Project Explorer panel, and choose Build Project from the dropdown
menu. This builds the project with no errors.
Before starting development with the ASIP Programmer tools the developer must first point to the CFX or
LPDSP32 model library. To do this:
1. Click on the ASIP Designer menu item in the top menu and select Add/Remove ASIP Processor(s).
2. Click on Add ASIP in the right column.
3. When selecting the CFX processor point to a directory similiar to this: C:/Program Files (x86)/ON
Semiconductor\Ezairo 8300 SDK\cf624c<version>\lib, or C:/Program Files (x86)/ON Semiconductor\Ezairo
8300 SDK\lpdsp32<version>\lib for the LPDSP32 processor.
4. Click on Done to save and close the dialog.
5. After selecting the processors to include click on ASIP Designer > Select Active ASIP programmer
processor.
6. The dialog shows all selected processors and blank checkboxes beside them. Enable the checkboxes for the
processors you want to use with the ASIP programmer tools; multiple processors can be selected. When you
are done, click Finish to close the dialog box.
(See the ASIP Designer - ASIP Programmer Eclipse Reference Manual (eclipse-manual.pdf) for more
information.)
At this point the ASIP Programmer tools are configured for use with projects and debuggers.
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To debug the built factorial_calculation_demo sample code, which is implemented in C, follow the same
procedure described in Section 4.2.2 “Debugging the CFX Sample Code” on page 13.
The following are some possible issues that may arise while debugging CFX C sample code, along with
recommended solutions to the problems:
There might be no device or Promira connected. Make sure your Promira and device are properly
communicating. You can confirm your CTK configuration by using the CTK Configuration Manager (found in the
Windows Start menu under onsemi). Edit the CFX_CFG_8300 configuration and choose Test. Seeing the result
Configuration is okay confirms the configuration. If communication with the device is fine, the utility returns a
chip family of 10 (SK5). PSU-SEL pins 3 and 4 need to be shorted to power the board through the Promira. See the
Ezairo 8300 Evaluation and Development Board Manual for more information.
A license is required during debugging; if a license cannot be found for the Synopsys debugging tools, the
launch fails.
There might be issues with the Promira programmer. Two specific issues can cause problems:
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When using the SV1 evaluation board, the Promira needs to have its pull-ups disabled; otherwise, false NAKs
occur.
The Promira cannot have an application load on boot, as it only supports 32-bit applications and the debugger
for Synopsys requires 64-bit support.
IMPORTANT: Depending on your individual or company configurations and restrictions in place when
using a Virtual Private Network, it might not be possible to use the Promira device when connected to VPN.
The CTK might have become corrupted. Either run the SDK installer and use the repair function to fix the CTK
installation, or click uninstall from the Windows Control Panel and then click on repair.
To use the Arm Cortex-M3 processor sample projects, start the Ezairo 8300 SDK from the desktop link.
To import sample applications in the Ezairo 8300 SDK, use the Sample Code Explorer view. This view is open
by default in the C/C++ perspective when starting the SDK for the first time. To access the Sample Code Explorer
view at any other time, choose Window > Show View > Other > onsemi > Sample Code Explorer. The explorer
appears in the views panel in the lower section of the IDE.
In the Sample Code Explorer view, follow these steps to import an Arm Cortex-M3 processor sample
application:
1. In the Name panel at the lower part of the view, click the arrow next to Sample Code. This reveals the
samples directory.
2. Click the arrow next to samples. This opens a list of the sample applications. Clicking the arrow next to
Cortex-M3 reveals the Arm Cortex-M3 core applications.
3. Optional step: if you want to read the sample application’s readme file, click on the application name. The
readme file appears in a separate panel, providing a description of what the sample does.
4. To import an Arm Cortex-M3 processor sample application, right-click on the desired application name
(ASRC, blinky, cm3_bootloader, i2c_cmsis, swmTraceExample, or uart_cmsis) and select Import Single
Project from the dropdown menu.
5. A copy of the sample application is imported directly into your workspace, as can be seen in the Project
Explorer panel on the left side of the view. This copying does not modify the original source in the SDK
installation folder.
6. Right-click on the project’s name in the Project Explorer panel, and choose Build Project from the dropdown
menu. This builds the project with no errors.
IMPORTANT: The Ezairo 8300 SDK requires certain files to be present in the path when building Arm
Cortex-M3 processor-based applications. Depending on the system path configuration and/or command shells
present, the build might fail due to these files not being found. In some cases sh.exe is found, which also causes
a build to fail on Windows. To prevent such failures when generating a new project for the Arm Cortex-M3
core using File->New->C/C++ Project, add "SHELL=cmd" (no quotes, case sensitive) to the build command,
and uncheck "Use default build command", as shown in the "Build Argument Shell Command" figure (Figure
11). This is done in the Project Properties under the C/C++ Build->Builder Settings Tab.
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For debugging the built code on the Arm Cortex-M3 processor, create a new debug configuration with the
following steps:
1. Right click on the built .elf file (blinky.elf in this case) and select Debug As > Debug Configurations, as
shown in the "Arm Cortex-M3 Processor Debug Configuration, Step 1" figure (Figure 12).
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2. The Debug Configurations dialog is displayed. Right click on the GDB SEGGER J-Link Debugging
configuration type and select New (see "Arm Cortex-M3 Processor Debug Configuration, Step 2" figure
(Figure 13)).
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3. A new dialog is displayed, allowing you to create your debug configuration. Within this dialog the
following information must be added:
a. In the Main tab view, select the project you are working on (in this case blinky), and the C/C++
application (in this case Debug\blinky.elf), as shown in "Selecting Project and Application Type"
figure (Figure 14).
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b. In the Debugger tab view, enter Cortex-M3 in the Device Name window, and make certain that the
Other Options field does not include the -nogui option, as shown in "Device Name Window"
figure (Figure 15).
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c. In the Startup tab view under Runtime Options, tick the box labeled RAM application (reload after
each reset/restart), as seen in "Selecting Runtime Options" figure (Figure 16).
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All other information in the debug configuration can remain set to defaults.
1. Click on Apply and then on Debug. The application begins loading to the device. If this is successful, a J-
Link GDB Debug session opens.
2. You are now able to step through the code, look at registers and memory views, and more.
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CHAPTER 5
5. More Information
Fully-searchable HTML5 versions of most Ezairo 8300 documentation can be found with this shortcut: in
C:/Program Files (x86)/ON Semiconductor\Ezairo 8300 SDK\documentation\, double-click on searchable Ezairo
8300 documents.htm to start the HTML5 display in your default browser.
5.1 WHERE TO FIND PDF DOCUMENTATION
The tables in the following section list the PDF manuals that are available in the documentation folder of this
release. Note that <sdk_home> represents the folder where you installed the SDK.
The following are the tables that list documentation, and where to find them in this topic:
Arm® and Thumb®-2 This quick reference card from Arm provides a <sdk_home>\documentation
Instruction Set Quick short-hand list of instructions for the Arm Cortex-M3
Reference Card processor.
CFX for Ezairo 8300 A companion document for the CFX DSP <sdk_home>\documentation
(CFX 1.1) DSP Architecture Manual for Ezairo 8300, this document
Instruction Set Quick serves as a concise programming aid. It is designed
Reference to remind users of the assembly language syntax.
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Communication This group of topics describes how to use the built-in <sdk_home>\documentation
Protocols Manual for protocol on the chips based on both the CFX for
Ezairo 8300 Ezairo 8300 DSP core and the ARM Cortex-M3
core so that a system other than the SDK can
communicate with them. This group of topics is
primarily intended for use in situations where the
user wants to interface with another device and
cannot use the Communication Toolkit support
software.
Ezairo 8300 Evaluation This group of topics describes the configuration and <sdk_home>\documentation
and Development Board use of the Evaluation and Development Board.
Manual
Ezairo 8300 Filter Engine This group of topics provides an architecture <sdk_home>\documentation
Reference Manual description and instruction set reference for the
Filter Engine processor. It is intended for readers
who want to develop programs written for the Filter
Engine. It contains explanatory information for those
who are new to the Filter Engine, and reference
material for experienced users. To learn how to
configure the Filter Engine from the CFX processor,
see the Ezairo 8300 Hardware Reference. Further
information on DSP software support libraries, such
as building block libraries of macros to make
algorithm development faster, is provided in the
Ezairo 8300 Firmware Reference.
Ezairo 8300 Firmware The firmware provides basic system functionality <sdk_home>\documentation
Reference and isolates you from the hardware, making it easier
to support and maintain your code. This group of
topics describes the libraries and other firmware
features that assist with the development of your
applications.
Ezairo 8300 Hardware This group of topics describes all the functional <sdk_home>\documentation
Reference features available on an Ezairo 8300 chip, how they
are used, and how they are configured. This group
of topics is a good place to start when you are
designing real-time implementations of your
algorithms or planning a product based on the
Ezairo 8300 chip.
Ezairo 8300 Software This group of topics provide installation instructions, Downloaded alongside the installer
Development Kit Getting defines prerequisite hardware and software, and
Started Guide walks you through the steps of building and running
a sample code application so that you can confirm
that the SDK and evaluation and development
board are functioning as expected.
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Filter Engine for This page provides the syntax of the Filter Engine <sdk_home>\documentation
Ezairo 8300 Instruction instructions, a brief definition of the operands, and
Set Quick Reference examples.
Integrated Development This group of topics describes how to use the tools <sdk_home>\documentation
User’s Guide for provided by the IDE: an advanced editor, an
Ezairo 8300 integrated source code builder, and an integrated
debugger. The group of topics includes information
about the ASIP programming tool, and plans for
updating this document include adding information
about the Arm Cortex-M3 processor toolchain.
Deep Learning for Ezairo This group of topics provides an introduction to deep <sdk_home>\documentation
8300 Programming learning concepts, and both high-level and low-level
Guide instructions for developing deep learning
applications with the Ezairo 8300 System-on-Chip.
Information is provided regarding processor
selection and multiple workflow methodologies,
which can be tailored to the user’s individual
resources and the project’s desired outcomes.
In Table 2, the placeholder <version> stands for the installed ASIP programmer version number (e.g.: P-
2019.03-SP3-1).
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Bridge Linker User Explains the use of the Bridge linker, which is part of <sdk_home>\ASIP
Manual the ASIP Programmer. The linker creates a statically Programmer\<version>\win64\doc\manuals
linked Elf executable starting from one or more
relocatable Elf object files and archives. This manual
discusses the command line arguments of the linker
and archiver, the linker optimizations, and the linker
configuration file.
Checkers API Reference The API reference documentation describes the <sdk_home>\ASIP
Documentation functions and data structures available for Programmer\<version>\win64\doc\manuals
interacting with ISSs.
Checkers ISS Interface This manual describes the different interface <sdk_home>\ASIP
Manual possibilities of an ISS. This includes memory Programmer\<version>\win64\doc\manuals
interfaces, simulation modes, SystemC interface,
and different levels of APIs.
ChessDE User Manual This manual describes the CHESSDE development <sdk_home>\ASIP
environment, a graphical user interface to the Programmer\<version>\win64\doc\manuals
compiler and simulator/debugger tools.
ChessMP User Manual This manual explains the use of CHESSMP, a multi- <sdk_home>\ASIP
processor simulation and debug environment. Programmer\<version>\win64\doc\manuals
Darts Assembler User This manual covers the command-line interface, the <sdk_home>\ASIP
Manual syntax of text and data sections, and the use of Programmer\<version>\win64\doc\manuals
expressions in assembly source code.
Eclipse User Manual This manual describes how to use the Eclipse IDE to <sdk_home>\ASIP
build and debug applications in the context of ASIP Programmer\<version>\win64\doc\manuals
Programmer.
Free and Open-Source This document lists the copyright notices and license <sdk_home>\ASIP
Licensing Notices conditions of the FOSS packages in the distribution. Programmer\<version>\win64\doc\manuals
GDB User Manual This manual describes how to set up a GDB <sdk_home>\ASIP
debugging session in the context of ASIP Programmer\<version>\win64\doc\manuals
Programmer.
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Installation Manual This manual describes the downloading and the <sdk_home>\ASIP
installation of ASIP Programmer, including licensing Programmer\<version>\win64\doc\manuals
and user setup (Chapter 3).
JTalk User Manual This document describes using JTalk for chip <sdk_home>\ASIP
debugging. JTalk interfaces one or more debug Programmer\<version>\win64\doc\manuals
clients to the target hardware and is responsible for
driving the cable that connects the PC to the
hardware target. Several cables are supported.
ASIP Designer - ASIP This manual describes using the interactive tool <sdk_home>\ASIP
Programmer Nmlview NMLView for analyzing the description of a Programmer\<version>\win64\doc\manuals
Manual processor in nML language, viewing and printing the
resulting instruction tables, and producing related
documentation, which is generated in HTML format.
Read_elf User Manual This manual describes the READ_ELF tool, used to <sdk_home>\ASIP
extract memory images from an Elf executable Programmer\<version>\win64\doc\manuals
(deprecated).
Cadence SD3.0, This document describes the eMMC physical layer. <sdk_home>\documentation\cadence_3rd_
eMMC5.1 PHY IP party_docs
Cadence SD Host This document contains the User Specification of the <sdk_home>\documentation\cadence_3rd_
Controller IP User Guide SD Host core compatible with SD Host Controller party_docs
Standard Specification version 4.00. The host
controller serves devices compatible with SD
Memory version 4.00 (SD, SDHC, SDXC), SDIO
version 4.00, MMC/eMMC version 5.0. This host
controller does not support the UHS-II Interface
which was introduced in version 4.00 as optional.
The document provides the core architecture
description, register set description, and sub-
modules specification.
In Table 4, the placeholder <version> stands for the installed CoolFlux version number (e.g.: vP-2019.03-1).
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CoolFlux DSP 24C a20: This document provides a reference for the <sdk_home>\cf624c-a20_
Assembly Programmer’s assembly language of the CoolFlux DSP 24C a20 <version>\doc\manuals
Manual DSP core, and examines the core’s architecture. It is
intended for programmers who need to analyze the
assembly code generated from C source code.
CoolFlux DSP 24C a20: This document explains how to create audio <sdk_home>\cf624c-a20_
C Programmer’s Manual applications in C for the CoolFlux DSP 24C a20 DSP <version>\doc\manuals
core, and how to use the core’s accompanying tool
suite. It is intended for C programmers who have
good general knowledge of DSP algorithms and
processors.
Communication Toolkit This manual provides a complete description of the C:\Program Files (x86)\Common
API Reference software interface that you use to access the Files\SignaKlara\CTK\documentation\ctk
Communication Toolkit (CTK) from your software.
Communication Toolkit This manual provides the information that you need C:\Program Files (x86)\Common
Programmer’s Guide to develop software that uses the Communication Files\SignaKlara\CTK\documentation\ctk
Toolkit to communicate with onsemi chips in the
SignaKlara™ technology family.
Implementing a CTK This specialized programming paper describes how C:\Program Files (x86)\Common
Communication Module to add new communication modules to the CTK to Files\SignaKlara\CTK\documentation\ctk
support new communication interfaces.
NOAHlink Analog Audio This specialized programming paper explains how to C:\Program Files (x86)\Common
Streaming with Ezairo use the NOAHlink Hearing Aid interface device to Files\SignaKlara\CTK\documentation\ctk
Products stream analog audio over onsemi Ezairo products.
NOAHlink Login This specialized programming paper explains how to C:\Program Files (x86)\Common
Enhancements modify the NOAHlink drivers to support the loading of Files\SignaKlara\CTK\documentation\ctk
new protocol firmware without resetting the
NOAHlink device.
LPDSP32-V3 Block A diagram for the LPDSP32 core that provides <sdk_home>\documentation\lpdsp32_3rd_party_
Diagram information on its inputs, outputs, components and docs
process blocks.
LPDSP32-V3 Interrupt Describes how the LPDSP32 core's interrupts are <sdk_home>\documentation\lpdsp32_3rd_party_
Support Manual supported. docs
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User IP Programmers Describes the C application layer used for the <sdk_home>\documentation\lpdsp32_3rd_party_
Guide for LPDSP32-V3 LPDSP32 core, the flow generally followed when docs
any application is ported to LPDSP32, various tips
for optimization to make the best use of the
processor and compiler resources, and certain
things the programmers should be aware of when
porting applications. It also provides a few examples
to show the usage of LPDSP32 intrinsic functions
and to give an idea of how certain DSP functions can
be ported to and optimized for LPDSP32.
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Ezairo and SignaKlara are either trademarks or registered trademarks of SCILLC. All other brand names and product names appearing in this document are trademarks of their respective
holders.
onsemi and the onsemi logo are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi owns the
rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in
any manner.
The evaluation board/kit (research and development board/kit) (hereinafter the “board”) is not a finished product and is as such not available for sale to consumers. The board is only
intended for research, development, demonstration and evaluation purposes and should as such only be used in laboratory/development areas by persons with an engineering/technical
training and familiar with the risks associated with handling electrical/mechanical components, systems and subsystems. This person assumes full responsibility/liability for proper and
safe handling. Any other use, resale or redistribution for any other purpose is strictly prohibited.
The board is delivered “AS IS” and without warranty of any kind including, but not limited to, that the board is production-worthy, that the functions contained in the board will meet your
requirements, or that the operation of the board will be uninterrupted or error free. onsemi expressly disclaims all warranties, express, implied or otherwise, including without limitation,
warranties of fitness for a particular purpose and non-infringement of intellectual property rights.
onsemi reserves the right to make changes without further notice to any board.
You are responsible for determining whether the board will be suitable for your intended use or application or will achieve your intended results. Prior to using or distributing any systems
that have been evaluated, designed or tested using the board, you agree to test and validate your design to confirm the functionality for your application. Any technical, applications or design
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The boards are not designed, intended, or authorized for use in life support systems, or any FDA Class 3 medical devices or medical devices with a similar or equivalent classification in a
foreign jurisdiction, or any devices intended for implantation in the human body. Should you purchase or use the board for any such unintended or unauthorized application, you shall
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arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent
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This evaluation board/kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC,
CE or UL, and may not meet the technical requirements of these or other related directives.
FCC WARNING – This evaluation board/kit is intended for use for engineering development, demonstration, or evaluation purposes only and is not considered by onsemi to be a finished
end product fit for general consumer use. It may generate, use, or radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to
part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment may cause interference with radio
communications, in which case the user shall be responsible, at its expense, to take whatever measures may be required to correct this interference.
onsemi does not convey any license under its patent rights nor the rights of others.
LIMITATIONS OF LIABILITY: onsemi shall not be liable for any special, consequential, incidental, indirect or punitive damages, including, but not limited to the costs of requalification, delay,
loss of profits or goodwill, arising out of or in connection with the board, even if onsemi is advised of the possibility of such damages. In no event shall onsemi’s aggregate liability from any
obligation arising out of or in connection with the board, under any theory of liability, exceed the purchase price paid for the board, if any.
PUBLICATION ORDERING
INFORMATION
M-20865-010
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