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Unit - 3 Op-Amp Characteristics and Its Basic Applications: A. Infinite Voltage Gain A

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34 views31 pages

Unit - 3 Op-Amp Characteristics and Its Basic Applications: A. Infinite Voltage Gain A

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UNIT – 3

OP-AMP CHARACTERISTICS AND ITS BASIC APPLICATIONS


Basic introduction to IC fabrication. Op-Amp characteristics: DC characteristics, AC
characteristics. Basic applications: Inverting, Non-inverting, Adder, Subtractor,
Differential amplifier, Instrumentation amplifier, Differentiator, Integrator circuit and
Comparators.

Basic introduction to IC fabrication

Op-Amp characteristics:
a. Infinite voltage gain A.
It is denoted as AoL. It is the differential open loop gain and is infinite for an ideal op-
amp.

b. Infinite input resistance Ri


The input impedance is denoted as Rin and is infinite for an ideal op-amp. This ensures

that no current can flow into an ideal op-amp.

c. Zero output resistance Ro


The output impedance is denoted as Ro and is zero for an ideal op-amp. This ensures that
the output voltage of the op-amp remains same, irrespective of the value of the load
resistance connected.

d. Zero output voltage


The presence of the small output voltage though V1 = V2 = 0 is called an off voltage. It is
zero for an ideal op-amp. This ensures zero output for zero input signal voltage.

e. Infinite bandwidth
The range of frequency over which the amplifier performance is satisfactory is called its
bandwidth. The bandwidth of an ideal op-amp is infinite. This means the operating
frequency range is from 0 to infinity. This ensures that the gain of the op-amp will be
constant over the frequency range from d.c. (zero frequency) to infinite frequency. So op-
amp can amplify d.c. as well as a.c. signals.

f. Infinite common mode rejection ratio


The ratio of differential gain and common mode gain is defined as CMRR.Thus infinite
CMRR of an ideal op-amp ensures zero common mode gain. Due to this common mode
noise output voltage is zero for an ideal op-amp.

g. Infinite slew rate


The slew rate is defined as the maximum rate of change of output voltage caused by a
step input voltage. An ideal slew rate is infinite which means that op-amp’s output
voltage should change instantaneously in response to input step voltage.It is expressed
𝑑 𝑣𝑜
as 𝑠= and measured in voltage/second.
𝑑𝑡 𝑚𝑎𝑥

h. No effect of temperature
The characteristics of op-amp do not change with temperature.

Practical Opamp equivalent circuit

DC characteristics
DC Characteristics of op-amp are,

a. Input bias current


b. Input offset current
c. Input offset voltage
d. Thermal drift
a. Input bias current:

 Input bias current is defined as the average value of two base currents entering in two Opamp i/p
terminals.
 The op-amp’s input is differential amplifier, which may be made of BJT or FET.
 In an ideal op-amp, we assumed that no current is drawn from the input terminals.
 The base currents entering into the inverting and non-inverting terminals (IB-& IB+ respectively).
 Even though both the transistors are identical, IB- and IB+ are not exactly equal due to internal
imbalance between the two inputs.
𝐼𝐵+ + 𝐼𝐵−
𝐼𝐵 =
2
 The output is driven to 500mV with zero input, because of the bias currents.
 In application where the signal levels are measured in mV, this is totally unacceptable. This can be
compensated. Where a compensation resistor Rcomp has been added between the non-inverting
input terminal and ground as shown in the figure below.

Current IB+ flowing through the compensating resistor Rcomp, then by KVL we get,

V1+0+V2-Vo = 0

V o = V2 – V1 (1)

By selecting proper value of Rcomp, V2 can be cancelled with V1 and the Vo = 0. The value of
Rcomp is

V1 = IB+Rcomp
𝑉1
𝐼𝐵+ = (2)
𝑅𝑐𝑜𝑚𝑝

The node ‘a’ is at voltage (-V1). Because the voltage at the non-inverting input terminal is (-
V1). So with Vi = 0 we get,
𝑉1
𝐼1 =
𝑅1

𝑉2
𝐼2 =
𝑅𝑓

For compensation, Vo should be zero for Vi=0, that is from Eq.(1) V2=V1
𝑉1
So that, 𝐼2 =
𝑅𝑓

KCL at node ‘a’ gives,

𝑉1 𝑉1 𝑅1 +𝑅𝑓
𝐼𝐵− = 𝐼2 + 𝐼1 = + = 𝑉1 (3)
𝑅𝑓 𝑅1 𝑅1 𝑅 𝑓

Assuming𝐼𝐵− = 𝐼𝐵+ and using equ. (2) and (3), We get

𝑅1 + 𝑅𝑓 𝑉1
𝑉1 =
𝑅1 𝑅𝑓 𝑅𝑐𝑜𝑚𝑝

Rcomp = R1 || Rf (4)

i.e. to compensate for bias current, the compensating resistor, Rcomp should be equal to the parallel
combination of resistor R1 and Rf.

b. Input offset current:

 Bias current compensation will work if both bias currents IB+ and IB- are equal.
 Since the input transistor cannot be made identical. There will always be some small difference
between IB+ and IB-. This difference is called the offset current
|Ios| = IB+-IB-

 Offset current Ios for BJT op-amp is 200nA and for FET op-amp is 10pA. Even with bias current
compensation, offset current will produce an output voltage when Vi= 0.

V1 = IB+ Rcomp

And I1 = V1/R1

KCL at node ‘a’ gives,


I2 = ( I B - I1)

 I B Rcomp
I2  IB  ( )
R1
   Rcomp 
Vo  I 2 R f  V1  I 2 R f  I B Rcomp  ( I B  I B ) R f  I B Rcomp
R1

Substitute equation (9) and after algebraic manipulation,

 
Vo  R f ( I B  I B )
Vo  R f I os

So even with bias current compensation and with feedback resistor of 1M, a BJT op-amp
has an output offset voltage

Vo = 1M Ω X 200nA

Vo = 200mV with Vi = 0

Offset current compensation:

 Offset current can be minimized by keeping feedback resistance small.


 Unfortunately to obtain high input impedance, R1 must be kept large.
 R1 large, the feedback resistor Rf must also be high. So as to obtain reasonable gain.
 The T-feedback network is a good solution. This will allow large feedback resistance, while keeping
the resistance to ground low (in dotted line).
c.Input offset voltage:

 Inspite of the use of the above compensating techniques, it is found that the output voltage may
still not be zero with zero input voltage [Vo ≠ 0 with Vi = 0]. This is due to unavoidable imbalances
inside the op-amp and one may have to apply a small voltage at the input terminal to make output
(Vo) = 0.
 This voltage is called input offset voltage Vos. This is the voltage required to be applied at the input
for making output voltage to zero (Vo = 0).

Rf
Vo  (1  )Vios
R1

 Thus, the output offset voltage of an op-amp in closed loop is given by above equation

Total output offset voltage:

 The total output offset voltage VOT could be either more or less than the offset voltage
produced at the output due to input bias current (IB) or input offset voltage alone(Vos).
 This is because IB and Vos could be either positive or negative with respect to ground.
Therefore the maximum offset voltage at the output of an inverting and non-inverting amplifier
(figure b, c) without any compensation technique used is given by many op-amp provide offset
compensation pins to nullify the offset voltage.
 10K potentiometer is placed across offset null pins 1&5. The wipes connected to the negative
supply at pin 4.
 The position of the wipes is adjusted to nullify the offset voltage.
When the given (below) op-amps does not have these offset null pins, external balancing
techniques are used.

Rf
VOT  (1  )Vios  R f I B
R1

With Rcomp, the total output offset voltage

Rf
VOT  (1  )Vios  R f I os
R1

d.Thermal drift
Bias current, offset current, and offset voltage change with temperature. A circuit carefully nulled at
25ºC may not remain. So when the temperature rises to 35ºC. This is called drift. Offset current
drift is expressed in nA/ºC and offset voltage drift in mV/0C. .These indicate the change in offset for
each degree Celsius change in temperature.

AC characteristics
Frequency Response:

 The variation in operating frequency will cause variations in gain magnitude and its
phase angle. The manner in which the gain of the op-amp responds to different frequencies is
called the frequency response. Op-amp should have an infinite bandwidth Bw =∞ (i.e.) if its open
loop gain in 90dB with dc signal its gain should remain the same 90 dB through audio and onto high
radio frequency.
 The op-amp gain decreases (roll-off) at higher frequency what reasons to decrease gain
after a certain frequency reached. There must be a capacitive component in the equivalent circuit
of the op-amp.
 For an op-amp with only one break (corner) frequency all the capacitors effects can be
represented by a single capacitor C. Below fig is a modified variation of the low frequency model
with capacitor C at the o/p.

There is one pole due to R0 C and one -20dB/decade. The open loop voltage gain of an op-amp with
only one corner frequency is obtained from above fig.

−𝑗𝑋𝐶
𝑣0 = 𝐴 𝑣
𝑅0 − 𝑗𝑋𝐶 𝑂𝐿 𝑑
𝑣0 𝐴𝑂𝐿
𝐴= =
𝑣𝑑 1 + 2𝜋𝑓𝑅0 𝐶
𝐴𝑂𝐿
𝐴=
𝑓
1+𝑗
𝑓1
1
Where, 𝑓1 =
2𝜋 𝑅𝑜 𝐶

f1 is the corner frequency or the upper 3 dB frequency of the op-amp. The magnitude and phase
angle of the open loop volt gain can be written as,

𝐴𝑂𝐿
𝐴 =
2
𝑓
1+
𝑓1

𝑓
∅ = −𝑡𝑎𝑛−1
𝑓1

The magnitude and phase angle characteristics from above equation.

 For frequency f<< f1 the magnitude of the gain is 20 log AOL in dB.
 At frequency f = f1 the gain in 3 dB down from the dc value of AOL in dB. This frequency f1 is called
corner frequency.
 For f>>f1 the fain roll-off at the rate off -20dB/decade or -6dB/decade.

Phase Characteristics

From the phase characteristics that the

 Phase angle = zero ,at frequency f =0.

 Phase angle = -450 ,at f=f1

 phase angle = -900 ,at f= infinite frequency.

It shows that a maximum of 900 phase change can occur in an op-amp with a single
capacitor C.
Stability of an Op-amp:

Op-amps are rarely used in open loop configuration because of its high gain. Let us now
consider the effect of feedback on op-amp frequency response.

 It uses resistor feedback network and may be used as an invertingamplifier for V2 = 0 and as non-
inverting amplifier for V1 = 0.

 From the negative feedback concepts, we may write the closed looptransfer function as
A
ACL =
1 + Aβ
whereAis the open loop voltage gain and is the feedback ratio.

 If characteristic equation 1 + Aβ = 0, the circuit will become just unstable, that is, leads into
sustained oscillation.
 Rewriting the characteristic equation as,1 − (Aβ) = 0, leads to loop gain, −Aβ = 1
 Since Aβ is a complex quantity, the magnitude condition become
Aβ = 1
 A has an additional phase shift of 180˚ which makes the total phase shift equal to zero.
 In this case, there is every possibility that the amplifier may begin to oscillate as both the
magnitude and phase conditions.
 This may be noted that oscillation is just the starting point of instability.

 when 1 + Aβ < 0

Aβ < 0 𝑖. 𝑒. 𝑛𝑒𝑔𝑎𝑡𝑖𝑣𝑒, and then ACL> A, i.e. the closed loop gain increases and leads to
instability.

 When Aβ > 0, and obviously ACL< A and the system is stable.


a. Dominant Pole Compensation
Dominant pole is introduced by adding RC network in series with op-amp.

Consider an op-amp with three break frequencies and its loop gain is A.

𝐴𝑂𝐿
𝐴=
𝑓 𝑓 𝑓
1+𝑗 1+𝑗 1+𝑗
𝑓1 𝑓2 𝑓3

The transfer function of the compensating network can be obtained as

𝑉0
𝐴1 =
𝑉0′

By applying voltage division rule to the network,

𝑉0 −𝑗𝑋𝐶
𝐴1 = ′ =
𝑉0 𝑅 − 𝑗𝑋𝐶

𝑗

2𝜋𝑓𝑐
𝐴1 =
𝑗
𝑅−
2𝜋𝑓𝑐
1
𝐴1 =
1 + 𝑗2𝜋𝑓𝑅𝐶

Let,
1
𝑓𝑑 =
2𝜋𝑅𝐶

1
𝐴1 =
𝑓
1+𝑗
𝑓𝑑

Where, 𝑓𝑑 = 𝑏𝑟𝑒𝑎𝑘 𝑓𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦 𝑜𝑓 𝑡𝑕𝑒 𝑐𝑜𝑚𝑝𝑒𝑛𝑠𝑎𝑡𝑖𝑛𝑔 𝑛𝑒𝑡𝑤𝑜𝑟𝑘

Hence the compensated transfer function becomes

𝐴′ = 𝐴𝐴1

𝐴𝑂𝐿
𝐴′ =
𝑓 𝑓 𝑓 𝑓
1+𝑗 1+𝑗 1+𝑗 1+𝑗
𝑓𝑑 𝑓1 𝑓2 𝑓3

 It can be observed from the plot that 3 dB down bandwidth for non-compensated system is BW 1
while for compensated it becomes BW2. There is drastic reduction in the bandwidth.
Advantages :

i) As the noise frequency components are outside the smaller bandwidth, the noise immunity of the
system improves.

ii) Adjusting value of f, adequate phase margin and the stability of the system is assured.

Disadvantage :

i) The only disadvantage of the method is that the bandwidth reduces drastically, as
mentioned earlier.
b. Pole-Zero Compensation

Consider the same op-amp described by the open loop gain A with three break frequencies as

𝐴𝑂𝐿
𝐴=
𝑓 𝑓 𝑓
1+𝑗 1+𝑗 1+𝑗
𝑓1 𝑓2 𝑓3
In this method, the transfer function A is modified by adding a pole and zero with the help of
compensating network.

The zero added is at higher frequency while a pole is at lower frequency. Such a compensating
network is shown in the Fig. 2.125

The transfer function of the compensating network can be obtained as

𝑉0
𝐴1 =
𝑉0′

By applying voltage division rule to the network,

𝑍1
𝐴1 =
𝑍1 + 𝑍2

From fig., 𝑍1 = 𝑅1

𝑍2 = 𝑅2 − 𝑗𝑋𝐶2

𝑅1
𝐴1 =
𝑅1 + 𝑅2 − 𝑗𝑋𝐶2

1 + 𝑗2𝜋𝑓𝑅2 𝐶2
𝐴1 =
1 + 𝑗2𝜋𝑓(𝑅1 + 𝑅2 )𝐶2

1
𝑓1 =
2𝜋𝑅2 𝐶2
1
𝑓2 =
2𝜋(𝑅1 + 𝑅2 )𝐶2

𝑓
1+𝑗
𝑓1
𝐴1 =
𝑓
1+𝑗
𝑓0

The values of R1, R2 and C2 are so selected that the break frequency for the zero matches with the
first comer frequency f1 of the uncompensated system. While the pole of the compensating network
at f0is selected in such a way that the compensated transfer function A' passes through 0 dB at the
second comer frequency f2 of the uncompensated system. The resultant loop gain becomes

𝐴′ = 𝐴𝐴1

𝑓
𝐴𝑂𝐿 1 + 𝑗
𝑓1
𝐴=
𝑓 𝑓 𝑓 𝑓
1+𝑗 1+𝑗 1+𝑗 1+𝑗
𝑓0 𝑓1 𝑓2 𝑓3

Slew Rate:

{What is Slew rate? List the causes of the Slew rate and explain its significance in applications
Dec2015,May 2019}

Slew rate is the maximum rate of change of output voltage with respect to time. Specified in V/μs

There is a capacitor with-in or outside of an op-amp to prevent oscillation. It is this capacitor which
prevents the output voltage from responding immediately to a fast changing input.

The rate at which the volt across the capacitor increases is given by

𝑑𝑣𝑐 𝐼
=
𝑑𝑡 𝐶
𝑑𝑣𝑐 𝐼𝑚𝑎𝑥
𝑆𝑅 = =
𝑑𝑡𝑚𝑎𝑥 𝐶
For a sine wave input, the effect of slew rate can be calculated as below

consider a volt follower circuit,

If 𝑉𝑠 = 𝑉𝑚 𝑠𝑖𝑛𝜔𝑡 then, the output 𝑉𝑜 = 𝑉𝑚 𝑠𝑖𝑛𝜔𝑡 . The rate of change of output is given by

𝑑𝑣0
= 𝑉𝑚 𝜔 𝑐𝑜𝑠𝜔𝑡
𝑑𝑡
 The max rate of change of output across when cos𝜔t =1

𝑑 𝑣𝑐
(i.e) 𝑆𝑅 = = 𝜔 𝑉𝑚
𝑑 𝑡 𝑚𝑎𝑥

Therefore, SR = 2πf VmV/Sec

 Thus the maximum frequency fmax at which we can obtain an undistorted output volt of peak
value Vm is given by
𝑆𝑙𝑒𝑤 𝑅𝑎𝑡𝑒
𝑓𝑚𝑎𝑥 (𝐻𝑧) =
6.28 × 𝑉𝑚
It is maximum frequency of a large amplitude sine wave with which op-amp can have
without distortion.

Basic applications:

Inverting Amplifier
Inverting operational amplifier:

 This is perhaps the most widely used of all the op-amp circuits.
 Input signal is applied to the inverting input terminal through R1and non-inverting input terminal
of op-amp is grounded.

Analysis: For simplicity, assume an ideal op-amp. As Vd= 0, node 'a' is at ground potential and the
current i1 through R1is

𝑉𝑖
𝑖1 =
𝑅𝑖

Also since op-amp draws no current, all the current flowing through R1 must flow through Rf. The output
voltage,

𝑅𝑓
𝑉0 = −𝑖1 𝑅𝑓 = −𝑉𝑖
𝑅1

Hence, the closed loop gain of the inverting amplifier is,

𝑉0 𝑅𝑓
𝐴𝐶𝐿 = =−
𝑉𝑖 𝑅1

Alternatively, the nodal equation at the node 'a' in Fig. 2.11 (a) is
𝑉𝑎 − 𝑉𝑖 𝑉𝑎 − 𝑉0
+ =0
𝑅1 𝑅𝑓

WhereVais the voltage at node 'a'. Since node 'a' is at virtual ground Va= 0. Therefore, we get,

𝑉0 𝑅𝑓
𝐴𝐶𝐿 = =−
𝑉𝑖 𝑅1

The negative sign indicate a phase shift of 180̊ between Vi and V0. If the resistance is replaced by
impedance, then the closed loop gain is given by,

𝑉0 𝑍𝑓
𝐴𝐶𝐿 = =−
𝑉𝑖 𝑍1

Non-inverting Amplifier
If the signal is applied to the non-inverting input terminal and feedback is given as shown in Fig.
2. 7 (a), the circuit amplifies without inverting the input signal. Such a circuit is called non-inverting
amplifier.

It may be noted that it is also a negative feed-back system as output is being fed back to the inverting
input terminal.

As the differential voltage Vd at the input terminal of op-amp is zero, the voltage at node 'a' in Fig. 2.7
(a) is Vi, same as the input voltage applied to non-inverting input terminal. Now Rf and R1forms a
potential divider. Hence
𝑉0
𝑉𝑖 = 𝑅
𝑅1 + 𝑅𝑓 1

As no current flows into the op-amp,

𝑉0 𝑅1 + 𝑅𝑓 𝑅𝑓
= =1+
𝑉𝑖 𝑅1 𝑅1

Hence, the closed loop gain of the Non-inverting amplifier is,

𝑉0 𝑅𝑓
𝐴𝐶𝐿 = =1+
𝑉𝑖 𝑅1

Adder
 Definition: Op-amp may be used to design a circuit whose output is the sum of several input
signals. Such a circuit is called a summing amplifier or a summer.
 Types:

(i) Inverting summer and (ii) non-inverting summer

(i)Inverting Summing Amplifier:

 A typical summing amplifier with three input voltages V1, V2 and V3, three input resistors R1, R2,
R3 and a feedback resistor Rf is shown in above figure.

 The following analysis is carried out assuming that the op-amp is an ideal one, that is, AOL = ∞.
Since the input bias current is assumed to be zero, there is no voltage drop across the resistor Rcomp and
hence the non-inverting input terminal is at ground potential.

 The voltage at nod ‘a’ is zero as the non-inverting terminal is grounded. The nodal equation be
KCL at node ‘a’ is
V1  Va V2  Va V3  Va V0  Va
   0
R1 R2 R3 Rf

Sub,Va  0, Then
V1 V2 V3 V0
   0
R1 R2 R3 R f

V0 V V V
 ( 1  2  3 )
Rf R1 R2 R3

V1 R f V2 R f V3 R f
V0  (   )
R1 R2 R3

Sub, R1  R2  R3  R f

(V1  V2  V3 ) R f
Then,V0  
Rf

V0  (V1  V2  V3 )              (1)
If , R1  R2  R3  3R f , Then

(V1  V2  V3 )
V0                (2)
3
Thus eqn (1) output Vo is the inverted sum of the input signals.Eqn (2) is output is the average of the
input signals (inverted).To find Rcomp, make all inputs V1 = V2 = V3 = 0. So the effective input resistance Ri
= R1 || R2 || R3. Therefore, Rcomp = Ri || Rf = R1 || R2 || R3 || R,f.

Non-Inverting Summing Amplifier:

Definition: A summer that gives a non-inverted sum is the non-inverting summing


amplifier of figure 3. Let the voltage at the (-) input terminal be Va.
The voltage at (+) input terminal will also be Va. The nodal equation at node ‘a’ is given
by

V1  Va V2  Va V3  Va V0  Va
   0
R1 R2 R3 Rf

V1 V2 V3 Va Va Va
    
R1 R2 R3 R1 R2 R3

1 1 1  V V V
Va      1  2  3
 R1 R2 R3  R1 R2 R3

V1 V V
(  2  3)
R1 R2 R3
Va 
1 1 1
(   )
R1 R2 R3

The op-amp and two resistors and R constitute a non-inverting amplifier with
Rf
V0  (1  )Va
R

Therefore, the output voltage is,

V1 V V
( 2  3)
R R1 R2 R3
V0  (1  f )
R ( 1  1  1 )
R1 R2 R3

which is a non-inverting weighted sum of inputs.

Let R1 = R2 = R3 = R = Rf/2,

Then, Vo = V1+V2+V3

Subtractor
Differential amplifier

Since, the differential voltage at the input terminals of the op-amp is zero, nodes 'a' and 'b' are at the name
potential, designated as v3. The nodal equation at 'a' is.

𝑣3 − 𝑣1 𝑣3 − 𝑣0
+ =0
𝑅1 𝑅3
Rearranging, we get

1 1 𝑣1 𝑣𝑜
+ 𝑣3 − =
𝑅1 𝑅3 𝑅1 𝑅3

and at 'b' is

𝑣3 − 𝑣2
=0
𝑅2

𝑣3 = 𝑣2
Therefore
1 1 𝑣1 𝑣𝑜
+ 𝑣2 − =
𝑅1 𝑅3 𝑅1 𝑅3

1 1 𝑣1
𝑅3 + 𝑣2 − = 𝑉0
𝑅1 𝑅3 𝑅1
Instrumentation amplifier
Instrumentation amplifier, Log and Antilog Amplifiers, first and second order active filters,
comparators, multivibrators, waveform generators, clippers, clampers, peak detector,
S/H circuit, D/A converter (R- 2R ladder and weighted resistor types), A/D converters using opamps.

Instrumentation Amplifier:

In a number of industrial and consumer applications, one is required to measure and control physical
quantities. Some typical examples are measurement and control of temperature, humidity, light intensity,
water flow etc. these physical quantities are usually measured with help of transducers.

The important features of an instrumentation amplifier are

1. high gain accuracy


2. high CMRR
3. high gain stability with low temperature coefficient
4. low output impedance

In the circuit of figure 6(a), source V1 sees an input impedance = R3+R4 (=101K) and the impedance
seen by source V2 is only R1 (1K). This low impedance may load the signal source heavily. Therefore,
high resistance buffer is used preceding each input to avoid this loading effect as shown in figure
6(b).The op-amp A1 and A2 have differential input voltage as zero. For V1=V2, that is, under common
mode condition, the voltage across R will be zero. As no current flows through R and R’ the non-
inverting amplifier.

A1 acts as voltage follower, so its output V2’=V2. Similarly op-amp A2 acts as voltage follower having
output V1’=V1. However, if V1≠V2, current flows in R and R’, and (V2’-V1’)>(V2-V1). Therefore, this
circuit has differential gain and CMRR more compared to the single op-amp circuit of figure 6(a).

The difference gain of this instrumentation amplifier R, however should never be made zero, as this will
make the gain infinity. To avoid such a situation, in a practical circuit, a fixed resistance in series with a
potentiometer is used in place of R.
Differentiator
As the name implies, the circuit performs the mathematical operation of differentiation (i.e) the output
waveform is the derivative of the input waveform.

The differentiator may be constructed from a basic inverting amplifier if an input resistor R1 is replaced
by a capacitor C1.

 The expression for the output voltage can be obtained KCL eqn written at node V2 as
follows,
𝑖𝑐 + 𝑖𝑓 = 𝐼𝐵1 − − − − − − − − − − 1
𝑠𝑢𝑏, 𝐼𝐵1 = 0,
𝑑 𝑣𝑖𝑛 − 𝑉𝑁 𝑑𝑣𝑖𝑛
𝐶1 = 𝐶1
𝑑𝑡 𝑑𝑡
At node VN is at virtual ground potential i.e., VN=0, From eqn (1)

d (vin  v N ) (vo  VN )
C1  o
dt RF
d (vin ) Vo
C1  0
dt RF
Vo d (vin )
 C1
RF dt
d (vin )
Vo   RF C1        ( 2)
dt

Since the differentiator performs the reverse of the integrator function.


Thus the output V0 is equal to RF C1 times the negative rate of change of the input voltage Vin with
time. The negative signindicates a 180˚phase shift of the output waveform V0with respect to the input
signal.

Vo / Vin  iRF C1  RF C1


The phasor equivalent is Vo(s) = = ----------------- (3)

The above eqn can be rewritten as

f
A1 
fa

1
fa 
2RF C1

Disadvantages:

 At f=fa, A1  1 i.e., 0 dB, and the gain increases at a rate of 20dB/decade. This makes the
circuit unstable and break into oscillation.

 Sensitive to high frequency noise.


Integrator
Definition:A circuit in which the output voltage waveform is the integral of the input
voltage waveform is the integrator or Integration Amplifier. Such a circuit is obtained
by using a basic inverting amplifier configuration if the feedback resistor R F is replaced
by a capacitor CF .

The expression for the output voltage V0 can be obtained by KVL eqn at node VN.

𝐼𝐵 = 𝑖1 + 𝑖𝐹 − − − − − − − − − − 1

𝑉𝑖𝑛 − 𝑉𝑁 𝑑 𝑉0 − 𝑉𝑁
+ 𝐶𝐹 =0
𝑅1 𝑑𝑡

𝑠𝑢𝑏, 𝑉𝑁 = 0

𝑉𝑖𝑛 𝑑 𝑉0
+ 𝐶𝐹 =0
𝑅1 𝑑𝑡

𝑑𝑉0 𝑉𝑖𝑛
𝐶𝐹 =−
𝑑𝑡 𝑅1
𝑡
1
𝑉0 = − 𝑉𝑖𝑛 𝑑𝑡 − − − − − − − − − (2)
𝑅1 𝐶𝐹 0

 Eqn (2) indicates that the output is directly proportional to the negative integral of the
input volts and inversely proportional to the time constant R1 CF .
 Ex: If the input is sine wave -> output is cosine wave.
 If the input is square wave -> output is triangular wave.

These waveform with assumption of R1 Cf = 1, Vout =0V (i.e) C =0.


Comparators
To obtain for better performance, we shall also look at integrated designed specifically as comparators
and converters. A comparator as its name implies, compares a signal voltage on one input of an op-amp
with a known voltage called a reference voltage on the other input. Comparators are used in circuits such
as,
Digital Interfacing
Schmitt Trigger
Discriminator
Voltage level detector and oscillators
1. Non-inverting Comparator:

A fixed reference voltage Vref of 1 V is applied to the negative terminal and time varying signal
voltage Vin is applied tot the positive terminal.When Vin is less than Vref the output becomes V0 at –
Vsat [Vin < Vref => V0 (-Vsat)]. When Vin is greater than Vref, the (+) input becomes positive, the V0
goes to +Vsat. [Vin > Vref => V0 (+Vsat)]. Thus the V0 changes from one saturation level to another.
The diodes D1 and D2 protects the op-amp from damage due to the excessive input voltage Vin. Because
of these diodes, the difference input voltage Vid of the op-amp diodes are called clamp diodes. The
resistance R in series with Vin is used to limit the current through D1 and D2 . To reduce offset problems,
a resistance Rcomp = R is connected between the (-ve) input and Vref.

Input and Output Waveforms:


2. Inverting Comparator:

This fig shows an inverting comparator in which the reference voltage Vref is applied to the
(+) input terminal and Vin is applied to the (-) input terminal. In this circuit Vref is obtained by using
a 10K potentiometer that forms a voltage divider with dc supply volt +Vcc and -1 and the wiper
connected to the input. As the wiper is moved towards +Vcc, Vref becomes more positive. Thus a
Vref of a desired amplitude and polarity can be obtained by simply adjusting the 10k potentiometer.

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