Motorola 15 A 60 Watt

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AN-4838

15 TO 60 WATT AUDIO AMPLIFIERS


USING COMPLEMENTARY
DARLINGTON OUTPUT TRANSISTORS
Prepared by
Richard G. Ruehs
Applications Engineering

The use of monolithic power darlington


transistors can simplify the design of high-
fidelity power amplifiers. Circuit and per-
formance information are provided to
facilitate the design of 15 watt to 60 watt
amplifiers utilizing the power darlington
devices.

MOTOROLA Semiconductor Products Inc.


15 TO 60 WATT AUDIO AMPLIFIERS USING COMPLEMENTARY
DARLINGTON OUTPUT TRANSISTORS

INTRODUCTION
Recently developed silicon monolithic darlington power
transistors permit significant simplification of audio power
Parts List
amplifier circuitry. The amplifiers described in this note
RMS Power 15 W 20W
use complementary power darlington output transistors, Load 4n an 4n an
eliminating the two driver transistors used in previous VCC 32 V 40V 36 V
46 V
methods. A significant cost savings should be realized since, R2 4.3 k 5.6k 5.1 k
4.3 k
R3 82 k 120 k 100 k 130 k
in addition to the driver devices, the driver heat sinks and
R6 3.3 k 3.9 k 3.3 k 4.7 k
output biasing resistors are also eliminated. Also, the
printed circuit board for the amplifier could become very
compact.
Idle Current (Adj. with Rvl
Three circuits will be discussed: a 15 to 20 watt, medi- Nominal Input Sensitivity for
um performance amplifier, a 15 to 60 watt high perform- Full Rated Output

ance amplifier with ac-coupled output, and a 15 to 60 watt Total Harmonic Distortion @
Rated Output. 50 Hz to 20 kHz
high performance amplifier with dc-coupled output. Total Harmonic Distortion @
1 W Output, 1 kHz 0.2%
15-20 WATT AMPLIFIER I nput I mpedence 10kn

The circuit of the 15-20 watt amplifier is shown in Figure


1. To ensure maximum signal swing, the dc "center" volt-
age (the point between R8 and R9) must be one-half of form a voltage divider which provides dc bias to the base
V Ce- This is accomplished by dc feedback from this poin t of QI. Loading of this divider by the base current of Ql
to the base of Q 1, through R3. Resistors R3 and R2 also could cause the center voltage to vary with changes in

50 pF/
50V I
03
MJE1100

21LF/50 V R1
Input~
~+ 10k
02 R8
MPS.U01 0.33

Note 1: Minimum heat sinking for 03 and 04


@ 550C ambient and @ 10% high line
voltage: 15 W - 9.50C/W 0.33*
20 W ; 7.00CIW 2W
Note 2: All resistors are ±.10% except where
* indicates ±'5%.
Note 3: All values given ere common to both
15 and 20 W versions. Vall~es not
shown are In Table I.

Circuit diagrams external to Motorola products are Included as a means of illustrating typical semiconductor applications; consequently,
complete information sufficient for construction purposes Is not necessarily given. The Information in this Application Note has been care-
fully checked and Is believed to be entirely reliable. However, no responsibility is assumed for Inaccuracies. Furthermore, such Information
does not convey to the purchaser of the semiconductor devices described any license under the patent rights of Motorola Inc. or others.
hFE of Q1. To prevent this change, the direct current in R2 and R3 form a voltage divider which sets the dc voltage
the R2, R3 divider is made at least ten times greater than on the base of Ql at approximately 1.5 volts above 1/2
the maximum base current of Ql. YCc. This will maintain the center voltage at 1/2 YCC
Transistor Q2 is used to forward bias the output darling- since there is a constant 1.5 volt drop from the base of Ql
ton devices. Resistors R4, Ry and Rl form a resistive to the output center point. This drop is caused by the
divider which sets the collector to emitter voltage of Q2 base-emitter diode voltage of Ql and the voltage drop
at approximately 2.4 Y for biasing of the output. Ry is across R6 due to the emitter current of Ql. The dc voltage
made variable so that the IC of Q2 can be adjusted and across R4 is set by the YBE(on) voltage of Q2. The
consequently the dc "idle current" in the output tran- collector current of Q 1 and the current thru R6 is thus
sistors can be set to minimize cross-over distortion. Twenty
milliamps of idle current is sufficient to eliminate this YBE(on) Q2 "'" ~ = 0.33 mA
distortion. R4 1.8 kD.
The YCE voltage ofQ2 tracks the YBE(on) temperature
characteristics of Q3 and Q4 adequately. Therefore, if Q2
were mounted on the heat sink with the output transistors,
the dc idle current would remain within practical limits over R6
Ay=-
the temperature range. R5
To ensure maximum swing during peak negative signal
excursions, R6 is connected to the speaker side of the out- The input impedance is set by the parallel equivalent
put coupling capacitor. This makes use of the dc charge resistance of R2 and R3.
on the output coupling capacitor to provide drive current Transistor Q2 has approximately 60 dB of voltage gain
to the base of Q4 thru R6 (bootstrapping). and determines the dominant pole in the amplifier. A
Parts values and typical performance characteristics for 50 pF capacitor is used in this stage to compensate the
the 15 to 20 watt circuit are shown in Table I. amplifier to prevent high frequency oscillations.
Transistor Q3 is used, as in the previous circuit, to for-
THE 15-60 WATT AC COUPLED CIRCUIT ward bias the output devices to prevent cross-over distortion.
The 15 to 60 watt ac-coupled circuit is shown in Figure A constant current source, Q4, is used to eliminate the
2. As in the previous circuit, the center voltage must be need for bootstrapping the base of Q6. This eliminates the
one half YCC for maximum output swing. Resistors Rl, effects of the bootstrap capacitor on frequency, providing

r O.1 jJ.F/
100 V

R2'
82 k

0.39

'+250~jJ.F

R3 C4
.
150 k
+
.
0.39

I C3
100 jJ.F

Note 1: All resistors are ±.10% tolerance R7


except where' indicates ±'5%. + VCC 04
Note 2: Values shown are common to all
amplifiers. Values not marked,
r .,
I ID1
including voltages for electrolytics R8
I I MZ2361
are given in Table II, performance j
120
L
in Table III.
Power
15 20 25 35 50 60
Watts (RMSI
Load
4 8 4 8 4 8 4 8 4 8 4 8
Impedance

VCC 32 V 38 V 36 V 46 V 38V 48V 44V 56 V 50V 65 V 56 V 72V


R5
620 510 560 470 560 390 470 330 390 270 330 220
(ohms)
R7
33 k 39 k 39 k 47 k 39 k 47 k 47 k 56 k 47 k 68 k 56 k 68 k
(ohms)
MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS
Ql
A05 A05 A05 A05 A05 A05 A05 A06 A05 A06 A06 A06
MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS
Q2
A55 A55 A55 A55 A55 A55 A55 A56 A55 A56 A56 A56
MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS
Q3 A13 A13
A13 A13 A13 A13 A13 A13 A13 A13 A13 A13
MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS
Q4
A05 A05 A05 A05 A05 A05 A05 A06 A05 A06 A06 A06
MJE MJE MJE MJE MJE MJE MJ MJ MJ MJ MJ MJ
Q5
1100 1100 1100 1100 1102 1100 3000 1001 3000 3001 3001 3001
MJE MJE MJE MJE MJE MJE MJ MJ MJ MJ MJ MJ
Q6
1090 1090 1090 1090 1092 1090 2500 901 2500 2501 2501 2501
Voltage rating
35V 40V 40V 50V 40V 50 V 45 V 60 V 50 V 65 V 60V 75 V
on Cl
Voltage rating
20V 25 V 25 V 30 V 25 V 30 V 25 V 35 V 30 V 35 V 35 V 40V
on C2, C3
Voltage rating
40V 45V 45 V 55 V 45 V 55 V 50 V 65 V 60 V 75 V 65 V 80 V
on C4
Min. heat sink for
outputs @ 55°C
ambient temper- 9.50C/W 7.00C/W 5.00C/W 6.00C/W 5.50C/W 4.00C/W 3.00C/W
ature and 10%
high line voltage

lower distortion at low frequencies. The collector-emitter


voltage of Q3 is a function of its collector current. There-
fore, to eliminate cross-over distortion when a poorly regu-
Idle Current (Adjusted with RV) 20 mA lated supply is used for Vcc, it is necessary to make the
I nput Impedance 50 kn current source, Q4, independent of supply voltage varia-
Nominal I nput Sensitivity for Rated Power Output 1.0 Vrms
tions. Diode Dl is used for this purpose since its forward
Total Harmonic Distortion at 1.0 kHz and any
Power up to Full Rated Output (See Figure 3) 0.2% voltage and, consequently, the voltage across R8 are rela-
Intermodulation Distortion 60 Hzwith 2 kHz and 7 kHz tively constant with respect to current changes in Dl. Hum
Mixed 4: 1 at 1/2 Maximum Rated Output Power 0.2%
and noise from the power supply are filtered out by Rl
Frequency Response (-1 dB Points) 20 Hz and
50 kHz
and Cl.
Maximum Safe Operating Frequency at Full
Table II lists the parts used for the 15 to 60 watt circuits.
Rated Power - 20 Watt Amplifier: 50 kHz Table III and Figure 3 show typical performance of the
60 Watt Amplifier: 30 kHz
amplifier.

0.30

0.25

............
~
ci
J:
I-
0.20

0.15
............ t-.... I"--
~ f'.,.
t-

r-....
Ful! R,ated Output

I I
LI J III
~ower

I
I
- ./'

?f1.

0.10
r-- 100 mW Output Power

0.05

Frequency (Hz)

FIGURE 3 - Typical T.H.D. versus Frequency for Amplifier of Figure 2


R2
680 10

r
O.1IlF
75 V
03

2.2 k
50 pF
04

R6

10 k

\
R5
2.2 k

+
50llF
Rl R3 6V
10 k 5.1 k #20 Enameled Wire
Close Wound on
Dl
-= R7 10 rl/2 W Resistor

05
MZ92-10
- (10 V) I
,
I

All Resistors are ±'1 0% R4


MZ2361 I
I
I
I
~
120 WO.lIlF
Tolerance Except Where I I
L J
• Indicates ±5%.
-VCC

THE 15 TO 60 WATT DC-COUPLED CIRCUIT to prevent dc from appearing at the speaker. The zero
The IS to 60 watt dc-coupled circuit is shown in Figure center voltage is obtained by using a split power supply
4. The output center voltage must be maintained at zero and a differential amplifier on the input of the circuit. The
volts dc not only to ensure maximum signal swing but also signal input base of the dif-amp (Q I) is referenced to 0

Power
15 20 25 35 50 60
Watts (RMS)

Load
4 8 4 8 4 8 4 8 4 8 4 8
Impedance

VCC ±. 16 V ±.19 V ±.18 V ±'23 V ±.19V ±'24 V ±.22 V ±'28 V ±'25 V ±'33 V ±'28 V ±'36 V
R4
1.5 k 2.2 k 2.0 k 3.3 k 2.2 k 3.3 k 3.0 k 3.9 k 3.6 k S.6 k 3.9 k 6.2 k
(ohms)
R5
(ohms) 1.2 k 820 1.0 k 7S0 1.0 k 680 820 560 680 470 620 430

R7
lS k 18 k 18 k 22 k 18 k 22 k 22 k 27 k 22 k 33 k 27 k 33 k
(ohms)
01,02 Dual MD MD MD MD MD MD MD MD MD MD MD MD
Transistors 8001 8001 8001 8001 8001 8001 8001 8001 8001 8002 8001 8002
MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS
03
A55 ASS A5S AS5 A55 A5S A55 AS6 ASS A56 AS6 A56
MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS
04 A13
A13 A13 A13 A13 A13 A13 A13 A13 A13 A13 A13
MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS MPS
05
AOS AOS A05 AOS AOS AOS AOS A06 A05 A06 A06 A06
MJE MJE MJE MJE MJE MJE MJ MJ MJ MJ MJ MJ
06
1100 1100 1100 1100 1102 1100 3000 1001 3000 3001 3001 3001
MJE MJE MJE MJE MJE MJE MJ MJ MJ MJ MJ MJ
07
1090 1090 1090 1090 1092 1090 2500 901 2S00 '2S01 2501 2S01
Min. heat sink for
outputs @ 55°C
ambient temper- 9.SoC/W 7.0oC/W 5.0oC/W 6.0oC/W 5.SoC/W 4.0oC/W 3.0oC/W
ature and 10%
high line voltage
For Example: An MPS-AI3 Darlington transistor IS

suggested for Q3 or Q4. The typical base-emitter voltage


Idle Current (Adjusted with RV) 20 mA is 1.15 volts which is set equal to YR. VI is the total turn-
Input Impedance 10 k.\1
on voltage for the output transistors and is typically 2.4 V.
Nominal Input Sensitivity for Rated Power Output 1.0 Vrms
Total Harmonic Distortion at any Frequency The total resistance, Rl + R2, should be chosen so that
Between 20 Hz and 20 kHz and at any Power the current through them is less than one-tenth of the
from 100 mW to Full Rated Output (SeeFigure 5) 0.15%
collector current, which is approximately 20 mA. If R2
Intermodu lation Distortion 60 Hz with 2 kH z and 7 kHz
Mixed 4: 1 at 1/2 Maximum Rated Output Power 0.1% is selected as 2.2 k this condition will definitely be satisfied.
Frequency Response (-1 dB Points) 10 Hz and R2 should not be selected much higher than this or the

Square Wave Response .


50 kHz
minimum hFE requirement for the bias transistor will be
higher. By using the known conditions, VR = 1.15, V 1 = 2.4
Maximum Safe Operating Frequency at Full
Rated Power - 20 Watt Amplifier: 50 kHz and R2 = 2.2 k, Rl is calculated to be 2.2 k ohms using the
60 Watt Amplifier: 30 kHz
previously mentioned equation. To allow for variation in
so •.•,
'''VR=Ft
0 .•.

·10'0' ..•
10k.... "OVR=Ft
ov
·10'0' j
VBE and hFE in the bias and output transistor, Rl is
usually divided and potentiometer is added. In this ex-
volts dc thru Rl. One-hundred per cent dc feedback is ample a potentiometer of 1 k ohm and a resistor of 2.2k
accomplished thru R6 to the base of Q2. Since the am- ohms is used to provide this adjustment.
plifier is dc coupled throughout, any offset voltage that
appears at the output will be corrected by the differential
action of Ql and Q2. It is essential that Ql and Q2 be
matched very closely since any difference in base current
and VBE(on) will be reflected as an error voltage on the
output. Transistors Ql and Q2 are biased at 1 mA of
collector current each. A 10 V zener diode in conjunction
with R3 is used to set this current. The zener diode also
provides filtering to prevent hum and noise on the -VCC
line from getting into the input stage. The value of R4 is
chosen for 4 mA; 2 mA of current for the zener diode and
the diff amp's 2 mA:

(R4 = VCC -10 V) .


\ 4mA

The closed-loop ac gain of the amplifier is determined


by:
R6
AV=-' OVERLOAD PROTECTION
R5
A circuit for overload protection applying to all the
The remainder of the circuit operation is identical to darlington amplifiers discussed in this note, is shown in
the previously described ac coupled approach of Figure 2. Figure 7. This circuit holds the darlington output devices
The choke used on the output is to prevent high- within their dc safe-operating area in the event the output
frequency oscillations that might occur with capacitive is accidentally shorted.
loading. Resistors Rl and R2 form a voltage divider which
Table IV lists the parts used for the dc-coupled ampli- senses the peak current flowing through the output tran-
fiers. Table V and Figure 5 show the typical performance sistor and RE. This divider is set to turn Q 1 and Q2 "ON"
of these amplifiers. when the output current goes above the maximum normal
operating level. When Ql and Q2 conduct, they limit the
OUTPUT STAGE BIASING amount of drive to the base of the output and, conse-
The output stage biasing for the circuits in Figures 2 quently, limit the amount of output current. Transistor
and 4 is controlled by Q3 in Figure 2 and Q4 in Figure 4. Ql and its associated circuitry function for the positive
Q3 or Q4 should have an hFE greater than 100 so that the half of the waveform; Q2 and its associated circuitry, for
current through Rl and R2 can be made less one-tenth of the negative half of the waveform. Diode Dl prevents the
the collector current. If this condition is satisfied the base- collector-base junction of Ql and Q2 from being forward
emitter drop of Q3 or Q4 can be considered a reference biased during normal signal conditions and creating dis-
voltage and the values of Rl and R2 can be calculated from tortion in the output waveform.
During shorted output, the average power dissipation
VI Rl in the output devices increases about four times over the
- = 1+- (See Figure 6)
VR R2 normal operating dissipation. The length of time a shorted
0.20

0.15

ci Full Rated Output Pow?r -,/


:x: 0.10
-.....
..:
'j1.

0.05
-
r- 160 Im~ 16utput ~ow~r

1 k
Frequencv (Hz)

condition can be tolerated is strictly a function of the size Power Load Value
and capability of the output heat sinks. When the mini- Watts (RMS) Impedance (ohms) of R1 (ohms)
mum heat sinks specified in Tables I, II and IV are used, 4 330
15
and the circuit is operated in a 250C ambient, the output 8 150
devices can drive a shorted load for a few minutes without 20
4 470
any damage. "Load line" protection circuits can also be 8 180
4 510
used with the darlington amplifiers for long term overload 25
8 220
protection. 4 750
Table VI gives the values of RI in Figure 7 which, in 35
8 390
the event of an overload, provide adequate safe operating 4 910
50
area protection on the output devices for all of the ampli- 8 560
4 1.0k
fiers described in this note. 60
8 620

CONCLUSION The circuits illustrate the simplification resulting from


This note has described IS watt to 60 watt audio power the use of these darlington devices. The achievable per-
amplifiers using silicon monolithic darlington power out- formance of these amplifiers is equal to that previously
pu t transistors. obtained using the best silicon discrete devices.

R2 470
Rl

I MSS
1000
Dl
@ MOTOROLA Semiconduc1:or ProduC,~::," !.?.~.

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